= WARP FPGA Cores = The cores listed below are provided to facilitate use of the various hardware resources on the WARP hardware. == Mango WARP v3 and Module Cores == * [wiki:./w3_iic_eeprom w3_iic_eeprom]: IIC master for reading/writing EEPROM * [wiki:./w3_userio w3_userio]: Controller for all user I/O resources (LEDs, buttons, etc.) * [wiki:./w3_ad_controller w3_ad_controller]: Controller for managing RF interface analog converters * [wiki:./w3_ad_bridge w3_ad_bridge]: Connects user logic to digital ports on AD9963 * [wiki:./w3_clock_controller w3_clock_controller]: Controller for managing RF interface clock buffers * [wiki:./radio_controller radio_controller]: Controller for managing RF interface transceivers and front-ends * [wiki:./fmc_bb_4da_bridge fmc_bb_4da_bridge]: Interface for [wiki:HardwareUsersGuides/FMC-BB-4DA FMC-BB-4DA module] == WARP v2 Cores == * [source:/PlatformSupport/CustomPeripherals/pcores/warp_v4_userio_v1_00_a warp_v4_userio]: Controller for all user I/O resources (LEDs, buttons, etc.) == WARP v1 & v2 Cores == * [wiki:HardwareUsersGuides/RadioBoard_v1.4/RadioController radio_controller]: Controller for managing RF interface transceivers and front-ends * [wiki:HardwareUsersGuides/RadioBoard_v1.4/RadioBridge radio_bridge]: Connects radio_controller to top-level ports for one Radio Board * [wiki:EEPROM_onewire eeprom_onewire]: OneWire master for reading/writing FPGA Board and Radio Board EEPROMs * [source:/PlatformSupport/CustomPeripherals/pcores/clock_board_config_v1_05_a clock_board_config]: Configures Clock Board buffers on power up ---- = Reference Design APIs = For details about the APIs integrated in our various reference designs please refer to the individual design user guides: * [wiki:802.11 802.11 Reference Design] * [wiki:WARPLab WARPLab Reference Design]