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In this post, we would like to seek expert advices on FPGA data recording in WARP platform.
Currently, we are using the Chipscope to record FPGA data for off-line testing and analysis. However, the size of each data batch is limited by available BRAM size. Also, we have to manually operate the chipscope to get each new batch of data. I
So we are thinking whether there is a better way to continuously or automatically record FPGA data in batch mode? First of all, is there a way to let Chipscope automatically trig, export the data, trig again, save the data,....
One possible solution is to use the plb_emc and the external two 512Kx32 SRAM. These could potentially increase the size of each data batch. But the power PC has to coordinate well with the FPGA pcore to move the data from the pcore to SRAM continuously without overflow. Also, how to get the data out of the SRAM to a host PC may require either RS232 or Ethernet. On the other hand, there is only one large batch of data can be saved.
Another possible solution is to use the MGT. Is there any third party boards or computer interface, which could interface or save data from the WARP MGT?
Lastly, we can use the digital I/Q if the data width is small. But that means we have to use a logic analyzer.
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First of all, is there a way to let Chipscope automatically trig, export the data, trig again, save the data,....
I don't think ChipScope has an API, or any in-system way of mimicing ChipScope Analyzer's configuration of the ILA cores.
...how to get the data out of the SRAM to a host PC may require either RS232 or Ethernet
RS232 would be very slow. The WARP FPGA board's UART transceiver can handle 1Mbps, but most PC serial ports max out at 115.2kps.
Is there any third party boards or computer interface, which could interface or save data from the WARP MGT?
Theoretically, any board with an Infiniband keyed HSSDC2 connector should be compatible. In practice, it would be very tricky finding the right board and getting it working. Another FPGA board, with low-level access to the MGT PHY and link layers, would be the best bet. Nallatech makes a pair of boards that integrate a PCI card with a Virtex-II Pro FPGA, MGTs and HSSDC2 connectors (BenPro + BenOne), but this is likely a very expensive hardware combo.
Ethernet is your best option. We've built a project that works sort of how you're describing. It was designed for rapid prototyping of PHY algorithms. It acts as a link between MATLAB and the WARP hardware. The user constructs a vector of complex samples in MATLAB and writes them over Ethernet to the FPGA board. The FPGA then transmits the vector over the air in real-time. A second WARP node receives the transmitted signal, saving the raw I/Q samples in BRAM. The user then reads these samples back into MATLAB over Ethernet. All of the m/C/Sysgen source is available in repository.
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