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We have implemented SPI on warp v3 using FMC-XM-105-G debug card. For testing we have to send a loopback within the same board. Our target code is OFDM_Reference_Design where we have made necessary changes in the warpmac.c and csmamac.c files. Can you provide us with some idea how can we test pur communication within the same board?
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Can you provide us with some idea how can we test pur communication within the same board?
No, not with the very limited information you've provided.
How is your SPI controller implemented? Did you modify the FPGA design to use a hardware controller? Or did you just tie the SPI signals to a GPIO controller for software control?
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We have added the Xilinx XPS_SPI IP to the existing OFDM_Reference _Design and connected the SPI signals to the header of FMC-XM105 debug card. we have made necessary changes within the software itself and compiled successfully with no errors. now we want to test our design. How can we do it by sending the command within the same board as right now we don't have the facility to use a different warp board.
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I'm not sure what you mean by "How can we do it by sending the command within the same board".
However, in order to test new hardware the general procedure should be:
1) Run a couple of existing examples (for example, the Wireless/Wired Bridge) in order to make sure that you did not break any of the existing design.
2) In a separate SDK software project, modify and run one of the provided Xilinx SPI examples. As part of the Xilinx installation, there should be a number of example C files for each standard Xilinx peripherals. Looking at our Xilinx 14.4 installation, the SPI examples for the spi_v3_04_a peripheral are in: C:\Xilinx\14.4\ISE_DS\EDK\sw\XilinxProcessorIPLib\drivers\spi_v3_04_a\examples. It looks like there is a "self test" as part of the examples which would probably be a good place to start. You will need to read and understand the necessary setup and code in order to run the example.
3) Once you have verified that you can access the SPI peripheral from SW, then you need to make sure that the expected pins on the FMC debug board toggle. Using an oscilloscope, you should verify that you see the expected pins toggle to ensure that you have all of the IO mapping correct in your HW project.
Once you feel confident that both the original HW and the new peripheral are working, then you can start using the SPI peripheral in your OFDM project
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Also, SPI is intended for inter-chip communication. You need to provide an SPI slave for the SPI master to talk to. This could be a different board, connected by 4 wires (clk, cs_n, sdi, sdo), or another instance of the axi_spi core in the same FPGA.
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