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I had a few questions regarding the Simulink model in WarpLab.
I think I can make out the receive portion of the model. We can read around 16384 samples from ADC's into memory. The MemControl block provides control over the read and write cycles of the Dual Port RAM (Please correct me if I am wrong here). How exactly are these values then read into Matlab m-files(workspace variables?) or the C programs for that matter?
Sincerely,
Kshitij
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The Sysgen model for WARPlab is converted to a pcore on the OPB via sysgen2opb. The sample buffers are dual-port RAMs. Each buffer has one port tied to the analog converters and the other tied to the OPB (via sysgen2opb's shared memory extension). Once attached to the OPB, samples are read/written via memcpy calls in the WARPLab C code running in the PowerPC.
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I have a few questions regarding WARPLab.
1) What is the symbol rate used in WARPLab ? Can I modify it ? If yes, where is the rate decided, in the MATLAB code or in the FPGA ? It would be helpful if you could specify the exact location in the M code or in the Sysgen model.
2) What role does the Capture Offset variable play in the WARPLab examples and what is its significance ? There is a CaptOffset of 1000 samples defined in the Channel Estimation example but the simple TxRx example does not define a similar CaptOffset.
Thanks.
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1) WARPLab clocks samples into/out of the analog converters at 40MHz- the actual sampling rate. The symbol rate your project realizes depends on the signals you construct. If you want a 5MHz over-the-air symbol rate, for example, you would construct a vector of symbols (in MATLAB), pass the vector through an 8x interpolation filter (also in MATLAB), then send the interpolated vector over the air using WARPLab. The warplab_example_comm.m example does exactly this.
2) The capture offset controls how many samples the receiver saves before the trigger is received. This is provided to help resolve the small amount of jitter between the Tx and Rx nodes reacting to the sync packet. If you set the capture offset to 1000, your received vector should contain approximately 1000 samples of noise which occurred before the Tx node actually started transmitting.
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The following piece of M code is from the 'warplab_processRawRxData' function in WARPLab.
rxData_I = uint16(bitand(rxData_I, hex2dec('3FFF'))); %mask off top two bits
rxData_Isigns = uint16(bitshift(bitand(rxData_I, hex2dec('2000')), -13)); %get sign bit
rxData_I = double(typecast(bitor(rxData_I, rxData_Isigns*hex2dec('C000')),'int16'))./2^13;
Could you please explain what operation is being carried out in the third line?
Thanks a lot.
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The FPGA packs two 14-bit ADC samples into a 32-bit word, then uses Ethernet to send the batch of 32-bit words back to the PC. This code unpacks the signed 14-bit values, scales it to match the source Fix14_13 datatype, and converts it to a double for use in MATLAB.
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I have some questions regarding the RxRSSI:
1. I noticed that the (number of RxRSSI samples) = (number of TxData samples) / 4, does this mean that the sampling rate for getting the RSSI is 10 MHz? Also I noticed that the minimum number of RSSI samples is 512 regardless of number of TxData samples, why is this?
2. The RxRSSI captures the RSSI for a large bandwidth (40 MHz), Is there any way that this RxRSSI could capture the RSSI for only a small BW (e.g. 5 MHZ)
Is it true that in the CSMA MAC in the OFDM reference design, the function that senses the medium before transmission gets some RSSI samples and compares it to a certain threshold to decide whether the medium is free or not? If yes, could these number of RSSI samples and threshold be modified?
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1) The RSSI signal is sampled by its own A/D converter (U6 in the radio board schematics). In WARPLab, this ADC is clocked at 10MHz (1/4 the rate of the I/Q converters). I don't know if there's a minimum number of RSSI samples; hopefully Melissa can answer that.
2) I believe the RSSI measures energy in a narrow bandwidth (3MHz, I think) centered at the carrier frequency.
3) Our current carrier sensing implementation uses just RSSI. The ofdm_pktdetector core contains a block that takes a running sum of RSSI over a programmed length; we use 16 samples by default. The carrier sensing threshold is set relative to this sum. The CSMA threshold can be changed by calling ofdm_pktDetector_mimo_WriteReg_csma_avgThresh() (or modifying the value passed to this function in warpmac_enableCSMA() in warpmac.c). The average length can be changed by calling ofdm_pktDetector_mimo_WriteReg_pktDet_avgLen().
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omehanna wrote:
Also I noticed that the minimum number of RSSI samples is 512 regardless of number of TxData samples, why is this?
The Data and RSSI buffers are read using the function warplab_readSMRO, this function reads 256 addresses at a time, so the total number of addresses read is a multiple of 256. Consequently, the minimum of addresses read is 256. The I/Q buffer stores one I/Q sample per address, the RSSI buffer stores two RSSI samples per address, so for the RSSI the minimum number of samples read is 512. If the number of I/Q samples you want to read is not a multiple of 256 or if the number of RSSI samples you want to read is not a multiple of 512 then you can read the memories and then slice off in Matlab the samples that you don't care about.
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I have a question regarding the number of symbols transmitted and received in WARPLab.
We transmit 2027 symbols (4054 bits, DQPSK), excluding the 13 symbols in the preamble. At the receiver end, the number of symbols received is either 2024 or 2025 (4048 bits or 4050 bits), again excluding the preamble symbols.
That means 2 or 3 symbols are lost on their way to the receiver. Which out of the 2027 symbols transmitted are lost? Can we surely say that they are the first two or the first three?
I want to compare the transmitted and received symbols and so, I need to know corresponding symbols in the transmitted and received sequence i.e. ytx_mod and yrx_bb_mf_ds. How should I go about it?
Thanks a lot.
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This may be due to the sync jitter. The preamble solves timing issues caused by the jitter (using the preamble you know exactly when to sample the output of the matched filter) but because of the jitter some of the last transmitted samples may be lost. For example, if you transmit 2^14 samples and due to the jitter the receiver starts capturing 100 samples before the transmitter starts transmitting, then the last 100 transmitted samples wont be captured (they will be lost) because the receiver buffer will be full by the time the Tx sends sample number 2^14-100. The length of the Tx buffer is 2^14 but we recommend that you transmit a maximum of around 2^14-70 samples to avoid loosing the last samples due to the sync jitter. The maximum jitter we have observed in our experiments is around 50 samples.
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Is there a possibility to modify in the WARP LAB SysGen and xps project in order to allow data streaming from MATLAB. Instead of just preparing one buffer, transmitting it then capturing at the receiver, we would like this to be a continuous process without delays between sending and receiving each buffer, is this possible?
An alternative solution could be increasing the buffer size to 2^16 for example instead of 2^14. Is there any limitations for doing this?
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Increasing the buffer size is possible. The buffers are realized in internal block RAMs. I believe there are enough BRAM blocks to quadruple the buffer sizes in the 2x2 model, although you might have to remove the RSSI buffers to make it fit.
Streaming isn't currently possible, because the throughput of 10/100 Ethernet isn't enough to read/write raw samples at 40MHz. You would need to reduce the over-the-air bandwidth using interpolation/decimation filters in the FPGA in order to realize an effective sampling rate low enough to sustain. We haven't built this, but it's certainly possible.
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Could you please post the latest version of the WARPLab SISO xps reference design so that we could modify it and increase the buffer size. Also I'd like to know the maximum buffer sizes we could use at the Tx and Rx if we remove the RSSI buffers.
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The 2x2 WARPLab is the latest reference design; the SISO version won't be maintained any longer (one version is much easier for us to maintain than two). All of the previous single antenna examples will work with the 2x2 models and code.
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