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      USE_AGC = 0;
                
                NUMNODES = 3;
                
                %Create a vector of node objects
                nodes = wl_initNodes(NUMNODES);
                
                %Create a UDP broadcast trigger and tell each node to be ready for it
                eth_trig = wl_trigger_eth_udp_broadcast;
                wl_triggerManagerCmd(nodes,'add_ethernet_trigger',[eth_trig]);
                
                %Read Trigger IDs into workspace
                [T_IN_ETH,T_IN_ENERGY,T_IN_AGCDONE,T_IN_REG,T_IN_D0,T_IN_D1,T_IN_D2,T_IN_D3] =  wl_getTriggerInputIDs(nodes(1));
                [T_OUT_BASEBAND, T_OUT_AGC, T_OUT_D0, T_OUT_D1, T_OUT_D2, T_OUT_D3] = wl_getTriggerOutputIDs(nodes(1));
                
                %For the primary transmit node, we will allow Ethernet to trigger the buffer
                %baseband, the AGC, and debug0 (which is mapped to pin 8 on the debug
                %header). We also will allow Ethernet to trigger the same signals for the
                %receiving node.
                wl_triggerManagerCmd([nodes(1),nodes(3)],'output_config_input_selection',[T_OUT_BASEBAND,T_OUT_AGC,T_OUT_D0],[T_IN_ETH,T_IN_REG]);
                
                %For the receive node, we will allow debug3 (mapped to pin 15 on the
                %debug header) to trigger the buffer baseband, and the AGC
                nodes(2).wl_triggerManagerCmd('output_config_input_selection',[T_OUT_BASEBAND,T_OUT_AGC],[T_IN_D3]);
                
                %For the receive node, we enable the debounce circuity on the debug 3 input
                %to deal with the fact that the signal may be noisy.
                nodes(2).wl_triggerManagerCmd('input_config_debounce_mode',[T_IN_D3],'enable');
                
                %Since the debounce circuitry is enabled, there will be a delay at the
                %receiver node for its input trigger. To better align the transmitter and
                %receiver, we can artificially delay the transmitters trigger outputs that
                %drive the buffer baseband and the AGC.
                %
                %NOTE:  Due to HW changes in WARPLab 7.2.0, the input delay of the trigger
                %manager increased by one clock cycle;  Therefore, when using WARPLab 7.2.0,
                %we need to increase the output delay by one step.  If using WARPLab 7.1.0,
                %please use the commented out line below:
                %
                %nodes(1).wl_triggerManagerCmd('output_config_delay',[T_OUT_BASEBAND,T_OUT_AGC],[50]); %50ns delay  - WARPLab 7.1.0
                %
                nodes(1).wl_triggerManagerCmd('output_config_delay',[T_OUT_BASEBAND,T_OUT_AGC],[56.25]); %56.25ns delay  - WARPLab 7.2.0
                
                %Get IDs for the interfaces on the boards. Since this example assumes each
                %board has the same interface capabilities, we only need to get the IDs
                %from one of the boards
                [RFA,RFB,RFC,RFD] = wl_getInterfaceIDs(nodes(1));
                
                %Set up the interface for the experiment
                wl_interfaceCmd(nodes,'RF_ALL','tx_gains',TxGainBB,TxGainRF);
                wl_interfaceCmd(nodes,'RF_ALL','channel',F,11);
                
                if(USE_AGC)
                    wl_interfaceCmd(nodes,'RF_ALL','rx_gain_mode','automatic');
                    wl_basebandCmd(nodes,'agc_target',-10);
                    wl_basebandCmd(nodes,'agc_trig_delay', 511);
                else
                    wl_interfaceCmd(nodes,'RF_ALL','rx_gain_mode','manual');
                    RxGainRF = 2; %Rx RF Gain in [1:3]
                    RxGainBB = 12; %Rx Baseband Gain in [0:31]
                    wl_interfaceCmd(nodes,'RF_ALL','rx_gains',RxGainRF,RxGainBB);
                    wl_interfaceCmd(nodes,'RF_ALL','rx_gains',RxGainRF,RxGainBB);
                end
                
                TX_NUM_SAMPS = nodes(1).baseband.txIQLen;
                SAMP_FREQ = wl_basebandCmd(nodes(1),'tx_buff_clk_freq');
                node_tx1 = nodes(1);
                node_tx2 = nodes(2);
                node_rx = nodes(3);
                
                %Set up the baseband for the experiment
                wl_basebandCmd(nodes,'tx_delay',0);
                wl_basebandCmd(nodes,'tx_length',TX_NUM_SAMPS);
                example_mode_string = 'hw';
            else
                %Use sane defaults for hardware-dependent params in sim-only version
                TX_NUM_SAMPS = 32768;
                SAMP_FREQ = 40e6;
                example_mode_string = 'sim';
            end

                if(USE_WARPLAB_TXRX)
                    %Write the Tx waveform to the Tx node
                    wl_basebandCmd(node_tx1,[RFA,RFB,RFC,RFD], 'write_IQ', tx_vec_air(:,1:4));
                    wl_basebandCmd(node_tx2,[RFA,RFB], 'write_IQ', tx_vec_air(:,5:6));
                    
                    wl_basebandCmd(node_tx1,[RFA+RFB+RFC+RFD],'tx_buff_en');
                    wl_basebandCmd(node_tx2,[RFA+RFB],'tx_buff_en');
                    wl_basebandCmd(node_rx,[RFA+RFB+RFC],'rx_buff_en');
                    
                    %Enable the Tx and Rx radios
                    wl_interfaceCmd(node_tx1,[RFA+RFB+RFC+RFD],'tx_en');
                    wl_interfaceCmd(node_tx2,[RFA+RFB],'tx_en');
                    wl_interfaceCmd(node_rx,[RFA+RFB+RFC],'rx_en');
                    
                    %Enable the Tx and Rx buffers
                    
                    %Trigger the Tx/Rx cycle at both nodes
                    eth_trig.send();
                    
                    %Retrieve the received waveform from the Rx node
                    rx_vec_air = wl_basebandCmd(node_rx,[RFA,RFB,RFC],'read_IQ', 0, TX_NUM_SAMPS);
                    rx_vec_air_A = rx_vec_air(:,1).';
                    rx_vec_air_B = rx_vec_air(:,2).';
                    rx_vec_air_C = rx_vec_air(:,3).';
                    %     save rx_vec_air rx_vec_air