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Hi,
I wanted to know how the WARPv3 board deals with the Ethernet. How is the Ethernet chip programmed? For example, when using the Wifi reference design, do you program the ehternet chip via c code or sysgen code?
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The WARP v3 board has a Marvell 88e1121R dual-PHY Ethernet chip. This chip implements two 10/100/1000 Ethernet PHYs with RGMII connections to the FPGA. The Ethernet MACs are implemented in the FPGA using the Virtex-6 TEMAC cores. The TEMACs are connected to the MicroBlaze via axi_ethernet cores. All configuration of the Ethernet PHY is implemented in C code in the MicroBlaze. The actual movement of packets to/from the Ethernet MAC is handled by an axi_dma core. This core implements logic to interface the TEMAC streaming Tx/Rx interfaces to a memory-mapped interface on an AXI interconnect. In the 802.11 ref design the axi_dma for the ETH A interface moves Ethernet Rx packets into the wireless Tx queues, and moves wireless Rx packets to the Ethernet Tx interface.
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Thanks a lot for this comprehensive reply. So programming the ethernet PHY chip is done using C code not SysGen code?
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Right- all Ethernet configuration and packet Tx/Rx is managed from C code in the MicroBlaze.
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Where can I find the file that programs the Ethernet PHY chip. I mean the one that configures the PHY chip. Where is that part of the code.
Thanks
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The Ethernet PHY requires very little configuration - it defaults to sensible settings on reset. The 802.11 Ref Design initializes the ETH A interface in wlan_mac_eth_util.c. The only configuration of the PHY chip is setting the link speed to 1Gbps (the chip defaults to auto-negotiate, but we don't implement the MAC side of the auto-negotiation process).
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