WARP Project Forums - Wireless Open-Access Research Platform

Hi,

I am trying to reload the coefficients to the Xilinx FIR filter. It seems that I need to have a "port in" (the yellow "in" block in sysgen) for that. However, I have trouble in sending data from the software to FPGA. Are you aware of any examples that I can start with? I was trying to look at the way of loading tx data in warplab, but it seems very complicated to me.

Thanks in advance,
Lu