You are not logged in.
I am tring to modify the ofdm_txrx_mimo.mdl file but I run into an error while compiling the file. I have tried the unmodified file too but still get the same error. Can you help me with this
heres the error log :
--------------------------------- Version Log ----------------------------------
Version Path
System Generator 10.1.3.1386 C:/Xilinx/DSP_Tools/common/bin/../../sysgen
AccelDSP 10.1.3.1386 C:/Xilinx/DSP_Tools/AccelDSP
Matlab 7.6.0.324 (R2008a) C:/Program Files/MATLAB/R2008a
ISE 10.1.03i C:/Xilinx/ISE
--------------------------------------------------------------------------------
Summary of Errors:
Error 0001: caught standard exception
Block: Unspecified
--------------------------------------------------------------------------------
Error 0001:
Reported by:
Unspecified
Details:
standard exception: XNetlistEngine:
An exception was raised:
com.xilinx.sysgen.netlist.NetlistInternal: couldn't write
C:/Users/zohaib/AppData/Local/Temp/Temp1_OFDM_ReferenceDesign_v11_2.zip/OFDM_ReferenceDesign_v11_2_public/pcores/ofdm_txrx_mimo_plbw_v1_07_k/mdlsrc/plb46_txrx_v21_fixedMIMO/sysgen/coregen_ShJC/coregen_tmp/single_port_block_memory_virtex2p_6_1_48d9214661848f8c.coe
at
C:\Users\zohaib\AppData\Local\Temp\Temp1_OFDM_ReferenceDesign_v11_2.zip\OFDM_ReferenceDesign_v11_2_public\pcores\ofdm_txrx_mimo_plbw_v1_07_k\mdlsrc\plb46_txrx_v21_fixedMIMO\sysgen\masterScript3819.pl
line 26614
--------------------------------------------------------------------------------
Offline
I got rid of the old error but now im stuck at the following error.
Begin generation
Checking model status
Checking simulation times
Performing compilation and generation
*** ERROR ***
Errors occurred during netlist generation.
Error using ==> xlCompileGenerateMdl at 187
Error reported by S-function 'sdspfirdn2' in 'ofdm_txrx_mimo/"Channel"/FIR Decimation3':
Continuous sample times not allowed.
Offline
This is a known issue in System Generator- see this Xilinx answer record. Adding a Simulink zero-order hold block before the Channel subsystem should get rid of the error.
Offline
THanks for the reply, I will check that out
I was trying to generate a bitstream for the ofdm reference design in XPS and it was sucessfully placed and mapped but then i got an XFLOW error, I am pasting the output of the log below, can you help with this error.
Design Summary:
Number of errors: 0
Number of warnings: 209
Logic Utilization:
Total Number Slice Registers: 27,559 out of 66,176 41%
Number used as Flip Flops: 27,555
Number used as Latches: 4
Number of 4 input LUTs: 28,629 out of 66,176 43%
Logic Distribution:
Number of occupied Slices: 20,781 out of 33,088 62%
Number of Slices containing only related logic: 20,781 out of 20,781 100%
Number of Slices containing unrelated logic: 0 out of 20,781 0%
*See NOTES below for an explanation of the effects of unrelated logic.
Total Number of 4 input LUTs: 30,198 out of 66,176 45%
Number used as logic: 25,444
Number used as a route-thru: 1,569
Number used for Dual Port RAMs: 302
(Two LUTs used per Dual Port RAM)
Number used as Shift registers: 2,883
Number of bonded IOBs: 548 out of 964 56%
IOB Flip Flops: 642
Number of PPC405s: 2 out of 2 100%
Number of JTAGPPCs: 1 out of 1 100%
Number of RAMB16s: 231 out of 328 70%
Number of MULT18X18s: 140 out of 328 42%
Number of BUFGMUXs: 7 out of 16 43%
Number of DCMs: 1 out of 8 12%
Number of BSCANs: 1 out of 1 100%
Number of RPM macros: 155
Peak Memory Usage: 1429 MB
Total REAL time to MAP completion: 1 hrs 8 mins 53 secs
Total CPU time to MAP completion: 1 hrs 4 mins 23 secs
Mapping completed.
See MAP report file "system_map.mrp" for details.
ERROR:Xflow - map: The pipe has been ended.
ERROR:Xflow:42 - Aborting flow execution...
make: *** [__xps/system_routed] Error 1
Done!
Offline
I've never seen that error before. Some Googling suggests it's a problem with Windows, not just the Xilinx tools. Can you build any designs in XPS (like one of our XPS tutorials)?
Offline