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Are the ADC outputs from the radio daughter card to the FPGA in offset binary or two's complement format ?
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The outputs are two's complement by default. The data format is configured via the DFS pin on the radio board's ADC (AD9248). See the AD9248 datasheet for details.
The DFS pin for each radio daughtercard is driven by the radio controller pcore. The value is tied to a constant (selecting two's complement) in the controller's Verilog source.
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