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#1 2009-Feb-28 23:35:46

jsm
Member
Registered: 2009-Feb-28
Posts: 3

DC offset at ADC outputs

Hi, we're observing a DC offset at the ADC output (I and Q). We don't have anything connected to the receiver antenna and we used the default receiver settings for LNA and VGA. We're seeing a DC offset of around 472 (decimal) at ADC I output and -350 (decimal) for the ADC Q output. Could be due to LO leakage on the Maxim RF? Are these typical values? Seems rather high.

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#2 2009-Mar-01 00:13:29

jsm
Member
Registered: 2009-Feb-28
Posts: 3

Re: DC offset at ADC outputs

We reset the WARP board and the DC offset we are now seeing is substantially reduced and back to the same low levels a couple of days ago. Any ideas on why this DC offset would seem to be drifting?

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#3 2009-Mar-02 14:10:38

jsm
Member
Registered: 2009-Feb-28
Posts: 3

Re: DC offset at ADC outputs

The large DC offsets come back after some time (2 hours), suggesting temperature dependence (?). Our application requires that we be able to remove the DC offset, assuming it is fixed. However, in this case it drifts and so needs to be tracked. Any thoughts on what is causing this?

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#4 2009-Mar-02 17:53:07

murphpo
Administrator
From: Mango Communications
Registered: 2006-Jul-03
Posts: 5159

Re: DC offset at ADC outputs

Some DC offset in the Rx I/Q is normal. There are a few factors:

-The RXHP pin on the MAX2829 controls the corner frequency of the high pass filter applied to the I/Q signals. See Table 16b in the MAX2829 datasheet for the specifics. It is important that this pin be asserted (RXHP=1) whenever you change values for the Rx RF and BB amplifiers. I don't fully understand the underlying cause (some analog voodoo about a non-zero input causing a DC kick whenever the amps change values). You can see some plots of this on page 16 of the MAX2829 datasheet.

-The best practice is to leave RXHP asserted while packet detection is running and while AGC is still choosing gains. The AGC core should de-assert the pin only after it has chosen gains. This is how our OFDM reference design works.

-Depending on your PHY parameters, you might get away with leaving RXHP asserted all the time. For 802.11-like OFDM systems this isn't an option (since a 600KHz stop-band centered at DC would kill a few subcarriers).

-Some residual Rx DC offset is normal. It will also change over time, decaying slowly after RXHP is asserted. From page 4 of the datasheet:
  -I/Q Static DC Offset (RXHP=1) = +/- 2mv
  -I/Q DC Droop (After switching RXHP to 0) = +/- 1mV/ms

-Our AGC core contains two blocks to compensate for this. The first block takes the average I/Q values after de-asserting RXHP and subtracts this from the remaining I/Q samples; this handles the static offset. The second block implements an IIR high-pass filter with a very low corner frequency to track out the residual offset for the duration of a packet.

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