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I have tried to do something about my problem
I can use Matlab with simulink to produce 802.11's Scrambler and DSSS mechnision module
and use the way learned from Lab3 to include my design to a xps project.
I have tried to write something to my module's register and read it, but still have some peoblem
1. How my program cooperate with WARP kit's clock??
for example if there are some blocks different "sample period" in my module. then what happen with it??@@?
Does there any block can "talk" with board's Clock?
2. When i try to read a register which increase it's value by 1 every clock in my xps C-code design,
it will show about 1035 2501 4352 .....etc how can i get the : 1 2 3 4 5 6 7 8 9 sequence?
3. We tried to use Oscilloscopes to see Lab3's signal. But there is nothing in Oscilloscopes
ps: our Oscilloscopes can measure to 5Ghz and our configuration is connect +probe to anntana of radio board 2. and Warp shine green light meanning bit file is fine.
So we want to ask if it is possible to observation signal by Oscilloscopes? How@@?
And what is the "true" signal out from Radio Anntana in Lab3'design?? Is it same sin&cosin wave showed in Matlab scope??
4. What is the meaning of IQ buffer?? We have read some document from Google search and knowing it is someting about QPSK modulation
But what is the expllict definition of IQ buffer???
5. If we choose BPSK for modulation like Lab4, How many time period is needed for one unit transfer??
What i mean is, for example, if i try to send 0,1 how many sin wave will be needed???
Thx. My england maybe is not good enough to express my quition. Hope you all know my problem@@ and give me some hint. Thanks
Last edited by eddyxd (2009-Jul-02 03:37:56)
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1) The clock in hardware corresponds to the system sample period in simulation, which will be the fastest sample period in a Sysgen design. Please refer to the Sysgen users guide and other documentation, which discusses clocking in detail.
2) Programs in the PowerPC can't access registers in hardware every cycle. It requires many bus clock cycles to execute a read, plus the processor requires many cycles to execute the code (and even longer if you're xil_printf'ing in the same loop). Registers are best used for control values and monitoring state via handshakes between code and fabric (i.e. the Sysgen core should assert a register bit and hold it static until the code confirms it as read it).
3) RF signals are best observed with a spectrum analzyer of some kind. For workshops, we use a Wi-Spy (from MetaGeek), which makes visualizing energy at 2.4GHz easy.
4) I/Q means in-phase and quadrature, the real and imaginary parts of a complex waveform.
5) The transmission length is a function of payload size and modulation selection for the full-rate symbols. Every packet has a fixed overhead of preamble, training and base-rate symbols. Please see the OFDM frame format page for details.
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