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The model linked is an older version of the physical layer. If you would like to implement error correction, I recommend starting from the latest sysgen model and modifying the pipeline to add error correction. See the custom peripheral tutorial on creating a basic sysgen model.
As mentioned in this previous thread there is an old project that implements convolutional coding. That was done in verilog and added as a black box into the sysgen model.
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The next WARP workshop is at Rice University on March 29-30 http://warp.rice.edu/trac/wiki/Workshops/Rice_2010March
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Can you please elaborate a little on how to "start from the latest sysgen model and modify the pipeline to add error correction".
Exactly which sysgen model is to be used? and what needs to be modified in that?
I can see that there is already an fec_encoder block in this model in OFDM Tx MIMO -> Training_Data -> FlexibleMod and also a corresponding fec_decoder.
Please suggest. Thanks
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You want to start with the base supermimo.mdl (http://warp.rice.edu/trac/browser/Resea … /MIMO_OFDM) file and understand how it is built. You can pull up any OFDM tutorial and the blocks should be comparable. Once you know how to integrate coding in OFDM you can create new sysgen subsystems that will do the encoding and decoding.
If you do not want to modify the real-time physical layer, you can use WARPLab, where the samples are created in MATLAB and the boards are used to send and receive the data.
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Can you please tell me where exactly is the difference between the two simulink models Rev1136 and Rev1106 as given here http://warp.rice.edu/trac/log/ResearchA … l?rev=1156
I am unable to find out the difference.
And what does this statement in the readme file ( http://warp.rice.edu/trac/browser/Resea … /ConvCoded )mean
"I got this model to run without sysgen errors. The PHY doesn't actually work."
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I used the Sysgen model Rev1106 given in the repository http://warp.rice.edu/trac/log/ResearchA … l?rev=1156 and exported as a peripheral core using EDK Export Tool. I want to use this in the XPS reference design.
I want to replace the ofdm_txrx_mimo_plbw_0 in the reference design with ofdm_txrx_mimo_coded_plbw_0 pcore.
I saw this tutorial on Using a Custom Peripheral in XPS http://warp.rice.edu/trac/wiki/Exercise … tomPeriphs but I cant understand how to make connections for the ports of the bus interface ofdm_txrx_mimo_coded_plbw_0
Can you please suggest. Thanks
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As discussed in a previous thread, an XPS project using the code PHY is available. It is older than the current reference designs and supports only SISO links with BPSK/QPSK/16-QAM. The underlying PHY uses Sysgen black boxes to wrap the Verilog encoder and decoder implementations (also available in svn).
If you're struggling with the integration of a pcore in an XPS project, I would suggest starting with our tutorials and workshop exercises. These cover the same tools and processes using much simpler designs than the PHY.
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