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In Murphy's thesis, I see the description on the AF function which just amplify the receiving radio I/Q samples and relay to the transmitter. The AF buffer, implemented by BRAM, is used for this relay. My question is that is this AF buffer within the memory space of the PowerPC, i.e, can the MAC layer software access this AF buffer?
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No- the AF buffer isn't mapped into the address space of the PPC. It's a dual-port RAM, with one port used for writing incoming I/Q during Rx, and one for reading stored I/Q for Tx.
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If I want to map this AF buffer to the address space, can I just reuse the current dual-port RAM or anything else to do? thanks if you have any hints.
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Only Shared Memory blocks will be mapped into the PPC address space. You would need to modify the PHY design to add a Shared Memory block.
I'm still not clear on what you're trying to build- if you need to capture raw I/Q values, WARPLab can do this as-is. You could even use the OFDM Reference Design as a transmitter, and capture I/Q samples using a WARPLab receiver, if your application requires OFDM.
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Besides shared memory, I see that,in the EDK, the current Pkt Buffer utilize a seperate 64k dual-port RAM IP core which is conneted to the OFDM txrx IP core thru pket buffer interface build in the OFDM core designed by system generator. May I just add another dual-port RAM core in the EDK which can be used for this I/Q capturing. The only thing I am wondering is that if there are enough on-chip block memory for virtex 4.
I just want to add the I/Q capturing for post processing, while keep the OFDM tranmitter and receiver on the same time at a single board.
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In general, I am working on a big project that requires the single board can have a dedicate channel to capture the radio data and do some special process. but keep the the whole OFDM transeciver function. So the WARP lab receiver is not fit to my requirement and I also need to add a radio board to the warp board.
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There are ~60 BRAM primitives (each 16kb in size) available in the Virtex-4 build of the latest OFDM Reference Design. It would be easiest to add a Shared Memory block to the OFDM Sysgen model. You'll need to build addressing logic, implementing whatever buffering scheme your application requires. The AF buffer, for example, is a circular buffer which records continuously, and stops only when the PHY has finished receiving a packet.
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Thanks murphy for you suggestion!
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Hi Murphy, I would like to start from the WARPLab design, however I did not find the warplab_mimo_4x4.mdl files in the repository. Could you please release it or not?
I see that there are 4 dual port RAM allocated for all the 4 radio boards, when going through the generated vhdl files for the core - warplab_mimo_4x4_plbw.
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The model is in the repository: /ResearchApps/PHY/WARPLAB/WARPLab_v05_2/Sysgen_Model. There are some notes about modifying the design in the WARPLab reference design documentation.
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Thanks very much!
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murphpo wrote:
The model is in the repository: /ResearchApps/PHY/WARPLAB/WARPLab_v05_2/Sysgen_Model. There are some notes about modifying the design in the WARPLab reference design documentation.
Hello murphpo, can i use this repository /ResearchApps/PHY/WARPLAB/WARPLab_v05_2/Sysgen_Model to achieve forward and amplify relay without self-interference cancellation for full duplex relay application? Actually, i want to configure one warp v3 node as AF relay without self interference cancellation. And, i just need RF A and RF B interfaces. RF A can be a receiver to receive signals from the environment. Then, amplifying the received signals for RF B to transmit.
I think the above repository is good to achieve the above goal.
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This thread is 7 years old - the designs mentioned above are no longer useful. I would suggest starting with the current WARPLab Reference Design (currently v7.7.1 for WARP v3 hardware) and constructing your experiment from there. You could build a simple AF relay with WARPLab by receiving samples, reading them into MATLAB, writing them from MATLAB back to hardware, then transmitting. For quicker Rx-to-Tx turnaround you would need to modify the WARPLab hardware design to transfer Rx samples to the Tx path without the roundtrip through MATLAB.
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For quicker Rx-to-Tx turnaround you would need to modify the WARPLab hardware design to transfer Rx samples to the Tx path without the roundtrip through MATLAB.
this is what i want to do.
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