WARP Project Forums - Wireless Open-Access Research Platform

You are not logged in.

#1 2016-Sep-22 01:16:38

gmkim
Member
Registered: 2016-Jul-19
Posts: 27

.

.

Last edited by gmkim (2020-Aug-17 20:06:20)

Offline

 

#2 2016-Sep-22 21:48:53

murphpo
Administrator
From: Mango Communications
Registered: 2006-Jul-03
Posts: 5159

Re: .

There is unavoidable latency when using MATLAB to control the WARP node. We've optimized the IP/UDP interface for MATLAB as much as possible (via the mex transport) and the MicroBlaze C code in the WARPLab reference design is as low-latency as possible. Even then, there will be substantial and varying latency between the MATLAB workspace and the WARP hardware. For many PHY experiments this is no problem. However if you need low-latency, deterministic timing between an Rx event and Tx event, the WARPLab Reference Design may not be suitable without modification.

For fast and deterministic Rx-to-Tx turnaround you should consider implementing your design in the FPGA logic. The FPGA has direct access to the I/Q interfaces of the ADCs and DACs and direct control of the radio Tx/Rx state. The FPGA project for the WARPLab Reference Design may be a good starting point. The w3_warplab_buffers core implements the "PHY" part of WARPLab (IQ buffers and control logic) and is implemented in System Generator. You could modify this core with your custom Rx logic to detect the target waveform, removing the high-latency IQ->Ethernet->MATLAB path.

Offline

 

#3 2016-Sep-23 00:13:22

gmkim
Member
Registered: 2016-Jul-19
Posts: 27

Re: .

.

Last edited by gmkim (2016-Oct-03 04:37:13)

Offline

 

#4 2016-Sep-23 10:43:33

murphpo
Administrator
From: Mango Communications
Registered: 2006-Jul-03
Posts: 5159

Re: .

WARPnet is a framework for controlling experiments with the OFDM Reference Design. WARPnet and the OFDM Reference Design are no longer under active development. These are not good options for starting a new project on WARP.

The 802.11 Reference Design is the best example of a real-time MAC/PHY implementation for WARP. However this design is much more complex than the WARPLab design. I still recommend you start by modifying the WARPLab FPGA design with your custom Rx logic.

Offline

 

Board footer