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#1 2016-Nov-05 23:08:19

aj19
Member
Registered: 2013-Jul-08
Posts: 19

PLL Phase Drift

As far as I understand it, the phase output of the frequency synthesizer on the MAXIM transceiver chip should stay constant after boot, correct? Apart from drastic environment changes (e.g. 50C temperature change) of course. I, however, have seen a 15 degree shift in less than 5 hours in a controlled indoor lab setting. Is there any explanation for why this may be happening?

Seems I can't attach docs otherwise would attach my experiment plots.

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#2 2016-Nov-07 10:50:38

murphpo
Administrator
From: Mango Communications
Registered: 2006-Jul-03
Posts: 5159

Re: PLL Phase Drift

I've never characterized the long-term phase coherence of multiple transceivers locked to the same frequency reference. It's also possible the phase differences you've observed are not actually in the PLL but are the result of temperature changes in the other components in the RF circuit paths. I would not be surprised if the propagation delays through the PA and filters change slowly with temperature. Have you characterized the end-to-end phase in a narrow or wide bandwidth? If a wide bandwidth do you observe the phase drift is constant across frequency, or (approximately) linearly related to frequency?

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