WARP Project Forums - Wireless Open-Access Research Platform

You are not logged in.

#1 2017-Jan-19 06:31:33

alice_warp
Member
From: Italy
Registered: 2015-Sep-08
Posts: 53

Timing error

Hi everybody,
I have tried to increase the size of mb_low_dlmb_bram_cntlr and mb_low_ilmb_bram_cntlr from 64K to 256K (I'm working with Mango_802.11_RefDes_v1.5.3), because I have to add much code in the low CPU (I don't know if this is the right way). Unfortunaly, there is a timing error, as figures show.


http://i66.tinypic.com/9qva0y.png

http://i63.tinypic.com/s1q3kp.png

Is there a way to resolve this problem?

Thanks!
Alice

Last edited by alice_warp (2017-Jan-19 06:36:52)

Offline

 

#2 2017-Jan-19 08:29:04

murphpo
Administrator
From: Mango Communications
Registered: 2006-Jul-03
Posts: 5159

Re: Timing error

That is the correct way to adjust the size of the I/DLMB instances. However in our experience a single I/DLMB instance larger than 64KB rarely meets timing at 160MHz. The best alternative is to use multiple smaller memory blocks to create one larger LMB memory area. This is how the 128KB LMB is built for CPU High in the current 802.11 ref design. I would suggest mimicking that approach for CPU Low if you require extra code space.

Offline

 

#3 2017-Jan-30 09:27:22

alice_warp
Member
From: Italy
Registered: 2015-Sep-08
Posts: 53

Re: Timing error

Ok, thank you :)

Offline

 

#4 2017-Jan-31 16:58:29

murphpo
Administrator
From: Mango Communications
Registered: 2006-Jul-03
Posts: 5159

Re: Timing error

Just FYI I got two memory sizes wrong in my post above.

We have been successful using LMB blocks up to 128kB clocked at 160MHz. We definitely got timing failures when we attempted a single 256kB LMB block.

The 802.11 Ref Design (through v1.6.0) has:
-A 256kB LMB area for CPU High, composed of two 128kB blocks tied to the MicroBlaze LMB interconnects;
-A 64kB LMB area for CPU Low, composed of a single 64kB block.

We are planning to expand the LMB for CPU Low to 128kB (hopefully as a single 128kB block) in a future 802.11 ref design release, as the code size of the DCF implementation has grown very close to 64kB in recent versions.

Offline

 

#5 2017-Feb-01 03:15:33

alice_warp
Member
From: Italy
Registered: 2015-Sep-08
Posts: 53

Re: Timing error

Yes, I saw that there are two 128kB blocks in CPU High, so I tried the same method for CPU Low and now it works.
Thank you!

Offline

 

Board footer