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Hi all,
I am attempting to use a different DDR3 SRAM with the mango board, a MT4KTF25664HZ-1G9. However, this SRAM is only customizable through the xilinx MIG-7 interface, and hence with virtex7 fpga's, not the virtex6 the mango board has. Presently, the 802.11 reference design uses the MT8JSF25664HZ-1G4 SRAM, generated through the AXI 6 series memory controller IP.
Is there any way I can potentially use this different DDR3 SRAM with the 802.11 reference design? Perhaps through changing certain parameters in the system.mhs, or the axiv6_ddr.mpd file?
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Did you try the new SO-DIMM with the existing 802.11 design? It might just work. Our designs don't run the DRAM anywhere near the max speed. We've updated SO-DIMMs over the years without changing the MIG config. However we've definitely observed some SO-DIMMs that don't work with the current MIG config. For example we've never used a dual-rank DIMM successfully.
If you need to customize the memory controller you can run the MIG in ISE 14.4 via the Core Generator application. The MIG will read the "<xps_proj>/data/DDR3_SODIMM_mig_saved.prj" file (also available here). This .prj file defines the current MIG configuration, including memory component config and FPGA pin assignments. Xilinx has not updated the Virtex-6 MIG in a long time. A new SO-DIMM will not be in the list of supported devices, but you may have success defining a custom device using timing values for the new DIMM.
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I did try it, and received errors such as:
ERROR in Ethernet B:
Mango wlan_exp IP/UDP transport error: 0x00000124
See documentation for more information.
0x0000020E
Hmm, which parameters do you suggest tuning?
In the axi_v6_ddrx.v verilog file, there are such like:
parameter C_TCK = 2500,
// memory tCK paramter.
// # = Clock Period.
parameter C_TFAW = 45000,
// memory tRAW paramter.
parameter C_TPRDI = 1_000_000,
// memory tPRDI paramter.
parameter C_TRRD = 7500,
// memory tRRD paramter.
parameter C_TRAS = 37500,
// memory tRAS paramter.
parameter C_TRCD = 13130,
// memory tRCD paramter.
parameter C_TREFI = 7800000,
// memory tREFI paramter.
parameter C_TRFC = 110000,
// memory tRFC paramter.
parameter C_TRP = 13130,
// memory tRP paramter.
parameter C_TRTP = 7500,
// memory tRTP paramter.
parameter C_TWTR = 7500,
// memory tWTR paramter.
parameter C_TZQI = 128_000_000,
Perhaps changing these?
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Right after clicking Submit it occurred to me that there's an easier way to run the MIG. In the XPS System Assembly View right-click on the DDR3_SODIMM instance and select Configure IP. This will launch the MIG from inside XPS and will correctly update the MHS and data/DDR3_SODIMM_mig_saved.prj files. This is much easier than manually integrating the output of the Core Generator MIG with the XPS project.
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Yes, that way is easier, although I believe it gives some reduced options as specified in the xilinx u406 pdf for virtex6 memory controllers. Perhaps they are not relevant though.
My approach was to generate the ddr3 sodimm for the virtex7 mig version, and then compare the files as best as possible to see what can be tuned for the virtex6 one. Would this be the most pragmatic approach to take? The datasheets don't seem to provide much timing information unfortunately.
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That SO-DIMM datasheet lists the base component as MT41K256M16. In theory those datasheets should provide all the necessary timing info. That said, I've never tried customizing the MIG for a new memory component.
ERROR in Ethernet B:
Mango wlan_exp IP/UDP transport error: 0x00000124
See documentation for more information.
0x0000020E
That error is reported by the Ethernet DMA. Did you make any changes to the C code? It's not obvious to me why a new DIMM would work well enough for our basic memory test (wlan_mac_high_memory_test()) but break during init of the Ethernet DMA.
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It sometimes breaks during the wlan_mac_high_memory_test and sometimes does not. However, the 0x124 error is consistent when trying to receive a packet through transport_poll.
I haven't modified anything that is involved in receiving and processing a packet, namely the eth_recv_frame function and subsequent code.
Last edited by 5g3 (2018-Nov-13 12:28:19)
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We've never observed a DIMM that works intermittently - it's always been pass-fail at the memory_test(). It would be worth verifying whether you observe the intermittent failures with the unmodified 802.11 ref design. If so, then customizing the MIG configuration for all the timing parameters in those datasheets is my best suggestion.
FWIW we've used the DIMMs below successfully, with no changes to the MIG configuration in the 802.11 and WARPLab ref designs:
* G.SKILL F3-10666CL9S-2GBSQ
* G.SKILL F3-10600CL9S-2GBSQ
* Crucial CT25664BF1339.C8
* Crucial CT25664BF160B.C8
* Kingston KVR1066D3S8S7
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This is the sodimm in question: https://www.micron.com/parts/modules/dd … 5664hz-1g9
So, an unmodified 802.11 had the following output:
----- Mango 802.11 Reference Design -----
----- v1.7.3--------------------
----- wlan_mac_sta ----------------------
Compiled Nov 13 2018 14:28:24
Testing DRAM...
Tx Queue of 3413 placed in DRAM: using 13652 kB
Initializing Event log (1047993840 bytes) at 0xC188E210
Network Info list (len 128) placed in DRAM: using 10 kB
Station Info list (len 332) placed in DRAM: using 62 kB
1 Eth Tx BDs placed in BRAM: using 64 B
239 Eth Rx BDs placed in BRAM: using 14 kB
------------------------
WLAN EXP v1.7.3 (compiled Nov 13 2018 14:21:07)
Configuring transport ...
ETH B MAC Address: 40:D8:55:04:26:F3
ETH B IP Address: 10.0.0.0
Configuring ETH B with 9024 byte buffers (3 receive, 2 send)
ETH B speed 1000 Mbps (default)
Listening on UDP ports 9500 (unicast) and 9750 (broadcast)
Not waiting for Ethernet link. Current status:
ETH B not ready
!!! Make sure link is ready before using WLAN Exp. !!!
WLAN EXP Initialization complete
------------------------
WLAN MAC Station boot complete:
Serial Number : W3-a-00911
Default SSID :
MAC Addr : 40:D8:55:04:26:F2
Press the Esc key in your terminal to access the UART menu
ERROR in Ethernet B:
Mango wlan_exp IP/UDP transport error: 0x00000110
See documentation for more information.
0x00000100
!!! Resetting the DMA !!!
However, running it each time provides different errors, such as below:
*********************************
----- Mango 802.11 Reference Design -----
----- v1.7.3--------------------
----- wlan_mac_sta ----------------------
Compiled Nov 13 2018 14:28:24
Testing DRAM...
Tx Queue of 3413 placed in DRAM: using 13652 kB
Initializing Event log (1047993840 bytes) at 0xC188E210
Network Info list (len 128) placed in DRAM: using 10 kB
Station Info list (len 332) placed in DRAM: using 62 kB
1 Eth Tx BDs placed in BRAM: using 64 B
239 Eth Rx BDs placed in BRAM: using 14 kB
------------------------
WLAN EXP v1.7.3 (compiled Nov 13 2018 14:21:07)
Configuring transport ...
ETH B MAC Address: 40:D8:55:04:26:F3
ETH B IP Address: 10.0.0.0
Configuring ETH B with 9024 byte buffers (3 receive, 2 send)
ERROR in Ethernet B:
Mango wlan_exp IP/UDP transport error: 0x00000114
See documentation for more information.
0x00000001
ERROR in Ethernet B:
Mango wlan_exp IP/UDP transport error: 0x00000100
See documentation for more information.
0x00000001
TRANSPORT: ERROR (wlan_exp_transport.c:123): Ethernet B initialization error
Sometimes I will also get errors like this:
ERROR in Ethernet B:
Mango wlan_exp IP/UDP transport error: 0x00000115
See documentation for more information.
0x00000009
eth_recv_frame returned error: -1
Last edited by 5g3 (2018-Nov-13 13:56:34)
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These errors are consistent with flaky DRAM. Both Ethernet DMAs (for ETH A bridge and wlan_exp on ETB) use DRAM for reading/writing packet payloads. The ETH B DMA also stores its buffer descriptors in DRAM. The DMA driver throws errors (leading to the wlan_exp errors above) when it observes unexpected values in these buffer descriptors.
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