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#1 2019-Nov-19 00:08:41

sgv1975
Member
Registered: 2014-Oct-02
Posts: 16

Debug Header Pin As HW Input in 802.11

Hello,


I would like to send an external control signal into a debug header pin on the WARP board, which I would like to connect to the tx phy core in the 802.11 reference design.  I would like to detect and latch the rising edge of this control signal using a positive edge detector connected to an SR latch in the tx phy core.  The control signal is a brief pulse which is high (2.5V)  for about 0.2 us.

I was wondering what the process would be to configure one of the debug header pins as a hardware input in the 802.11 reference design?

http://warpproject.org/trac/wiki/802.11 … derSignals seems to indicate that the pins can be configured for software input, but doesn't say anything about how to configure a pin as a hardware input.


Given that the control signal is such a short pulse, I am not sure I would be able to reliably detect it in software.



Thanks,



-SGV

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#2 2019-Nov-19 09:34:52

murphpo
Administrator
From: Mango Communications
Registered: 2006-Jul-03
Posts: 5110

Re: Debug Header Pin As HW Input in 802.11

The 802.11 ref design connects the debug header pins to the w3_userio core. This core implements the bi-directional buffer for each pin and the software-controlled registers to configure each pin's direction (in/out) and, for each output, the pin's control source (hw/sw).

This core also drives a copy of the debug header's current state to the  usr_dbg_hdr_in port. This port is not connected by default but is intended for applications like yours, where custom logic in the FPGA needs to access off-board signals in real-time.

The easiest way to use this port is to connect the full 16-bit bus to your custom logic, then slice the desired bits in your logic (this is best since XPS does not support slicing syntax in the MHS file).

Modify system.mhs and add a new port connection to the w3_userio_axi core instance, then connect that port to your custom logic:

Code:

BEGIN w3_userio_axi
  ...
 PORT usr_dbg_hdr_in = usr_dbg_hdr_in # <-- New port connection
 ...
END

BEGIN wlan_phy_tx_pmd_axiw
  ...
 PORT dbg_hdr_in = usr_dbg_hdr_in # <-- New port connection to UFix16_0 Gateway In
  ...
END

Finally, configure the desired pins as inputs in C code:

Code:

// Configure pin #0 as input
wlan_mac_set_dbg_hdr_dir(DBG_HDR_DIR_INPUT, 0x0001);

Be sure to connect GND between the driving device and WARP v3 board before connecting the digital signals (without a shared ground reference the voltage on the FPGA pin could easily float above the damage level for Virtex-6 IO buffers).

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#3 2019-Nov-19 10:14:29

sgv1975
Member
Registered: 2014-Oct-02
Posts: 16

Re: Debug Header Pin As HW Input in 802.11

Thanks. This looks good. I will try it.

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