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| 26 | <div class="section"> |
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| 27 | <h2>Designing Custom Peripherals</h2> |
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| 28 | <ul class="lessons"> |
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| 29 | <li> |
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| 30 | <div class="lesson-title"><a href="sections/Overview.html">Overview</a></div> |
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| 31 | <div class="description"><p>Custom peripherals are the building blocks for prototyping new systems. In FPGAs the peripherals can be created in hardware description language. In this tutorial we will go over the basics of creating a new peripheral using Xilinx's System Generator (Sysgen). Sysgen is a block-based tool built upon MATLAB's Simulink library that can generate HDL code for models.</p> |
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| 34 | <p>We are going to build a Direct Digital Synthesizer (DDS) or Numerically Controller Oscillator (NCO) that will generate high precision sine and cosine waves. We will also put in the hooks to control this peripheral once it is placed in PowerPC controlled system.</p></div> |
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| 35 | </li> |
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| 36 | <li> |
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| 37 | <div class="lesson-title"><a href="sections/Requirements.html">Requirements</a></div> |
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| 38 | <div class="description"><p>All the software requirements for this tutorial are described here.</p></div> |
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| 39 | </li> |
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| 40 | <li> |
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| 41 | <div class="lesson-title"><a href="sections/Creating_the_Model.html">Creating the Model</a></div> |
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| 42 | <div class="description"><p>The steps to create the model are described in this section. At the end the entire DDS model will be complete and ready for simulation.</p></div> |
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| 43 | </li> |
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| 44 | <li> |
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| 45 | <div class="lesson-title"><a href="sections/Simulating_the_Design.html">Simulating the Design</a></div> |
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| 46 | <div class="description"><p>In this section the design is simulated to ensure that is performs as expected.</p></div> |
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| 47 | </li> |
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| 48 | <li> |
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| 49 | <div class="lesson-title"><a href="sections/Exporting_as_Peripheral_Core.html">Exporting as Peripheral Core</a></div> |
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| 50 | <div class="description"><p>The final step to create a custom HDL core is described in this section. The result is a peripheral core (pcore) that can be inserted into a Xilinx Platform Studio (XPS) project.</p></div> |
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| 51 | </li> |
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