source: Hardware/WARP_v3/Rev1.1/Config_CPLD/src/spi_boot_OpenCores_src/bench/vhdl/tb-c.vhd

Last change on this file was 1799, checked in by murphpo, 12 years ago

Adding WARP v3 hardware files (schematics, FPGA pinout, configuration CPLD source)

File size: 703 bytes
Line 
1-------------------------------------------------------------------------------
2--
3-- SD/MMC Bootloader
4--
5-- $Id: tb-c.vhd 77 2009-04-01 19:53:14Z arniml $
6--
7-------------------------------------------------------------------------------
8
9configuration tb_behav_c0 of tb is
10
11  for behav
12
13    for tb_elem_full_b : tb_elem
14      use configuration work.tb_elem_behav_full;
15    end for;
16
17    for tb_elem_mmc_b : tb_elem
18      use configuration work.tb_elem_behav_mmc;
19    end for;
20
21    for tb_elem_sd_b : tb_elem
22      use configuration work.tb_elem_behav_sd;
23    end for;
24
25    for tb_elem_minimal_b : tb_elem
26      use configuration work.tb_elem_behav_minimal;
27    end for;
28
29  end for;
30
31end tb_behav_c0;
Note: See TracBrowser for help on using the repository browser.