source: Hardware/WARP_v3/Rev1.1/Config_CPLD/src/spi_boot_OpenCores_src/rtl/vhdl/spi_boot-c.vhd

Last change on this file was 1799, checked in by murphpo, 12 years ago

Adding WARP v3 hardware files (schematics, FPGA pinout, configuration CPLD source)

File size: 597 bytes
RevLine 
[1799]1-------------------------------------------------------------------------------
2--
3-- SD/MMC Bootloader
4--
5-- $Id: spi_boot-c.vhd 77 2009-04-01 19:53:14Z arniml $
6--
7-------------------------------------------------------------------------------
8
9configuration spi_boot_rtl_c0 of spi_boot is
10
11  for rtl
12
13    for img_cnt
14      for img_cnt_b : spi_counter
15        use configuration work.spi_counter_rtl_c0;
16      end for;
17    end for;
18
19    for mmc_cnt
20      for mmc_cnt_b : spi_counter
21        use configuration work.spi_counter_rtl_c0;
22      end for;
23    end for;
24
25  end for;
26
27end spi_boot_rtl_c0;
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