/***************************************************************
* Pseudo-code for PicoBlaze program in w3_clock_controller_axi 
* 
* IMPORTANT: This pseudo code is for reference only. The actual
*  PicoBlaze program is *not* compiled from this code. The program
*  is written directly in assembly. The code below illustrates the
*  basic operation of the assembly program but does not represent
*  the assembly program routine-by-routine.
*
*  Refer to the w3_clock_controller_axi user guide for more details:
*   http://warpproject.org/trac/wiki/cores/w3_clock_controller
*
****************************************************************/

main() {

	if(no_clock_module_mounted) {
		load_configuration(DEV_RF_REF, CFG_NOCM)
		load_configuration(DEV_SAMP, CFG_NOCM)
		load_configuration(DEV_PLL, CFG_NOCM)
		config_complete()
	}

	if(cm_mmcx_mounted) {
	  sw = read_cm_mmcx_sip_sw() //Read SIP switch
  
		if(sw == off_off) {
			//Up-Up switches -> ignore clock module
			load_configuration(DEV_RF_REF, CFG_NOCM)
			load_configuration(DEV_SAMP, CFG_NOCM)
			load_configuration(DEV_PLL, CFG_NOCM)
		} else if(sw == off_on) {
			//Up-Down switches -> Config A
			load_configuration(DEV_RF_REF, CFG_CMMMCX_A)
			load_configuration(DEV_SAMP, CFG_CMMMCX_A)
		} else if(sw == on_off) {
			//Down-Up switches -> Config B
			load_configuration(DEV_RF_REF, CFG_CMMMCX_B)
			load_configuration(DEV_SAMP, CFG_CMMMCX_B)
		} else if(sw == on_on) {
			//Down-Up switches -> Config C
			load_configuration(DEV_RF_REF, CFG_CMMMCX_C)
			load_configuration(DEV_SAMP, CFG_CMMMCX_C)
		}
  
	  config_complete()
	}

	if(cm_pll_mounted) {
		sw = read_cm_pll_dip_sw() //Read 2 LSB of DIP switch

		if(sw == off_off) {
			//Down-Down switches -> ignore clock module
			load_configuration(DEV_RF_REF, CFG_NOCM)
			load_configuration(DEV_SAMP, CFG_NOCM)
			load_configuration(DEV_PLL, CFG_NOCM)
			config_complete()
		}
	
		wait_for_pll_refclk()
	
		if(sw == off_on) {
			//Down-Up switches -> Config A
			load_configuration(DEV_RF_REF, CFG_CMPLL_A)
			load_configuration(DEV_SAMP, CFG_CMPLL_A)
			load_configuration(DEV_PLL, CFG_CMPLL_A)
		} else if(sw == on_off) {
			//Up-Down switches -> Config B
			load_configuration(DEV_RF_REF, CFG_CMPLL_B)
			load_configuration(DEV_SAMP, CFG_CMPLL_B)
			load_configuration(DEV_PLL, CFG_CMPLL_B)
		} else if(sw == on_on) {
			//Up-Up switches -> Config C
			load_configuration(DEV_RF_REF, CFG_CMPLL_C)
			load_configuration(DEV_SAMP, CFG_CMPLL_C)
			load_configuration(DEV_PLL, CFG_CMPLL_C)
		}

		wait_for_pll_lock()

		config_complete()
	}
}

load_configuration(req_device, req_cfg) {
	if(eeprom[15000] == 0xA5 && eeprom[15001] == 0xCD) {
		cfg_data = copy_cfg_from_eeprom(req_device, req_cfg)
	} else {
		cfg_data = copy_cfg_from_rom(req_device, req_cfg)
	}

	write_cfg_to_device(req_device, cfg_data)
}

wait_for_pll_refclk() {
	while(read_pll_refclk_status != TOGGLING) {}
}

wait_for_pll_lock() {
	while(read_pll_lock_status != LOCKED) {}
}

config_complete() {
  clear_mmcm_reset() //Starts clocks to FPGA, allows MicroBlaze subsystem to boot
  halt()
}