[1766] | 1 | -- |
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| 2 | -- |
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| 3 | -- State machine for reading data from Dallas 1621 |
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| 4 | -- |
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| 5 | -- Testsystem for i2c controller |
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| 6 | -- |
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| 7 | -- |
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| 8 | library ieee; |
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| 9 | use ieee.std_logic_1164.all; |
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| 10 | use ieee.std_logic_arith.all; |
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| 11 | |
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| 12 | use work.i2c.all; |
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| 13 | |
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| 14 | entity DS1621_interface is |
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| 15 | port ( |
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| 16 | clk : in std_logic; |
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| 17 | nReset : in std_logic; |
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| 18 | |
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| 19 | Dout : out std_logic_vector(7 downto 0); -- data read from ds1621 |
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| 20 | |
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| 21 | error : out std_logic; -- no correct ack received |
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| 22 | |
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| 23 | SCL : inout std_logic; |
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| 24 | SDA : inout std_logic |
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| 25 | ); |
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| 26 | end entity DS1621_interface; |
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| 27 | |
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| 28 | architecture structural of DS1621_interface is |
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| 29 | constant SLAVE_ADDR : std_logic_vector(6 downto 0) := "1001000"; |
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| 30 | constant CLK_CNT : unsigned(7 downto 0) := conv_unsigned(20, 8); |
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| 31 | |
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| 32 | signal cmd_ack : std_logic; |
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| 33 | signal D : std_logic_vector(7 downto 0); |
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| 34 | signal lack, store_dout : std_logic; |
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| 35 | |
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| 36 | signal start, read, write, ack, stop : std_logic; |
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| 37 | signal i2c_dout : std_logic_vector(7 downto 0); |
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| 38 | |
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| 39 | begin |
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| 40 | -- hookup I2C controller |
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| 41 | u1: simple_i2c port map (clk => clk, ena => '1', clk_cnt => clk_cnt, nReset => nReset, |
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| 42 | read => read, write => write, start => start, stop => stop, ack_in => ack, cmd_ack => cmd_ack, |
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| 43 | Din => D, Dout => i2c_dout, ack_out => lack, SCL => SCL, SDA => SDA); |
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| 44 | |
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| 45 | init_statemachine : block |
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| 46 | type states is (i1, i2, i3, i4, i5, t1, t2, t3, t4, t5); |
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| 47 | signal state : states; |
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| 48 | begin |
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| 49 | nxt_state_decoder: process(clk, nReset, state) |
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| 50 | variable nxt_state : states; |
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| 51 | variable iD : std_logic_vector(7 downto 0); |
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| 52 | variable ierr : std_logic; |
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| 53 | variable istart, iread, iwrite, iack, istop : std_logic; |
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| 54 | variable istore_dout : std_logic; |
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| 55 | begin |
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| 56 | nxt_state := state; |
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| 57 | ierr := '0'; |
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| 58 | istore_dout := '0'; |
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| 59 | |
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| 60 | istart := start; |
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| 61 | iread := read; |
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| 62 | iwrite := write; |
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| 63 | iack := ack; |
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| 64 | istop := stop; |
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| 65 | iD := D; |
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| 66 | |
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| 67 | case (state) is |
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| 68 | -- init DS1621 |
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| 69 | -- 1) send start condition |
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| 70 | -- 2) send slave address + write |
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| 71 | -- 3) check ack |
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| 72 | -- 4) send "access config" command (0xAC) |
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| 73 | -- 5) check ack |
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| 74 | -- 6) send config register data (0x00) |
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| 75 | -- 7) check ack |
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| 76 | -- 8) send stop condition |
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| 77 | -- 9) send start condition |
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| 78 | -- 10) send slave address + write |
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| 79 | -- 11) check ack |
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| 80 | -- 12) send "start conversion" command (0xEE) |
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| 81 | -- 13) check ack |
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| 82 | -- 14) send stop condition |
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| 83 | |
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| 84 | when i1 => -- send start condition, sent slave address + write |
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| 85 | nxt_state := i2; |
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| 86 | istart := '1'; |
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| 87 | iread := '0'; |
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| 88 | iwrite := '1'; |
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| 89 | iack := '0'; |
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| 90 | istop := '0'; |
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| 91 | iD := (slave_addr & '0'); -- write to slave (R/W = '0') |
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| 92 | |
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| 93 | when i2 => -- send "access config" command |
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| 94 | if (cmd_ack = '1') then |
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| 95 | nxt_state := i3; |
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| 96 | -- check aknowledge bit |
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| 97 | if (lack = '1') then |
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| 98 | ierr := '1'; -- no acknowledge received from last command, expected ACK |
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| 99 | end if; |
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| 100 | |
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| 101 | istart := '0'; |
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| 102 | iread := '0'; |
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| 103 | iwrite := '1'; |
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| 104 | iack := '0'; |
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| 105 | istop := '0'; |
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| 106 | iD := x"AC"; |
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| 107 | end if; |
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| 108 | |
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| 109 | when i3 => -- send config register data, sent stop condition |
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| 110 | if (cmd_ack = '1') then |
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| 111 | nxt_state := i4; |
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| 112 | -- check aknowledge bit |
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| 113 | if (lack = '1') then |
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| 114 | ierr := '1'; -- no acknowledge received from last command, expected ACK |
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| 115 | end if; |
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| 116 | |
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| 117 | istart := '0'; |
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| 118 | iread := '0'; |
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| 119 | iwrite := '1'; |
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| 120 | iack := '0'; |
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| 121 | istop := '1'; |
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| 122 | iD := x"00"; |
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| 123 | end if; |
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| 124 | |
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| 125 | when i4 => -- send start condition, sent slave address + write |
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| 126 | if (cmd_ack = '1') then |
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| 127 | nxt_state := i5; |
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| 128 | |
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| 129 | istart := '1'; |
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| 130 | iread := '0'; |
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| 131 | iwrite := '1'; |
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| 132 | iack := '0'; |
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| 133 | istop := '0'; |
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| 134 | iD := (slave_addr & '0'); -- write to slave (R/W = '0') |
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| 135 | end if; |
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| 136 | |
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| 137 | when i5 => -- send "start conversion" command + stop condition |
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| 138 | if (cmd_ack = '1') then |
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| 139 | nxt_state := t1; |
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| 140 | -- check aknowledge bit |
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| 141 | if (lack = '1') then |
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| 142 | ierr := '1'; -- no acknowledge received from last command, expected ACK |
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| 143 | end if; |
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| 144 | |
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| 145 | istart := '0'; |
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| 146 | iread := '0'; |
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| 147 | iwrite := '1'; |
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| 148 | iack := '0'; |
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| 149 | istop := '1'; |
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| 150 | iD := x"EE"; |
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| 151 | end if; |
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| 152 | -- read temperature |
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| 153 | -- 1) sent start condition |
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| 154 | -- 2) sent slave address + write |
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| 155 | -- 3) check ack |
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| 156 | -- 4) sent "read temperature" command (0xAA) |
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| 157 | -- 5) check ack |
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| 158 | -- 6) sent start condition |
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| 159 | -- 7) sent slave address + read |
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| 160 | -- 8) check ack |
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| 161 | -- 9) read msb |
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| 162 | -- 10) send ack |
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| 163 | -- 11) read lsb |
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| 164 | -- 12) send nack |
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| 165 | -- 13) send stop condition |
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| 166 | |
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| 167 | when t1 => -- send start condition, sent slave address + write |
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| 168 | if (cmd_ack = '1') then |
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| 169 | nxt_state := t2; |
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| 170 | -- check aknowledge bit |
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| 171 | if (lack = '1') then |
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| 172 | ierr := '1'; -- no acknowledge received from last command, expected ACK |
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| 173 | end if; |
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| 174 | |
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| 175 | istart := '1'; |
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| 176 | iread := '0'; |
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| 177 | iwrite := '1'; |
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| 178 | iack := '0'; |
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| 179 | istop := '0'; |
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| 180 | iD := (slave_addr & '0'); -- write to slave (R/W = '0') |
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| 181 | end if; |
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| 182 | |
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| 183 | when t2 => -- send read temperature command |
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| 184 | if (cmd_ack = '1') then |
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| 185 | nxt_state := t3; |
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| 186 | -- check aknowledge bit |
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| 187 | if (lack = '1') then |
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| 188 | ierr := '1'; -- no acknowledge received from last command, expected ACK |
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| 189 | end if; |
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| 190 | |
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| 191 | istart := '0'; |
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| 192 | iread := '0'; |
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| 193 | iwrite := '1'; |
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| 194 | iack := '0'; |
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| 195 | istop := '0'; |
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| 196 | iD := x"AA"; |
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| 197 | end if; |
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| 198 | |
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| 199 | when t3 => -- send (repeated) start condition, send slave address + read |
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| 200 | if (cmd_ack = '1') then |
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| 201 | nxt_state := t4; |
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| 202 | -- check aknowledge bit |
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| 203 | if (lack = '1') then |
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| 204 | ierr := '1'; -- no acknowledge received, expected ACK |
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| 205 | end if; |
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| 206 | |
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| 207 | istart := '1'; |
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| 208 | iread := '0'; |
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| 209 | iwrite := '1'; |
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| 210 | iack := '0'; |
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| 211 | istop := '0'; |
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| 212 | iD := (slave_addr & '1'); -- read from slave (R/W = '1') |
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| 213 | end if; |
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| 214 | |
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| 215 | when t4 => -- read MSB (hi-byte), send acknowledge |
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| 216 | if (cmd_ack = '1') then |
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| 217 | nxt_state := t5; |
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| 218 | -- check aknowledge bit |
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| 219 | if (lack = '1') then |
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| 220 | ierr := '1'; -- no acknowledge received from last command, expected ACK |
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| 221 | end if; |
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| 222 | |
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| 223 | istart := '0'; |
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| 224 | iread := '1'; |
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| 225 | iwrite := '0'; |
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| 226 | iack := '0'; --ACK |
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| 227 | istop := '0'; |
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| 228 | end if; |
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| 229 | |
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| 230 | when t5 => -- read LSB (lo-byte), send acknowledge, sent stop |
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| 231 | if (cmd_ack = '1') then |
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| 232 | nxt_state := t1; |
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| 233 | |
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| 234 | istart := '0'; |
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| 235 | iread := '1'; |
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| 236 | iwrite := '0'; |
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| 237 | iack := '1'; --NACK |
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| 238 | istop := '1'; |
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| 239 | |
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| 240 | istore_dout := '1'; |
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| 241 | end if; |
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| 242 | end case; |
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| 243 | |
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| 244 | -- genregs |
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| 245 | if (nReset = '0') then |
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| 246 | state <= i1; |
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| 247 | error <= '0'; |
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| 248 | store_dout <= '0'; |
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| 249 | |
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| 250 | start <= '0'; |
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| 251 | read <= '0'; |
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| 252 | write <= '0'; |
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| 253 | ack <= '0'; |
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| 254 | stop <= '0'; |
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| 255 | D <= (others => '0'); |
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| 256 | elsif (clk'event and clk = '1') then |
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| 257 | state <= nxt_state; |
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| 258 | error <= ierr; |
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| 259 | store_dout <= istore_dout; |
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| 260 | |
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| 261 | start <= istart; |
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| 262 | read <= iread; |
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| 263 | write <= iwrite; |
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| 264 | ack <= iack; |
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| 265 | stop <= istop; |
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| 266 | D <= iD; |
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| 267 | end if; |
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| 268 | end process nxt_state_decoder; |
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| 269 | end block init_statemachine; |
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| 270 | |
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| 271 | -- store temp |
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| 272 | gen_dout : process(clk) |
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| 273 | begin |
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| 274 | if (clk'event and clk = '1') then |
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| 275 | if (store_dout = '1') then |
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| 276 | Dout <= i2c_dout; |
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| 277 | end if; |
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| 278 | end if; |
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| 279 | end process gen_dout; |
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| 280 | |
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| 281 | end architecture structural; |
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| 282 | |
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| 283 | |
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