[5544] | 1 | <!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd"> |
---|
| 2 | <html xmlns="http://www.w3.org/1999/xhtml"> |
---|
| 3 | <head> |
---|
| 4 | <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/> |
---|
| 5 | <meta http-equiv="X-UA-Compatible" content="IE=9"/> |
---|
| 6 | <title>w3_userio driver: Control registers</title> |
---|
| 7 | <link href="tabs.css" rel="stylesheet" type="text/css"/> |
---|
| 8 | <script type="text/javascript" src="jquery.js"></script> |
---|
| 9 | <script type="text/javascript" src="dynsections.js"></script> |
---|
| 10 | <link href="navtree.css" rel="stylesheet" type="text/css"/> |
---|
| 11 | <script type="text/javascript" src="resize.js"></script> |
---|
| 12 | <script type="text/javascript" src="navtreedata.js"></script> |
---|
| 13 | <script type="text/javascript" src="navtree.js"></script> |
---|
| 14 | <script type="text/javascript"> |
---|
| 15 | $(document).ready(initResizable); |
---|
| 16 | $(window).load(resizeHeight); |
---|
| 17 | </script> |
---|
| 18 | <link href="warp_docs.css" rel="stylesheet" type="text/css" /> |
---|
| 19 | </head> |
---|
| 20 | <body> |
---|
| 21 | <div id="top"><!-- do not remove this div, it is closed by doxygen! --> |
---|
| 22 | <div id="titlearea"> |
---|
| 23 | <table cellspacing="0" cellpadding="0"> |
---|
| 24 | <tbody> |
---|
| 25 | <tr style="height: 56px;"> |
---|
| 26 | <td style="padding-left: 0.5em;"> |
---|
| 27 | <div id="projectname">w3_userio driver |
---|
| 28 | </div> |
---|
| 29 | <div id="projectbrief">Driver for WARP v3 user IO control core (w3_userio_axi_v1_02_a)</div> |
---|
| 30 | </td> |
---|
| 31 | </tr> |
---|
| 32 | </tbody> |
---|
| 33 | </table> |
---|
| 34 | </div> |
---|
| 35 | <!-- end header part --> |
---|
| 36 | <!-- Generated by Doxygen 1.8.11 --> |
---|
| 37 | <div id="navrow1" class="tabs"> |
---|
| 38 | <ul class="tablist"> |
---|
| 39 | <li><a href="index.html"><span>Main Page</span></a></li> |
---|
| 40 | <li class="current"><a href="modules.html"><span>Doc Sections</span></a></li> |
---|
| 41 | </ul> |
---|
| 42 | </div> |
---|
| 43 | </div><!-- top --> |
---|
| 44 | <div id="side-nav" class="ui-resizable side-nav-resizable"> |
---|
| 45 | <div id="nav-tree"> |
---|
| 46 | <div id="nav-tree-contents"> |
---|
| 47 | <div id="nav-sync" class="sync"></div> |
---|
| 48 | </div> |
---|
| 49 | </div> |
---|
| 50 | <div id="splitbar" style="-moz-user-select:none;" |
---|
| 51 | class="ui-resizable-handle"> |
---|
| 52 | </div> |
---|
| 53 | </div> |
---|
| 54 | <script type="text/javascript"> |
---|
| 55 | $(document).ready(function(){initNavTree('group__control__reg.html','');}); |
---|
| 56 | </script> |
---|
| 57 | <div id="doc-content"> |
---|
| 58 | <div class="header"> |
---|
| 59 | <div class="summary"> |
---|
| 60 | <a href="#define-members">Macros</a> </div> |
---|
| 61 | <div class="headertitle"> |
---|
| 62 | <div class="title">Control registers</div> </div> |
---|
| 63 | </div><!--header--> |
---|
| 64 | <div class="contents"> |
---|
| 65 | <table class="memberdecls"> |
---|
| 66 | <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a> |
---|
| 67 | Macros</h2></td></tr> |
---|
| 68 | <tr class="memitem:gad68e400a7ac503d7e48d0625cbd2ddb3"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gad68e400a7ac503d7e48d0625cbd2ddb3">userio_read_control</a>(baseaddr)   Xil_In32(baseaddr+W3_USERIO_SLV_REG0_OFFSET)</td></tr> |
---|
| 69 | <tr class="separator:gad68e400a7ac503d7e48d0625cbd2ddb3"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 70 | <tr class="memitem:ga404d98706718ca061ca20e6fbeae901b"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga404d98706718ca061ca20e6fbeae901b">userio_write_control</a>(baseaddr, x)   Xil_Out32(baseaddr+W3_USERIO_SLV_REG0_OFFSET, x)</td></tr> |
---|
| 71 | <tr class="separator:ga404d98706718ca061ca20e6fbeae901b"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 72 | <tr class="memitem:ga840063818513b4731285162b0b3f1ca2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga840063818513b4731285162b0b3f1ca2">userio_set_ctrlSrc_sw</a>(baseaddr, ioMask)   Xil_Out32(baseaddr+W3_USERIO_SLV_REG0_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG0_OFFSET) & ~(ioMask)))</td></tr> |
---|
| 73 | <tr class="separator:ga840063818513b4731285162b0b3f1ca2"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 74 | <tr class="memitem:ga0e7da0639eb32f1c226841f8eace649a"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga0e7da0639eb32f1c226841f8eace649a">userio_set_ctrlSrc_hw</a>(baseaddr, ioMask)   Xil_Out32(baseaddr+W3_USERIO_SLV_REG0_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG0_OFFSET) | (ioMask)))</td></tr> |
---|
| 75 | <tr class="separator:ga0e7da0639eb32f1c226841f8eace649a"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 76 | <tr class="memitem:gaa2bee772e805015c46270027d8d80ace"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gaa2bee772e805015c46270027d8d80ace">userio_set_hw_ctrl_mode_pwm</a>(baseaddr, ioMask)   Xil_Out32(baseaddr+W3_USERIO_SLV_REG10_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG10_OFFSET) | (ioMask)))</td></tr> |
---|
| 77 | <tr class="separator:gaa2bee772e805015c46270027d8d80ace"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 78 | <tr class="memitem:gaf94db76a602169f773cbbca060a7cad9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gaf94db76a602169f773cbbca060a7cad9">userio_set_hw_ctrl_mode_port</a>(baseaddr, ioMask)   Xil_Out32(baseaddr+W3_USERIO_SLV_REG10_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG10_OFFSET) & (~ioMask)))</td></tr> |
---|
| 79 | <tr class="separator:gaf94db76a602169f773cbbca060a7cad9"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 80 | <tr class="memitem:ga5177d1ffb714780b84dd40fc0bf2b842"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga5177d1ffb714780b84dd40fc0bf2b842">userio_set_pwm_period</a>(baseaddr, p)   Xil_Out32(baseaddr+W3_USERIO_SLV_REG7_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG7_OFFSET) & 0x0000FFFF) | (((p) & 0xFFFF)<<16))</td></tr> |
---|
| 81 | <tr class="separator:ga5177d1ffb714780b84dd40fc0bf2b842"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 82 | <tr class="memitem:ga8e298386adbe933035b6aee0bfd0f89d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga8e298386adbe933035b6aee0bfd0f89d">userio_set_pwm_thresh</a>(baseaddr, t)   Xil_Out32(baseaddr+W3_USERIO_SLV_REG7_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG7_OFFSET) & 0xFFFF0000) | ((t) & 0xFFFF))</td></tr> |
---|
| 83 | <tr class="separator:ga8e298386adbe933035b6aee0bfd0f89d"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 84 | <tr class="memitem:ga9565a5c249e85fed921181ef3526914c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga9565a5c249e85fed921181ef3526914c">userio_set_pwm_ramp_en</a>(baseaddr, d)   Xil_Out32(baseaddr+W3_USERIO_SLV_REG9_OFFSET, ( (Xil_In32(baseaddr+W3_USERIO_SLV_REG9_OFFSET) & 0x7FFFFFFF) | ((d&0x1)<<31)))</td></tr> |
---|
| 85 | <tr class="separator:ga9565a5c249e85fed921181ef3526914c"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 86 | <tr class="memitem:ga62858844d90974bbd4be3ab18d59d729"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga62858844d90974bbd4be3ab18d59d729">userio_set_pwm_ramp_max</a>(baseaddr, m)   Xil_Out32(baseaddr+W3_USERIO_SLV_REG9_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG9_OFFSET) & 0xFFFF0000) | ((m) & 0xFFFF))</td></tr> |
---|
| 87 | <tr class="separator:ga62858844d90974bbd4be3ab18d59d729"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 88 | <tr class="memitem:ga1c7b2b3544b70977b369fb089aef6a5c"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga1c7b2b3544b70977b369fb089aef6a5c">userio_set_pwm_ramp_min</a>(baseaddr, m)   Xil_Out32(baseaddr+W3_USERIO_SLV_REG9_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG9_OFFSET) & 0x8000FFFF) | (((m) & 0x7FFF)<<16))</td></tr> |
---|
| 89 | <tr class="separator:ga1c7b2b3544b70977b369fb089aef6a5c"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 90 | <tr class="memitem:gad80c1309798a4829cfa28507db1b6796"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gad80c1309798a4829cfa28507db1b6796">W3_USERIO_HEXDISP_L_MAPMODE</a>   0x20000000</td></tr> |
---|
| 91 | <tr class="separator:gad80c1309798a4829cfa28507db1b6796"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 92 | <tr class="memitem:ga304790f5bfd38272d6a3b39811fcad58"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga304790f5bfd38272d6a3b39811fcad58">W3_USERIO_HEXDISP_R_MAPMODE</a>   0x10000000</td></tr> |
---|
| 93 | <tr class="separator:ga304790f5bfd38272d6a3b39811fcad58"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 94 | <tr class="memitem:ga98b42e35092aa3e142888a3fd2647bcb"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga98b42e35092aa3e142888a3fd2647bcb">W3_USERIO_CTRLSRC_LED_RFB_RED</a>   0x08000000</td></tr> |
---|
| 95 | <tr class="separator:ga98b42e35092aa3e142888a3fd2647bcb"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 96 | <tr class="memitem:gac2941546260ab29fdd57b81905e2b6a9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gac2941546260ab29fdd57b81905e2b6a9">W3_USERIO_CTRLSRC_LED_RFB_GREEN</a>   0x04000000</td></tr> |
---|
| 97 | <tr class="separator:gac2941546260ab29fdd57b81905e2b6a9"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 98 | <tr class="memitem:ga4834e20c9db2871f2f06bdd647f963ef"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga4834e20c9db2871f2f06bdd647f963ef">W3_USERIO_CTRLSRC_LED_RFA_RED</a>   0x02000000</td></tr> |
---|
| 99 | <tr class="separator:ga4834e20c9db2871f2f06bdd647f963ef"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 100 | <tr class="memitem:ga2489f6553cecc36c6d8e02dd9e476f75"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga2489f6553cecc36c6d8e02dd9e476f75">W3_USERIO_CTRLSRC_LED_RFA_GREEN</a>   0x01000000</td></tr> |
---|
| 101 | <tr class="separator:ga2489f6553cecc36c6d8e02dd9e476f75"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 102 | <tr class="memitem:gae9a6552b8fd310e90c452551d2920cbf"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gae9a6552b8fd310e90c452551d2920cbf">W3_USERIO_CTRLSRC_LEDS_RED</a>   0x000F0000</td></tr> |
---|
| 103 | <tr class="separator:gae9a6552b8fd310e90c452551d2920cbf"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 104 | <tr class="memitem:ga5ea5d7f9da1c21bdeb42815c1f350799"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga5ea5d7f9da1c21bdeb42815c1f350799">W3_USERIO_CTRLSRC_LEDS_GREEN</a>   0x00F00000</td></tr> |
---|
| 105 | <tr class="separator:ga5ea5d7f9da1c21bdeb42815c1f350799"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 106 | <tr class="memitem:gaaf7de9c2bf60f576e205879dfec86a02"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gaaf7de9c2bf60f576e205879dfec86a02">W3_USERIO_CTRLSRC_HEXDISP_R</a>   0x0000FF00</td></tr> |
---|
| 107 | <tr class="separator:gaaf7de9c2bf60f576e205879dfec86a02"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 108 | <tr class="memitem:gaf10bd93f9fd6a5b03f7a58d225020f5d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gaf10bd93f9fd6a5b03f7a58d225020f5d">W3_USERIO_CTRLSRC_HEXDISP_L</a>   0x000000FF</td></tr> |
---|
| 109 | <tr class="separator:gaf10bd93f9fd6a5b03f7a58d225020f5d"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 110 | <tr class="memitem:gac47477ab58dfeddf34d85b66b8a8af7f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gac47477ab58dfeddf34d85b66b8a8af7f">W3_USERIO_CTRLSRC_HEXDISP_DP_R</a>   0x00008000</td></tr> |
---|
| 111 | <tr class="separator:gac47477ab58dfeddf34d85b66b8a8af7f"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 112 | <tr class="memitem:ga1e6aed514bdde7b364eeb05a94e4e5c5"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga1e6aed514bdde7b364eeb05a94e4e5c5">W3_USERIO_CTRLSRC_HEXDISP_DP_L</a>   0x00000080</td></tr> |
---|
| 113 | <tr class="separator:ga1e6aed514bdde7b364eeb05a94e4e5c5"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 114 | <tr class="memitem:gaba4a46f3017052b7930254221210e53d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gaba4a46f3017052b7930254221210e53d">W3_USERIO_CTRLSRC_LEDS_RFA</a>   (<a class="el" href="group__control__reg.html#ga4834e20c9db2871f2f06bdd647f963ef">W3_USERIO_CTRLSRC_LED_RFA_RED</a> | <a class="el" href="group__control__reg.html#ga2489f6553cecc36c6d8e02dd9e476f75">W3_USERIO_CTRLSRC_LED_RFA_GREEN</a>)</td></tr> |
---|
| 115 | <tr class="separator:gaba4a46f3017052b7930254221210e53d"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 116 | <tr class="memitem:ga90c59b5b55bbc19e5edda14265ede890"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga90c59b5b55bbc19e5edda14265ede890">W3_USERIO_CTRLSRC_LEDS_RFB</a>   (<a class="el" href="group__control__reg.html#ga98b42e35092aa3e142888a3fd2647bcb">W3_USERIO_CTRLSRC_LED_RFB_RED</a> | <a class="el" href="group__control__reg.html#gac2941546260ab29fdd57b81905e2b6a9">W3_USERIO_CTRLSRC_LED_RFB_GREEN</a>)</td></tr> |
---|
| 117 | <tr class="separator:ga90c59b5b55bbc19e5edda14265ede890"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 118 | <tr class="memitem:gaab5d56fa79460dbc9f94ce0039eda80d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gaab5d56fa79460dbc9f94ce0039eda80d">W3_USERIO_CTRLSRC_LEDS_RF</a>   (<a class="el" href="group__control__reg.html#gaba4a46f3017052b7930254221210e53d">W3_USERIO_CTRLSRC_LEDS_RFA</a> | <a class="el" href="group__control__reg.html#ga90c59b5b55bbc19e5edda14265ede890">W3_USERIO_CTRLSRC_LEDS_RFB</a>)</td></tr> |
---|
| 119 | <tr class="separator:gaab5d56fa79460dbc9f94ce0039eda80d"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 120 | <tr class="memitem:gabe086c9996e92588946530f642469351"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gabe086c9996e92588946530f642469351">W3_USERIO_CTRLSRC_LEDS</a>   (<a class="el" href="group__control__reg.html#gae9a6552b8fd310e90c452551d2920cbf">W3_USERIO_CTRLSRC_LEDS_RED</a> | <a class="el" href="group__control__reg.html#ga5ea5d7f9da1c21bdeb42815c1f350799">W3_USERIO_CTRLSRC_LEDS_GREEN</a>)</td></tr> |
---|
| 121 | <tr class="separator:gabe086c9996e92588946530f642469351"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 122 | <tr class="memitem:gaeb29312e3163138fba2f22e508328998"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#gaeb29312e3163138fba2f22e508328998">W3_USERIO_CTRLSRC_HEXDISPS</a>   (<a class="el" href="group__control__reg.html#gaf10bd93f9fd6a5b03f7a58d225020f5d">W3_USERIO_CTRLSRC_HEXDISP_L</a> | <a class="el" href="group__control__reg.html#gaaf7de9c2bf60f576e205879dfec86a02">W3_USERIO_CTRLSRC_HEXDISP_R</a>)</td></tr> |
---|
| 123 | <tr class="separator:gaeb29312e3163138fba2f22e508328998"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 124 | <tr class="memitem:ga9651ccc0392135d87c12d6d1a3b73e25"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__control__reg.html#ga9651ccc0392135d87c12d6d1a3b73e25">W3_USERIO_CTRLSRC_ALL_OUTPUTS</a>   (<a class="el" href="group__control__reg.html#gaab5d56fa79460dbc9f94ce0039eda80d">W3_USERIO_CTRLSRC_LEDS_RF</a> | <a class="el" href="group__control__reg.html#gabe086c9996e92588946530f642469351">W3_USERIO_CTRLSRC_LEDS</a> | <a class="el" href="group__control__reg.html#gaeb29312e3163138fba2f22e508328998">W3_USERIO_CTRLSRC_HEXDISPS</a>)</td></tr> |
---|
| 125 | <tr class="separator:ga9651ccc0392135d87c12d6d1a3b73e25"><td class="memSeparator" colspan="2"> </td></tr> |
---|
| 126 | </table> |
---|
| 127 | <a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2> |
---|
| 128 | <p><b>Hardware vs. software control</b>: Every LED and hex display segment can be controlled either via software or hardware: </p><ul> |
---|
| 129 | <li> |
---|
| 130 | <b>Software</b>: user code sets LED state by writing a 1 to the corresponding register bit </li> |
---|
| 131 | <li> |
---|
| 132 | <b>Hardware</b>: Two modes:<ul> |
---|
| 133 | <li> |
---|
| 134 | <b>Port mode</b>: LED state is controlled by corresponding usr_* port </li> |
---|
| 135 | <li> |
---|
| 136 | <b>PWM mode</b>: LED state is controlled by internal PWM waveform generator </li> |
---|
| 137 | </ul> |
---|
| 138 | </li> |
---|
| 139 | </ul> |
---|
| 140 | <p>The WARP reference designs use hardware/port control for the RF LEDs (to indicate real-time Tx/Rx state of each RF interface) and software control for all other LED/hex display outputs.</p> |
---|
| 141 | <p>The control source (hw or sw) for each output bit is set by the control register described below.</p> |
---|
| 142 | <p>Examples: </p><div class="fragment"><div class="line"><span class="comment">//Assumes user code sets USERIO_BASEADDR to base address of w3_userio core, as set in xparameters.h</span></div><div class="line"></div><div class="line"><span class="comment">//------------------------------------------------------------------------------</span></div><div class="line"><span class="comment">// Set both hex dipslays to map 4-bit to 7-segment values automatically</span></div><div class="line"><a class="code" href="group__control__reg.html#ga404d98706718ca061ca20e6fbeae901b">userio_write_control</a>(USERIO_BASEADDR, (<a class="code" href="group__control__reg.html#gad80c1309798a4829cfa28507db1b6796">W3_USERIO_HEXDISP_L_MAPMODE</a> | <a class="code" href="group__control__reg.html#ga304790f5bfd38272d6a3b39811fcad58">W3_USERIO_HEXDISP_R_MAPMODE</a>));</div><div class="line"></div><div class="line"><span class="comment">//------------------------------------------------------------------------------</span></div><div class="line"><span class="comment">// Select software control of all outputs</span></div><div class="line"><a class="code" href="group__control__reg.html#ga840063818513b4731285162b0b3f1ca2">userio_set_ctrlSrc_sw</a>(USERIO_BASEADDR, (<a class="code" href="group__control__reg.html#gaab5d56fa79460dbc9f94ce0039eda80d">W3_USERIO_CTRLSRC_LEDS_RF</a> | <a class="code" href="group__control__reg.html#gabe086c9996e92588946530f642469351">W3_USERIO_CTRLSRC_LEDS</a> | <a class="code" href="group__control__reg.html#gaeb29312e3163138fba2f22e508328998">W3_USERIO_CTRLSRC_HEXDISPS</a>));</div><div class="line"></div><div class="line"><span class="comment">//------------------------------------------------------------------------------</span></div><div class="line"><span class="comment">// Select hardware/port control of RF LEDs</span></div><div class="line"><a class="code" href="group__control__reg.html#ga0e7da0639eb32f1c226841f8eace649a">userio_set_ctrlSrc_hw</a>(USERIO_BASEADDR, <a class="code" href="group__control__reg.html#gaab5d56fa79460dbc9f94ce0039eda80d">W3_USERIO_CTRLSRC_LEDS_RF</a>);</div><div class="line"></div><div class="line"><span class="comment">//------------------------------------------------------------------------------</span></div><div class="line"><span class="comment">// Enable hardware control of green user LEDs, software control of red user LEDs</span></div><div class="line"><a class="code" href="group__control__reg.html#ga0e7da0639eb32f1c226841f8eace649a">userio_set_ctrlSrc_hw</a>(USERIO_BASEADDR, <a class="code" href="group__control__reg.html#ga5ea5d7f9da1c21bdeb42815c1f350799">W3_USERIO_CTRLSRC_LEDS_GREEN</a>);</div><div class="line"><a class="code" href="group__control__reg.html#ga840063818513b4731285162b0b3f1ca2">userio_set_ctrlSrc_sw</a>(USERIO_BASEADDR, <a class="code" href="group__control__reg.html#gae9a6552b8fd310e90c452551d2920cbf">W3_USERIO_CTRLSRC_LEDS_RED</a>);</div><div class="line"></div><div class="line"><span class="comment">//------------------------------------------------------------------------------</span></div><div class="line"><span class="comment">// Use the PWM generator to slowly blink the green LEDs</span></div><div class="line"><a class="code" href="group__control__reg.html#ga0e7da0639eb32f1c226841f8eace649a">userio_set_ctrlSrc_hw</a>(USERIO_BASEADDR, <a class="code" href="group__control__reg.html#ga5ea5d7f9da1c21bdeb42815c1f350799">W3_USERIO_CTRLSRC_LEDS_GREEN</a>);</div><div class="line"><a class="code" href="group__control__reg.html#gaa2bee772e805015c46270027d8d80ace">userio_set_hw_ctrl_mode_pwm</a>(USERIO_BASEADDR, (<a class="code" href="group__control__reg.html#ga5ea5d7f9da1c21bdeb42815c1f350799">W3_USERIO_CTRLSRC_LEDS_GREEN</a>);</div><div class="line"><a class="code" href="group__control__reg.html#ga9565a5c249e85fed921181ef3526914c">userio_set_pwm_ramp_en</a>(USERIO_BASEADDR, 0);</div><div class="line"><a class="code" href="group__control__reg.html#ga5177d1ffb714780b84dd40fc0bf2b842">userio_set_pwm_period</a>(USERIO_BASEADDR, 65530);</div><div class="line"><a class="code" href="group__control__reg.html#ga8e298386adbe933035b6aee0bfd0f89d">userio_set_pwm_thresh</a>(USERIO_BASEADDR, 65530/2);</div><div class="line"></div><div class="line"><span class="comment">//------------------------------------------------------------------------------</span></div><div class="line"><span class="comment">// Use the PWM generator to show a "sleep" pattern on red LEDs</span></div><div class="line"><a class="code" href="group__control__reg.html#ga0e7da0639eb32f1c226841f8eace649a">userio_set_ctrlSrc_hw</a>(USERIO_BASEADDR, <a class="code" href="group__control__reg.html#gae9a6552b8fd310e90c452551d2920cbf">W3_USERIO_CTRLSRC_LEDS_RED</a>);</div><div class="line"><a class="code" href="group__control__reg.html#gaa2bee772e805015c46270027d8d80ace">userio_set_hw_ctrl_mode_pwm</a>(USERIO_BASEADDR, <a class="code" href="group__control__reg.html#gae9a6552b8fd310e90c452551d2920cbf">W3_USERIO_CTRLSRC_LEDS_RED</a>);</div><div class="line"></div><div class="line"><span class="comment">//Use fast period so blinking is not visable</span></div><div class="line"><span class="comment">// (fast blink with low duty cycle looks like a dim constant brightness)</span></div><div class="line"><a class="code" href="group__control__reg.html#ga5177d1ffb714780b84dd40fc0bf2b842">userio_set_pwm_period</a>(USERIO_BASEADDR, 500);</div><div class="line"></div><div class="line"><span class="comment">//Ramp must be disabled when changing ramp params</span></div><div class="line"><a class="code" href="group__control__reg.html#ga9565a5c249e85fed921181ef3526914c">userio_set_pwm_ramp_en</a>(USERIO_BASEADDR, 0);</div><div class="line"><a class="code" href="group__control__reg.html#ga1c7b2b3544b70977b369fb089aef6a5c">userio_set_pwm_ramp_min</a>(USERIO_BASEADDR, 2);</div><div class="line"><a class="code" href="group__control__reg.html#ga62858844d90974bbd4be3ab18d59d729">userio_set_pwm_ramp_max</a>(USERIO_BASEADDR, 250);</div><div class="line"><a class="code" href="group__control__reg.html#ga9565a5c249e85fed921181ef3526914c">userio_set_pwm_ramp_en</a>(USERIO_BASEADDR, 1);</div></div><!-- fragment --> <h2 class="groupheader">Macro Definition Documentation</h2> |
---|
| 143 | <a class="anchor" id="gad68e400a7ac503d7e48d0625cbd2ddb3"></a> |
---|
| 144 | <div class="memitem"> |
---|
| 145 | <div class="memproto"> |
---|
| 146 | <table class="memname"> |
---|
| 147 | <tr> |
---|
| 148 | <td class="memname">#define userio_read_control</td> |
---|
| 149 | <td>(</td> |
---|
| 150 | <td class="paramtype"> </td> |
---|
| 151 | <td class="paramname">baseaddr</td><td>)</td> |
---|
| 152 | <td>   Xil_In32(baseaddr+W3_USERIO_SLV_REG0_OFFSET)</td> |
---|
| 153 | </tr> |
---|
| 154 | </table> |
---|
| 155 | </div><div class="memdoc"> |
---|
| 156 | |
---|
| 157 | <p>Returns the value of the control register. </p> |
---|
| 158 | |
---|
| 159 | </div> |
---|
| 160 | </div> |
---|
| 161 | <a class="anchor" id="ga404d98706718ca061ca20e6fbeae901b"></a> |
---|
| 162 | <div class="memitem"> |
---|
| 163 | <div class="memproto"> |
---|
| 164 | <table class="memname"> |
---|
| 165 | <tr> |
---|
| 166 | <td class="memname">#define userio_write_control</td> |
---|
| 167 | <td>(</td> |
---|
| 168 | <td class="paramtype"> </td> |
---|
| 169 | <td class="paramname">baseaddr, </td> |
---|
| 170 | </tr> |
---|
| 171 | <tr> |
---|
| 172 | <td class="paramkey"></td> |
---|
| 173 | <td></td> |
---|
| 174 | <td class="paramtype"> </td> |
---|
| 175 | <td class="paramname">x </td> |
---|
| 176 | </tr> |
---|
| 177 | <tr> |
---|
| 178 | <td></td> |
---|
| 179 | <td>)</td> |
---|
| 180 | <td></td><td>   Xil_Out32(baseaddr+W3_USERIO_SLV_REG0_OFFSET, x)</td> |
---|
| 181 | </tr> |
---|
| 182 | </table> |
---|
| 183 | </div><div class="memdoc"> |
---|
| 184 | |
---|
| 185 | <p>Sets the control register to x. </p> |
---|
| 186 | |
---|
| 187 | </div> |
---|
| 188 | </div> |
---|
| 189 | <a class="anchor" id="ga840063818513b4731285162b0b3f1ca2"></a> |
---|
| 190 | <div class="memitem"> |
---|
| 191 | <div class="memproto"> |
---|
| 192 | <table class="memname"> |
---|
| 193 | <tr> |
---|
| 194 | <td class="memname">#define userio_set_ctrlSrc_sw</td> |
---|
| 195 | <td>(</td> |
---|
| 196 | <td class="paramtype"> </td> |
---|
| 197 | <td class="paramname">baseaddr, </td> |
---|
| 198 | </tr> |
---|
| 199 | <tr> |
---|
| 200 | <td class="paramkey"></td> |
---|
| 201 | <td></td> |
---|
| 202 | <td class="paramtype"> </td> |
---|
| 203 | <td class="paramname">ioMask </td> |
---|
| 204 | </tr> |
---|
| 205 | <tr> |
---|
| 206 | <td></td> |
---|
| 207 | <td>)</td> |
---|
| 208 | <td></td><td>   Xil_Out32(baseaddr+W3_USERIO_SLV_REG0_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG0_OFFSET) & ~(ioMask)))</td> |
---|
| 209 | </tr> |
---|
| 210 | </table> |
---|
| 211 | </div><div class="memdoc"> |
---|
| 212 | |
---|
| 213 | <p>Sets selected outputs to software control (register writes) </p> |
---|
| 214 | |
---|
| 215 | </div> |
---|
| 216 | </div> |
---|
| 217 | <a class="anchor" id="ga0e7da0639eb32f1c226841f8eace649a"></a> |
---|
| 218 | <div class="memitem"> |
---|
| 219 | <div class="memproto"> |
---|
| 220 | <table class="memname"> |
---|
| 221 | <tr> |
---|
| 222 | <td class="memname">#define userio_set_ctrlSrc_hw</td> |
---|
| 223 | <td>(</td> |
---|
| 224 | <td class="paramtype"> </td> |
---|
| 225 | <td class="paramname">baseaddr, </td> |
---|
| 226 | </tr> |
---|
| 227 | <tr> |
---|
| 228 | <td class="paramkey"></td> |
---|
| 229 | <td></td> |
---|
| 230 | <td class="paramtype"> </td> |
---|
| 231 | <td class="paramname">ioMask </td> |
---|
| 232 | </tr> |
---|
| 233 | <tr> |
---|
| 234 | <td></td> |
---|
| 235 | <td>)</td> |
---|
| 236 | <td></td><td>   Xil_Out32(baseaddr+W3_USERIO_SLV_REG0_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG0_OFFSET) | (ioMask)))</td> |
---|
| 237 | </tr> |
---|
| 238 | </table> |
---|
| 239 | </div><div class="memdoc"> |
---|
| 240 | |
---|
| 241 | <p>Sets selected outputs to hardware control (usr_ ports) </p> |
---|
| 242 | |
---|
| 243 | </div> |
---|
| 244 | </div> |
---|
| 245 | <a class="anchor" id="gaa2bee772e805015c46270027d8d80ace"></a> |
---|
| 246 | <div class="memitem"> |
---|
| 247 | <div class="memproto"> |
---|
| 248 | <table class="memname"> |
---|
| 249 | <tr> |
---|
| 250 | <td class="memname">#define userio_set_hw_ctrl_mode_pwm</td> |
---|
| 251 | <td>(</td> |
---|
| 252 | <td class="paramtype"> </td> |
---|
| 253 | <td class="paramname">baseaddr, </td> |
---|
| 254 | </tr> |
---|
| 255 | <tr> |
---|
| 256 | <td class="paramkey"></td> |
---|
| 257 | <td></td> |
---|
| 258 | <td class="paramtype"> </td> |
---|
| 259 | <td class="paramname">ioMask </td> |
---|
| 260 | </tr> |
---|
| 261 | <tr> |
---|
| 262 | <td></td> |
---|
| 263 | <td>)</td> |
---|
| 264 | <td></td><td>   Xil_Out32(baseaddr+W3_USERIO_SLV_REG10_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG10_OFFSET) | (ioMask)))</td> |
---|
| 265 | </tr> |
---|
| 266 | </table> |
---|
| 267 | </div><div class="memdoc"> |
---|
| 268 | |
---|
| 269 | <p>Sets selected outputs to use PWM generator for hardware/PWM control. </p> |
---|
| 270 | |
---|
| 271 | </div> |
---|
| 272 | </div> |
---|
| 273 | <a class="anchor" id="gaf94db76a602169f773cbbca060a7cad9"></a> |
---|
| 274 | <div class="memitem"> |
---|
| 275 | <div class="memproto"> |
---|
| 276 | <table class="memname"> |
---|
| 277 | <tr> |
---|
| 278 | <td class="memname">#define userio_set_hw_ctrl_mode_port</td> |
---|
| 279 | <td>(</td> |
---|
| 280 | <td class="paramtype"> </td> |
---|
| 281 | <td class="paramname">baseaddr, </td> |
---|
| 282 | </tr> |
---|
| 283 | <tr> |
---|
| 284 | <td class="paramkey"></td> |
---|
| 285 | <td></td> |
---|
| 286 | <td class="paramtype"> </td> |
---|
| 287 | <td class="paramname">ioMask </td> |
---|
| 288 | </tr> |
---|
| 289 | <tr> |
---|
| 290 | <td></td> |
---|
| 291 | <td>)</td> |
---|
| 292 | <td></td><td>   Xil_Out32(baseaddr+W3_USERIO_SLV_REG10_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG10_OFFSET) & (~ioMask)))</td> |
---|
| 293 | </tr> |
---|
| 294 | </table> |
---|
| 295 | </div><div class="memdoc"> |
---|
| 296 | |
---|
| 297 | <p>Sets selected outputs to use PWM generator for hardware/port control. </p> |
---|
| 298 | |
---|
| 299 | </div> |
---|
| 300 | </div> |
---|
| 301 | <a class="anchor" id="ga5177d1ffb714780b84dd40fc0bf2b842"></a> |
---|
| 302 | <div class="memitem"> |
---|
| 303 | <div class="memproto"> |
---|
| 304 | <table class="memname"> |
---|
| 305 | <tr> |
---|
| 306 | <td class="memname">#define userio_set_pwm_period</td> |
---|
| 307 | <td>(</td> |
---|
| 308 | <td class="paramtype"> </td> |
---|
| 309 | <td class="paramname">baseaddr, </td> |
---|
| 310 | </tr> |
---|
| 311 | <tr> |
---|
| 312 | <td class="paramkey"></td> |
---|
| 313 | <td></td> |
---|
| 314 | <td class="paramtype"> </td> |
---|
| 315 | <td class="paramname">p </td> |
---|
| 316 | </tr> |
---|
| 317 | <tr> |
---|
| 318 | <td></td> |
---|
| 319 | <td>)</td> |
---|
| 320 | <td></td><td>   Xil_Out32(baseaddr+W3_USERIO_SLV_REG7_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG7_OFFSET) & 0x0000FFFF) | (((p) & 0xFFFF)<<16))</td> |
---|
| 321 | </tr> |
---|
| 322 | </table> |
---|
| 323 | </div><div class="memdoc"> |
---|
| 324 | |
---|
| 325 | <p>Sets the PWM period; larger periods result in slower blinking. </p> |
---|
| 326 | |
---|
| 327 | </div> |
---|
| 328 | </div> |
---|
| 329 | <a class="anchor" id="ga8e298386adbe933035b6aee0bfd0f89d"></a> |
---|
| 330 | <div class="memitem"> |
---|
| 331 | <div class="memproto"> |
---|
| 332 | <table class="memname"> |
---|
| 333 | <tr> |
---|
| 334 | <td class="memname">#define userio_set_pwm_thresh</td> |
---|
| 335 | <td>(</td> |
---|
| 336 | <td class="paramtype"> </td> |
---|
| 337 | <td class="paramname">baseaddr, </td> |
---|
| 338 | </tr> |
---|
| 339 | <tr> |
---|
| 340 | <td class="paramkey"></td> |
---|
| 341 | <td></td> |
---|
| 342 | <td class="paramtype"> </td> |
---|
| 343 | <td class="paramname">t </td> |
---|
| 344 | </tr> |
---|
| 345 | <tr> |
---|
| 346 | <td></td> |
---|
| 347 | <td>)</td> |
---|
| 348 | <td></td><td>   Xil_Out32(baseaddr+W3_USERIO_SLV_REG7_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG7_OFFSET) & 0xFFFF0000) | ((t) & 0xFFFF))</td> |
---|
| 349 | </tr> |
---|
| 350 | </table> |
---|
| 351 | </div><div class="memdoc"> |
---|
| 352 | |
---|
| 353 | <p>Sets the PWM duty cycle threshold; threshold be greater than 1 and less than the PWM period. This threshold is ignored when the threshold ramp is enabled. </p> |
---|
| 354 | |
---|
| 355 | </div> |
---|
| 356 | </div> |
---|
| 357 | <a class="anchor" id="ga9565a5c249e85fed921181ef3526914c"></a> |
---|
| 358 | <div class="memitem"> |
---|
| 359 | <div class="memproto"> |
---|
| 360 | <table class="memname"> |
---|
| 361 | <tr> |
---|
| 362 | <td class="memname">#define userio_set_pwm_ramp_en</td> |
---|
| 363 | <td>(</td> |
---|
| 364 | <td class="paramtype"> </td> |
---|
| 365 | <td class="paramname">baseaddr, </td> |
---|
| 366 | </tr> |
---|
| 367 | <tr> |
---|
| 368 | <td class="paramkey"></td> |
---|
| 369 | <td></td> |
---|
| 370 | <td class="paramtype"> </td> |
---|
| 371 | <td class="paramname">d </td> |
---|
| 372 | </tr> |
---|
| 373 | <tr> |
---|
| 374 | <td></td> |
---|
| 375 | <td>)</td> |
---|
| 376 | <td></td><td>   Xil_Out32(baseaddr+W3_USERIO_SLV_REG9_OFFSET, ( (Xil_In32(baseaddr+W3_USERIO_SLV_REG9_OFFSET) & 0x7FFFFFFF) | ((d&0x1)<<31)))</td> |
---|
| 377 | </tr> |
---|
| 378 | </table> |
---|
| 379 | </div><div class="memdoc"> |
---|
| 380 | |
---|
| 381 | <p>Enables and disables the PWM threshold ramp logic. Ramp must be disabled when changing ramp min/max params. </p> |
---|
| 382 | |
---|
| 383 | </div> |
---|
| 384 | </div> |
---|
| 385 | <a class="anchor" id="ga62858844d90974bbd4be3ab18d59d729"></a> |
---|
| 386 | <div class="memitem"> |
---|
| 387 | <div class="memproto"> |
---|
| 388 | <table class="memname"> |
---|
| 389 | <tr> |
---|
| 390 | <td class="memname">#define userio_set_pwm_ramp_max</td> |
---|
| 391 | <td>(</td> |
---|
| 392 | <td class="paramtype"> </td> |
---|
| 393 | <td class="paramname">baseaddr, </td> |
---|
| 394 | </tr> |
---|
| 395 | <tr> |
---|
| 396 | <td class="paramkey"></td> |
---|
| 397 | <td></td> |
---|
| 398 | <td class="paramtype"> </td> |
---|
| 399 | <td class="paramname">m </td> |
---|
| 400 | </tr> |
---|
| 401 | <tr> |
---|
| 402 | <td></td> |
---|
| 403 | <td>)</td> |
---|
| 404 | <td></td><td>   Xil_Out32(baseaddr+W3_USERIO_SLV_REG9_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG9_OFFSET) & 0xFFFF0000) | ((m) & 0xFFFF))</td> |
---|
| 405 | </tr> |
---|
| 406 | </table> |
---|
| 407 | </div><div class="memdoc"> |
---|
| 408 | |
---|
| 409 | <p>Sets the max value of the ramped PWM threshold; must be greater than the ramp min value and less than the PWM period. </p> |
---|
| 410 | |
---|
| 411 | </div> |
---|
| 412 | </div> |
---|
| 413 | <a class="anchor" id="ga1c7b2b3544b70977b369fb089aef6a5c"></a> |
---|
| 414 | <div class="memitem"> |
---|
| 415 | <div class="memproto"> |
---|
| 416 | <table class="memname"> |
---|
| 417 | <tr> |
---|
| 418 | <td class="memname">#define userio_set_pwm_ramp_min</td> |
---|
| 419 | <td>(</td> |
---|
| 420 | <td class="paramtype"> </td> |
---|
| 421 | <td class="paramname">baseaddr, </td> |
---|
| 422 | </tr> |
---|
| 423 | <tr> |
---|
| 424 | <td class="paramkey"></td> |
---|
| 425 | <td></td> |
---|
| 426 | <td class="paramtype"> </td> |
---|
| 427 | <td class="paramname">m </td> |
---|
| 428 | </tr> |
---|
| 429 | <tr> |
---|
| 430 | <td></td> |
---|
| 431 | <td>)</td> |
---|
| 432 | <td></td><td>   Xil_Out32(baseaddr+W3_USERIO_SLV_REG9_OFFSET, (Xil_In32(baseaddr+W3_USERIO_SLV_REG9_OFFSET) & 0x8000FFFF) | (((m) & 0x7FFF)<<16))</td> |
---|
| 433 | </tr> |
---|
| 434 | </table> |
---|
| 435 | </div><div class="memdoc"> |
---|
| 436 | |
---|
| 437 | <p>Sets the min value of the ramped PWM threshold; must be greater than 1 and less than the ramp max value. </p> |
---|
| 438 | |
---|
| 439 | </div> |
---|
| 440 | </div> |
---|
| 441 | <a class="anchor" id="gad80c1309798a4829cfa28507db1b6796"></a> |
---|
| 442 | <div class="memitem"> |
---|
| 443 | <div class="memproto"> |
---|
| 444 | <table class="memname"> |
---|
| 445 | <tr> |
---|
| 446 | <td class="memname">#define W3_USERIO_HEXDISP_L_MAPMODE   0x20000000</td> |
---|
| 447 | </tr> |
---|
| 448 | </table> |
---|
| 449 | </div><div class="memdoc"> |
---|
| 450 | |
---|
| 451 | <p>Enables 4-bit to 7-segment mapping for left hex display. </p> |
---|
| 452 | |
---|
| 453 | </div> |
---|
| 454 | </div> |
---|
| 455 | <a class="anchor" id="ga304790f5bfd38272d6a3b39811fcad58"></a> |
---|
| 456 | <div class="memitem"> |
---|
| 457 | <div class="memproto"> |
---|
| 458 | <table class="memname"> |
---|
| 459 | <tr> |
---|
| 460 | <td class="memname">#define W3_USERIO_HEXDISP_R_MAPMODE   0x10000000</td> |
---|
| 461 | </tr> |
---|
| 462 | </table> |
---|
| 463 | </div><div class="memdoc"> |
---|
| 464 | |
---|
| 465 | <p>Enables 4-bit to 7-segment mapping for right hex display. </p> |
---|
| 466 | |
---|
| 467 | </div> |
---|
| 468 | </div> |
---|
| 469 | <a class="anchor" id="ga98b42e35092aa3e142888a3fd2647bcb"></a> |
---|
| 470 | <div class="memitem"> |
---|
| 471 | <div class="memproto"> |
---|
| 472 | <table class="memname"> |
---|
| 473 | <tr> |
---|
| 474 | <td class="memname">#define W3_USERIO_CTRLSRC_LED_RFB_RED   0x08000000</td> |
---|
| 475 | </tr> |
---|
| 476 | </table> |
---|
| 477 | </div><div class="memdoc"> |
---|
| 478 | |
---|
| 479 | <p>Control source selection mask for red LED near RF B. </p> |
---|
| 480 | |
---|
| 481 | </div> |
---|
| 482 | </div> |
---|
| 483 | <a class="anchor" id="gac2941546260ab29fdd57b81905e2b6a9"></a> |
---|
| 484 | <div class="memitem"> |
---|
| 485 | <div class="memproto"> |
---|
| 486 | <table class="memname"> |
---|
| 487 | <tr> |
---|
| 488 | <td class="memname">#define W3_USERIO_CTRLSRC_LED_RFB_GREEN   0x04000000</td> |
---|
| 489 | </tr> |
---|
| 490 | </table> |
---|
| 491 | </div><div class="memdoc"> |
---|
| 492 | |
---|
| 493 | <p>Control source selection mask for green LED near RF B. </p> |
---|
| 494 | |
---|
| 495 | </div> |
---|
| 496 | </div> |
---|
| 497 | <a class="anchor" id="ga4834e20c9db2871f2f06bdd647f963ef"></a> |
---|
| 498 | <div class="memitem"> |
---|
| 499 | <div class="memproto"> |
---|
| 500 | <table class="memname"> |
---|
| 501 | <tr> |
---|
| 502 | <td class="memname">#define W3_USERIO_CTRLSRC_LED_RFA_RED   0x02000000</td> |
---|
| 503 | </tr> |
---|
| 504 | </table> |
---|
| 505 | </div><div class="memdoc"> |
---|
| 506 | |
---|
| 507 | <p>Control source selection mask for red LED near RF A. </p> |
---|
| 508 | |
---|
| 509 | </div> |
---|
| 510 | </div> |
---|
| 511 | <a class="anchor" id="ga2489f6553cecc36c6d8e02dd9e476f75"></a> |
---|
| 512 | <div class="memitem"> |
---|
| 513 | <div class="memproto"> |
---|
| 514 | <table class="memname"> |
---|
| 515 | <tr> |
---|
| 516 | <td class="memname">#define W3_USERIO_CTRLSRC_LED_RFA_GREEN   0x01000000</td> |
---|
| 517 | </tr> |
---|
| 518 | </table> |
---|
| 519 | </div><div class="memdoc"> |
---|
| 520 | |
---|
| 521 | <p>Control source selection mask for green LED near RF A. </p> |
---|
| 522 | |
---|
| 523 | </div> |
---|
| 524 | </div> |
---|
| 525 | <a class="anchor" id="gae9a6552b8fd310e90c452551d2920cbf"></a> |
---|
| 526 | <div class="memitem"> |
---|
| 527 | <div class="memproto"> |
---|
| 528 | <table class="memname"> |
---|
| 529 | <tr> |
---|
| 530 | <td class="memname">#define W3_USERIO_CTRLSRC_LEDS_RED   0x000F0000</td> |
---|
| 531 | </tr> |
---|
| 532 | </table> |
---|
| 533 | </div><div class="memdoc"> |
---|
| 534 | |
---|
| 535 | <p>Control source selection mask for the red user LEDs. </p> |
---|
| 536 | |
---|
| 537 | </div> |
---|
| 538 | </div> |
---|
| 539 | <a class="anchor" id="ga5ea5d7f9da1c21bdeb42815c1f350799"></a> |
---|
| 540 | <div class="memitem"> |
---|
| 541 | <div class="memproto"> |
---|
| 542 | <table class="memname"> |
---|
| 543 | <tr> |
---|
| 544 | <td class="memname">#define W3_USERIO_CTRLSRC_LEDS_GREEN   0x00F00000</td> |
---|
| 545 | </tr> |
---|
| 546 | </table> |
---|
| 547 | </div><div class="memdoc"> |
---|
| 548 | |
---|
| 549 | <p>Control source selection mask for the green user LEDs. </p> |
---|
| 550 | |
---|
| 551 | </div> |
---|
| 552 | </div> |
---|
| 553 | <a class="anchor" id="gaaf7de9c2bf60f576e205879dfec86a02"></a> |
---|
| 554 | <div class="memitem"> |
---|
| 555 | <div class="memproto"> |
---|
| 556 | <table class="memname"> |
---|
| 557 | <tr> |
---|
| 558 | <td class="memname">#define W3_USERIO_CTRLSRC_HEXDISP_R   0x0000FF00</td> |
---|
| 559 | </tr> |
---|
| 560 | </table> |
---|
| 561 | </div><div class="memdoc"> |
---|
| 562 | |
---|
| 563 | <p>Control source selection mask for the left hex display (includes decimal point) </p> |
---|
| 564 | |
---|
| 565 | </div> |
---|
| 566 | </div> |
---|
| 567 | <a class="anchor" id="gaf10bd93f9fd6a5b03f7a58d225020f5d"></a> |
---|
| 568 | <div class="memitem"> |
---|
| 569 | <div class="memproto"> |
---|
| 570 | <table class="memname"> |
---|
| 571 | <tr> |
---|
| 572 | <td class="memname">#define W3_USERIO_CTRLSRC_HEXDISP_L   0x000000FF</td> |
---|
| 573 | </tr> |
---|
| 574 | </table> |
---|
| 575 | </div><div class="memdoc"> |
---|
| 576 | |
---|
| 577 | <p>Control source selection mask for the right hex display (includes decimal point) </p> |
---|
| 578 | |
---|
| 579 | </div> |
---|
| 580 | </div> |
---|
| 581 | <a class="anchor" id="gac47477ab58dfeddf34d85b66b8a8af7f"></a> |
---|
| 582 | <div class="memitem"> |
---|
| 583 | <div class="memproto"> |
---|
| 584 | <table class="memname"> |
---|
| 585 | <tr> |
---|
| 586 | <td class="memname">#define W3_USERIO_CTRLSRC_HEXDISP_DP_R   0x00008000</td> |
---|
| 587 | </tr> |
---|
| 588 | </table> |
---|
| 589 | </div><div class="memdoc"> |
---|
| 590 | |
---|
| 591 | <p>Control source selection mask for the left hex display decimal point. </p> |
---|
| 592 | |
---|
| 593 | </div> |
---|
| 594 | </div> |
---|
| 595 | <a class="anchor" id="ga1e6aed514bdde7b364eeb05a94e4e5c5"></a> |
---|
| 596 | <div class="memitem"> |
---|
| 597 | <div class="memproto"> |
---|
| 598 | <table class="memname"> |
---|
| 599 | <tr> |
---|
| 600 | <td class="memname">#define W3_USERIO_CTRLSRC_HEXDISP_DP_L   0x00000080</td> |
---|
| 601 | </tr> |
---|
| 602 | </table> |
---|
| 603 | </div><div class="memdoc"> |
---|
| 604 | |
---|
| 605 | <p>Control source selection mask for the right hex display decimal point. </p> |
---|
| 606 | |
---|
| 607 | </div> |
---|
| 608 | </div> |
---|
| 609 | <a class="anchor" id="gaba4a46f3017052b7930254221210e53d"></a> |
---|
| 610 | <div class="memitem"> |
---|
| 611 | <div class="memproto"> |
---|
| 612 | <table class="memname"> |
---|
| 613 | <tr> |
---|
| 614 | <td class="memname">#define W3_USERIO_CTRLSRC_LEDS_RFA   (<a class="el" href="group__control__reg.html#ga4834e20c9db2871f2f06bdd647f963ef">W3_USERIO_CTRLSRC_LED_RFA_RED</a> | <a class="el" href="group__control__reg.html#ga2489f6553cecc36c6d8e02dd9e476f75">W3_USERIO_CTRLSRC_LED_RFA_GREEN</a>)</td> |
---|
| 615 | </tr> |
---|
| 616 | </table> |
---|
| 617 | </div><div class="memdoc"> |
---|
| 618 | |
---|
| 619 | <p>Control source selection masks for both LEDs near RF A. </p> |
---|
| 620 | |
---|
| 621 | </div> |
---|
| 622 | </div> |
---|
| 623 | <a class="anchor" id="ga90c59b5b55bbc19e5edda14265ede890"></a> |
---|
| 624 | <div class="memitem"> |
---|
| 625 | <div class="memproto"> |
---|
| 626 | <table class="memname"> |
---|
| 627 | <tr> |
---|
| 628 | <td class="memname">#define W3_USERIO_CTRLSRC_LEDS_RFB   (<a class="el" href="group__control__reg.html#ga98b42e35092aa3e142888a3fd2647bcb">W3_USERIO_CTRLSRC_LED_RFB_RED</a> | <a class="el" href="group__control__reg.html#gac2941546260ab29fdd57b81905e2b6a9">W3_USERIO_CTRLSRC_LED_RFB_GREEN</a>)</td> |
---|
| 629 | </tr> |
---|
| 630 | </table> |
---|
| 631 | </div><div class="memdoc"> |
---|
| 632 | |
---|
| 633 | <p>Control source selection masks for both LEDs near RF B. </p> |
---|
| 634 | |
---|
| 635 | </div> |
---|
| 636 | </div> |
---|
| 637 | <a class="anchor" id="gaab5d56fa79460dbc9f94ce0039eda80d"></a> |
---|
| 638 | <div class="memitem"> |
---|
| 639 | <div class="memproto"> |
---|
| 640 | <table class="memname"> |
---|
| 641 | <tr> |
---|
| 642 | <td class="memname">#define W3_USERIO_CTRLSRC_LEDS_RF   (<a class="el" href="group__control__reg.html#gaba4a46f3017052b7930254221210e53d">W3_USERIO_CTRLSRC_LEDS_RFA</a> | <a class="el" href="group__control__reg.html#ga90c59b5b55bbc19e5edda14265ede890">W3_USERIO_CTRLSRC_LEDS_RFB</a>)</td> |
---|
| 643 | </tr> |
---|
| 644 | </table> |
---|
| 645 | </div><div class="memdoc"> |
---|
| 646 | |
---|
| 647 | <p>Control source selection masks for all RF LEDs. </p> |
---|
| 648 | |
---|
| 649 | </div> |
---|
| 650 | </div> |
---|
| 651 | <a class="anchor" id="gabe086c9996e92588946530f642469351"></a> |
---|
| 652 | <div class="memitem"> |
---|
| 653 | <div class="memproto"> |
---|
| 654 | <table class="memname"> |
---|
| 655 | <tr> |
---|
| 656 | <td class="memname">#define W3_USERIO_CTRLSRC_LEDS   (<a class="el" href="group__control__reg.html#gae9a6552b8fd310e90c452551d2920cbf">W3_USERIO_CTRLSRC_LEDS_RED</a> | <a class="el" href="group__control__reg.html#ga5ea5d7f9da1c21bdeb42815c1f350799">W3_USERIO_CTRLSRC_LEDS_GREEN</a>)</td> |
---|
| 657 | </tr> |
---|
| 658 | </table> |
---|
| 659 | </div><div class="memdoc"> |
---|
| 660 | |
---|
| 661 | <p>Control source selection masks for all user LEDs. </p> |
---|
| 662 | |
---|
| 663 | </div> |
---|
| 664 | </div> |
---|
| 665 | <a class="anchor" id="gaeb29312e3163138fba2f22e508328998"></a> |
---|
| 666 | <div class="memitem"> |
---|
| 667 | <div class="memproto"> |
---|
| 668 | <table class="memname"> |
---|
| 669 | <tr> |
---|
| 670 | <td class="memname">#define W3_USERIO_CTRLSRC_HEXDISPS   (<a class="el" href="group__control__reg.html#gaf10bd93f9fd6a5b03f7a58d225020f5d">W3_USERIO_CTRLSRC_HEXDISP_L</a> | <a class="el" href="group__control__reg.html#gaaf7de9c2bf60f576e205879dfec86a02">W3_USERIO_CTRLSRC_HEXDISP_R</a>)</td> |
---|
| 671 | </tr> |
---|
| 672 | </table> |
---|
| 673 | </div><div class="memdoc"> |
---|
| 674 | |
---|
| 675 | <p>Control source selection masks for both hex displays. </p> |
---|
| 676 | |
---|
| 677 | </div> |
---|
| 678 | </div> |
---|
| 679 | <a class="anchor" id="ga9651ccc0392135d87c12d6d1a3b73e25"></a> |
---|
| 680 | <div class="memitem"> |
---|
| 681 | <div class="memproto"> |
---|
| 682 | <table class="memname"> |
---|
| 683 | <tr> |
---|
| 684 | <td class="memname">#define W3_USERIO_CTRLSRC_ALL_OUTPUTS   (<a class="el" href="group__control__reg.html#gaab5d56fa79460dbc9f94ce0039eda80d">W3_USERIO_CTRLSRC_LEDS_RF</a> | <a class="el" href="group__control__reg.html#gabe086c9996e92588946530f642469351">W3_USERIO_CTRLSRC_LEDS</a> | <a class="el" href="group__control__reg.html#gaeb29312e3163138fba2f22e508328998">W3_USERIO_CTRLSRC_HEXDISPS</a>)</td> |
---|
| 685 | </tr> |
---|
| 686 | </table> |
---|
| 687 | </div><div class="memdoc"> |
---|
| 688 | |
---|
| 689 | <p>Control source selection masks for all outputs. </p> |
---|
| 690 | |
---|
| 691 | </div> |
---|
| 692 | </div> |
---|
| 693 | </div><!-- contents --> |
---|
| 694 | </div><!-- doc-content --> |
---|
| 695 | <!-- start footer part --> |
---|
| 696 | <div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> |
---|
| 697 | <ul> |
---|
| 698 | <li class="footer">Generated on Wed Jun 29 2016 15:00:03 for w3_userio driver by doxygen v1.8.11</li> |
---|
| 699 | </ul> |
---|
| 700 | </div> |
---|
| 701 | </body> |
---|
| 702 | </html> |
---|