[1789] | 1 | module w3_w2_radio_io_shim ( |
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| 2 | input [11:0] RFA_RXD_I_12b_i, |
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| 3 | input [11:0] RFA_RXD_Q_12b_i, |
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| 4 | output [13:0] RFA_RXD_I_14b_o, |
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| 5 | output [13:0] RFA_RXD_Q_14b_o, |
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| 6 | |
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| 7 | output [11:0] RFA_TXD_I_12b_o, |
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| 8 | output [11:0] RFA_TXD_Q_12b_o, |
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| 9 | input [15:0] RFA_TXD_I_16b_i, |
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| 10 | input [15:0] RFA_TXD_Q_16b_i, |
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| 11 | |
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| 12 | input [11:0] RFB_RXD_I_12b_i, |
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| 13 | input [11:0] RFB_RXD_Q_12b_i, |
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| 14 | output [13:0] RFB_RXD_I_14b_o, |
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| 15 | output [13:0] RFB_RXD_Q_14b_o, |
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| 16 | |
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| 17 | output [11:0] RFB_TXD_I_12b_o, |
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| 18 | output [11:0] RFB_TXD_Q_12b_o, |
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| 19 | input [15:0] RFB_TXD_I_16b_i, |
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| 20 | input [15:0] RFB_TXD_Q_16b_i |
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| 21 | ); |
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| 22 | |
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| 23 | parameter C_FAMILY = "virtex6"; |
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| 24 | |
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| 25 | //Fix12_11 ADC -> Fix14_13 user outputs |
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| 26 | assign RFA_RXD_I_14b_o = {RFA_RXD_I_12b_i, 2'b0}; |
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| 27 | assign RFA_RXD_Q_14b_o = {RFA_RXD_Q_12b_i, 2'b0}; |
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| 28 | |
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| 29 | assign RFB_RXD_I_14b_o = {RFB_RXD_I_12b_i, 2'b0}; |
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| 30 | assign RFB_RXD_Q_14b_o = {RFB_RXD_Q_12b_i, 2'b0}; |
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| 31 | |
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| 32 | //Fix16_15 user inputs -> Fix12_11 DAC |
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| 33 | assign RFA_TXD_I_12b_o = RFA_TXD_I_16b_i[15:4]; |
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| 34 | assign RFA_TXD_Q_12b_o = RFA_TXD_Q_16b_i[15:4]; |
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| 35 | |
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| 36 | assign RFB_TXD_I_12b_o = RFB_TXD_I_16b_i[15:4]; |
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| 37 | assign RFB_TXD_Q_12b_o = RFB_TXD_Q_16b_i[15:4]; |
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| 38 | |
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| 39 | endmodule |
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