1 | -- |
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2 | -- Project: Aurora Module Generator version 2.4 |
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3 | -- |
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4 | -- Date: $Date: 2005/11/07 21:30:56 $ |
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5 | -- Tag: $Name: i+IP+98818 $ |
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6 | -- File: $RCSfile: tx_ll_control_vhd.ejava,v $ |
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7 | -- Rev: $Revision: 1.1.2.4 $ |
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8 | -- |
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9 | -- Company: Xilinx |
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10 | -- Contributors: R. K. Awalt, B. L. Woodard, N. Gulstone |
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11 | -- |
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12 | -- Disclaimer: XILINX IS PROVIDING THIS DESIGN, CODE, OR |
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13 | -- INFORMATION "AS IS" SOLELY FOR USE IN DEVELOPING |
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14 | -- PROGRAMS AND SOLUTIONS FOR XILINX DEVICES. BY |
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15 | -- PROVIDING THIS DESIGN, CODE, OR INFORMATION AS |
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16 | -- ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, |
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17 | -- APPLICATION OR STANDARD, XILINX IS MAKING NO |
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18 | -- REPRESENTATION THAT THIS IMPLEMENTATION IS FREE |
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19 | -- FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE |
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20 | -- RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY |
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21 | -- REQUIRE FOR YOUR IMPLEMENTATION. XILINX |
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22 | -- EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH |
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23 | -- RESPECT TO THE ADEQUACY OF THE IMPLEMENTATION, |
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24 | -- INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR |
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25 | -- REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE |
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26 | -- FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES |
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27 | -- OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
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28 | -- PURPOSE. |
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29 | -- |
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30 | -- (c) Copyright 2004 Xilinx, Inc. |
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31 | -- All rights reserved. |
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32 | -- |
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33 | |
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34 | -- |
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35 | -- TX_LL_CONTROL |
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36 | -- |
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37 | -- Author: Nigel Gulstone |
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38 | -- Xilinx - Embedded Networking System Engineering Group |
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39 | -- |
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40 | -- VHDL Translation: Brian Woodard |
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41 | -- Xilinx - Garden Valley Design Team |
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42 | -- |
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43 | -- Description: This module provides the transmitter state machine |
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44 | -- control logic to connect the LocalLink interface to |
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45 | -- the Aurora Channel. |
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46 | -- |
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47 | -- This module supports 1 2-byte lane designs |
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48 | -- |
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49 | -- This module supports Immediate Mode Native Flow Control. |
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50 | -- |
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51 | |
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52 | library IEEE; |
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53 | use IEEE.STD_LOGIC_1164.all; |
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54 | use WORK.AURORA.all; |
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55 | |
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56 | -- synthesis translate_off |
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57 | library UNISIM; |
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58 | use UNISIM.all; |
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59 | -- synthesis translate_on |
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60 | |
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61 | entity TX_LL_CONTROL is |
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62 | |
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63 | port ( |
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64 | |
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65 | -- LocalLink PDU Interface |
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66 | |
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67 | TX_SRC_RDY_N : in std_logic; |
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68 | TX_SOF_N : in std_logic; |
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69 | TX_EOF_N : in std_logic; |
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70 | TX_REM : in std_logic; |
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71 | TX_DST_RDY_N : out std_logic; |
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72 | |
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73 | -- NFC Interface |
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74 | |
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75 | NFC_REQ_N : in std_logic; |
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76 | NFC_NB : in std_logic_vector(0 to 3); |
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77 | NFC_ACK_N : out std_logic; |
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78 | |
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79 | -- Clock Compensation Interface |
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80 | |
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81 | WARN_CC : in std_logic; |
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82 | DO_CC : in std_logic; |
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83 | |
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84 | -- Global Logic Interface |
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85 | |
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86 | CHANNEL_UP : in std_logic; |
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87 | |
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88 | -- TX_LL Control Module Interface |
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89 | |
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90 | HALT_C : out std_logic; |
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91 | |
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92 | -- Aurora Lane Interface |
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93 | |
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94 | GEN_SCP : out std_logic; |
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95 | GEN_ECP : out std_logic; |
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96 | GEN_SNF : out std_logic; |
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97 | FC_NB : out std_logic_vector(0 to 3); |
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98 | GEN_CC : out std_logic; |
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99 | |
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100 | -- RX_LL Interface |
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101 | |
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102 | TX_WAIT : in std_logic; |
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103 | DECREMENT_NFC : out std_logic; |
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104 | |
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105 | -- System Interface |
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106 | |
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107 | USER_CLK : in std_logic |
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108 | |
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109 | ); |
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110 | |
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111 | end TX_LL_CONTROL; |
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112 | |
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113 | architecture RTL of TX_LL_CONTROL is |
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114 | |
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115 | -- Parameter Declarations -- |
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116 | |
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117 | constant DLY : time := 1 ns; |
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118 | |
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119 | -- External Register Declarations -- |
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120 | |
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121 | signal TX_DST_RDY_N_Buffer : std_logic; |
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122 | signal NFC_ACK_N_Buffer : std_logic; |
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123 | signal HALT_C_Buffer : std_logic; |
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124 | signal GEN_SCP_Buffer : std_logic; |
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125 | signal GEN_ECP_Buffer : std_logic; |
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126 | signal GEN_SNF_Buffer : std_logic; |
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127 | signal FC_NB_Buffer : std_logic_vector(0 to 3); |
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128 | signal GEN_CC_Buffer : std_logic; |
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129 | signal DECREMENT_NFC_Buffer : std_logic; |
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130 | |
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131 | -- Internal Register Declarations -- |
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132 | |
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133 | signal do_cc_r : std_logic; |
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134 | signal warn_cc_r : std_logic; |
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135 | signal do_nfc_r : std_logic; |
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136 | |
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137 | signal idle_r : std_logic; |
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138 | signal sof_r : std_logic; |
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139 | signal sof_data_eof_1_r : std_logic; |
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140 | signal sof_data_eof_2_r : std_logic; |
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141 | signal sof_data_eof_3_r : std_logic; |
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142 | signal data_r : std_logic; |
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143 | signal data_eof_1_r : std_logic; |
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144 | signal data_eof_2_r : std_logic; |
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145 | signal data_eof_3_r : std_logic; |
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146 | |
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147 | -- Wire Declarations -- |
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148 | |
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149 | signal nfc_ok_c : std_logic; |
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150 | |
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151 | signal next_idle_c : std_logic; |
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152 | signal next_sof_c : std_logic; |
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153 | signal next_sof_data_eof_1_c : std_logic; |
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154 | signal next_sof_data_eof_2_c : std_logic; |
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155 | signal next_sof_data_eof_3_c : std_logic; |
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156 | signal next_data_c : std_logic; |
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157 | signal next_data_eof_1_c : std_logic; |
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158 | signal next_data_eof_2_c : std_logic; |
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159 | signal next_data_eof_3_c : std_logic; |
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160 | |
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161 | signal fc_nb_c : std_logic_vector(0 to 3); |
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162 | signal tx_dst_rdy_n_c : std_logic; |
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163 | signal do_sof_c : std_logic; |
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164 | signal do_eof_c : std_logic; |
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165 | signal channel_full_c : std_logic; |
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166 | signal pdu_ok_c : std_logic; |
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167 | |
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168 | -- Declarations to handle VHDL limitations |
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169 | signal reset_i : std_logic; |
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170 | |
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171 | -- Component Declarations -- |
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172 | |
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173 | component FDR |
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174 | |
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175 | generic (INIT : bit := '0'); |
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176 | |
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177 | port ( |
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178 | |
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179 | Q : out std_ulogic; |
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180 | C : in std_ulogic; |
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181 | D : in std_ulogic; |
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182 | R : in std_ulogic |
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183 | |
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184 | ); |
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185 | |
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186 | end component; |
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187 | |
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188 | begin |
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189 | |
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190 | TX_DST_RDY_N <= TX_DST_RDY_N_Buffer; |
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191 | NFC_ACK_N <= NFC_ACK_N_Buffer; |
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192 | HALT_C <= HALT_C_Buffer; |
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193 | GEN_SCP <= GEN_SCP_Buffer; |
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194 | GEN_ECP <= GEN_ECP_Buffer; |
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195 | GEN_SNF <= GEN_SNF_Buffer; |
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196 | FC_NB <= FC_NB_Buffer; |
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197 | GEN_CC <= GEN_CC_Buffer; |
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198 | DECREMENT_NFC <= DECREMENT_NFC_Buffer; |
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199 | |
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200 | -- Main Body of Code -- |
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201 | |
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202 | |
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203 | |
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204 | reset_i <= not CHANNEL_UP; |
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205 | |
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206 | |
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207 | -- Clock Compensation -- |
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208 | |
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209 | -- Register the DO_CC and WARN_CC signals for internal use. Note that the raw DO_CC |
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210 | -- signal is used for some logic so the DO_CC signal should be driven directly |
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211 | -- from a register whenever possible. |
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212 | |
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213 | process (USER_CLK) |
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214 | |
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215 | begin |
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216 | |
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217 | if (USER_CLK 'event and USER_CLK = '1') then |
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218 | |
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219 | if (CHANNEL_UP = '0') then |
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220 | |
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221 | do_cc_r <= '0' after DLY; |
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222 | |
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223 | else |
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224 | |
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225 | do_cc_r <= DO_CC after DLY; |
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226 | |
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227 | end if; |
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228 | |
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229 | end if; |
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230 | |
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231 | end process; |
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232 | |
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233 | |
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234 | process (USER_CLK) |
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235 | |
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236 | begin |
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237 | |
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238 | if (USER_CLK 'event and USER_CLK = '1') then |
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239 | |
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240 | if (CHANNEL_UP = '0') then |
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241 | |
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242 | warn_cc_r <= '0' after DLY; |
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243 | |
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244 | else |
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245 | |
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246 | warn_cc_r <= WARN_CC after DLY; |
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247 | |
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248 | end if; |
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249 | |
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250 | end if; |
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251 | |
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252 | end process; |
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253 | |
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254 | |
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255 | -- NFC State Machine -- |
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256 | |
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257 | -- The NFC state machine has 2 states: waiting for an NFC request, and |
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258 | -- sending an NFC message. It can take over the channel at any time |
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259 | -- except when there is a UFC message or a CC sequence in progress. |
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260 | |
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261 | process (USER_CLK) |
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262 | |
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263 | begin |
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264 | |
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265 | if (USER_CLK 'event and USER_CLK = '1') then |
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266 | |
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267 | if (CHANNEL_UP = '0') then |
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268 | |
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269 | do_nfc_r <= '0' after DLY; |
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270 | |
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271 | else |
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272 | |
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273 | if (do_nfc_r = '0') then |
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274 | |
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275 | do_nfc_r <= not NFC_REQ_N and nfc_ok_c after DLY; |
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276 | |
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277 | else |
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278 | |
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279 | do_nfc_r <= '0' after DLY; |
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280 | |
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281 | end if; |
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282 | |
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283 | end if; |
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284 | |
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285 | end if; |
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286 | |
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287 | end process; |
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288 | |
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289 | |
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290 | -- You can only send an NFC message when there is no CC operation or UFC |
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291 | -- message in progress. We also prohibit NFC messages just before CC to |
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292 | -- prevent collisions on the first cycle. |
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293 | |
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294 | nfc_ok_c <= not do_cc_r and |
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295 | not warn_cc_r; |
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296 | |
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297 | |
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298 | NFC_ACK_N_Buffer <= not do_nfc_r; |
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299 | |
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300 | |
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301 | -- PDU State Machine -- |
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302 | |
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303 | -- The PDU state machine handles the encapsulation and transmission of user |
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304 | -- PDUs. It can use the channel when there is no CC, NFC message, UFC header, |
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305 | -- UFC message or remote NFC request. |
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306 | |
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307 | -- State Registers |
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308 | |
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309 | process (USER_CLK) |
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310 | |
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311 | begin |
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312 | |
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313 | if (USER_CLK 'event and USER_CLK = '1') then |
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314 | |
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315 | if (CHANNEL_UP = '0') then |
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316 | |
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317 | idle_r <= '1' after DLY; |
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318 | sof_r <= '0' after DLY; |
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319 | sof_data_eof_1_r <= '0' after DLY; |
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320 | sof_data_eof_2_r <= '0' after DLY; |
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321 | sof_data_eof_3_r <= '0' after DLY; |
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322 | data_r <= '0' after DLY; |
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323 | data_eof_1_r <= '0' after DLY; |
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324 | data_eof_2_r <= '0' after DLY; |
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325 | data_eof_3_r <= '0' after DLY; |
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326 | |
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327 | else |
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328 | |
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329 | if (pdu_ok_c = '1') then |
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330 | |
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331 | idle_r <= next_idle_c after DLY; |
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332 | sof_r <= next_sof_c after DLY; |
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333 | sof_data_eof_1_r <= next_sof_data_eof_1_c after DLY; |
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334 | sof_data_eof_2_r <= next_sof_data_eof_2_c after DLY; |
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335 | sof_data_eof_3_r <= next_sof_data_eof_3_c after DLY; |
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336 | data_r <= next_data_c after DLY; |
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337 | data_eof_1_r <= next_data_eof_1_c after DLY; |
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338 | data_eof_2_r <= next_data_eof_2_c after DLY; |
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339 | data_eof_3_r <= next_data_eof_3_c after DLY; |
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340 | |
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341 | end if; |
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342 | |
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343 | end if; |
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344 | |
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345 | end if; |
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346 | |
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347 | end process; |
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348 | |
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349 | |
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350 | -- Next State Logic |
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351 | |
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352 | next_idle_c <= (idle_r and not do_sof_c) or |
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353 | (sof_data_eof_3_r and not do_sof_c) or |
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354 | (data_eof_3_r and not do_sof_c); |
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355 | |
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356 | |
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357 | |
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358 | next_sof_c <= ((idle_r and do_sof_c) and not do_eof_c) or |
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359 | ((sof_data_eof_3_r and do_sof_c) and not do_eof_c) or |
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360 | ((data_eof_3_r and do_sof_c) and not do_eof_c); |
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361 | |
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362 | |
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363 | |
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364 | next_data_c <= (sof_r and not do_eof_c ) or |
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365 | (data_r and not do_eof_c); |
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366 | |
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367 | |
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368 | next_data_eof_1_c <= (sof_r and do_eof_c) or |
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369 | (data_r and do_eof_c); |
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370 | |
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371 | |
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372 | next_data_eof_2_c <= data_eof_1_r; |
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373 | |
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374 | |
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375 | next_data_eof_3_c <= data_eof_2_r; |
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376 | |
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377 | |
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378 | next_sof_data_eof_1_c <= ((idle_r and do_sof_c) and do_eof_c) or |
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379 | ((sof_data_eof_3_r and do_sof_c) and do_eof_c) or |
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380 | ((data_eof_3_r and do_sof_c) and do_eof_c); |
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381 | |
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382 | |
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383 | next_sof_data_eof_2_c <= sof_data_eof_1_r; |
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384 | |
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385 | |
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386 | next_sof_data_eof_3_c <= sof_data_eof_2_r; |
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387 | |
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388 | |
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389 | -- Generate an SCP character when the PDU state machine is active and in an SOF state. |
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390 | |
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391 | process (USER_CLK) |
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392 | |
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393 | begin |
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394 | |
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395 | if (USER_CLK 'event and USER_CLK = '1') then |
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396 | |
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397 | if (CHANNEL_UP = '0') then |
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398 | |
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399 | GEN_SCP_Buffer <= '0' after DLY; |
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400 | |
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401 | else |
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402 | |
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403 | GEN_SCP_Buffer <= ((sof_r or sof_data_eof_1_r) and pdu_ok_c) after DLY; |
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404 | |
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405 | end if; |
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406 | |
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407 | end if; |
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408 | |
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409 | end process; |
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410 | |
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411 | |
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412 | -- Generate an ECP character when the PDU state machine is active and in and EOF state. |
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413 | |
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414 | process (USER_CLK) |
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415 | |
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416 | begin |
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417 | |
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418 | if (USER_CLK 'event and USER_CLK = '1') then |
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419 | |
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420 | if (CHANNEL_UP = '0') then |
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421 | |
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422 | GEN_ECP_Buffer <= '0' after DLY; |
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423 | |
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424 | else |
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425 | |
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426 | GEN_ECP_Buffer <= (data_eof_3_r or sof_data_eof_3_r) and pdu_ok_c after DLY; |
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427 | |
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428 | end if; |
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429 | |
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430 | end if; |
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431 | |
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432 | end process; |
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433 | |
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434 | |
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435 | tx_dst_rdy_n_c <= (next_sof_data_eof_1_c and pdu_ok_c) or |
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436 | sof_data_eof_1_r or |
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437 | (next_data_eof_1_c and pdu_ok_c) or |
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438 | ((not do_nfc_r and not NFC_REQ_N) and nfc_ok_c) or |
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439 | DO_CC or |
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440 | TX_WAIT or |
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441 | data_eof_1_r or |
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442 | (data_eof_2_r and not pdu_ok_c) or |
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443 | (sof_data_eof_2_r and not pdu_ok_c); |
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444 | |
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445 | |
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446 | -- The flops for the GEN_CC signal are replicated for timing and instantiated to allow us |
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447 | -- to set their value reliably on powerup. |
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448 | |
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449 | gen_cc_flop_0_i : FDR |
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450 | |
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451 | port map ( |
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452 | |
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453 | D => do_cc_r, |
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454 | C => USER_CLK, |
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455 | R => reset_i, |
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456 | Q => GEN_CC_Buffer |
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457 | |
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458 | ); |
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459 | |
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460 | |
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461 | -- GEN_SNF is asserted whenever the NFC state machine is not idle. |
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462 | |
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463 | process (USER_CLK) |
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464 | |
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465 | begin |
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466 | |
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467 | if (USER_CLK 'event and USER_CLK = '1') then |
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468 | |
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469 | if (CHANNEL_UP = '0') then |
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470 | |
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471 | GEN_SNF_Buffer <= '0' after DLY; |
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472 | |
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473 | else |
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474 | |
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475 | GEN_SNF_Buffer <= do_nfc_r after DLY; |
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476 | |
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477 | end if; |
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478 | |
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479 | end if; |
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480 | |
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481 | end process; |
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482 | |
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483 | |
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484 | -- FC_NB carries flow control codes to the Lane Logic. |
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485 | |
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486 | process (USER_CLK) |
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487 | |
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488 | begin |
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489 | |
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490 | if (USER_CLK 'event and USER_CLK = '1') then |
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491 | |
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492 | FC_NB_Buffer <= fc_nb_c after DLY; |
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493 | |
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494 | end if; |
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495 | |
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496 | end process; |
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497 | |
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498 | |
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499 | -- Flow control codes come from the NFC_NB input. |
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500 | |
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501 | fc_nb_c <= NFC_NB; |
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502 | |
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503 | |
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504 | -- The TX_DST_RDY_N signal is registered. |
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505 | |
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506 | process (USER_CLK) |
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507 | |
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508 | begin |
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509 | |
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510 | if (USER_CLK 'event and USER_CLK = '1') then |
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511 | |
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512 | if (CHANNEL_UP = '0') then |
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513 | |
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514 | TX_DST_RDY_N_Buffer <= '1' after DLY; |
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515 | |
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516 | else |
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517 | |
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518 | TX_DST_RDY_N_Buffer <= tx_dst_rdy_n_c after DLY; |
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519 | |
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520 | end if; |
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521 | |
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522 | end if; |
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523 | |
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524 | end process; |
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525 | |
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526 | |
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527 | -- Decrement the NFC pause required count whenever the state machine prevents new |
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528 | -- PDU data from being sent except when the data is prevented by CC characters. |
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529 | |
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530 | DECREMENT_NFC_Buffer <= TX_DST_RDY_N_Buffer and not do_cc_r; |
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531 | |
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532 | |
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533 | -- Helper Logic |
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534 | |
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535 | -- SOF requests are valid when TX_SRC_RDY_N. TX_DST_RDY_N and TX_SOF_N are asserted |
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536 | |
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537 | do_sof_c <= not TX_SRC_RDY_N and |
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538 | not TX_DST_RDY_N_Buffer and |
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539 | not TX_SOF_N; |
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540 | |
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541 | |
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542 | -- EOF requests are valid when TX_SRC_RDY_N, TX_DST_RDY_N and TX_EOF_N are asserted |
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543 | |
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544 | do_eof_c <= not TX_SRC_RDY_N and |
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545 | not TX_DST_RDY_N_Buffer and |
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546 | not TX_EOF_N; |
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547 | |
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548 | |
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549 | |
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550 | |
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551 | -- Freeze the PDU state machine when CCs or NFCs must be handled. |
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552 | |
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553 | pdu_ok_c <= not do_cc_r and |
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554 | not do_nfc_r; |
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555 | |
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556 | |
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557 | -- Halt the flow of data through the datastream when the PDU state machine is frozen. |
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558 | |
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559 | HALT_C_Buffer <= not pdu_ok_c; |
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560 | |
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561 | |
---|
562 | -- The aurora channel is 'full' if there is more than enough data to fit into |
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563 | -- a channel that is already carrying an SCP and an ECP character. |
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564 | |
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565 | channel_full_c <= '1'; |
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566 | |
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567 | end RTL; |
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