source: PlatformSupport/Deprecated/pcores/ofdm_AGC_mimo_opbw_v1_01_a/data/ofdm_AGC_mimo_opbw_v2_1_0.mpd

Last change on this file was 453, checked in by murphpo, 17 years ago

Initial versions of real pcores for packet detector and AGC

File size: 4.1 KB
Line 
1## Copyright (c) 1995-2006 Xilinx, Inc.  All rights reserved.                     
2                     
3## You may copy and modify these files for your own internal use solely with                     
4## Xilinx programmable logic devices and  Xilinx EDK system or create IP                     
5## modules solely for Xilinx programmable logic devices and Xilinx EDK system.                     
6## No rights are granted to distribute any files unless they are distributed in                     
7## Xilinx programmable logic devices.                     
8###################################################################                     
9##                     
10## Name     : ofdm_TxRx_mimo_opbw                     
11## Desc     : Microprocessor Peripheral Description                     
12##          : Automatically generated by PsfUtility                     
13##                     
14###################################################################                     
15                     
16BEGIN ofdm_AGC_mimo_opbw                     
17                     
18## Peripheral Options                     
19OPTION IPTYPE = PERIPHERAL                     
20OPTION STYLE = BLACKBOX                     
21OPTION IMP_NETLIST = FALSE                     
22#OPTION HDL = VHDL                     
23                     
24                     
25## Bus Interfaces                     
26BUS_INTERFACE BUS = SOPB, BUS_TYPE = SLAVE, BUS_STD = OPB                     
27                     
28## Generics for VHDL or Parameters for Verilog                     
29PARAMETER C_BASEADDR = 0xFFFFFFFF, DT = std_logic_vector(0 to 31), BUS = SOPB, ADDRESS = BASE, PAIR = C_HIGHADDR, MIN_SIZE = 0x10000
30PARAMETER C_HIGHADDR = 0x00000000, DT = std_logic_vector(0 to 31), BUS = SOPB, ADDRESS = HIGH, PAIR = C_BASEADDR
31PARAMETER C_OPB_AWIDTH = 32, DT = INTEGER, BUS = SOPB                     
32PARAMETER C_OPB_DWIDTH = 32, DT = INTEGER, BUS = SOPB                     
33                     
34## Ports                     
35PORT ce = "net_vcc", DIR = I
36PORT i_in_a = "", DIR = I, VEC = [0:13]                     
37PORT i_in_b = "", DIR = I, VEC = [0:13]                     
38PORT opb_abus = OPB_ABus, DIR = I, VEC = [0:31], BUS = SOPB                     
39PORT opb_be = OPB_BE, DIR = I, VEC = [0:3], BUS = SOPB                     
40PORT opb_clk = "", DIR = I, BUS = SOPB                     
41PORT opb_dbus = OPB_DBus, DIR = I, VEC = [0:31], BUS = SOPB                     
42PORT opb_rnw = OPB_RNW, DIR = I, BUS = SOPB                     
43PORT opb_rst = OPB_Rst, DIR = I, BUS = SOPB                     
44PORT opb_select = OPB_select, DIR = I, BUS = SOPB                     
45PORT opb_seqaddr = OPB_seqAddr, DIR = I, BUS = SOPB                     
46PORT packet_in = "", DIR = I                     
47PORT q_in_a = "", DIR = I, VEC = [0:13]                     
48PORT q_in_b = "", DIR = I, VEC = [0:13]                     
49PORT reset_in = "", DIR = I                     
50PORT rssi_in_a = "", DIR = I, VEC = [0:9]                     
51PORT rssi_in_b = "", DIR = I, VEC = [0:9]                     
52PORT done_a = "", DIR = O                     
53PORT done_b = "", DIR = O                     
54PORT g_bb_a = "", DIR = O, VEC = [0:4]                     
55PORT g_bb_b = "", DIR = O, VEC = [0:4]                     
56PORT g_rf_a = "", DIR = O, VEC = [0:1]                     
57PORT g_rf_b = "", DIR = O, VEC = [0:1]                     
58PORT i_out_a = "", DIR = O, VEC = [0:13]                     
59PORT i_out_b = "", DIR = O, VEC = [0:13]                     
60PORT q_out_a = "", DIR = O, VEC = [0:13]                     
61PORT q_out_b = "", DIR = O, VEC = [0:13]                     
62PORT rxhp_a = "", DIR = O                     
63PORT rxhp_b = "", DIR = O                     
64PORT sgp_dbus = Sl_DBus, DIR = O, VEC = [0:31], BUS = SOPB                     
65PORT sgp_errack = Sl_errAck, DIR = O, BUS = SOPB                     
66PORT sgp_retry = Sl_retry, DIR = O, BUS = SOPB                     
67PORT sgp_toutsup = Sl_toutSup, DIR = O, BUS = SOPB                     
68PORT sgp_xferack = Sl_xferAck, DIR = O, BUS = SOPB                     
69                     
70END                     
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