| 1 | ############################################################################## |
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| 2 | ## |
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| 3 | ## *************************************************************************** |
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| 4 | ## ** ** |
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| 5 | ## ** Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. ** |
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| 6 | ## ** ** |
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| 7 | ## ** You may copy and modify these files for your own internal use solely ** |
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| 8 | ## ** with Xilinx programmable logic devices and Xilinx EDK system or ** |
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| 9 | ## ** create IP modules solely for Xilinx programmable logic devices and ** |
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| 10 | ## ** Xilinx EDK system. No rights are granted to distribute any files ** |
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| 11 | ## ** unless they are distributed in Xilinx programmable logic devices. ** |
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| 12 | ## ** ** |
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| 13 | ## *************************************************************************** |
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| 14 | ## |
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| 15 | ############################################################################## |
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| 16 | ## Filename: C:\edk_user_repository\MyProcessorIPLib\pcores\radio_controller_v1_01_a\data\radio_controller_v2_1_0.pao |
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| 17 | ## Description: Peripheral Analysis Order |
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| 18 | ## Date: Thu Jul 07 16:33:45 2005 (by Create and Import Peripheral Wizard) |
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| 19 | ############################################################################## |
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| 20 | |
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| 21 | lib proc_common_v2_00_a proc_common_pkg vhdl |
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| 22 | lib proc_common_v2_00_a family vhdl |
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| 23 | lib proc_common_v2_00_a or_muxcy vhdl |
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| 24 | lib proc_common_v2_00_a or_gate vhdl |
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| 25 | lib proc_common_v2_00_a counter_bit vhdl |
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| 26 | lib proc_common_v2_00_a counter vhdl |
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| 27 | lib proc_common_v2_00_a inferred_lut4 vhdl |
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| 28 | lib proc_common_v2_00_a srl_fifo2 vhdl |
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| 29 | lib proc_common_v2_00_a pf_counter_bit vhdl |
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| 30 | lib proc_common_v2_00_a pf_counter vhdl |
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| 31 | lib proc_common_v2_00_a pf_counter_top vhdl |
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| 32 | lib proc_common_v2_00_a pf_occ_counter vhdl |
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| 33 | lib proc_common_v2_00_a pf_occ_counter_top vhdl |
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| 34 | lib proc_common_v2_00_a pf_adder_bit vhdl |
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| 35 | lib proc_common_v2_00_a pf_adder vhdl |
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| 36 | lib proc_common_v2_00_a pf_dpram_select vhdl |
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| 37 | lib proc_common_v2_00_a srl16_fifo vhdl |
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| 38 | lib proc_common_v2_00_a pselect vhdl |
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| 39 | lib proc_common_v2_00_a valid_be vhdl |
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| 40 | lib proc_common_v2_00_a ld_arith_reg vhdl |
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| 41 | lib proc_common_v2_00_a mux_onehot vhdl |
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| 42 | lib proc_common_v2_00_a down_counter vhdl |
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| 43 | lib proc_common_v2_00_a ipif_pkg vhdl |
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| 44 | lib proc_common_v2_00_a ipif_steer vhdl |
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| 45 | lib proc_common_v2_00_a direct_path_cntr_ai vhdl |
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| 46 | lib interrupt_control_v1_00_a interrupt_control vhdl |
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| 47 | lib wrpfifo_v1_01_b pf_dly1_mux vhdl |
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| 48 | lib wrpfifo_v1_01_b ipif_control_wr vhdl |
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| 49 | lib wrpfifo_v1_01_b wrpfifo_dp_cntl vhdl |
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| 50 | lib wrpfifo_v1_01_b wrpfifo_top vhdl |
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| 51 | lib rdpfifo_v1_01_b ipif_control_rd vhdl |
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| 52 | lib rdpfifo_v1_01_b rdpfifo_dp_cntl vhdl |
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| 53 | lib rdpfifo_v1_01_b rdpfifo_top vhdl |
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| 54 | lib opb_ipif_v3_01_a reset_mir vhdl |
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| 55 | lib opb_ipif_v3_01_a brst_addr_cntr vhdl |
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| 56 | lib opb_ipif_v3_01_a opb_flex_addr_cntr vhdl |
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| 57 | lib opb_ipif_v3_01_a brst_addr_cntr_reg vhdl |
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| 58 | lib opb_ipif_v3_01_a opb_be_gen vhdl |
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| 59 | lib opb_ipif_v3_01_a srl_fifo3 vhdl |
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| 60 | lib opb_ipif_v3_01_a write_buffer vhdl |
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| 61 | lib opb_ipif_v3_01_a opb_bam vhdl |
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| 62 | lib opb_ipif_v3_01_a opb_ipif vhdl |
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| 63 | lib radio_controller_v1_01_a user_logic verilog |
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| 64 | lib radio_controller_v1_01_a radio_controller vhdl |
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