source:
PlatformSupport/Deprecated/pcores/radio_controller_v1_05_a/hdl/verilog
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| user_logic.v | 33.5 KB | 388 | 18 years | murphpo | Updated 1.05 controller and bridge |
| timescale.v | 21 bytes | 207 | 18 years | sgupta | New. Takes into account the change in endianess. Drivers coming soon too. |
| spi_top.v | 6.4 KB | 255 | 18 years | sgupta | Added License to all necessary Radio Controller files |
| spi_shift.v | 6.2 KB | 255 | 18 years | sgupta | Added License to all necessary Radio Controller files |
| spi_defines.v | 6.5 KB | 207 | 18 years | sgupta | New. Takes into account the change in endianess. Drivers coming soon too. |
| spi_clgen.v | 5.1 KB | 207 | 18 years | sgupta | New. Takes into account the change in endianess. Drivers coming soon too. |
| radio_controller_TxTiming.v | 2.6 KB | 389 | 18 years | murphpo | Adding TxTiming module for new radio controller |
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