source:
PlatformSupport/Deprecated/pcores/radio_controller_v1_10_a/hdl/verilog
| Name | Size | Rev | Age | Author | Last Change |
|---|---|---|---|---|---|
| ../ | |||||
| radio_controller_TxTiming.v | 3.0 KB | 816 | 17 years | murphpo | Updating the radio controller with better control of the timing for … |
| spi_clgen.v | 5.0 KB | 637 | 17 years | murphpo | extending SPI clock divider range to 4 bits (from 1 bit) |
| spi_shift.v | 5.9 KB | 537 | 17 years | sgupta | Made a few changes so it compiles |
| spi_top.v | 6.2 KB | 637 | 17 years | murphpo | extending SPI clock divider range to 4 bits (from 1 bit) |
| user_logic.v | 31.5 KB | 637 | 17 years | murphpo | extending SPI clock divider range to 4 bits (from 1 bit) |
Note: See TracBrowser
for help on using the repository browser.
