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1 | ############################################################# |
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2 | # Copyright (c) 1995-2005 Xilinx, Inc. All rights reserved. |
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3 | # |
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4 | # You may copy and modify these files for your own internal |
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5 | # use solely with Xilinx programmable logic devices and |
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6 | # Xilinx EDK system or create IP modules solely for Xilinx |
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7 | # programmable logic devices and Xilinx EDK system. |
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8 | # No rights are granted to distribute any files unless they |
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9 | # are distributed in Xilinx programmable logic devices. |
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10 | # |
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11 | # Peripheral Analyze Order (PAO) file |
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12 | # created by System Generator |
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13 | # Aug 30, 2007 11:29:45 PM |
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14 | ############################################################# |
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15 | |
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16 | lib user_io_board_controller_opbw_v1_00_a user_io_board_controller |
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17 | lib user_io_board_controller_opbw_v1_00_a user_io_board_controller_opbw |
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