1 | (edif test (edifVersion 2 0 0) (edifLevel 0) (keywordMap (keywordLevel 0)) |
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2 | (status (written (timeStamp 2008 8 6 17 22 45) |
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3 | (author "Xilinx, Inc.") |
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4 | (program "Xilinx CORE Generator" (version "Xilinx CORE Generator 10.1.02; Cores Update # 2")))) |
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5 | (comment " |
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6 | This file is owned and controlled by Xilinx and must be used |
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7 | solely for design, simulation, implementation and creation of |
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8 | design files limited to Xilinx devices or technologies. Use |
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9 | with non-Xilinx devices or technologies is expressly prohibited |
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10 | and immediately terminates your license. |
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11 | |
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12 | XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION 'AS IS' |
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13 | SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR |
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14 | XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION |
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15 | AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION |
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16 | OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS |
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17 | IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, |
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18 | AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE |
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19 | FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY |
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20 | WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE |
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21 | IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR |
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22 | REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF |
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23 | INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
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24 | FOR A PARTICULAR PURPOSE. |
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25 | |
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26 | Xilinx products are not intended for use in life support |
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27 | appliances, devices, or systems. Use in such applications are |
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28 | expressly prohibited. |
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29 | |
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30 | (c) Copyright 1995-2007 Xilinx, Inc. |
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31 | All rights reserved. |
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32 | |
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33 | ") |
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34 | (comment "Core parameters: ") |
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35 | (comment "c_has_bypass_with_cin = false ") |
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36 | (comment "c_a_type = 1 ") |
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37 | (comment "c_has_sclr = false ") |
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38 | (comment "c_sync_priority = 1 ") |
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39 | (comment "c_has_aset = false ") |
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40 | (comment "c_has_b_out = false ") |
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41 | (comment "c_has_s = true ") |
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42 | (comment "c_has_q = false ") |
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43 | (comment "InstanceName = adder_subtracter_virtex2p_7_0_7182743c9e7adf5e ") |
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44 | (comment "c_family = virtex2p ") |
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45 | (comment "c_bypass_enable = false ") |
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46 | (comment "c_b_constant = false ") |
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47 | (comment "c_has_ovfl = false ") |
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48 | (comment "c_high_bit = 4 ") |
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49 | (comment "c_latency = 0 ") |
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50 | (comment "c_sinit_val = 0 ") |
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51 | (comment "c_has_bypass = false ") |
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52 | (comment "c_pipe_stages = 1 ") |
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53 | (comment "c_has_sset = false ") |
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54 | (comment "c_has_ainit = false ") |
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55 | (comment "c_has_a_signed = false ") |
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56 | (comment "c_has_q_c_out = false ") |
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57 | (comment "c_b_type = 1 ") |
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58 | (comment "c_has_add = false ") |
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59 | (comment "c_has_sinit = false ") |
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60 | (comment "c_has_b_in = false ") |
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61 | (comment "c_has_b_signed = false ") |
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62 | (comment "c_bypass_low = false ") |
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63 | (comment "c_enable_rlocs = true ") |
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64 | (comment "c_b_value = 0 ") |
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65 | (comment "c_add_mode = 0 ") |
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66 | (comment "c_has_aclr = false ") |
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67 | (comment "c_out_width = 5 ") |
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68 | (comment "c_ainit_val = 0000 ") |
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69 | (comment "c_low_bit = 0 ") |
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70 | (comment "c_has_q_ovfl = false ") |
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71 | (comment "c_has_q_b_out = false ") |
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72 | (comment "c_has_c_out = false ") |
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73 | (comment "c_b_width = 5 ") |
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74 | (comment "c_a_width = 5 ") |
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75 | (comment "c_sync_enable = 0 ") |
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76 | (comment "c_has_ce = true ") |
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77 | (comment "c_has_c_in = false ") |
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78 | (external xilinxun (edifLevel 0) |
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79 | (technology (numberDefinition)) |
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80 | (cell VCC (cellType GENERIC) |
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81 | (view view_1 (viewType NETLIST) |
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82 | (interface |
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83 | (port P (direction OUTPUT)) |
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84 | ) |
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85 | ) |
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86 | ) |
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87 | (cell GND (cellType GENERIC) |
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88 | (view view_1 (viewType NETLIST) |
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89 | (interface |
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90 | (port G (direction OUTPUT)) |
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91 | ) |
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92 | ) |
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93 | ) |
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94 | (cell LUT4 (cellType GENERIC) |
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95 | (view view_1 (viewType NETLIST) |
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96 | (interface |
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97 | (port I0 (direction INPUT)) |
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98 | (port I1 (direction INPUT)) |
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99 | (port I2 (direction INPUT)) |
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100 | (port I3 (direction INPUT)) |
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101 | (port O (direction OUTPUT)) |
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102 | ) |
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103 | ) |
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104 | ) |
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105 | (cell MUXCY (cellType GENERIC) |
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106 | (view view_1 (viewType NETLIST) |
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107 | (interface |
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108 | (port DI (direction INPUT)) |
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109 | (port CI (direction INPUT)) |
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110 | (port S (direction INPUT)) |
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111 | (port O (direction OUTPUT)) |
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112 | ) |
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113 | ) |
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114 | ) |
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115 | (cell XORCY (cellType GENERIC) |
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116 | (view view_1 (viewType NETLIST) |
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117 | (interface |
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118 | (port LI (direction INPUT)) |
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119 | (port CI (direction INPUT)) |
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120 | (port O (direction OUTPUT)) |
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121 | ) |
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122 | ) |
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123 | ) |
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124 | ) |
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125 | (library test_lib (edifLevel 0) (technology (numberDefinition (scale 1 (E 1 -12) (unit Time)))) |
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126 | (cell adder_subtracter_virtex2p_7_0_7182743c9e7adf5e |
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127 | (cellType GENERIC) (view view_1 (viewType NETLIST) |
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128 | (interface |
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129 | (port ( array ( rename A "A(4:0)") 5 ) (direction INPUT)) |
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130 | (port ( array ( rename B "B(4:0)") 5 ) (direction INPUT)) |
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131 | (port ( array ( rename S "S(4:0)") 5 ) (direction OUTPUT)) |
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132 | ) |
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133 | (contents |
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134 | (instance VCC (viewRef view_1 (cellRef VCC (libraryRef xilinxun)))) |
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135 | (instance GND (viewRef view_1 (cellRef GND (libraryRef xilinxun)))) |
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136 | (instance BU3 |
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137 | (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun))) |
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138 | (property RLOC (string "x3y4")) |
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139 | (property RPM_GRID (string "GRID")) |
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140 | (property INIT (string "6666")) |
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141 | ) |
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142 | (instance BU4 |
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143 | (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun))) |
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144 | (property RLOC (string "x3y4")) |
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145 | (property RPM_GRID (string "GRID")) |
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146 | ) |
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147 | (instance BU5 |
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148 | (viewRef view_1 (cellRef XORCY (libraryRef xilinxun))) |
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149 | (property RLOC (string "x3y4")) |
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150 | (property RPM_GRID (string "GRID")) |
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151 | ) |
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152 | (instance BU7 |
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153 | (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun))) |
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154 | (property RLOC (string "x3y4")) |
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155 | (property RPM_GRID (string "GRID")) |
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156 | (property INIT (string "6666")) |
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157 | ) |
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158 | (instance BU8 |
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159 | (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun))) |
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160 | (property RLOC (string "x3y4")) |
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161 | (property RPM_GRID (string "GRID")) |
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162 | ) |
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163 | (instance BU9 |
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164 | (viewRef view_1 (cellRef XORCY (libraryRef xilinxun))) |
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165 | (property RLOC (string "x3y4")) |
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166 | (property RPM_GRID (string "GRID")) |
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167 | ) |
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168 | (instance BU11 |
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169 | (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun))) |
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170 | (property RLOC (string "x3y5")) |
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171 | (property RPM_GRID (string "GRID")) |
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172 | (property INIT (string "6666")) |
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173 | ) |
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174 | (instance BU12 |
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175 | (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun))) |
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176 | (property RLOC (string "x3y5")) |
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177 | (property RPM_GRID (string "GRID")) |
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178 | ) |
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179 | (instance BU13 |
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180 | (viewRef view_1 (cellRef XORCY (libraryRef xilinxun))) |
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181 | (property RLOC (string "x3y5")) |
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182 | (property RPM_GRID (string "GRID")) |
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183 | ) |
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184 | (instance BU15 |
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185 | (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun))) |
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186 | (property RLOC (string "x3y5")) |
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187 | (property RPM_GRID (string "GRID")) |
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188 | (property INIT (string "6666")) |
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189 | ) |
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190 | (instance BU16 |
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191 | (viewRef view_1 (cellRef MUXCY (libraryRef xilinxun))) |
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192 | (property RLOC (string "x3y5")) |
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193 | (property RPM_GRID (string "GRID")) |
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194 | ) |
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195 | (instance BU17 |
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196 | (viewRef view_1 (cellRef XORCY (libraryRef xilinxun))) |
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197 | (property RLOC (string "x3y5")) |
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198 | (property RPM_GRID (string "GRID")) |
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199 | ) |
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200 | (instance BU19 |
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201 | (viewRef view_1 (cellRef LUT4 (libraryRef xilinxun))) |
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202 | (property RLOC (string "x3y8")) |
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203 | (property RPM_GRID (string "GRID")) |
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204 | (property INIT (string "6666")) |
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205 | ) |
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206 | (instance BU20 |
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207 | (viewRef view_1 (cellRef XORCY (libraryRef xilinxun))) |
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208 | (property RLOC (string "x3y8")) |
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209 | (property RPM_GRID (string "GRID")) |
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210 | ) |
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211 | (net N0 |
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212 | (joined |
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213 | (portRef G (instanceRef GND)) |
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214 | (portRef CI (instanceRef BU4)) |
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215 | (portRef CI (instanceRef BU5)) |
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216 | (portRef I2 (instanceRef BU3)) |
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217 | (portRef I3 (instanceRef BU3)) |
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218 | (portRef I2 (instanceRef BU7)) |
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219 | (portRef I3 (instanceRef BU7)) |
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220 | (portRef I2 (instanceRef BU11)) |
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221 | (portRef I3 (instanceRef BU11)) |
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222 | (portRef I2 (instanceRef BU15)) |
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223 | (portRef I3 (instanceRef BU15)) |
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224 | (portRef I2 (instanceRef BU19)) |
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225 | (portRef I3 (instanceRef BU19)) |
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226 | ) |
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227 | ) |
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228 | (net N2 |
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229 | (joined |
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230 | (portRef S (instanceRef BU4)) |
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231 | (portRef LI (instanceRef BU5)) |
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232 | (portRef O (instanceRef BU3)) |
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233 | ) |
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234 | ) |
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235 | (net N5 |
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236 | (joined |
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237 | (portRef O (instanceRef BU4)) |
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238 | (portRef CI (instanceRef BU8)) |
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239 | (portRef CI (instanceRef BU9)) |
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240 | ) |
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241 | ) |
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242 | (net N7 |
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243 | (joined |
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244 | (portRef S (instanceRef BU8)) |
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245 | (portRef LI (instanceRef BU9)) |
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246 | (portRef O (instanceRef BU7)) |
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247 | ) |
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248 | ) |
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249 | (net N10 |
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250 | (joined |
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251 | (portRef O (instanceRef BU8)) |
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252 | (portRef CI (instanceRef BU12)) |
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253 | (portRef CI (instanceRef BU13)) |
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254 | ) |
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255 | ) |
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256 | (net N12 |
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257 | (joined |
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258 | (portRef S (instanceRef BU12)) |
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259 | (portRef LI (instanceRef BU13)) |
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260 | (portRef O (instanceRef BU11)) |
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261 | ) |
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262 | ) |
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263 | (net N15 |
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264 | (joined |
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265 | (portRef O (instanceRef BU12)) |
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266 | (portRef CI (instanceRef BU16)) |
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267 | (portRef CI (instanceRef BU17)) |
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268 | ) |
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269 | ) |
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270 | (net N17 |
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271 | (joined |
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272 | (portRef S (instanceRef BU16)) |
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273 | (portRef LI (instanceRef BU17)) |
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274 | (portRef O (instanceRef BU15)) |
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275 | ) |
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276 | ) |
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277 | (net N20 |
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278 | (joined |
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279 | (portRef O (instanceRef BU16)) |
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280 | (portRef CI (instanceRef BU20)) |
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281 | ) |
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282 | ) |
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283 | (net N22 |
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284 | (joined |
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285 | (portRef LI (instanceRef BU20)) |
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286 | (portRef O (instanceRef BU19)) |
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287 | ) |
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288 | ) |
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289 | (net (rename N26 "A(0)") |
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290 | (joined |
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291 | (portRef (member A 4)) |
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292 | (portRef DI (instanceRef BU4)) |
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293 | (portRef I0 (instanceRef BU3)) |
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294 | ) |
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295 | ) |
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296 | (net (rename N27 "A(1)") |
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297 | (joined |
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298 | (portRef (member A 3)) |
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299 | (portRef DI (instanceRef BU8)) |
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300 | (portRef I0 (instanceRef BU7)) |
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301 | ) |
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302 | ) |
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303 | (net (rename N28 "A(2)") |
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304 | (joined |
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305 | (portRef (member A 2)) |
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306 | (portRef DI (instanceRef BU12)) |
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307 | (portRef I0 (instanceRef BU11)) |
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308 | ) |
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309 | ) |
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310 | (net (rename N29 "A(3)") |
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311 | (joined |
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312 | (portRef (member A 1)) |
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313 | (portRef DI (instanceRef BU16)) |
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314 | (portRef I0 (instanceRef BU15)) |
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315 | ) |
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316 | ) |
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317 | (net (rename N30 "A(4)") |
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318 | (joined |
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319 | (portRef (member A 0)) |
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320 | (portRef I0 (instanceRef BU19)) |
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321 | ) |
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322 | ) |
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323 | (net (rename N31 "B(0)") |
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324 | (joined |
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325 | (portRef (member B 4)) |
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326 | (portRef I1 (instanceRef BU3)) |
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327 | ) |
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328 | ) |
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329 | (net (rename N32 "B(1)") |
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330 | (joined |
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331 | (portRef (member B 3)) |
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332 | (portRef I1 (instanceRef BU7)) |
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333 | ) |
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334 | ) |
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335 | (net (rename N33 "B(2)") |
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336 | (joined |
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337 | (portRef (member B 2)) |
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338 | (portRef I1 (instanceRef BU11)) |
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339 | ) |
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340 | ) |
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341 | (net (rename N34 "B(3)") |
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342 | (joined |
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343 | (portRef (member B 1)) |
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344 | (portRef I1 (instanceRef BU15)) |
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345 | ) |
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346 | ) |
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347 | (net (rename N35 "B(4)") |
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348 | (joined |
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349 | (portRef (member B 0)) |
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350 | (portRef I1 (instanceRef BU19)) |
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351 | ) |
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352 | ) |
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353 | (net (rename N36 "S(0)") |
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354 | (joined |
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355 | (portRef (member S 4)) |
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356 | (portRef O (instanceRef BU5)) |
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357 | ) |
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358 | ) |
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359 | (net (rename N37 "S(1)") |
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360 | (joined |
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361 | (portRef (member S 3)) |
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362 | (portRef O (instanceRef BU9)) |
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363 | ) |
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364 | ) |
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365 | (net (rename N38 "S(2)") |
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366 | (joined |
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367 | (portRef (member S 2)) |
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368 | (portRef O (instanceRef BU13)) |
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369 | ) |
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370 | ) |
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371 | (net (rename N39 "S(3)") |
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372 | (joined |
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373 | (portRef (member S 1)) |
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374 | (portRef O (instanceRef BU17)) |
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375 | ) |
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376 | ) |
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377 | (net (rename N40 "S(4)") |
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378 | (joined |
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379 | (portRef (member S 0)) |
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380 | (portRef O (instanceRef BU20)) |
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381 | ) |
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382 | ) |
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383 | )))) |
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384 | (design adder_subtracter_virtex2p_7_0_7182743c9e7adf5e (cellRef adder_subtracter_virtex2p_7_0_7182743c9e7adf5e (libraryRef test_lib)) |
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385 | (property X_CORE_INFO (string "C_ADDSUB_V7_0, Xilinx CORE Generator 10.1.02_ip2")) |
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386 | (property PART (string "xc2vp2-fg256-7") (owner "Xilinx")) |
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387 | )) |
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