[1833] | 1 | //Xilinx SDK includes |
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| 2 | #include "xparameters.h" |
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| 3 | #include "stdio.h" |
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| 4 | #include "xsysmon.h" |
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| 5 | #include "xtmrctr.h" |
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| 6 | #include "xio.h" |
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| 7 | |
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| 8 | //WARP includes |
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| 9 | #include "w3_userio.h" |
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| 10 | #include "w3_ad_controller.h" |
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| 11 | #include "w3_clock_controller.h" |
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| 12 | #include "w3_iic_eeprom.h" |
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| 13 | #include "radio_controller.h" |
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| 14 | |
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| 15 | //Define standard macros for pcore base addresses and device IDs |
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| 16 | // XPAR_ names will change with instance names in hardware |
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| 17 | #define USERIO_BASEADDR XPAR_W3_USERIO_0_BASEADDR |
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| 18 | #define RC_BASEADDR XPAR_RADIO_CONTROLLER_0_BASEADDR |
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| 19 | #define AD_BASEADDR XPAR_W3_AD_CONTROLLER_0_BASEADDR |
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| 20 | #define CLK_BASEADDR XPAR_W3_CLOCK_CONTROLLER_0_BASEADDR |
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| 21 | #define EEPROM_BASEADDR XPAR_W3_IIC_EEPROM_0_BASEADDR |
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| 22 | #define DRAM_BASEADDR XPAR_DDR3_2GB_SODIMM_MPMC_BASEADDR |
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| 23 | #define TIMER_FREQ XPAR_XPS_TIMER_0_CLOCK_FREQ_HZ |
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| 24 | #define TMRCTR_DEVICE_ID XPAR_TMRCTR_0_DEVICE_ID |
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| 25 | |
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| 26 | |
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| 27 | //Global variable definitions |
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| 28 | XTmrCtr TimerCounter; /* The instance of the Tmrctr Device */ |
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| 29 | |
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| 30 | int w3_node_init(); |
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| 31 | void userio_example(); |
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| 32 | void usleep(u32 duration); |
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| 33 | |
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| 34 | int main() { |
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| 35 | int status; |
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| 36 | |
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| 37 | xil_printf(" \f"); |
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| 38 | xil_printf("WARP v3 Template Project - Lite\n"); |
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| 39 | |
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| 40 | status = w3_node_init(); |
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| 41 | if(status != 0) { |
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| 42 | xil_printf("Error in w3_node_init()! Exiting\n"); |
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| 43 | return -1; |
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| 44 | } |
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| 45 | |
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| 46 | xil_printf("Board serial number: W3-a-%05d\n\n", w3_eeprom_readSerialNum(EEPROM_BASEADDR)); |
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| 47 | |
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| 48 | xil_printf("Running User I/O Example\n"); |
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| 49 | userio_example(); |
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| 50 | |
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| 51 | return 0; |
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| 52 | } |
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| 53 | |
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| 54 | void userio_example() { |
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| 55 | int i; |
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| 56 | xil_printf("\tCurrent Count: 0x "); |
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| 57 | for(i=0; i<256; i++) { |
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| 58 | userio_write_hexdisp_left(USERIO_BASEADDR, i>>4); |
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| 59 | userio_write_hexdisp_right(USERIO_BASEADDR, i%16); |
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| 60 | userio_write_leds_green(USERIO_BASEADDR, i>>4); |
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| 61 | userio_write_leds_red(USERIO_BASEADDR, i%16); |
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| 62 | |
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| 63 | xil_printf("\b\b%02x", i); |
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| 64 | |
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| 65 | usleep(250000); |
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| 66 | } |
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| 67 | xil_printf("\n"); |
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| 68 | return; |
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| 69 | |
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| 70 | } |
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| 71 | |
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| 72 | int w3_node_init() { |
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| 73 | |
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| 74 | int status; |
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| 75 | XTmrCtr *TmrCtrInstancePtr = &TimerCounter; |
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| 76 | int ret = XST_SUCCESS; |
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| 77 | |
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| 78 | microblaze_enable_exceptions(); |
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| 79 | |
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| 80 | //Initialize the AD9512 clock buffers (RF reference and sampling clocks) |
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| 81 | status = clk_init(CLK_BASEADDR, 2); |
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| 82 | if(status != XST_SUCCESS) { |
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| 83 | xil_printf("w3_node_init: Error in clk_init (%d)\n", status); |
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| 84 | ret = XST_FAILURE; |
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| 85 | } |
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| 86 | |
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| 87 | //Initialize the AD9963 ADCs/DACs |
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| 88 | ad_init(AD_BASEADDR, 2); |
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| 89 | if(status != XST_SUCCESS) { |
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| 90 | xil_printf("w3_node_init: Error in ad_init (%d)\n", status); |
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| 91 | ret = XST_FAILURE; |
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| 92 | } |
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| 93 | |
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| 94 | //Initialize the radio_controller core and MAX2829 transceivers |
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| 95 | status = radio_controller_init(RC_BASEADDR, (RC_RFA | RC_RFB), 1, 1); |
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| 96 | if(status != XST_SUCCESS) { |
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| 97 | xil_printf("w3_node_init: Error in radioController_initialize (%d)\n", status); |
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| 98 | ret = XST_FAILURE; |
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| 99 | } |
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| 100 | |
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| 101 | //Initialize the EEPROM read/write core |
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| 102 | iic_eeprom_init(EEPROM_BASEADDR, 0x64); |
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| 103 | if(status != XST_SUCCESS) { |
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| 104 | xil_printf("w3_node_init: Error in IIC_EEPROM_init (%d)\n", status); |
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| 105 | ret = XST_FAILURE; |
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| 106 | } |
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| 107 | |
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| 108 | /* |
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| 109 | * Initialize the timer counter so that it's ready to use, |
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| 110 | * specify the device ID that is generated in xparameters.h |
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| 111 | */ |
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| 112 | status = XTmrCtr_Initialize(TmrCtrInstancePtr, TMRCTR_DEVICE_ID); |
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| 113 | if (status != XST_SUCCESS) { |
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| 114 | xil_printf("w3_node_init: Error in XtmrCtr_Initialize (%d)\n", status); |
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| 115 | ret = XST_FAILURE; |
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| 116 | } |
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| 117 | |
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| 118 | /* |
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| 119 | * Perform a self-test to ensure that the hardware was built |
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| 120 | * correctly, use the 1st timer in the device (0) |
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| 121 | */ |
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| 122 | status = XTmrCtr_SelfTest(TmrCtrInstancePtr, 0); |
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| 123 | if (status != XST_SUCCESS) { |
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| 124 | ret = XST_FAILURE; |
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| 125 | } |
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| 126 | |
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| 127 | // Set timer 0 to into a "count down" mode |
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| 128 | XTmrCtr_SetOptions(TmrCtrInstancePtr, 0, (XTC_DOWN_COUNT_OPTION)); |
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| 129 | |
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| 130 | return ret; |
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| 131 | } |
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| 132 | |
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| 133 | void usleep(u32 duration){ |
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| 134 | XTmrCtr *TmrCtrInstancePtr = &TimerCounter; |
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| 135 | XTmrCtr_SetResetValue(TmrCtrInstancePtr,0,duration*(TIMER_FREQ/1000000)); |
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| 136 | |
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| 137 | XTmrCtr_Start(TmrCtrInstancePtr,0); |
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| 138 | |
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| 139 | volatile u8 isExpired = 0; |
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| 140 | while(isExpired!=1){ |
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| 141 | isExpired = XTmrCtr_IsExpired(TmrCtrInstancePtr,0); |
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| 142 | } |
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| 143 | XTmrCtr_Reset(TmrCtrInstancePtr,0); |
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| 144 | return; |
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| 145 | } |
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| 146 | |
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