[1385] | 1 | #include "xparameters.h" |
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| 2 | #include "warp_fpga_board.h" |
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| 3 | #include <net/xilnet_config.h> |
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| 4 | #include <net/xilsock.h> |
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| 5 | #include "xstatus.h" |
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| 6 | #include <stdlib.h> |
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| 7 | #include <string.h> |
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| 8 | #include <string.h> |
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| 9 | #include "math.h" |
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| 10 | #include "radio_controller_basic.h" |
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| 11 | #include "radio_controller_ext.h" |
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| 12 | #include "radio_controller_adv.h" |
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| 13 | #include "warplab_defines.h" |
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| 14 | #include "EEPROM.h" |
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| 15 | #include "xemaclite.h" |
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| 16 | #include "xemaclite_l.h" |
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[1418] | 17 | #include "warplab_regmacros.h" |
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| 18 | #include "xgpio.h" |
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[1385] | 19 | |
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[1418] | 20 | //#define WARPLAB_CONFIG_2x2 1 // Comment in if board in 2x2 configuration |
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| 21 | #define WARPLAB_CONFIG_4x4 1 // Comment in if board in 4x4 configuration |
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[1389] | 22 | |
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[1385] | 23 | #define XPAR_ETHERNET_MAC_BASEADDR XPAR_EMACLITE_0_BASEADDR |
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| 24 | |
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| 25 | //Includes for specific FPGA board versions |
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| 26 | #ifdef WARP_FPGA_BOARD_V1_2 |
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| 27 | #include "warp_userio.h" |
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| 28 | static XGpio GPIO_UserIO; //Instantiates the general-purpose input-output peripheral driver |
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| 29 | #elif defined WARP_FPGA_BOARD_V2_2 |
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| 30 | #define USERIO_BASEADDR XPAR_WARP_V4_USERIO_ALL_BASEADDR |
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| 31 | #include "warp_v4_userio.h" |
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| 32 | #endif |
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| 33 | |
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[1418] | 34 | #define WARPLAB_TXBUFF_RADIO1 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_TXBUFF_RADIO1 |
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| 35 | #define WARPLAB_TXBUFF_RADIO2 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_TXBUFF_RADIO2 |
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| 36 | #define WARPLAB_TXBUFF_RADIO3 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_TXBUFF_RADIO3 |
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| 37 | #define WARPLAB_TXBUFF_RADIO4 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_TXBUFF_RADIO4 |
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| 38 | #define WARPLAB_RXBUFF_RADIO1 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_RXBUFF_RADIO1 |
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| 39 | #define WARPLAB_RXBUFF_RADIO2 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_RXBUFF_RADIO2 |
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| 40 | #define WARPLAB_RXBUFF_RADIO3 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_RXBUFF_RADIO3 |
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| 41 | #define WARPLAB_RXBUFF_RADIO4 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_RXBUFF_RADIO4 |
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| 42 | #define WARPLAB_RSSIBUFF_RADIO1 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_RSSIBUFF_RADIO1 |
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| 43 | #define WARPLAB_RSSIBUFF_RADIO2 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_RSSIBUFF_RADIO2 |
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| 44 | #define WARPLAB_RSSIBUFF_RADIO3 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_RSSIBUFF_RADIO3 |
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| 45 | #define WARPLAB_RSSIBUFF_RADIO4 XPAR_WARPLAB_MIMO_4X4_PLBW_0_MEMMAP_RSSIBUFF_RADIO4 |
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[1385] | 46 | |
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| 47 | #define BUFSIZE 2000 |
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| 48 | |
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| 49 | #define DEBUG_LVL 0 |
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[1418] | 50 | static XGpio benchGpio; |
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[1385] | 51 | |
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[1418] | 52 | |
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[1385] | 53 | unsigned int sendPtr32[(BUFSIZE+3)/4]; |
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| 54 | unsigned char * const sendBuffer = (unsigned char *) sendPtr32; |
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| 55 | unsigned int receivePtr32[(BUFSIZE+3)/4]; |
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| 56 | unsigned char * const receiveBuffer = (unsigned char *) receivePtr32; |
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| 57 | unsigned int myPort; |
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| 58 | |
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| 59 | int sock; // UDP socket |
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| 60 | struct sockaddr_in addr; |
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| 61 | int alen = 0; |
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| 62 | char node; |
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| 63 | |
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| 64 | unsigned int ReadWrite; |
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| 65 | unsigned char Radios_WirelessChan; |
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| 66 | unsigned char Radios_Tx_LPF_Corn_Freq; |
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| 67 | unsigned char Radios_Rx_LPF_Corn_Freq; |
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| 68 | unsigned char Radio1_TxGain_BB, Radio1_TxGain_RF, Radio1_RxGain_BB, Radio1_RxGain_RF; |
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| 69 | unsigned char Radio2_TxGain_BB, Radio2_TxGain_RF, Radio2_RxGain_BB, Radio2_RxGain_RF; |
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| 70 | unsigned char Radio3_TxGain_BB, Radio3_TxGain_RF, Radio3_RxGain_BB, Radio3_RxGain_RF; |
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| 71 | unsigned char Radio4_TxGain_BB, Radio4_TxGain_RF, Radio4_RxGain_BB, Radio4_RxGain_RF; |
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| 72 | |
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| 73 | #ifdef WARPLAB_CONFIG_2x2 |
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| 74 | unsigned int radios = RADIO2_ADDR | RADIO3_ADDR; |
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| 75 | #elif defined WARPLAB_CONFIG_4x4 |
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| 76 | unsigned int radios = RADIO1_ADDR | RADIO2_ADDR | RADIO3_ADDR | RADIO4_ADDR; |
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| 77 | #endif |
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| 78 | unsigned int radio1 = RADIO1_ADDR; |
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| 79 | unsigned int radio2 = RADIO2_ADDR; |
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| 80 | unsigned int radio3 = RADIO3_ADDR; |
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| 81 | unsigned int radio4 = RADIO4_ADDR; |
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| 82 | |
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| 83 | unsigned int AgcIsDoneAddr; |
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| 84 | unsigned int MGC_AGC_Sel_Variable = 0; // By default MGC is selected |
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| 85 | |
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| 86 | |
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| 87 | //Instantiates Ethernet MAC lite |
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| 88 | static XEmacLite EmacLiteInstance; /* Instance of the EmacLite */ |
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| 89 | static XEmacLite_Config *EmacLiteConfigPtr; |
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| 90 | |
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| 91 | //---------------------------------- |
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| 92 | // Functions |
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| 93 | void sendACK(unsigned int packetNo, unsigned int commandToACK); |
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| 94 | unsigned char sevenSegmentMap(unsigned char x); |
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| 95 | //int CalibrateTxDCO(unsigned int radioSelection); Old Tx DCO calibration code |
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| 96 | int warpphy_applyTxDCOCorrection(unsigned int radioSelection); |
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[1387] | 97 | void warplab_AGC_Reset(); |
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| 98 | void warplab_AGC_MasterReset(); |
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| 99 | void warplab_AGC_Start(); |
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| 100 | void warplab_AGC_Initialize(int noise_estimate); |
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| 101 | void warplab_AGC_setNoiseEstimate(int noise_estimate); |
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| 102 | unsigned int warplab_AGC_GetGains(void); |
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| 103 | void warplab_AGC_SetTarget(unsigned int target); |
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| 104 | void warplab_AGC_SetDCO(unsigned int AGCstate); |
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[1385] | 105 | // In WARPLab there is no decimation filter in the AGC, there is a downsampling only, so in WARPLab a function equivalent to |
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| 106 | // ofdm_AGC_FiltSel is not needed |
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| 107 | |
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| 108 | void init_net() { |
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| 109 | int i, Status; |
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| 110 | print("Starting Up!!\n\r"); |
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| 111 | |
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| 112 | Xuint8 ip[16]; |
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| 113 | Xuint8 myHwAddr[6]; |
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| 114 | |
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| 115 | mb_hw_addr[0] = 0; |
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| 116 | mb_hw_addr[1] = 1; |
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| 117 | mb_hw_addr[2] = 2; |
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| 118 | mb_hw_addr[3] = 3; |
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| 119 | mb_hw_addr[4] = 4; |
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| 120 | mb_hw_addr[5] = node+1; |
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| 121 | |
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| 122 | mb_ip_addr[0] = 10; |
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| 123 | mb_ip_addr[1] = 0; |
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| 124 | mb_ip_addr[2] = 0; |
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| 125 | mb_ip_addr[3] = node+1; |
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| 126 | |
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| 127 | //Define the "magic" SYNC IP address |
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| 128 | magicSync_ip_addr[0] = 10; |
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| 129 | magicSync_ip_addr[1] = 0; |
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| 130 | magicSync_ip_addr[2] = 0; |
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| 131 | magicSync_ip_addr[3] = 244; |
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| 132 | |
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| 133 | myPort = 9000 + node; |
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| 134 | |
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| 135 | // Initialize Ethernet hardware table (eth.c) |
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| 136 | xilnet_eth_init_hw_addr_tbl(); |
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| 137 | |
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| 138 | // Set the IP address (ip.c) |
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| 139 | // xilnet_ip_init(ip); |
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| 140 | |
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| 141 | // Initialize the MAC OPB base address (MAC driver in net/mac.c) |
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| 142 | xilnet_mac_init(XPAR_ETHERNET_MAC_BASEADDR); |
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| 143 | // xemac_l.h |
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| 144 | |
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| 145 | /*************************Ethernet***************************/ |
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| 146 | if(DEBUG_LVL > 1) xil_printf(" Initializing Ethernet..."); |
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| 147 | //Initialize the EMAC config struct |
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| 148 | EmacLiteConfigPtr = XEmacLite_LookupConfig(XPAR_EMACLITE_0_DEVICE_ID); |
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| 149 | if (EmacLiteConfigPtr == NULL){ |
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| 150 | xil_printf("EMAClite LookupConfig failed!\r\n"); |
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| 151 | return; |
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| 152 | } |
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| 153 | |
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| 154 | Status = XEmacLite_CfgInitialize(&EmacLiteInstance, EmacLiteConfigPtr, EmacLiteConfigPtr->BaseAddress); |
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| 155 | if (Status != XST_SUCCESS){ |
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| 156 | xil_printf("EMAClite CfgInitialize failed!\r\n"); |
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| 157 | return; |
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| 158 | } |
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| 159 | |
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| 160 | XEmacLite_SetMacAddress(&EmacLiteInstance, mb_hw_addr); |
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| 161 | |
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| 162 | XEmacLite_FlushReceive(&EmacLiteInstance); |
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| 163 | xil_printf("complete!\r\n"); |
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| 164 | /************************************************************/ |
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| 165 | |
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| 166 | // Print IP address |
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| 167 | if(DEBUG_LVL > 0) xil_printf("IP Address: %d.%d.%d.%d \n\r", mb_ip_addr[0], mb_ip_addr[1],mb_ip_addr[2],mb_ip_addr[3]); |
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| 168 | } |
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| 169 | |
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| 170 | |
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| 171 | void init_socket() { |
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| 172 | |
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| 173 | sock = xilsock_socket(AF_INET, SOCK_DGRAM, 0); // Create UDP socket with domain Internet and UDP connection. |
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| 174 | if (sock == -1) { |
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| 175 | if(DEBUG_LVL > 0) xil_printf("Error in creating socket\r\n"); |
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| 176 | exit(-1); |
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| 177 | } |
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| 178 | |
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| 179 | addr.sin_family = AF_INET; |
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| 180 | addr.sin_port = myPort; |
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| 181 | addr.sin_addr.s_addr = INADDR_ANY; // Create the input socket with any incoming address. (0x00000000) |
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| 182 | |
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| 183 | XStatus bind = xilsock_bind(sock, (struct sockaddr *)&addr, sizeof(struct sockaddr)); |
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| 184 | if (bind == -1) { |
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| 185 | if(DEBUG_LVL > 0) xil_printf("Unable to bind socket\r\n"); |
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| 186 | exit(-1); |
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| 187 | } |
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| 188 | alen = sizeof(struct sockaddr); |
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| 189 | if(DEBUG_LVL > 0) xil_printf("Listening on UDP port %d.\r\n", myPort); |
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| 190 | } |
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| 191 | |
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| 192 | void shut_socket() { |
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| 193 | xilsock_close(sock); |
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| 194 | } |
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| 195 | |
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| 196 | int waitForSync() |
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| 197 | { |
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| 198 | unsigned int i, n; |
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| 199 | |
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| 200 | for(i=0; i<10; i++) |
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| 201 | { |
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| 202 | n = xilnet_eth_recv_frame(receiveBuffer, BUFSIZE); |
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| 203 | if(n==9999) |
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| 204 | { |
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| 205 | //if(DEBUG_LVL > 1) if(n==9999) xil_printf("Got magic sync packet at top level!\r\n"); |
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| 206 | //if(DEBUG_LVL > 1) xil_printf("Got magic sync packet at top level!\r\n"); |
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| 207 | //xil_printf("GotS\r\n"); |
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| 208 | return 0; |
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| 209 | } |
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| 210 | } |
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| 211 | xil_printf("NoSync\r\n"); |
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| 212 | return 1; |
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| 213 | } |
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| 214 | |
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| 215 | int main() { |
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| 216 | |
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| 217 | int bytesReceived; |
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| 218 | int bytesSend; |
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| 219 | int command; |
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| 220 | int packetNo; |
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| 221 | unsigned int rxArg0; |
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| 222 | char done = 0; |
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| 223 | unsigned int i,j,k, n; |
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| 224 | unsigned char sevenSeg0; |
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| 225 | unsigned char sevenSeg1 = 0x1; |
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| 226 | int agctarget = -14; |
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| 227 | int agcnoiseEst = -95; |
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| 228 | unsigned int agc_dco_state; |
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| 229 | unsigned int LEDHEX_Outputs = 0; |
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| 230 | |
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[1418] | 231 | |
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[1385] | 232 | #ifdef WARP_FPGA_BOARD_V1_2 |
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| 233 | //Initialize the driver instance for the GPIO core attached to the FPGA board's user I/O (swithces, LEDs, etc) |
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| 234 | XGpio_Initialize(&GPIO_UserIO, XPAR_USER_IO_DEVICE_ID); |
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| 235 | |
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| 236 | //We use both channels in the GPIO core- one for inputs, one for outputs |
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| 237 | //A '1' in a bit position in the third argument marks the bit as an input |
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| 238 | XGpio_SetDataDirection(&GPIO_UserIO, USERIO_CHAN_INPUTS, USERIO_MASK_INPUTS); |
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| 239 | XGpio_SetDataDirection(&GPIO_UserIO, USERIO_CHAN_OUTPUTS, 0); |
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| 240 | |
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| 241 | //Make sure the LEDs are all off by default |
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| 242 | XGpio_DiscreteClear(&GPIO_UserIO, USERIO_CHAN_OUTPUTS, USERIO_MASK_OUTPUTS); |
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| 243 | |
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| 244 | //Read the 4-bit DIP switch, and use its value as this node's ID |
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| 245 | node = USERIO_MAP_DIPSW(XGpio_DiscreteRead(&GPIO_UserIO, USERIO_CHAN_INPUTS) & USERIO_MASK_INPUTS); |
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| 246 | |
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| 247 | //Display the node's ID + 1 (to match the IP address) on the right hex display |
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| 248 | LEDHEX_Outputs = ( |
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| 249 | USERIO_MAP_LEDS(0) | |
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| 250 | USERIO_MAP_DISPR(sevenSegmentMap(node+1)) | |
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| 251 | USERIO_MAP_DISPL(sevenSeg1) |
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| 252 | ); |
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| 253 | XGpio_DiscreteSet(&GPIO_UserIO, USERIO_CHAN_OUTPUTS, LEDHEX_Outputs); |
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| 254 | |
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| 255 | #elif defined WARP_FPGA_BOARD_V2_2 |
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| 256 | //Set the modes for the three hex displays |
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| 257 | WarpV4_UserIO_NumberMode_LeftHex(USERIO_BASEADDR); |
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| 258 | WarpV4_UserIO_NumberMode_MiddleHex(USERIO_BASEADDR); |
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| 259 | WarpV4_UserIO_RawMode_RightHex(USERIO_BASEADDR); |
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| 260 | |
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| 261 | //Read the 4-bit DIP switch and use its value as this node's ID |
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| 262 | node = WarpV4_UserIO_DipSw(USERIO_BASEADDR); |
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| 263 | |
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| 264 | //Write the 2-digit node ID to the left and middle hex displays |
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| 265 | WarpV4_UserIO_WriteNumber_LeftHex(USERIO_BASEADDR, (node+1)/10, 0); |
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| 266 | WarpV4_UserIO_WriteNumber_MiddleHex(USERIO_BASEADDR, (node+1)%10, 0); |
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| 267 | #endif |
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| 268 | |
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| 269 | //Initialize the xilnet stack & default sockets |
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| 270 | init_net(); |
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| 271 | init_socket(); |
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| 272 | |
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| 273 | //Initialize the radio transceivers |
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| 274 | WarpRadio_v1_Reset((unsigned int*)XPAR_RADIO_CONTROLLER_0_BASEADDR, 2); |
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| 275 | WarpRadio_v1_SetCenterFreq2GHz(11, radios); |
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| 276 | WarpRadio_v1_SoftwareTxGainControl(1, radios); |
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| 277 | //By default, MGC (Manual Gain Control) is enabled. AGC is not enabled by default |
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| 278 | WarpRadio_v1_SoftwareRxGainControl(1, radios); |
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| 279 | WarpRadio_v1_RxHpSoftControlEnable(radios); |
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| 280 | //Set Rx bandwidth to nominal mode |
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| 281 | Radios_Tx_LPF_Corn_Freq = 1; |
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| 282 | WarpRadio_v1_RxLpfCornFreqCoarseAdj(Radios_Tx_LPF_Corn_Freq, radios); |
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| 283 | //Set Tx bandwidth to nominal mode |
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| 284 | Radios_Rx_LPF_Corn_Freq = 1; |
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| 285 | WarpRadio_v1_TxLpfCornFreqCoarseAdj(Radios_Rx_LPF_Corn_Freq, radios); |
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| 286 | |
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| 287 | //Apply the stored TX DC offset correction values for each radio |
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| 288 | warpphy_applyTxDCOCalibration(RADIO2_ADDR); |
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| 289 | warpphy_applyTxDCOCalibration(RADIO3_ADDR); |
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| 290 | #ifdef WARPLAB_CONFIG_4x4 |
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| 291 | warpphy_applyTxDCOCalibration(RADIO1_ADDR); |
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| 292 | warpphy_applyTxDCOCalibration(RADIO4_ADDR); |
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| 293 | #endif |
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| 294 | // CalibrateTxDCO(RADIO2_ADDR); Old Tx DCO calibration code |
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| 295 | // CalibrateTxDCO(RADIO3_ADDR); Old Tx DCO calibration code |
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| 296 | |
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| 297 | #ifdef WARPLAB_CONFIG_2x2 |
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| 298 | xil_printf("WARPLab 2x2 Started - Waiting for connection from MATLAB\r\n"); |
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| 299 | #elif defined WARPLAB_CONFIG_4x4 |
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| 300 | xil_printf("WARPLab 4x4 Started - Waiting for connection from MATLAB\r\n"); |
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| 301 | #endif |
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| 302 | |
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| 303 | while(done == 0) { |
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| 304 | |
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| 305 | if(DEBUG_LVL > 2) xil_printf("|"); |
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| 306 | |
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| 307 | bytesReceived = xilsock_recvfrom(sock, receiveBuffer, BUFSIZE, (struct sockaddr *)&addr, &alen); // Wait to receive data |
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| 308 | |
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| 309 | if (bytesReceived > 0) { // Check for valid packet |
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| 310 | |
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| 311 | packetNo = receivePtr32[0]; |
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| 312 | command = receivePtr32[1]; |
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| 313 | rxArg0 = receivePtr32[2]; |
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| 314 | |
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| 315 | //Rotate the single active bit |
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| 316 | sevenSeg1 = ( ((sevenSeg1<<1)&0x7E) | ((sevenSeg1>>5)&0x7E) ); |
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| 317 | |
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| 318 | #ifdef WARP_FPGA_BOARD_V1_2 |
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| 319 | //Update the hex displays to show the new values |
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| 320 | LEDHEX_Outputs = ( |
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| 321 | USERIO_MAP_LEDS(0) | |
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| 322 | USERIO_MAP_DISPR(sevenSegmentMap(node+1)) | |
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| 323 | USERIO_MAP_DISPL(sevenSeg1) |
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| 324 | ); |
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| 325 | XGpio_DiscreteSet(&GPIO_UserIO, USERIO_CHAN_OUTPUTS, LEDHEX_Outputs); |
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| 326 | #elif defined WARP_FPGA_BOARD_V2_2 |
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[1418] | 327 | WarpV4_UserIO_WriteRaw_RightHex(USERIO_BASEADDR, sevenSeg1<<1); |
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[1385] | 328 | #endif |
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| 329 | if(DEBUG_LVL > 2) xil_printf("=============\r\nPacket Received\r\n Length: %d\r\n Packet No.: %d\r\n Command No: %d\r\n", bytesReceived, packetNo, command); |
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| 330 | |
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| 331 | switch(command) { // Decode on incoming command |
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| 332 | |
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| 333 | case INITIALIZE: |
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| 334 | //if(DEBUG_LVL > 1) xil_printf("Initializing Node..."); |
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[1389] | 335 | warplab_mimo_WriteReg_TxDelay(0); |
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| 336 | warplab_mimo_WriteReg_StartCapture(0); |
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| 337 | warplab_mimo_WriteReg_TxLength((unsigned int)16383); |
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| 338 | warplab_mimo_WriteReg_TransMode(0); |
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| 339 | warplab_mimo_WriteReg_RADIO2TXBUFF_TXEN(0); |
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| 340 | warplab_mimo_WriteReg_RADIO3TXBUFF_TXEN(0); |
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| 341 | warplab_mimo_WriteReg_RADIO2RXBUFF_RXEN(0); |
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| 342 | warplab_mimo_WriteReg_RADIO3RXBUFF_RXEN(0); |
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| 343 | warplab_mimo_WriteReg_DebugRx2Buffers(0); |
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| 344 | warplab_mimo_WriteReg_DebugRx3Buffers(0); |
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| 345 | warplab_AGC_WriteReg_RADIO1_AGC_EN(0); // No radio on slot 1 |
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| 346 | warplab_AGC_WriteReg_RADIO2_AGC_EN(0); |
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| 347 | warplab_AGC_WriteReg_RADIO3_AGC_EN(0); |
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| 348 | warplab_AGC_WriteReg_RADIO4_AGC_EN(0); // No radio on slot 4 |
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| 349 | warplab_AGC_WriteReg_AGC_TRIGGER_DELAY((unsigned int)50); |
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| 350 | warplab_mimo_WriteReg_MGC_AGC_SEL(0);// Select MGC by default |
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| 351 | warplab_AGC_WriteReg_AGC_EN(0); |
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[1385] | 352 | MGC_AGC_Sel_Variable = 0; |
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| 353 | #ifdef WARPLAB_CONFIG_4x4 |
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[1389] | 354 | warplab_mimo_WriteReg_RADIO1TXBUFF_TXEN(0); |
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| 355 | warplab_mimo_WriteReg_RADIO4TXBUFF_TXEN(0); |
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| 356 | warplab_mimo_WriteReg_RADIO1RXBUFF_RXEN(0); |
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| 357 | warplab_mimo_WriteReg_RADIO4RXBUFF_RXEN(0); |
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| 358 | warplab_mimo_WriteReg_DebugRx1Buffers(0); |
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| 359 | warplab_mimo_WriteReg_DebugRx4Buffers(0); |
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[1385] | 360 | #endif |
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| 361 | |
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| 362 | sendACK(packetNo, command); |
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| 363 | break; |
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| 364 | |
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| 365 | case TX_DELAY: |
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[1418] | 366 | |
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[1385] | 367 | ReadWrite = (unsigned int)receivePtr32[2]; |
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| 368 | if(0 == ReadWrite) |
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| 369 | { |
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| 370 | sendPtr32[0] = packetNo + 1; |
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| 371 | sendPtr32[1] = ACK; |
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| 372 | sendPtr32[2] = command; |
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| 373 | |
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| 374 | sendPtr32[3] = warplab_mimo_ReadReg_TxDelay(WARPLAB_BASEADDR); |
---|
| 375 | |
---|
| 376 | if(DEBUG_LVL > 2) xil_printf("Read capt offset of %d\r\n", (unsigned int)receivePtr32[3]); |
---|
| 377 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 378 | } |
---|
| 379 | if(1 == ReadWrite) |
---|
| 380 | { |
---|
| 381 | //If the user requests a TX_DELAY that's too big, write the maximum instead |
---|
[1389] | 382 | warplab_mimo_WriteReg_TxDelay((unsigned int)receivePtr32[3] > 16383 ? 16383 : (unsigned int)receivePtr32[3]); |
---|
[1385] | 383 | if(DEBUG_LVL > 2) xil_printf("Set capt offset to %d\r\n", (unsigned int)receivePtr32[3]); |
---|
| 384 | sendACK(packetNo, command); |
---|
| 385 | } |
---|
[1418] | 386 | |
---|
[1385] | 387 | break; |
---|
| 388 | |
---|
| 389 | case TX_LENGTH: |
---|
| 390 | ReadWrite = (unsigned int)receivePtr32[2]; |
---|
| 391 | if(0 == ReadWrite) |
---|
| 392 | { |
---|
| 393 | sendPtr32[0] = packetNo + 1; |
---|
| 394 | sendPtr32[1] = ACK; |
---|
| 395 | sendPtr32[2] = command; |
---|
| 396 | |
---|
| 397 | sendPtr32[3] = warplab_mimo_ReadReg_TxLength(WARPLAB_BASEADDR); |
---|
| 398 | |
---|
| 399 | if(DEBUG_LVL > 2) xil_printf("Read TxLength of %d\r\n", (unsigned int)receivePtr32[3]); |
---|
| 400 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 401 | } |
---|
| 402 | if(1 == ReadWrite) |
---|
| 403 | { |
---|
| 404 | //If the user requests a TX_LENGTH that's too big, write the maximum instead |
---|
[1389] | 405 | warplab_mimo_WriteReg_TxLength((unsigned int)receivePtr32[3] > 16383 ? 16383 : (unsigned int)receivePtr32[3]); |
---|
[1385] | 406 | if(DEBUG_LVL > 2) xil_printf("Set TxLength to %d\r\n", (unsigned int)receivePtr32[3]); |
---|
| 407 | sendACK(packetNo, command); |
---|
| 408 | } |
---|
| 409 | break; |
---|
| 410 | |
---|
| 411 | case TX_MODE: |
---|
| 412 | ReadWrite = (unsigned int)receivePtr32[2]; |
---|
| 413 | if(0 == ReadWrite) |
---|
| 414 | { |
---|
| 415 | sendPtr32[0] = packetNo + 1; |
---|
| 416 | sendPtr32[1] = ACK; |
---|
| 417 | sendPtr32[2] = command; |
---|
| 418 | |
---|
| 419 | sendPtr32[3] = warplab_mimo_ReadReg_TransMode(WARPLAB_BASEADDR); |
---|
| 420 | |
---|
| 421 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 422 | } |
---|
| 423 | if(1 == ReadWrite) |
---|
| 424 | { |
---|
[1389] | 425 | warplab_mimo_WriteReg_TransMode((unsigned int)receivePtr32[3]); |
---|
[1385] | 426 | sendACK(packetNo, command); |
---|
| 427 | } |
---|
| 428 | break; |
---|
| 429 | |
---|
| 430 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 431 | case RX1BUFFERS_DEBUG: |
---|
| 432 | ReadWrite = (unsigned int)receivePtr32[2]; |
---|
| 433 | if(0 == ReadWrite) |
---|
| 434 | { |
---|
| 435 | sendPtr32[0] = packetNo + 1; |
---|
| 436 | sendPtr32[1] = ACK; |
---|
| 437 | sendPtr32[2] = command; |
---|
| 438 | |
---|
| 439 | sendPtr32[3] = warplab_mimo_ReadReg_DebugRx1Buffers(WARPLAB_BASEADDR); |
---|
| 440 | |
---|
| 441 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 442 | } |
---|
| 443 | if(1 == ReadWrite) |
---|
| 444 | { |
---|
[1389] | 445 | warplab_mimo_WriteReg_DebugRx1Buffers((unsigned int)receivePtr32[3]); |
---|
[1385] | 446 | sendACK(packetNo, command); |
---|
| 447 | } |
---|
| 448 | break; |
---|
| 449 | #endif |
---|
| 450 | |
---|
| 451 | case RX2BUFFERS_DEBUG: |
---|
| 452 | ReadWrite = (unsigned int)receivePtr32[2]; |
---|
| 453 | if(0 == ReadWrite) |
---|
| 454 | { |
---|
| 455 | sendPtr32[0] = packetNo + 1; |
---|
| 456 | sendPtr32[1] = ACK; |
---|
| 457 | sendPtr32[2] = command; |
---|
| 458 | |
---|
| 459 | sendPtr32[3] = warplab_mimo_ReadReg_DebugRx2Buffers(WARPLAB_BASEADDR); |
---|
| 460 | |
---|
| 461 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 462 | } |
---|
| 463 | if(1 == ReadWrite) |
---|
| 464 | { |
---|
[1389] | 465 | warplab_mimo_WriteReg_DebugRx2Buffers((unsigned int)receivePtr32[3]); |
---|
[1385] | 466 | sendACK(packetNo, command); |
---|
| 467 | } |
---|
| 468 | break; |
---|
| 469 | |
---|
| 470 | case RX3BUFFERS_DEBUG: |
---|
| 471 | ReadWrite = (unsigned int)receivePtr32[2]; |
---|
| 472 | if(0 == ReadWrite) |
---|
| 473 | { |
---|
| 474 | sendPtr32[0] = packetNo + 1; |
---|
| 475 | sendPtr32[1] = ACK; |
---|
| 476 | sendPtr32[2] = command; |
---|
| 477 | |
---|
| 478 | sendPtr32[3] = warplab_mimo_ReadReg_DebugRx3Buffers(WARPLAB_BASEADDR); |
---|
| 479 | |
---|
| 480 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 481 | } |
---|
| 482 | if(1 == ReadWrite) |
---|
| 483 | { |
---|
[1389] | 484 | warplab_mimo_WriteReg_DebugRx3Buffers((unsigned int)receivePtr32[3]); |
---|
[1385] | 485 | sendACK(packetNo, command); |
---|
| 486 | } |
---|
| 487 | break; |
---|
| 488 | |
---|
| 489 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 490 | case RX4BUFFERS_DEBUG: |
---|
| 491 | ReadWrite = (unsigned int)receivePtr32[2]; |
---|
| 492 | if(0 == ReadWrite) |
---|
| 493 | { |
---|
| 494 | sendPtr32[0] = packetNo + 1; |
---|
| 495 | sendPtr32[1] = ACK; |
---|
| 496 | sendPtr32[2] = command; |
---|
| 497 | |
---|
| 498 | sendPtr32[3] = warplab_mimo_ReadReg_DebugRx4Buffers(WARPLAB_BASEADDR); |
---|
| 499 | |
---|
| 500 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 501 | } |
---|
| 502 | if(1 == ReadWrite) |
---|
| 503 | { |
---|
[1389] | 504 | warplab_mimo_WriteReg_DebugRx4Buffers((unsigned int)receivePtr32[3]); |
---|
[1385] | 505 | sendACK(packetNo, command); |
---|
| 506 | } |
---|
| 507 | break; |
---|
| 508 | #endif |
---|
| 509 | |
---|
| 510 | case MGC_AGC_SEL: |
---|
| 511 | //ReadWrite = (unsigned int)receivePtr32[2]; |
---|
| 512 | MGC_AGC_Sel_Variable = (unsigned int)receivePtr32[2]; |
---|
| 513 | //if(0 == ReadWrite) |
---|
| 514 | //{ |
---|
| 515 | // sendPtr32[0] = packetNo + 1; |
---|
| 516 | // sendPtr32[1] = ACK; |
---|
| 517 | // sendPtr32[2] = command; |
---|
| 518 | |
---|
| 519 | // sendPtr32[3] = warplab_mimo_4x4_ReadReg_MGC_AGC_SEL(XPAR_WARPLAB_MIMO_4X4_OPBW_0_BASEADDR); |
---|
| 520 | |
---|
| 521 | // xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 522 | //} |
---|
| 523 | //if(1 == ReadWrite) |
---|
| 524 | //{ |
---|
[1389] | 525 | warplab_mimo_WriteReg_MGC_AGC_SEL(MGC_AGC_Sel_Variable); |
---|
[1385] | 526 | |
---|
| 527 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 528 | { |
---|
[1389] | 529 | warplab_AGC_WriteReg_AGC_EN(0); |
---|
[1385] | 530 | //Set Radios for Manual Gain Control (MGC) |
---|
| 531 | WarpRadio_v1_SoftwareRxGainControl(1, radios); |
---|
| 532 | WarpRadio_v1_RxHpSoftControlEnable(radios); |
---|
| 533 | } |
---|
| 534 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 535 | { |
---|
| 536 | //Set Radios for Automatic Gain Control (AGC) |
---|
| 537 | WarpRadio_v1_SoftwareRxGainControl(0, radios); // RxGains will be controlled by the AGC (AGC Change) |
---|
| 538 | WarpRadio_v1_RxHpSoftControlDisable(radios); // RxHp will be controlled by the AGC (AGC Change) |
---|
| 539 | WarpRadio_v1_RxHighPassCornerFreq(0, radios); // Will set the corner frequency when RxHp is 0? (AGC Change) |
---|
| 540 | //xil_printf("agctargetINIT = %d\r\n",agctarget); |
---|
| 541 | //Set Rx bandwidth; 19MHz |
---|
| 542 | WarpRadio_v1_RxLpfCornFreqCoarseAdj(1, radios); // (AGC Change) |
---|
| 543 | |
---|
| 544 | // Initialize the AGC |
---|
| 545 | warplab_AGC_Initialize(agcnoiseEst); |
---|
| 546 | warplab_AGC_setNoiseEstimate(agcnoiseEst); |
---|
| 547 | // ofdm_AGC_FiltSel(0); No decimation option in WARPLab AGC |
---|
| 548 | warplab_AGC_SetDCO(0); |
---|
| 549 | warplab_AGC_SetTarget(agctarget); |
---|
| 550 | warplab_AGC_Reset(); |
---|
| 551 | } |
---|
| 552 | |
---|
| 553 | sendACK(packetNo, command); |
---|
| 554 | //} |
---|
| 555 | break; |
---|
| 556 | |
---|
| 557 | case CARRIER_CHANNEL: |
---|
| 558 | Radios_WirelessChan = ((unsigned int)receivePtr32[2]); |
---|
| 559 | |
---|
| 560 | //Channels in [1...37] are valid |
---|
| 561 | // Values in [1...14] select 2.4GHz channels [1...14] |
---|
| 562 | // Values in [15...37] select a 5GHz channels [1...23] |
---|
| 563 | if(Radios_WirelessChan <= (14+23)) |
---|
| 564 | { |
---|
| 565 | if(Radios_WirelessChan <= 14) |
---|
| 566 | WarpRadio_v1_SetCenterFreq2GHz(Radios_WirelessChan, radios); |
---|
| 567 | else |
---|
| 568 | WarpRadio_v1_SetCenterFreq5GHz((Radios_WirelessChan-14), radios); |
---|
| 569 | } |
---|
| 570 | |
---|
| 571 | sendACK(packetNo, command); |
---|
| 572 | break; |
---|
| 573 | |
---|
| 574 | case TX_LPF_CORN_FREQ: |
---|
| 575 | Radios_Tx_LPF_Corn_Freq = ((unsigned int)receivePtr32[2]); |
---|
| 576 | //xil_printf("Radios_Tx_LPF_Corn_Freq = %d\r\n",Radios_Tx_LPF_Corn_Freq); |
---|
| 577 | WarpRadio_v1_TxLpfCornFreqCoarseAdj(Radios_Tx_LPF_Corn_Freq, radios); |
---|
| 578 | sendACK(packetNo, command); |
---|
| 579 | break; |
---|
| 580 | |
---|
| 581 | case RX_LPF_CORN_FREQ: |
---|
| 582 | Radios_Rx_LPF_Corn_Freq = ((unsigned int)receivePtr32[2]); |
---|
| 583 | //xil_printf("Radios_Rx_LPF_Corn_Freq = %d\r\n",Radios_Rx_LPF_Corn_Freq); |
---|
| 584 | WarpRadio_v1_RxLpfCornFreqCoarseAdj(Radios_Rx_LPF_Corn_Freq, radios); |
---|
| 585 | sendACK(packetNo, command); |
---|
| 586 | break; |
---|
| 587 | |
---|
| 588 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 589 | case RADIO1_TXGAINS: |
---|
| 590 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 591 | Radio1_TxGain_BB = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 592 | Radio1_TxGain_RF = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 593 | WarpRadio_v1_BaseBandTxGain(Radio1_TxGain_BB, radio1); |
---|
| 594 | WarpRadio_v1_TxVGAGainControl(Radio1_TxGain_RF, radio1); |
---|
| 595 | sendACK(packetNo, command); |
---|
| 596 | break; |
---|
| 597 | |
---|
| 598 | case RADIO1_RXGAINS: |
---|
| 599 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 600 | Radio1_RxGain_RF = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 601 | Radio1_RxGain_BB = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 602 | WarpRadio_v1_RxLNAGainControl(Radio1_RxGain_RF, radio1); |
---|
| 603 | WarpRadio_v1_RxVGAGainControl(Radio1_RxGain_BB, radio1); |
---|
| 604 | sendACK(packetNo, command); |
---|
| 605 | break; |
---|
| 606 | #endif |
---|
| 607 | |
---|
| 608 | case RADIO2_TXGAINS: |
---|
| 609 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 610 | Radio2_TxGain_BB = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 611 | Radio2_TxGain_RF = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 612 | WarpRadio_v1_BaseBandTxGain(Radio2_TxGain_BB, radio2); |
---|
| 613 | WarpRadio_v1_TxVGAGainControl(Radio2_TxGain_RF, radio2); |
---|
| 614 | sendACK(packetNo, command); |
---|
| 615 | break; |
---|
| 616 | |
---|
| 617 | case RADIO2_RXGAINS: |
---|
| 618 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 619 | Radio2_RxGain_RF = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 620 | Radio2_RxGain_BB = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 621 | WarpRadio_v1_RxLNAGainControl(Radio2_RxGain_RF, radio2); |
---|
| 622 | WarpRadio_v1_RxVGAGainControl(Radio2_RxGain_BB, radio2); |
---|
| 623 | sendACK(packetNo, command); |
---|
| 624 | break; |
---|
| 625 | |
---|
| 626 | case RADIO3_TXGAINS: |
---|
| 627 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 628 | Radio3_TxGain_BB = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 629 | Radio3_TxGain_RF = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 630 | WarpRadio_v1_BaseBandTxGain(Radio3_TxGain_BB, radio3); |
---|
| 631 | WarpRadio_v1_TxVGAGainControl(Radio3_TxGain_RF, radio3); |
---|
| 632 | sendACK(packetNo, command); |
---|
| 633 | break; |
---|
| 634 | |
---|
| 635 | case RADIO3_RXGAINS: |
---|
| 636 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 637 | Radio3_RxGain_RF = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 638 | Radio3_RxGain_BB = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 639 | WarpRadio_v1_RxLNAGainControl(Radio3_RxGain_RF, radio3); |
---|
| 640 | WarpRadio_v1_RxVGAGainControl(Radio3_RxGain_BB, radio3); |
---|
| 641 | sendACK(packetNo, command); |
---|
| 642 | break; |
---|
| 643 | |
---|
| 644 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 645 | case RADIO4_TXGAINS: |
---|
| 646 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 647 | Radio4_TxGain_BB = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 648 | Radio4_TxGain_RF = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 649 | WarpRadio_v1_BaseBandTxGain(Radio4_TxGain_BB, radio4); |
---|
| 650 | WarpRadio_v1_TxVGAGainControl(Radio4_TxGain_RF, radio4); |
---|
| 651 | sendACK(packetNo, command); |
---|
| 652 | break; |
---|
| 653 | |
---|
| 654 | case RADIO4_RXGAINS: |
---|
| 655 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 656 | Radio4_RxGain_RF = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 657 | Radio4_RxGain_BB = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 658 | WarpRadio_v1_RxLNAGainControl(Radio4_RxGain_RF, radio4); |
---|
| 659 | WarpRadio_v1_RxVGAGainControl(Radio4_RxGain_BB, radio4); |
---|
| 660 | sendACK(packetNo, command); |
---|
| 661 | break; |
---|
| 662 | #endif |
---|
| 663 | |
---|
| 664 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 665 | case RADIO1_TXEN: |
---|
| 666 | /***************** Setup the radio board ************/ |
---|
| 667 | |
---|
| 668 | WarpRadio_v1_BaseBandTxGain(Radio1_TxGain_BB, radio1); |
---|
| 669 | WarpRadio_v1_TxVGAGainControl(Radio1_TxGain_RF, radio1); |
---|
| 670 | |
---|
| 671 | //Enable the transmitter |
---|
| 672 | WarpRadio_v1_TxEnable(radio1); |
---|
| 673 | /***************** END Setup the radio board ************/ |
---|
| 674 | |
---|
| 675 | if(DEBUG_LVL > 1) xil_printf("Radio 1 Tx Enabled\r\n"); |
---|
| 676 | sendACK(packetNo, command); |
---|
| 677 | break; |
---|
| 678 | #endif |
---|
| 679 | |
---|
| 680 | case RADIO2_TXEN: |
---|
| 681 | /***************** Setup the radio board ************/ |
---|
| 682 | |
---|
| 683 | WarpRadio_v1_BaseBandTxGain(Radio2_TxGain_BB, radio2); |
---|
| 684 | WarpRadio_v1_TxVGAGainControl(Radio2_TxGain_RF, radio2); |
---|
| 685 | |
---|
| 686 | //Enable the transmitter |
---|
| 687 | WarpRadio_v1_TxEnable(radio2); |
---|
| 688 | /***************** END Setup the radio board ************/ |
---|
| 689 | |
---|
| 690 | if(DEBUG_LVL > 1) xil_printf("Radio 2 Tx Enabled\r\n"); |
---|
| 691 | sendACK(packetNo, command); |
---|
| 692 | break; |
---|
| 693 | |
---|
| 694 | case RADIO3_TXEN: |
---|
| 695 | /***************** Setup the radio board ************/ |
---|
| 696 | |
---|
| 697 | WarpRadio_v1_BaseBandTxGain(Radio3_TxGain_BB, radio3); |
---|
| 698 | WarpRadio_v1_TxVGAGainControl(Radio3_TxGain_RF, radio3); |
---|
| 699 | |
---|
| 700 | //Enable the transmitter |
---|
| 701 | WarpRadio_v1_TxEnable(radio3); |
---|
| 702 | /***************** END Setup the radio board ************/ |
---|
| 703 | |
---|
| 704 | if(DEBUG_LVL > 1) xil_printf("Radio 3 Tx Enabled\r\n"); |
---|
| 705 | sendACK(packetNo, command); |
---|
| 706 | break; |
---|
| 707 | |
---|
| 708 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 709 | case RADIO4_TXEN: |
---|
| 710 | /***************** Setup the radio board ************/ |
---|
| 711 | |
---|
| 712 | WarpRadio_v1_BaseBandTxGain(Radio4_TxGain_BB, radio4); |
---|
| 713 | WarpRadio_v1_TxVGAGainControl(Radio4_TxGain_RF, radio4); |
---|
| 714 | |
---|
| 715 | //Enable the transmitter |
---|
| 716 | WarpRadio_v1_TxEnable(radio4); |
---|
| 717 | /***************** END Setup the radio board ************/ |
---|
| 718 | |
---|
| 719 | if(DEBUG_LVL > 1) xil_printf("Radio 4 Tx Enabled\r\n"); |
---|
| 720 | sendACK(packetNo, command); |
---|
| 721 | break; |
---|
| 722 | #endif |
---|
| 723 | |
---|
| 724 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 725 | case RADIO1_TXDIS: |
---|
| 726 | WarpRadio_v1_TxRxDisable(radio1); |
---|
| 727 | //if(DEBUG_LVL > 1) xil_printf("Radio 1 Tx Disabled\r\n"); |
---|
| 728 | if(DEBUG_LVL > 1) xil_printf("Radio 1 Tx Disabled\r\n"); |
---|
| 729 | sendACK(packetNo, command); |
---|
| 730 | break; |
---|
| 731 | #endif |
---|
| 732 | |
---|
| 733 | case RADIO2_TXDIS: |
---|
| 734 | WarpRadio_v1_TxRxDisable(radio2); |
---|
| 735 | //if(DEBUG_LVL > 1) xil_printf("Radio 2 Tx Disabled\r\n"); |
---|
| 736 | if(DEBUG_LVL > 1) xil_printf("Radio 2 Tx Disabled\r\n"); |
---|
| 737 | sendACK(packetNo, command); |
---|
| 738 | break; |
---|
| 739 | |
---|
| 740 | case RADIO3_TXDIS: |
---|
| 741 | WarpRadio_v1_TxRxDisable(radio3); |
---|
| 742 | //if(DEBUG_LVL > 1) xil_printf("Radio 3 Tx Disabled\r\n"); |
---|
| 743 | if(DEBUG_LVL > 1) xil_printf("Radio 3 Tx Disabled\r\n"); |
---|
| 744 | sendACK(packetNo, command); |
---|
| 745 | break; |
---|
| 746 | |
---|
| 747 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 748 | case RADIO4_TXDIS: |
---|
| 749 | WarpRadio_v1_TxRxDisable(radio4); |
---|
| 750 | //if(DEBUG_LVL > 1) xil_printf("Radio 4 Tx Disabled\r\n"); |
---|
| 751 | if(DEBUG_LVL > 1) xil_printf("Radio 4 Tx Disabled\r\n"); |
---|
| 752 | sendACK(packetNo, command); |
---|
| 753 | break; |
---|
| 754 | #endif |
---|
| 755 | |
---|
| 756 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 757 | case RADIO1_RXEN: |
---|
| 758 | /***************** Setup the radio board ************/ |
---|
| 759 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 760 | { |
---|
| 761 | // Disable the Rx HP filter |
---|
| 762 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 763 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 764 | // is controlled by the AGC core |
---|
| 765 | WarpRadio_v1_RxHpDisable(radio1); |
---|
| 766 | } |
---|
| 767 | |
---|
| 768 | usleep(10); |
---|
| 769 | |
---|
| 770 | //Enable the receiver |
---|
| 771 | WarpRadio_v1_RxEnable(radio1); |
---|
| 772 | |
---|
| 773 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 774 | { |
---|
| 775 | //Enable this radio's AGC if user has set AGC Mode |
---|
[1389] | 776 | warplab_AGC_WriteReg_RADIO1_AGC_EN(1); |
---|
[1385] | 777 | } |
---|
| 778 | |
---|
| 779 | /***************** END Setup the radio board ************/ |
---|
| 780 | |
---|
| 781 | //if(DEBUG_LVL > 1) xil_printf("Radio 1 Rx Enabled\r\n"); |
---|
| 782 | if(DEBUG_LVL > 1) xil_printf("Radio 1 Rx Enabled\r\n"); |
---|
| 783 | sendACK(packetNo, command); |
---|
| 784 | break; |
---|
| 785 | #endif |
---|
| 786 | |
---|
| 787 | case RADIO2_RXEN: |
---|
| 788 | |
---|
| 789 | /***************** Setup the radio board ************/ |
---|
| 790 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 791 | { |
---|
| 792 | // Disable the Rx HP filter |
---|
| 793 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 794 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 795 | // is controlled by the AGC core |
---|
| 796 | WarpRadio_v1_RxHpDisable(radio2); |
---|
| 797 | } |
---|
| 798 | |
---|
| 799 | usleep(10); |
---|
| 800 | |
---|
| 801 | //Enable the receiver |
---|
| 802 | WarpRadio_v1_RxEnable(radio2); |
---|
| 803 | |
---|
| 804 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 805 | { |
---|
| 806 | //Enable this radio's AGC if user has set AGC Mode |
---|
[1389] | 807 | warplab_AGC_WriteReg_RADIO2_AGC_EN(1); |
---|
[1385] | 808 | } |
---|
| 809 | |
---|
| 810 | /***************** END Setup the radio board ************/ |
---|
| 811 | |
---|
| 812 | //if(DEBUG_LVL > 1) xil_printf("Radio 2 Rx Enabled\r\n"); |
---|
| 813 | if(DEBUG_LVL > 1) xil_printf("Radio 2 Rx Enabled\r\n"); |
---|
| 814 | sendACK(packetNo, command); |
---|
| 815 | break; |
---|
| 816 | |
---|
| 817 | case RADIO3_RXEN: |
---|
| 818 | |
---|
| 819 | /***************** Setup the radio board ************/ |
---|
| 820 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 821 | { |
---|
| 822 | // Disable the Rx HP filter |
---|
| 823 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 824 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 825 | // is controlled by the AGC core |
---|
| 826 | WarpRadio_v1_RxHpDisable(radio3); |
---|
| 827 | } |
---|
| 828 | |
---|
| 829 | usleep(10); |
---|
| 830 | |
---|
| 831 | //Enable the receiver |
---|
| 832 | WarpRadio_v1_RxEnable(radio3); |
---|
| 833 | |
---|
| 834 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 835 | { |
---|
| 836 | //Enable this radio's AGC if user has set AGC Mode |
---|
[1389] | 837 | warplab_AGC_WriteReg_RADIO3_AGC_EN(1); |
---|
[1385] | 838 | } |
---|
| 839 | |
---|
| 840 | /***************** END Setup the radio board ************/ |
---|
| 841 | |
---|
| 842 | //if(DEBUG_LVL > 1) xil_printf("Radio 3 Rx Enabled\r\n"); |
---|
| 843 | if(DEBUG_LVL > 1) xil_printf("Radio 3 Rx Enabled\r\n"); |
---|
| 844 | sendACK(packetNo, command); |
---|
| 845 | break; |
---|
| 846 | |
---|
| 847 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 848 | case RADIO4_RXEN: |
---|
| 849 | /***************** Setup the radio board ************/ |
---|
| 850 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 851 | { |
---|
| 852 | // Disable the Rx HP filter |
---|
| 853 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 854 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 855 | // is controlled by the AGC core |
---|
| 856 | WarpRadio_v1_RxHpDisable(radio4); |
---|
| 857 | } |
---|
| 858 | |
---|
| 859 | usleep(10); |
---|
| 860 | |
---|
| 861 | //Enable the receiver |
---|
| 862 | WarpRadio_v1_RxEnable(radio4); |
---|
| 863 | |
---|
| 864 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 865 | { |
---|
| 866 | //Enable this radio's AGC if user has set AGC Mode |
---|
[1389] | 867 | warplab_AGC_WriteReg_RADIO4_AGC_EN(1); |
---|
[1385] | 868 | } |
---|
| 869 | |
---|
| 870 | /***************** END Setup the radio board ************/ |
---|
| 871 | |
---|
| 872 | //if(DEBUG_LVL > 1) xil_printf("Radio 4 Rx Enabled\r\n"); |
---|
| 873 | if(DEBUG_LVL > 1) xil_printf("Radio 4 Rx Enabled\r\n"); |
---|
| 874 | sendACK(packetNo, command); |
---|
| 875 | break; |
---|
| 876 | #endif |
---|
| 877 | |
---|
| 878 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 879 | case RADIO1_RXDIS: |
---|
| 880 | WarpRadio_v1_TxRxDisable(radio1); |
---|
| 881 | |
---|
| 882 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 883 | { |
---|
| 884 | //Enable the Rx HP filter |
---|
| 885 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 886 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 887 | // is controlled by the AGC core |
---|
| 888 | WarpRadio_v1_RxHpEnable(radio1); |
---|
| 889 | } |
---|
| 890 | |
---|
| 891 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 892 | { |
---|
| 893 | //Disable this radio's AGC if user has set AGC Mode |
---|
[1389] | 894 | warplab_AGC_WriteReg_RADIO1_AGC_EN(0); |
---|
[1385] | 895 | } |
---|
| 896 | |
---|
| 897 | //if(DEBUG_LVL > 1) xil_printf("Radio 1 Rx Disabled\r\n"); |
---|
| 898 | if(DEBUG_LVL > 1) xil_printf("Radio 1 Rx Disabled\r\n"); |
---|
| 899 | sendACK(packetNo, command); |
---|
| 900 | break; |
---|
| 901 | #endif |
---|
| 902 | |
---|
| 903 | case RADIO2_RXDIS: |
---|
| 904 | WarpRadio_v1_TxRxDisable(radio2); |
---|
| 905 | |
---|
| 906 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 907 | { |
---|
| 908 | //Enable the Rx HP filter |
---|
| 909 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 910 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 911 | // is controlled by the AGC core |
---|
| 912 | WarpRadio_v1_RxHpEnable(radio2); |
---|
| 913 | } |
---|
| 914 | |
---|
| 915 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 916 | { |
---|
| 917 | //Disable this radio's AGC if user has set AGC Mode |
---|
[1389] | 918 | warplab_AGC_WriteReg_RADIO2_AGC_EN(0); |
---|
[1385] | 919 | } |
---|
| 920 | |
---|
| 921 | //if(DEBUG_LVL > 1) xil_printf("Radio 2 Rx Disabled\r\n"); |
---|
| 922 | if(DEBUG_LVL > 1) xil_printf("Radio 2 Rx Disabled\r\n"); |
---|
| 923 | sendACK(packetNo, command); |
---|
| 924 | break; |
---|
| 925 | |
---|
| 926 | case RADIO3_RXDIS: |
---|
| 927 | WarpRadio_v1_TxRxDisable(radio3); |
---|
| 928 | |
---|
| 929 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 930 | { |
---|
| 931 | //Enable the Rx HP filter |
---|
| 932 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 933 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 934 | // is controlled by the AGC core |
---|
| 935 | WarpRadio_v1_RxHpEnable(radio3); |
---|
| 936 | } |
---|
| 937 | |
---|
| 938 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 939 | { |
---|
| 940 | //Disable this radio's AGC if user has set AGC Mode |
---|
[1389] | 941 | warplab_AGC_WriteReg_RADIO3_AGC_EN(0); |
---|
[1385] | 942 | } |
---|
| 943 | |
---|
| 944 | //if(DEBUG_LVL > 1) xil_printf("Radio 3 Rx Disabled\r\n"); |
---|
| 945 | if(DEBUG_LVL > 1) xil_printf("Radio 3 Rx Disabled\r\n"); |
---|
| 946 | sendACK(packetNo, command); |
---|
| 947 | break; |
---|
| 948 | |
---|
| 949 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 950 | case RADIO4_RXDIS: |
---|
| 951 | WarpRadio_v1_TxRxDisable(radio4); |
---|
| 952 | |
---|
| 953 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 954 | { |
---|
| 955 | //Enable the Rx HP filter |
---|
| 956 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 957 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 958 | // is controlled by the AGC core |
---|
| 959 | WarpRadio_v1_RxHpEnable(radio4); |
---|
| 960 | } |
---|
| 961 | |
---|
| 962 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 963 | { |
---|
| 964 | //Disable this radio's AGC if user has set AGC Mode |
---|
[1389] | 965 | warplab_AGC_WriteReg_RADIO4_AGC_EN(0); |
---|
[1385] | 966 | } |
---|
| 967 | |
---|
| 968 | //if(DEBUG_LVL > 1) xil_printf("Radio 4 Rx Disabled\r\n"); |
---|
| 969 | if(DEBUG_LVL > 1) xil_printf("Radio 4 Rx Disabled\r\n"); |
---|
| 970 | sendACK(packetNo, command); |
---|
| 971 | break; |
---|
| 972 | #endif |
---|
| 973 | |
---|
[1386] | 974 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 975 | case RADIO1_TXDATA: |
---|
| 976 | memcpy |
---|
| 977 | ( |
---|
| 978 | (unsigned int *)(WARPLAB_TXBUFF_RADIO1 + 4*rxArg0),\ |
---|
| 979 | (unsigned int *)(receivePtr32 + 3),\ |
---|
| 980 | (bytesReceived-12) |
---|
| 981 | ); |
---|
| 982 | sendACK(packetNo, command); |
---|
| 983 | break; |
---|
| 984 | #endif |
---|
| 985 | |
---|
[1385] | 986 | case RADIO2_TXDATA: |
---|
| 987 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 2 Tx (offset: %x)\r\n",rxArg0); |
---|
| 988 | //if(DEBUG_LVL > 1) xil_printf("Sample bytes: %x %x %x %x\r\n", *(unsigned int *)(receivePtr32 + 3), *(unsigned int *)(receivePtr32 + 4), *(unsigned int *)(receivePtr32 + 5), *(unsigned int *)(receivePtr32 + 6)); |
---|
| 989 | |
---|
| 990 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 2 Tx (offset: %x)\r\n",rxArg0); |
---|
| 991 | |
---|
| 992 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 2 Tx (offset: %x)\r\n",rxArg0); |
---|
[1418] | 993 | |
---|
[1385] | 994 | memcpy |
---|
| 995 | ( |
---|
[1386] | 996 | (unsigned int *)(WARPLAB_TXBUFF_RADIO2 + 4*rxArg0),\ |
---|
[1385] | 997 | (unsigned int *)(receivePtr32 + 3),\ |
---|
| 998 | (bytesReceived-12) |
---|
| 999 | ); |
---|
[1418] | 1000 | |
---|
[1385] | 1001 | sendACK(packetNo, command); |
---|
| 1002 | break; |
---|
| 1003 | |
---|
| 1004 | case RADIO3_TXDATA: |
---|
| 1005 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 3 Tx (offset: %x)\r\n",rxArg0); |
---|
| 1006 | //if(DEBUG_LVL > 1) xil_printf("Sample bytes: %x %x %x %x\r\n", *(unsigned int *)(receivePtr32 + 3), *(unsigned int *)(receivePtr32 + 4), *(unsigned int *)(receivePtr32 + 5), *(unsigned int *)(receivePtr32 + 6)); |
---|
| 1007 | |
---|
| 1008 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 3 Tx (offset: %x)\r\n",rxArg0); |
---|
| 1009 | |
---|
| 1010 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 3 Tx (offset: %x)\r\n",rxArg0); |
---|
| 1011 | /* |
---|
| 1012 | memcpy |
---|
| 1013 | ( |
---|
| 1014 | (unsigned int *)(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR + warplab_mimo_2x2_SMWO_TxBuff_Radio3_OFFSET + 4*rxArg0),\ |
---|
| 1015 | (unsigned int *)(receivePtr32 + 3),\ |
---|
| 1016 | (bytesReceived-12) |
---|
| 1017 | ); |
---|
| 1018 | */ |
---|
| 1019 | memcpy |
---|
| 1020 | ( |
---|
[1386] | 1021 | (unsigned int *)(WARPLAB_TXBUFF_RADIO3 + 4*rxArg0),\ |
---|
[1385] | 1022 | (unsigned int *)(receivePtr32 + 3),\ |
---|
| 1023 | (bytesReceived-12) |
---|
| 1024 | ); |
---|
| 1025 | sendACK(packetNo, command); |
---|
| 1026 | break; |
---|
| 1027 | |
---|
[1386] | 1028 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1029 | case RADIO4_TXDATA: |
---|
| 1030 | memcpy |
---|
| 1031 | ( |
---|
| 1032 | (unsigned int *)(WARPLAB_TXBUFF_RADIO4 + 4*rxArg0),\ |
---|
| 1033 | (unsigned int *)(receivePtr32 + 3),\ |
---|
| 1034 | (bytesReceived-12) |
---|
| 1035 | ); |
---|
| 1036 | sendACK(packetNo, command); |
---|
| 1037 | break; |
---|
| 1038 | #endif |
---|
| 1039 | |
---|
| 1040 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1041 | case RADIO1_RXDATA: |
---|
| 1042 | memcpy |
---|
| 1043 | ( |
---|
| 1044 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1045 | (unsigned int *)(WARPLAB_RXBUFF_RADIO1 + 4*rxArg0),\ |
---|
| 1046 | 1024 |
---|
| 1047 | ); |
---|
| 1048 | |
---|
| 1049 | sendPtr32[0] = packetNo + 1; |
---|
| 1050 | sendPtr32[1] = ACK; |
---|
| 1051 | sendPtr32[2] = command; |
---|
| 1052 | sendPtr32[3] = rxArg0; |
---|
| 1053 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1054 | break; |
---|
| 1055 | #endif |
---|
| 1056 | |
---|
[1385] | 1057 | case RADIO2_RXDATA: |
---|
| 1058 | //while(warplab_mimo_2x2_ReadReg_CaptureDone(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR) == 0) {} |
---|
| 1059 | |
---|
| 1060 | /* |
---|
| 1061 | memcpy |
---|
| 1062 | ( |
---|
| 1063 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1064 | (unsigned int *)(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR + warplab_mimo_2x2_SMRO_RxBuff_Radio2_OFFSET + 4*rxArg0),\ |
---|
| 1065 | 1024 |
---|
| 1066 | ); |
---|
| 1067 | */ |
---|
| 1068 | memcpy |
---|
| 1069 | ( |
---|
| 1070 | (unsigned int *)(sendPtr32 + 4), \ |
---|
[1386] | 1071 | (unsigned int *)(WARPLAB_RXBUFF_RADIO2 + 4*rxArg0),\ |
---|
[1385] | 1072 | 1024 |
---|
| 1073 | ); |
---|
| 1074 | |
---|
| 1075 | //if(DEBUG_LVL > 1) xil_printf("Read Rx data (offset: %x)\r\n",rxArg0); |
---|
| 1076 | //if(DEBUG_LVL > 1) xil_printf("Copied 1024 bytes from %x\r\n",(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR + warplab_mimo_2x2_SMRO_RxBuff_Radio2_OFFSET + rxArg0)); |
---|
| 1077 | |
---|
| 1078 | sendPtr32[0] = packetNo + 1; |
---|
| 1079 | sendPtr32[1] = ACK; |
---|
| 1080 | sendPtr32[2] = command; |
---|
| 1081 | sendPtr32[3] = rxArg0; |
---|
| 1082 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1083 | break; |
---|
| 1084 | |
---|
| 1085 | case RADIO3_RXDATA: |
---|
| 1086 | //while(warplab_mimo_2x2_ReadReg_CaptureDone(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR) == 0) {} |
---|
| 1087 | |
---|
| 1088 | /* |
---|
| 1089 | memcpy |
---|
| 1090 | ( |
---|
| 1091 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1092 | (unsigned int *)(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR + warplab_mimo_2x2_SMRO_RxBuff_Radio3_OFFSET + 4*rxArg0),\ |
---|
| 1093 | 1024 |
---|
| 1094 | ); |
---|
| 1095 | */ |
---|
| 1096 | memcpy |
---|
| 1097 | ( |
---|
| 1098 | (unsigned int *)(sendPtr32 + 4), \ |
---|
[1386] | 1099 | (unsigned int *)(WARPLAB_RXBUFF_RADIO3 + 4*rxArg0),\ |
---|
[1385] | 1100 | 1024 |
---|
| 1101 | ); |
---|
| 1102 | |
---|
| 1103 | |
---|
| 1104 | //if(DEBUG_LVL > 1) xil_printf("Read Rx data (offset: %x)\r\n",rxArg0); |
---|
| 1105 | //if(DEBUG_LVL > 1) xil_printf("Copied 1024 bytes from %x\r\n",(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR + warplab_mimo_2x2_SMRO_RxBuff_Radio3_OFFSET + rxArg0)); |
---|
| 1106 | |
---|
| 1107 | sendPtr32[0] = packetNo + 1; |
---|
| 1108 | sendPtr32[1] = ACK; |
---|
| 1109 | sendPtr32[2] = command; |
---|
| 1110 | sendPtr32[3] = rxArg0; |
---|
| 1111 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1112 | break; |
---|
| 1113 | |
---|
[1386] | 1114 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1115 | case RADIO4_RXDATA: |
---|
| 1116 | memcpy |
---|
| 1117 | ( |
---|
| 1118 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1119 | (unsigned int *)(WARPLAB_RXBUFF_RADIO4 + 4*rxArg0),\ |
---|
| 1120 | 1024 |
---|
| 1121 | ); |
---|
| 1122 | |
---|
| 1123 | sendPtr32[0] = packetNo + 1; |
---|
| 1124 | sendPtr32[1] = ACK; |
---|
| 1125 | sendPtr32[2] = command; |
---|
| 1126 | sendPtr32[3] = rxArg0; |
---|
| 1127 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1128 | break; |
---|
| 1129 | #endif |
---|
| 1130 | |
---|
[1418] | 1131 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1132 | case RADIO1_RSSIDATA: |
---|
| 1133 | memcpy |
---|
| 1134 | ( |
---|
| 1135 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1136 | (unsigned int *)(WARPLAB_RSSIBUFF_RADIO1 + 4*rxArg0),\ |
---|
| 1137 | 1024 |
---|
| 1138 | ); |
---|
| 1139 | sendPtr32[0] = packetNo + 1; |
---|
| 1140 | sendPtr32[1] = ACK; |
---|
| 1141 | sendPtr32[2] = command; |
---|
| 1142 | sendPtr32[3] = rxArg0; |
---|
| 1143 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1144 | break; |
---|
| 1145 | #endif |
---|
| 1146 | |
---|
[1385] | 1147 | case RADIO2_RSSIDATA: |
---|
| 1148 | //while(warplab_mimo_2x2_ReadReg_CaptureDone(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR) == 0) {} |
---|
| 1149 | |
---|
| 1150 | /* |
---|
| 1151 | memcpy |
---|
| 1152 | ( |
---|
| 1153 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1154 | (unsigned int *)(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR + warplab_mimo_2x2_SMRO_RSSIBuff_Radio2_OFFSET + 4*rxArg0),\ |
---|
| 1155 | 1024 |
---|
| 1156 | ); |
---|
| 1157 | */ |
---|
| 1158 | memcpy |
---|
| 1159 | ( |
---|
| 1160 | (unsigned int *)(sendPtr32 + 4), \ |
---|
[1418] | 1161 | (unsigned int *)(WARPLAB_RSSIBUFF_RADIO2 + 4*rxArg0),\ |
---|
[1385] | 1162 | 1024 |
---|
| 1163 | ); |
---|
| 1164 | |
---|
| 1165 | |
---|
| 1166 | //if(DEBUG_LVL > 1) xil_printf("Read RSSI data (offset: %x)\r\n",rxArg0); |
---|
| 1167 | //if(DEBUG_LVL > 1) xil_printf("Copied 1024 bytes from %x\r\n",(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR + warplab_mimo_2x2_SMRO_RSSIBuff_Radio2_OFFSET + 4*rxArg0)); |
---|
| 1168 | |
---|
| 1169 | sendPtr32[0] = packetNo + 1; |
---|
| 1170 | sendPtr32[1] = ACK; |
---|
| 1171 | sendPtr32[2] = command; |
---|
| 1172 | sendPtr32[3] = rxArg0; |
---|
| 1173 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1174 | break; |
---|
| 1175 | |
---|
| 1176 | case RADIO3_RSSIDATA: |
---|
| 1177 | //while(warplab_mimo_2x2_ReadReg_CaptureDone(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR) == 0) {} |
---|
| 1178 | |
---|
| 1179 | /* |
---|
| 1180 | memcpy |
---|
| 1181 | ( |
---|
| 1182 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1183 | (unsigned int *)(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR + warplab_mimo_2x2_SMRO_RSSIBuff_Radio3_OFFSET + 4*rxArg0),\ |
---|
| 1184 | 1024 |
---|
| 1185 | ); |
---|
| 1186 | */ |
---|
| 1187 | memcpy |
---|
| 1188 | ( |
---|
| 1189 | (unsigned int *)(sendPtr32 + 4), \ |
---|
[1418] | 1190 | (unsigned int *)(WARPLAB_RSSIBUFF_RADIO3 + 4*rxArg0),\ |
---|
[1385] | 1191 | 1024 |
---|
| 1192 | ); |
---|
| 1193 | |
---|
| 1194 | |
---|
| 1195 | //if(DEBUG_LVL > 1) xil_printf("Read RSSI data (offset: %x)\r\n",rxArg0); |
---|
| 1196 | //if(DEBUG_LVL > 1) xil_printf("Copied 1024 bytes from %x\r\n",(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR + warplab_mimo_2x2_SMRO_RSSIBuff_Radio3_OFFSET + 4*rxArg0)); |
---|
| 1197 | |
---|
| 1198 | sendPtr32[0] = packetNo + 1; |
---|
| 1199 | sendPtr32[1] = ACK; |
---|
| 1200 | sendPtr32[2] = command; |
---|
| 1201 | sendPtr32[3] = rxArg0; |
---|
| 1202 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1203 | break; |
---|
[1418] | 1204 | |
---|
| 1205 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1206 | case RADIO4_RSSIDATA: |
---|
| 1207 | memcpy |
---|
| 1208 | ( |
---|
| 1209 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1210 | (unsigned int *)(WARPLAB_RSSIBUFF_RADIO4 + 4*rxArg0),\ |
---|
| 1211 | 1024 |
---|
| 1212 | ); |
---|
| 1213 | sendPtr32[0] = packetNo + 1; |
---|
| 1214 | sendPtr32[1] = ACK; |
---|
| 1215 | sendPtr32[2] = command; |
---|
| 1216 | sendPtr32[3] = rxArg0; |
---|
| 1217 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1218 | break; |
---|
[1386] | 1219 | #endif |
---|
[1385] | 1220 | |
---|
[1386] | 1221 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1222 | case RADIO1TXBUFF_TXEN: |
---|
[1389] | 1223 | warplab_mimo_WriteReg_RADIO1TXBUFF_TXEN(1); |
---|
[1386] | 1224 | |
---|
| 1225 | sendACK(packetNo, command); |
---|
| 1226 | break; |
---|
| 1227 | #endif |
---|
| 1228 | |
---|
[1385] | 1229 | case RADIO2TXBUFF_TXEN: |
---|
[1389] | 1230 | warplab_mimo_WriteReg_RADIO2TXBUFF_TXEN(1); |
---|
[1385] | 1231 | |
---|
| 1232 | sendACK(packetNo, command); |
---|
| 1233 | break; |
---|
| 1234 | |
---|
| 1235 | case RADIO3TXBUFF_TXEN: |
---|
[1389] | 1236 | warplab_mimo_WriteReg_RADIO3TXBUFF_TXEN(1); |
---|
[1385] | 1237 | |
---|
| 1238 | sendACK(packetNo, command); |
---|
| 1239 | break; |
---|
| 1240 | |
---|
[1386] | 1241 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1242 | case RADIO4TXBUFF_TXEN: |
---|
[1389] | 1243 | warplab_mimo_WriteReg_RADIO4TXBUFF_TXEN(1); |
---|
[1386] | 1244 | |
---|
| 1245 | sendACK(packetNo, command); |
---|
| 1246 | break; |
---|
| 1247 | #endif |
---|
| 1248 | |
---|
| 1249 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1250 | case RADIO1TXBUFF_TXDIS: |
---|
[1389] | 1251 | warplab_mimo_WriteReg_RADIO1TXBUFF_TXEN(0); |
---|
[1386] | 1252 | |
---|
| 1253 | sendACK(packetNo, command); |
---|
| 1254 | break; |
---|
| 1255 | #endif |
---|
| 1256 | |
---|
[1385] | 1257 | case RADIO2TXBUFF_TXDIS: |
---|
[1389] | 1258 | warplab_mimo_WriteReg_RADIO2TXBUFF_TXEN(0); |
---|
[1385] | 1259 | |
---|
| 1260 | sendACK(packetNo, command); |
---|
| 1261 | break; |
---|
| 1262 | |
---|
| 1263 | case RADIO3TXBUFF_TXDIS: |
---|
[1389] | 1264 | warplab_mimo_WriteReg_RADIO3TXBUFF_TXEN(0); |
---|
[1385] | 1265 | |
---|
| 1266 | sendACK(packetNo, command); |
---|
| 1267 | break; |
---|
| 1268 | |
---|
[1386] | 1269 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1270 | case RADIO4TXBUFF_TXDIS: |
---|
[1389] | 1271 | warplab_mimo_WriteReg_RADIO4TXBUFF_TXEN(0); |
---|
[1386] | 1272 | |
---|
| 1273 | sendACK(packetNo, command); |
---|
| 1274 | break; |
---|
| 1275 | #endif |
---|
| 1276 | |
---|
| 1277 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1278 | case RADIO1RXBUFF_RXEN: |
---|
[1389] | 1279 | warplab_mimo_WriteReg_RADIO1RXBUFF_RXEN(1); |
---|
[1386] | 1280 | |
---|
| 1281 | sendACK(packetNo, command); |
---|
| 1282 | break; |
---|
| 1283 | #endif |
---|
| 1284 | |
---|
[1385] | 1285 | case RADIO2RXBUFF_RXEN: |
---|
[1389] | 1286 | warplab_mimo_WriteReg_RADIO2RXBUFF_RXEN(1); |
---|
[1385] | 1287 | |
---|
| 1288 | sendACK(packetNo, command); |
---|
| 1289 | break; |
---|
| 1290 | |
---|
| 1291 | case RADIO3RXBUFF_RXEN: |
---|
[1389] | 1292 | warplab_mimo_WriteReg_RADIO3RXBUFF_RXEN(1); |
---|
[1385] | 1293 | |
---|
| 1294 | sendACK(packetNo, command); |
---|
| 1295 | break; |
---|
| 1296 | |
---|
[1386] | 1297 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1298 | case RADIO4RXBUFF_RXEN: |
---|
[1389] | 1299 | warplab_mimo_WriteReg_RADIO4RXBUFF_RXEN(1); |
---|
[1386] | 1300 | |
---|
| 1301 | sendACK(packetNo, command); |
---|
| 1302 | break; |
---|
| 1303 | #endif |
---|
| 1304 | |
---|
| 1305 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1306 | case RADIO1RXBUFF_RXDIS: |
---|
[1389] | 1307 | warplab_mimo_WriteReg_RADIO1RXBUFF_RXEN(0); |
---|
[1386] | 1308 | |
---|
| 1309 | sendACK(packetNo, command); |
---|
| 1310 | break; |
---|
| 1311 | #endif |
---|
| 1312 | |
---|
[1385] | 1313 | case RADIO2RXBUFF_RXDIS: |
---|
[1389] | 1314 | warplab_mimo_WriteReg_RADIO2RXBUFF_RXEN(0); |
---|
[1385] | 1315 | |
---|
| 1316 | sendACK(packetNo, command); |
---|
| 1317 | break; |
---|
| 1318 | |
---|
| 1319 | case RADIO3RXBUFF_RXDIS: |
---|
[1389] | 1320 | warplab_mimo_WriteReg_RADIO3RXBUFF_RXEN(0); |
---|
[1385] | 1321 | |
---|
| 1322 | sendACK(packetNo, command); |
---|
| 1323 | break; |
---|
| 1324 | |
---|
[1386] | 1325 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1326 | case RADIO4RXBUFF_RXDIS: |
---|
[1389] | 1327 | warplab_mimo_WriteReg_RADIO4RXBUFF_RXEN(0); |
---|
[1386] | 1328 | |
---|
| 1329 | sendACK(packetNo, command); |
---|
| 1330 | break; |
---|
| 1331 | #endif |
---|
| 1332 | |
---|
[1385] | 1333 | case RX_DONECHECK: |
---|
| 1334 | |
---|
| 1335 | sendPtr32[0] = packetNo + 1; |
---|
| 1336 | sendPtr32[1] = ACK; |
---|
| 1337 | sendPtr32[2] = command; |
---|
| 1338 | |
---|
[1386] | 1339 | if(warplab_mimo_ReadReg_CaptureDone(WARPLAB_BASEADDR) == 0) |
---|
[1385] | 1340 | sendPtr32[3] = 0; |
---|
| 1341 | else |
---|
| 1342 | sendPtr32[3] = 1; |
---|
| 1343 | |
---|
| 1344 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1345 | break; |
---|
| 1346 | |
---|
| 1347 | case RX_DONEREADING: |
---|
| 1348 | //warplab_mimo_2x2_WriteReg_DoneReading(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR, 1); |
---|
| 1349 | //warplab_mimo_2x2_WriteReg_DoneReading(XPAR_WARPLAB_MIMO_2X2_OPBW_0_BASEADDR, 0); |
---|
| 1350 | |
---|
| 1351 | sendACK(packetNo, command); |
---|
| 1352 | break; |
---|
| 1353 | |
---|
| 1354 | case RX_START: |
---|
| 1355 | //if(DEBUG_LVL > 1) xil_printf("Starting Rx\r\n"); |
---|
| 1356 | //if(DEBUG_LVL > 1) xil_printf("Starting Rx\r\n"); |
---|
| 1357 | sendACK(packetNo, command); |
---|
| 1358 | |
---|
| 1359 | if(waitForSync() == 0) |
---|
| 1360 | { |
---|
[1389] | 1361 | warplab_mimo_WriteReg_StartCapture(1); |
---|
[1386] | 1362 | warplab_AGC_Start(); |
---|
[1389] | 1363 | warplab_mimo_WriteReg_StartCapture(0); |
---|
[1385] | 1364 | |
---|
| 1365 | //if(DEBUG_LVL > 1) xil_printf("Capture started\r\n"); |
---|
| 1366 | } |
---|
| 1367 | else |
---|
| 1368 | if(DEBUG_LVL > 1) xil_printf("No MAGIC_SYNC received; canceling Rx Capture\r\n"); |
---|
| 1369 | break; |
---|
| 1370 | |
---|
| 1371 | case TX_START: |
---|
| 1372 | //if(DEBUG_LVL > 1) xil_printf("Starting Tx\r\n"); |
---|
| 1373 | if(DEBUG_LVL > 1) xil_printf("Starting Tx\r\n"); |
---|
| 1374 | sendACK(packetNo, command); |
---|
| 1375 | |
---|
| 1376 | if(waitForSync() == 0) |
---|
| 1377 | { |
---|
[1389] | 1378 | warplab_mimo_WriteReg_StartTx(1); |
---|
| 1379 | warplab_mimo_WriteReg_StartTx(0); |
---|
[1385] | 1380 | //if(DEBUG_LVL > 1) xil_printf("Transmit started\r\n"); |
---|
| 1381 | } |
---|
| 1382 | else |
---|
| 1383 | if(DEBUG_LVL > 1) xil_printf("No MAGIC_SYNC received; canceling Tx\r\n"); |
---|
| 1384 | break; |
---|
| 1385 | |
---|
| 1386 | case TX_STOP: |
---|
| 1387 | sendACK(packetNo, command); |
---|
| 1388 | |
---|
[1389] | 1389 | warplab_mimo_WriteReg_StopTx(1); |
---|
| 1390 | warplab_mimo_WriteReg_StopTx(0); |
---|
[1385] | 1391 | |
---|
| 1392 | break; |
---|
| 1393 | |
---|
| 1394 | case TXRX_START: |
---|
| 1395 | if(DEBUG_LVL > 1) xil_printf("Starting TxRX\r\n"); |
---|
| 1396 | sendACK(packetNo, command); |
---|
| 1397 | |
---|
| 1398 | if(waitForSync() == 0) |
---|
| 1399 | { |
---|
[1389] | 1400 | warplab_mimo_WriteReg_StartTxRx(1); |
---|
| 1401 | warplab_mimo_WriteReg_StartTxRx(0); |
---|
[1385] | 1402 | } |
---|
| 1403 | else |
---|
| 1404 | if(DEBUG_LVL > 1) xil_printf("No MAGIC_SYNC received; canceling TxRx\r\n"); |
---|
| 1405 | break; |
---|
| 1406 | |
---|
| 1407 | case READ_AGC_DONE_ADDR: |
---|
| 1408 | sendPtr32[0] = packetNo + 1; |
---|
| 1409 | sendPtr32[1] = ACK; |
---|
| 1410 | sendPtr32[2] = command; |
---|
| 1411 | |
---|
[1386] | 1412 | sendPtr32[3] = warplab_mimo_ReadReg_AGCDoneAddr(WARPLAB_BASEADDR); |
---|
[1385] | 1413 | |
---|
| 1414 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1415 | break; |
---|
| 1416 | |
---|
[1386] | 1417 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1418 | case READ_RADIO1AGCDONERSSI: |
---|
| 1419 | sendPtr32[0] = packetNo + 1; |
---|
| 1420 | sendPtr32[1] = ACK; |
---|
| 1421 | sendPtr32[2] = command; |
---|
| 1422 | |
---|
| 1423 | sendPtr32[3] = warplab_mimo_ReadReg_Radio1AGCDoneRSSI(WARPLAB_BASEADDR); |
---|
| 1424 | |
---|
| 1425 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1426 | break; |
---|
| 1427 | #endif |
---|
| 1428 | |
---|
[1385] | 1429 | case READ_RADIO2AGCDONERSSI: |
---|
| 1430 | sendPtr32[0] = packetNo + 1; |
---|
| 1431 | sendPtr32[1] = ACK; |
---|
| 1432 | sendPtr32[2] = command; |
---|
| 1433 | |
---|
[1386] | 1434 | sendPtr32[3] = warplab_mimo_ReadReg_Radio2AGCDoneRSSI(WARPLAB_BASEADDR); |
---|
[1385] | 1435 | |
---|
| 1436 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1437 | break; |
---|
| 1438 | |
---|
| 1439 | case READ_RADIO3AGCDONERSSI: |
---|
| 1440 | sendPtr32[0] = packetNo + 1; |
---|
| 1441 | sendPtr32[1] = ACK; |
---|
| 1442 | sendPtr32[2] = command; |
---|
| 1443 | |
---|
[1386] | 1444 | sendPtr32[3] = warplab_mimo_ReadReg_Radio3AGCDoneRSSI(WARPLAB_BASEADDR); |
---|
[1385] | 1445 | |
---|
| 1446 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1447 | break; |
---|
| 1448 | |
---|
[1386] | 1449 | #ifdef WARPLAB_CONFIG_4x4 |
---|
| 1450 | case READ_RADIO4AGCDONERSSI: |
---|
| 1451 | sendPtr32[0] = packetNo + 1; |
---|
| 1452 | sendPtr32[1] = ACK; |
---|
| 1453 | sendPtr32[2] = command; |
---|
| 1454 | |
---|
| 1455 | sendPtr32[3] = warplab_mimo_ReadReg_Radio4AGCDoneRSSI(WARPLAB_BASEADDR); |
---|
| 1456 | |
---|
| 1457 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1458 | break; |
---|
| 1459 | #endif |
---|
| 1460 | |
---|
[1385] | 1461 | case AGC_RESET: |
---|
[1386] | 1462 | warplab_AGC_Reset(); |
---|
[1385] | 1463 | sendACK(packetNo, command); |
---|
| 1464 | break; |
---|
| 1465 | |
---|
| 1466 | case READ_AGC_GAINS: |
---|
| 1467 | sendPtr32[0] = packetNo + 1; |
---|
| 1468 | sendPtr32[1] = ACK; |
---|
| 1469 | sendPtr32[2] = command; |
---|
| 1470 | |
---|
[1386] | 1471 | sendPtr32[3] = warplab_AGC_GetGains(); |
---|
[1385] | 1472 | |
---|
| 1473 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1474 | break; |
---|
| 1475 | |
---|
| 1476 | case SET_AGC_TARGET_dBm: |
---|
| 1477 | agctarget = (int)receivePtr32[2]; |
---|
[1386] | 1478 | warplab_AGC_SetTarget(agctarget); |
---|
[1385] | 1479 | xil_printf("agctarget = %d\r\n",agctarget); |
---|
| 1480 | sendACK(packetNo, command); |
---|
| 1481 | break; |
---|
| 1482 | |
---|
| 1483 | case SET_AGC_DCO_EN_DIS: |
---|
| 1484 | agc_dco_state = (unsigned int)receivePtr32[2]; |
---|
[1386] | 1485 | warplab_AGC_SetDCO(agc_dco_state); |
---|
[1389] | 1486 | warplab_mimo_WriteReg_DCO_EN_SEL(agc_dco_state); |
---|
[1385] | 1487 | xil_printf("agc_dco_state = %d\r\n",agc_dco_state); |
---|
| 1488 | sendACK(packetNo, command); |
---|
| 1489 | break; |
---|
| 1490 | |
---|
| 1491 | case SET_AGC_NOISEEST_dBm: |
---|
| 1492 | agcnoiseEst = (int)receivePtr32[2]; |
---|
[1386] | 1493 | warplab_AGC_setNoiseEstimate(agcnoiseEst); |
---|
[1385] | 1494 | xil_printf("agctarget = %d\r\n",agctarget); |
---|
| 1495 | sendACK(packetNo, command); |
---|
| 1496 | break; |
---|
| 1497 | |
---|
| 1498 | case SET_AGC_THRESHOLDS: |
---|
[1389] | 1499 | warplab_AGC_WriteReg_Thresholds((unsigned int)receivePtr32[2]); |
---|
[1385] | 1500 | sendACK(packetNo, command); |
---|
| 1501 | break; |
---|
| 1502 | |
---|
| 1503 | case SET_AGC_TRIG_DELAY: |
---|
[1389] | 1504 | warplab_AGC_WriteReg_AGC_TRIGGER_DELAY((unsigned int)receivePtr32[2]); |
---|
[1385] | 1505 | sendACK(packetNo, command); |
---|
| 1506 | break; |
---|
| 1507 | |
---|
| 1508 | case READ_AGC_THRESHOLDS: |
---|
| 1509 | sendPtr32[0] = packetNo + 1; |
---|
| 1510 | sendPtr32[1] = ACK; |
---|
| 1511 | sendPtr32[2] = command; |
---|
| 1512 | |
---|
[1386] | 1513 | sendPtr32[3] = warplab_AGC_ReadReg_Thresholds(XPAR_WARPLAB_MIMO_4X4_AGC_PLBW_0_BASEADDR); |
---|
[1385] | 1514 | |
---|
| 1515 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1516 | break; |
---|
| 1517 | |
---|
| 1518 | case CLOSE: |
---|
| 1519 | if(DEBUG_LVL > 1) xil_printf("Closing sockets.\r\n"); |
---|
| 1520 | sendACK(packetNo, command); |
---|
| 1521 | done = 1; |
---|
| 1522 | |
---|
| 1523 | break; |
---|
| 1524 | |
---|
| 1525 | case TX_TEST: |
---|
| 1526 | if(DEBUG_LVL > 1) xil_printf("Starting Tx Test\r\n"); |
---|
| 1527 | sendACK(packetNo, command); |
---|
| 1528 | |
---|
| 1529 | break; |
---|
| 1530 | |
---|
| 1531 | default: |
---|
| 1532 | if(DEBUG_LVL > 1) xil_printf("Received command (%d) is not recognized. Please retry transmission.\r\n", command); |
---|
| 1533 | |
---|
| 1534 | sendPtr32[0] = packetNo + 1; |
---|
| 1535 | sendPtr32[1] = NOACK; |
---|
| 1536 | bytesSend = 8; |
---|
| 1537 | xilsock_sendto(sock, sendBuffer, bytesSend, (struct sockaddr *)&addr, alen); |
---|
| 1538 | } |
---|
| 1539 | } |
---|
| 1540 | } |
---|
| 1541 | |
---|
| 1542 | shut_socket(); |
---|
| 1543 | |
---|
| 1544 | return 0; |
---|
| 1545 | } |
---|
| 1546 | |
---|
| 1547 | void sendACK(unsigned int packetNo, unsigned int commandToACK) |
---|
| 1548 | { |
---|
| 1549 | sendPtr32[0] = packetNo + 1; |
---|
| 1550 | sendPtr32[1] = ACK; |
---|
| 1551 | sendPtr32[2] = commandToACK; |
---|
| 1552 | xilsock_sendto(sock, sendBuffer, 12, (struct sockaddr *)&addr, alen); |
---|
| 1553 | return; |
---|
| 1554 | } |
---|
| 1555 | |
---|
| 1556 | unsigned char sevenSegmentMap(unsigned char x) |
---|
| 1557 | { |
---|
| 1558 | switch(x) |
---|
| 1559 | { |
---|
| 1560 | case(0x0) : return 0x007E; |
---|
| 1561 | case(0x1) : return 0x0030; |
---|
| 1562 | case(0x2) : return 0x006D; |
---|
| 1563 | case(0x3) : return 0x0079; |
---|
| 1564 | case(0x4) : return 0x0033; |
---|
| 1565 | case(0x5) : return 0x005B; |
---|
| 1566 | case(0x6) : return 0x005F; |
---|
| 1567 | case(0x7) : return 0x0070; |
---|
| 1568 | case(0x8) : return 0x007F; |
---|
| 1569 | case(0x9) : return 0x007B; |
---|
| 1570 | |
---|
| 1571 | case(0xA) : return 0x0077; |
---|
| 1572 | case(0xB) : return 0x007F; |
---|
| 1573 | case(0xC) : return 0x004E; |
---|
| 1574 | case(0xD) : return 0x007E; |
---|
| 1575 | case(0xE) : return 0x004F; |
---|
| 1576 | case(0xF) : return 0x0047; |
---|
| 1577 | default : return 0x0000; |
---|
| 1578 | } |
---|
| 1579 | } |
---|
| 1580 | |
---|
| 1581 | // Commented out old TxDCP Calibration code see new code below |
---|
| 1582 | //int CalibrateTxDCO(unsigned int radioSelection) |
---|
| 1583 | //{ |
---|
| 1584 | // int eepromStatus = 0; |
---|
| 1585 | // short calReadback = 0; |
---|
| 1586 | // signed short best_I, best_Q; |
---|
| 1587 | // unsigned char radioNum; |
---|
| 1588 | |
---|
| 1589 | // //Radio selection will be 0x11111111, 0x22222222, 0x44444444 or 0x88888888 |
---|
| 1590 | // // corresponding to radios in slots 1, 2, 3 or 4 |
---|
| 1591 | // // We need the slot number to initialize the EEPROM |
---|
| 1592 | // radioNum = (radioSelection & 0xF) == 1 ? 1 : ( (radioSelection & 0xF) == 2 ? 2 : ( (radioSelection & 0xF) == 4 ? 3 : 4 ) ); |
---|
| 1593 | // |
---|
| 1594 | // //Select the EEPROM on the current radio board |
---|
| 1595 | // eepromStatus = WarpEEPROM_EEPROMSelect((unsigned int*)XPAR_EEPROM_CONTROLLER_MEM0_BASEADDR, radioNum); |
---|
| 1596 | // |
---|
| 1597 | // if(eepromStatus != 0) |
---|
| 1598 | // { |
---|
| 1599 | // xil_printf("TxDCO: EEPROM error\r\n"); |
---|
| 1600 | // return -1; |
---|
| 1601 | // } |
---|
| 1602 | // |
---|
| 1603 | // //Initialize the EEPROM controller |
---|
| 1604 | // eepromStatus = WarpEEPROM_Initialize((unsigned int*)XPAR_EEPROM_CONTROLLER_MEM0_BASEADDR); |
---|
| 1605 | // |
---|
| 1606 | // if(eepromStatus != 0) |
---|
| 1607 | // { |
---|
| 1608 | // xil_printf("TxDCO: EEPROM error\r\n"); |
---|
| 1609 | // return -1; |
---|
| 1610 | // } |
---|
| 1611 | // |
---|
| 1612 | // //Read the Tx DCO values |
---|
| 1613 | // calReadback = WarpEEPROM_ReadRadioCal((unsigned int*)XPAR_EEPROM_CONTROLLER_MEM0_BASEADDR, 2, 1); |
---|
| 1614 | // |
---|
| 1615 | // //Scale the stored values |
---|
| 1616 | // best_I = (signed short)(((signed char)(calReadback & 0xFF))<<1); |
---|
| 1617 | // best_Q = (signed short)(((signed char)((calReadback>>8) & 0xFF))<<1); |
---|
| 1618 | // |
---|
| 1619 | // xil_printf("TxDCO: Applied values to radio %d - I: %d\tQ: %d\r\n", radioNum, best_I, best_Q); |
---|
| 1620 | // |
---|
| 1621 | // //Finally, write the Tx DCO values to the DAC |
---|
| 1622 | // WarpRadio_v1_DACOffsetAdj(ICHAN, best_I, radioSelection); |
---|
| 1623 | // WarpRadio_v1_DACOffsetAdj(QCHAN, best_Q, radioSelection); |
---|
| 1624 | // |
---|
| 1625 | // return 0; |
---|
| 1626 | // |
---|
| 1627 | //} |
---|
| 1628 | |
---|
| 1629 | #define XPAR_EEPROM_CONTROLLER_BASEADDR XPAR_EEPROM_CONTROLLER_MEM0_BASEADDR |
---|
| 1630 | //New TxDCO calibration code |
---|
| 1631 | int warpphy_applyTxDCOCalibration(unsigned int radioSelection) |
---|
| 1632 | { |
---|
| 1633 | int eepromStatus = 0; |
---|
| 1634 | short calReadback = 0; |
---|
| 1635 | signed short best_I, best_Q; |
---|
| 1636 | unsigned char radioNum; |
---|
| 1637 | Xuint8 memory[8], version, revision, valid, MAC[6], i; |
---|
| 1638 | Xuint16 serial; |
---|
| 1639 | |
---|
| 1640 | //Radio selection will be 0x11111111, 0x22222222, 0x44444444 or 0x88888888 |
---|
| 1641 | // corresponding to radios in slots 1, 2, 3 or 4 |
---|
| 1642 | // We need the slot number to initialize the EEPROM |
---|
| 1643 | radioNum = (radioSelection & 0xF) == 1 ? 1 : ( (radioSelection & 0xF) == 2 ? 2 : ( (radioSelection & 0xF) == 4 ? 3 : 4 ) ); |
---|
| 1644 | xil_printf("Applying TxDCO correction for radio %d\r\n", radioNum); |
---|
| 1645 | |
---|
| 1646 | //Mimic the radio test code, in hopes of a more stable EEPROM read... |
---|
| 1647 | //Choose the EEPROM on the selected radio board; second arg is [0,1,2,3,4] for [FPGA, radio1, radio2, radio3, radio4] |
---|
| 1648 | eepromStatus = WarpEEPROM_EEPROMSelect((unsigned int *)XPAR_EEPROM_CONTROLLER_BASEADDR, 0); |
---|
| 1649 | if(eepromStatus != 0) |
---|
| 1650 | { |
---|
| 1651 | xil_printf("EEPROM Select Failed!\r\n"); |
---|
| 1652 | return; |
---|
| 1653 | } |
---|
| 1654 | |
---|
| 1655 | //Initialize the EEPROM controller |
---|
| 1656 | eepromStatus = WarpEEPROM_Initialize((unsigned int *)XPAR_EEPROM_CONTROLLER_BASEADDR); |
---|
| 1657 | if(eepromStatus != 0) |
---|
| 1658 | { |
---|
| 1659 | xil_printf("EEPROM Init Returned %x\r\n", eepromStatus); |
---|
| 1660 | xil_printf("EEPROM Init Failed!\r\n"); |
---|
| 1661 | return; |
---|
| 1662 | } |
---|
| 1663 | |
---|
| 1664 | //Select the EEPROM on the current radio board |
---|
| 1665 | eepromStatus = WarpEEPROM_EEPROMSelect((unsigned int*)XPAR_EEPROM_CONTROLLER_BASEADDR, radioNum); |
---|
| 1666 | |
---|
| 1667 | if(eepromStatus != 0) |
---|
| 1668 | { |
---|
| 1669 | xil_printf("TxDCO: EEPROM error\r\n"); |
---|
| 1670 | return -1; |
---|
| 1671 | } |
---|
| 1672 | |
---|
| 1673 | //Read the first page from the EERPOM |
---|
| 1674 | WarpEEPROM_ReadMem((unsigned int*)XPAR_EEPROM_CONTROLLER_BASEADDR, 0, 0, memory); |
---|
| 1675 | version = (memory[0] & 0xE0) >> 5; |
---|
| 1676 | revision = (memory[1] & 0xE0) >> 5; |
---|
| 1677 | valid = memory[1] & 0x1F; |
---|
| 1678 | |
---|
| 1679 | xil_printf("\r\n\r\nEEPROM Values for Radio Board in Slot %d\r\n", radioNum); |
---|
| 1680 | |
---|
| 1681 | xil_printf(" WARP Radio Board Version %d.%d\r\n", version, revision); |
---|
| 1682 | |
---|
| 1683 | serial = WarpEEPROM_ReadWARPSerial((unsigned int*)XPAR_EEPROM_CONTROLLER_BASEADDR); |
---|
| 1684 | |
---|
| 1685 | xil_printf(" Serial Number (WARP): WR-a-%05d\r\n", serial); |
---|
| 1686 | |
---|
| 1687 | WarpEEPROM_ReadDSSerial((unsigned int*)XPAR_EEPROM_CONTROLLER_BASEADDR, memory); |
---|
| 1688 | print(" EEPROM Hard-wired Serial Number: "); |
---|
| 1689 | for(i=1;i<7;i++) |
---|
| 1690 | xil_printf(" %x",memory[7-i]); |
---|
| 1691 | xil_printf("\r\n\r\n"); |
---|
| 1692 | //Read the Tx DCO values |
---|
| 1693 | calReadback = WarpEEPROM_ReadRadioCal((unsigned int*)XPAR_EEPROM_CONTROLLER_BASEADDR, 2, 1); |
---|
| 1694 | |
---|
| 1695 | //Scale the stored values |
---|
| 1696 | best_I = (signed short)(((signed char)(calReadback & 0xFF))<<1); |
---|
| 1697 | best_Q = (signed short)(((signed char)((calReadback>>8) & 0xFF))<<1); |
---|
| 1698 | |
---|
| 1699 | xil_printf("TxDCO: Applied values to radio %d - I: %d\tQ: %d\r\n", radioNum, best_I, best_Q); |
---|
| 1700 | |
---|
| 1701 | //Finally, write the Tx DCO values to the DAC |
---|
| 1702 | WarpRadio_v1_DACOffsetAdj(ICHAN, best_I, radioSelection); |
---|
| 1703 | WarpRadio_v1_DACOffsetAdj(QCHAN, best_Q, radioSelection); |
---|
| 1704 | |
---|
| 1705 | return 0; |
---|
| 1706 | } |
---|
| 1707 | |
---|
| 1708 | |
---|
[1386] | 1709 | void warplab_AGC_Reset() |
---|
[1385] | 1710 | { |
---|
| 1711 | // Cycle the agc's software reset port |
---|
| 1712 | |
---|
[1389] | 1713 | warplab_AGC_WriteReg_SRESET_IN(1); |
---|
[1385] | 1714 | usleep(10); |
---|
[1389] | 1715 | warplab_AGC_WriteReg_SRESET_IN(0); |
---|
[1385] | 1716 | usleep(100); |
---|
| 1717 | |
---|
| 1718 | return; |
---|
| 1719 | } |
---|
| 1720 | |
---|
[1386] | 1721 | void warplab_AGC_MasterReset() |
---|
[1385] | 1722 | { |
---|
| 1723 | // Cycle the master reset register in the AGC and enable it |
---|
| 1724 | |
---|
[1389] | 1725 | warplab_AGC_WriteReg_AGC_EN(0); |
---|
[1385] | 1726 | usleep(10); |
---|
[1389] | 1727 | warplab_AGC_WriteReg_MRESET_IN(0); |
---|
[1385] | 1728 | usleep(10); |
---|
[1389] | 1729 | warplab_AGC_WriteReg_MRESET_IN(1); |
---|
[1385] | 1730 | usleep(10); |
---|
[1389] | 1731 | warplab_AGC_WriteReg_MRESET_IN(0); |
---|
[1385] | 1732 | usleep(10); |
---|
[1389] | 1733 | warplab_AGC_WriteReg_AGC_EN(1); |
---|
[1385] | 1734 | |
---|
| 1735 | return; |
---|
| 1736 | } |
---|
| 1737 | |
---|
[1386] | 1738 | void warplab_AGC_Start() |
---|
[1385] | 1739 | { |
---|
| 1740 | // Cycle the agc's packet in port |
---|
[1389] | 1741 | warplab_AGC_WriteReg_PACKET_IN(1); |
---|
[1385] | 1742 | usleep(10); |
---|
[1389] | 1743 | warplab_AGC_WriteReg_PACKET_IN(0); |
---|
[1385] | 1744 | usleep(100); |
---|
| 1745 | |
---|
| 1746 | return; |
---|
| 1747 | } |
---|
| 1748 | |
---|
[1386] | 1749 | void warplab_AGC_Initialize(int noise_estimate) |
---|
[1385] | 1750 | { |
---|
| 1751 | int g_bbset = 0; |
---|
| 1752 | |
---|
| 1753 | // First set all standard parameters |
---|
| 1754 | |
---|
| 1755 | // Turn off both resets and the master enable |
---|
[1389] | 1756 | warplab_AGC_WriteReg_AGC_EN(0); |
---|
| 1757 | warplab_AGC_WriteReg_SRESET_IN(0); |
---|
| 1758 | warplab_AGC_WriteReg_MRESET_IN(0); |
---|
[1385] | 1759 | |
---|
| 1760 | // An adjustment parameter |
---|
[1389] | 1761 | warplab_AGC_WriteReg_ADJ(8); |
---|
[1385] | 1762 | |
---|
| 1763 | // Timing for the DC-offset correction |
---|
[1389] | 1764 | warplab_AGC_WriteReg_DCO_Timing(0x12001000); |
---|
[1385] | 1765 | |
---|
| 1766 | // Initial baseband gain setting |
---|
[1389] | 1767 | warplab_AGC_WriteReg_GBB_init(52); |
---|
[1385] | 1768 | |
---|
| 1769 | // RF gain AGCstate thresholds |
---|
[1389] | 1770 | warplab_AGC_WriteReg_Thresholds(0xD5CBA6); |
---|
[1385] | 1771 | |
---|
| 1772 | // Overall AGC timing |
---|
[1389] | 1773 | warplab_AGC_WriteReg_Timing(0x9A962A28);//0x826E3C0A; |
---|
[1385] | 1774 | |
---|
| 1775 | // vIQ and RSSI average lengths |
---|
[1389] | 1776 | warplab_AGC_WriteReg_AVG_LEN(0x10F); //103 |
---|
[1385] | 1777 | |
---|
| 1778 | // Disable DCO, disable DCO subtraction |
---|
[1389] | 1779 | warplab_AGC_WriteReg_Bits(0x0); |
---|
[1385] | 1780 | |
---|
| 1781 | // Compute and set the initial g_BB gain value from the noise estimate |
---|
| 1782 | // The initial g_bb sets noise to -19 db, assuming 32 db RF gain |
---|
| 1783 | |
---|
| 1784 | g_bbset = -19 - 32 - noise_estimate; |
---|
[1389] | 1785 | warplab_AGC_WriteReg_GBB_init(g_bbset); |
---|
[1385] | 1786 | |
---|
| 1787 | // Perform a master reset |
---|
[1386] | 1788 | warplab_AGC_MasterReset(); |
---|
[1385] | 1789 | |
---|
| 1790 | // Agc is now reset and enabled, ready to go! |
---|
| 1791 | return; |
---|
| 1792 | } |
---|
| 1793 | |
---|
[1386] | 1794 | void warplab_AGC_setNoiseEstimate(int noise_estimate) |
---|
[1385] | 1795 | { |
---|
| 1796 | int g_bbset; |
---|
| 1797 | |
---|
| 1798 | g_bbset = -19 - 32 - noise_estimate; |
---|
| 1799 | |
---|
[1389] | 1800 | warplab_AGC_WriteReg_GBB_init(g_bbset); |
---|
[1385] | 1801 | |
---|
| 1802 | return; |
---|
| 1803 | } |
---|
| 1804 | |
---|
[1386] | 1805 | unsigned int warplab_AGC_GetGains(void) |
---|
[1385] | 1806 | { |
---|
| 1807 | unsigned int gBB_A, gRF_A, gBB_B, gRF_B, gBB_C, gRF_C, gBB_D, gRF_D, gains; |
---|
| 1808 | |
---|
| 1809 | // Get the gains from the registers |
---|
[1386] | 1810 | gBB_A = warplab_AGC_ReadReg_GBB_A(XPAR_WARPLAB_MIMO_4X4_AGC_PLBW_0_BASEADDR); |
---|
| 1811 | gRF_A = warplab_AGC_ReadReg_GRF_A(XPAR_WARPLAB_MIMO_4X4_AGC_PLBW_0_BASEADDR); |
---|
[1385] | 1812 | |
---|
[1386] | 1813 | gBB_B = warplab_AGC_ReadReg_GBB_B(XPAR_WARPLAB_MIMO_4X4_AGC_PLBW_0_BASEADDR); |
---|
| 1814 | gRF_B = warplab_AGC_ReadReg_GRF_B(XPAR_WARPLAB_MIMO_4X4_AGC_PLBW_0_BASEADDR); |
---|
[1385] | 1815 | |
---|
[1386] | 1816 | gBB_C = warplab_AGC_ReadReg_GBB_C(XPAR_WARPLAB_MIMO_4X4_AGC_PLBW_0_BASEADDR); |
---|
| 1817 | gRF_C = warplab_AGC_ReadReg_GRF_C(XPAR_WARPLAB_MIMO_4X4_AGC_PLBW_0_BASEADDR); |
---|
[1385] | 1818 | |
---|
[1386] | 1819 | gBB_D = warplab_AGC_ReadReg_GBB_D(XPAR_WARPLAB_MIMO_4X4_AGC_PLBW_0_BASEADDR); |
---|
| 1820 | gRF_D = warplab_AGC_ReadReg_GRF_D(XPAR_WARPLAB_MIMO_4X4_AGC_PLBW_0_BASEADDR); |
---|
[1385] | 1821 | |
---|
| 1822 | // First concatenate the two radios together, into the gRF register |
---|
| 1823 | // 2 lowest bits are RF, 5 higher bits are BB, last bit is unused |
---|
| 1824 | // Multiply by 2^2, shift gBB right by 2 bits |
---|
| 1825 | |
---|
| 1826 | gRF_A = gRF_A + (gBB_A * 4); |
---|
| 1827 | gRF_B = gRF_B + (gBB_B * 4); |
---|
| 1828 | gRF_C = gRF_C + (gBB_C * 4); |
---|
| 1829 | gRF_D = gRF_D + (gBB_D * 4); |
---|
| 1830 | |
---|
| 1831 | // Multiply by 2^8 shift gRF right by 8 bits |
---|
| 1832 | |
---|
| 1833 | gains = gRF_A + (gRF_B * 256) + (gRF_C * 65536) + (gRF_D * 16777216); |
---|
| 1834 | |
---|
| 1835 | return gains; |
---|
| 1836 | } |
---|
| 1837 | |
---|
[1386] | 1838 | void warplab_AGC_SetTarget(unsigned int target) |
---|
[1385] | 1839 | { |
---|
[1389] | 1840 | warplab_AGC_WriteReg_T_dB(target); |
---|
[1385] | 1841 | return; |
---|
| 1842 | } |
---|
| 1843 | |
---|
[1389] | 1844 | void warplab_AGC_SetDCO(unsigned int AGCstate) |
---|
[1385] | 1845 | { |
---|
| 1846 | // Enables DCO and DCO subtraction (correction scheme and butterworth hipass are active) |
---|
| 1847 | |
---|
| 1848 | unsigned int bits; |
---|
| 1849 | |
---|
[1386] | 1850 | bits = warplab_AGC_ReadReg_Bits(XPAR_WARPLAB_MIMO_4X4_AGC_PLBW_0_BASEADDR); |
---|
[1385] | 1851 | |
---|
| 1852 | if(AGCstate) |
---|
| 1853 | bits = bits | 0x6; |
---|
| 1854 | else |
---|
| 1855 | bits = bits & 0x1; |
---|
| 1856 | |
---|
[1389] | 1857 | warplab_AGC_WriteReg_Bits(bits); |
---|
[1385] | 1858 | |
---|
| 1859 | return; |
---|
| 1860 | } |
---|