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warplab_mimo_4x4.mdl

Last change on this file was 1423, checked in by sgupta, 14 years ago
new 4x4 model
File size: 937.5 KB

Line
1	Model {
2	Name "warplab_mimo_4x4"
3	Version 7.1
4	MdlSubVersion 0
5	GraphicalInterface {
6	NumRootInports 0
7	NumRootOutports 0
8	ParameterArgumentNames ""
9	ComputedModelVersion "1.176"
10	NumModelReferences 0
11	NumTestPointedSignals 0
12	}
13	SavedCharacterEncoding "windows-1252"
14	SaveDefaultBlockParams on
15	SampleTimeColors off
16	LibraryLinkDisplay "none"
17	WideLines off
18	ShowLineDimensions off
19	ShowPortDataTypes off
20	ShowLoopsOnError on
21	IgnoreBidirectionalLines off
22	ShowStorageClass off
23	ShowTestPointIcons on
24	ShowSignalResolutionIcons on
25	ShowViewerIcons on
26	SortedOrder off
27	ExecutionContextIcon off
28	ShowLinearizationAnnotations on
29	ScopeRefreshTime 0.035000
30	OverrideScopeRefreshTime on
31	DisableAllScopes off
32	DataTypeOverride "UseLocalSettings"
33	MinMaxOverflowLogging "UseLocalSettings"
34	MinMaxOverflowArchiveMode "Overwrite"
35	BlockNameDataTip off
36	BlockParametersDataTip off
37	BlockDescriptionStringDataTip off
38	ToolBar on
39	StatusBar on
40	BrowserShowLibraryLinks off
41	BrowserLookUnderMasks off
42	Created "Wed Jan 07 15:32:06 2009"
43	Creator "mduarte"
44	UpdateHistory "UpdateHistoryNever"
45	ModifiedByFormat "%<Auto>"
46	LastModifiedBy "sgupta"
47	ModifiedDateFormat "%<Auto>"
48	LastModifiedDate "Thu Dec 10 12:20:28 2009"
49	RTWModifiedTimeStamp 0
50	ModelVersionFormat "1.%<AutoIncrement:176>"
51	ConfigurationManager "None"
52	SimulationMode "normal"
53	LinearizationMsg "none"
54	Profile off
55	ParamWorkspaceSource "MATLABWorkspace"
56	AccelSystemTargetFile "accel.tlc"
57	AccelTemplateMakefile "accel_default_tmf"
58	AccelMakeCommand "make_rtw"
59	TryForcingSFcnDF off
60	RecordCoverage off
61	CovPath "/"
62	CovSaveName "covdata"
63	CovMetricSettings "dw"
64	CovNameIncrementing off
65	CovHtmlReporting on
66	covSaveCumulativeToWorkspaceVar on
67	CovSaveSingleToWorkspaceVar on
68	CovCumulativeVarName "covCumulativeData"
69	CovCumulativeReport off
70	CovReportOnPause on
71	CovModelRefEnable "Off"
72	ExtModeBatchMode off
73	ExtModeEnableFloating on
74	ExtModeTrigType "manual"
75	ExtModeTrigMode "normal"
76	ExtModeTrigPort "1"
77	ExtModeTrigElement "any"
78	ExtModeTrigDuration 1000
79	ExtModeTrigDurationFloating "auto"
80	ExtModeTrigHoldOff 0
81	ExtModeTrigDelay 0
82	ExtModeTrigDirection "rising"
83	ExtModeTrigLevel 0
84	ExtModeArchiveMode "off"
85	ExtModeAutoIncOneShot off
86	ExtModeIncDirWhenArm off
87	ExtModeAddSuffixToVar off
88	ExtModeWriteAllDataToWs off
89	ExtModeArmWhenConnect on
90	ExtModeSkipDownloadWhenConnect off
91	ExtModeLogAll on
92	ExtModeAutoUpdateStatusClock on
93	BufferReuse on
94	ShowModelReferenceBlockVersion off
95	ShowModelReferenceBlockIO off
96	Array {
97	Type "Handle"
98	Dimension 1
99	Simulink.ConfigSet {
100	$ObjectID 1
101	Version "1.4.0"
102	Array {
103	Type "Handle"
104	Dimension 7
105	Simulink.SolverCC {
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107	Version "1.4.0"
108	StartTime "0.0"
109	StopTime "50000"
110	AbsTol "auto"
111	FixedStep "auto"
112	InitialStep "auto"
113	MaxNumMinSteps "-1"
114	MaxOrder 5
115	ZcThreshold "auto"
116	ConsecutiveZCsStepRelTol "10128eps"
117	MaxConsecutiveZCs "1000"
118	ExtrapolationOrder 4
119	NumberNewtonIterations 1
120	MaxStep "auto"
121	MinStep "auto"
122	MaxConsecutiveMinStep "1"
123	RelTol "1e-3"
124	SolverMode "Auto"
125	Solver "ode45"
126	SolverName "ode45"
127	ShapePreserveControl "DisableAll"
128	ZeroCrossControl "UseLocalSettings"
129	ZeroCrossAlgorithm "Non-adaptive"
130	AlgebraicLoopSolver "TrustRegion"
131	SolverResetMethod "Fast"
132	PositivePriorityOrder off
133	AutoInsertRateTranBlk off
134	SampleTimeConstraint "Unconstrained"
135	InsertRTBMode "Whenever possible"
136	}
137	Simulink.DataIOCC {
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139	Version "1.4.0"
140	Decimation "1"
141	ExternalInput "[t, u]"
142	FinalStateName "xFinal"
143	InitialState "xInitial"
144	LimitDataPoints on
145	MaxDataPoints "1000"
146	LoadExternalInput off
147	LoadInitialState off
148	SaveFinalState off
149	SaveFormat "Array"
150	SaveOutput on
151	SaveState off
152	SignalLogging on
153	InspectSignalLogs off
154	SaveTime on
155	StateSaveName "xout"
156	TimeSaveName "tout"
157	OutputSaveName "yout"
158	SignalLoggingName "logsout"
159	OutputOption "RefineOutputTimes"
160	OutputTimes "[]"
161	Refine "1"
162	}
163	Simulink.OptimizationCC {
164	$ObjectID 4
165	Array {
166	Type "Cell"
167	Dimension 5
168	Cell "ZeroExternalMemoryAtStartup"
169	Cell "ZeroInternalMemoryAtStartup"
170	Cell "InitFltsAndDblsToZero"
171	Cell "OptimizeModelRefInitCode"
172	Cell "NoFixptDivByZeroProtection"
173	PropName "DisabledProps"
174	}
175	Version "1.4.0"
176	BlockReduction on
177	BooleanDataType on
178	ConditionallyExecuteInputs on
179	InlineParams off
180	InlineInvariantSignals off
181	OptimizeBlockIOStorage on
182	BufferReuse on
183	EnhancedBackFolding off
184	EnforceIntegerDowncast on
185	ExpressionFolding on
186	ExpressionDepthLimit 2147483647
187	FoldNonRolledExpr on
188	LocalBlockOutputs on
189	RollThreshold 5
190	SystemCodeInlineAuto off
191	StateBitsets off
192	DataBitsets off
193	UseTempVars off
194	ZeroExternalMemoryAtStartup on
195	ZeroInternalMemoryAtStartup on
196	InitFltsAndDblsToZero on
197	NoFixptDivByZeroProtection off
198	EfficientFloat2IntCast off
199	OptimizeModelRefInitCode off
200	LifeSpan "inf"
201	BufferReusableBoundary on
202	SimCompilerOptimization "Off"
203	AccelVerboseBuild off
204	}
205	Simulink.DebuggingCC {
206	$ObjectID 5
207	Version "1.4.0"
208	RTPrefix "error"
209	ConsistencyChecking "none"
210	ArrayBoundsChecking "none"
211	SignalInfNanChecking "none"
212	SignalRangeChecking "none"
213	ReadBeforeWriteMsg "UseLocalSettings"
214	WriteAfterWriteMsg "UseLocalSettings"
215	WriteAfterReadMsg "UseLocalSettings"
216	AlgebraicLoopMsg "warning"
217	ArtificialAlgebraicLoopMsg "warning"
218	SaveWithDisabledLinksMsg "warning"
219	SaveWithParameterizedLinksMsg "none"
220	CheckSSInitialOutputMsg on
221	CheckExecutionContextPreStartOutputMsg off
222	CheckExecutionContextRuntimeOutputMsg off
223	SignalResolutionControl "UseLocalSettings"
224	BlockPriorityViolationMsg "warning"
225	MinStepSizeMsg "warning"
226	TimeAdjustmentMsg "none"
227	MaxConsecutiveZCsMsg "error"
228	SolverPrmCheckMsg "warning"
229	InheritedTsInSrcMsg "warning"
230	DiscreteInheritContinuousMsg "warning"
231	MultiTaskDSMMsg "error"
232	MultiTaskCondExecSysMsg "error"
233	MultiTaskRateTransMsg "error"
234	SingleTaskRateTransMsg "none"
235	TasksWithSamePriorityMsg "warning"
236	SigSpecEnsureSampleTimeMsg "warning"
237	CheckMatrixSingularityMsg "none"
238	IntegerOverflowMsg "warning"
239	Int32ToFloatConvMsg "warning"
240	ParameterDowncastMsg "error"
241	ParameterOverflowMsg "error"
242	ParameterUnderflowMsg "none"
243	ParameterPrecisionLossMsg "warning"
244	ParameterTunabilityLossMsg "warning"
245	UnderSpecifiedDataTypeMsg "none"
246	UnnecessaryDatatypeConvMsg "none"
247	VectorMatrixConversionMsg "none"
248	InvalidFcnCallConnMsg "error"
249	FcnCallInpInsideContextMsg "Use local settings"
250	SignalLabelMismatchMsg "none"
251	UnconnectedInputMsg "warning"
252	UnconnectedOutputMsg "warning"
253	UnconnectedLineMsg "warning"
254	SFcnCompatibilityMsg "none"
255	UniqueDataStoreMsg "none"
256	BusObjectLabelMismatch "warning"
257	RootOutportRequireBusObject "warning"
258	AssertControl "UseLocalSettings"
259	EnableOverflowDetection off
260	ModelReferenceIOMsg "none"
261	ModelReferenceVersionMismatchMessage "none"
262	ModelReferenceIOMismatchMessage "none"
263	ModelReferenceCSMismatchMessage "none"
264	ModelReferenceSimTargetVerbose off
265	UnknownTsInhSupMsg "warning"
266	ModelReferenceDataLoggingMessage "warning"
267	ModelReferenceSymbolNameMessage "warning"
268	ModelReferenceExtraNoncontSigs "error"
269	StateNameClashWarn "warning"
270	StrictBusMsg "Warning"
271	LoggingUnavailableSignals "error"
272	BlockIODiagnostic "none"
273	}
274	Simulink.HardwareCC {
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276	Version "1.4.0"
277	ProdBitPerChar 8
278	ProdBitPerShort 16
279	ProdBitPerInt 32
280	ProdBitPerLong 32
281	ProdIntDivRoundTo "Undefined"
282	ProdEndianess "Unspecified"
283	ProdWordSize 32
284	ProdShiftRightIntArith on
285	ProdHWDeviceType "32-bit Generic"
286	TargetBitPerChar 8
287	TargetBitPerShort 16
288	TargetBitPerInt 32
289	TargetBitPerLong 32
290	TargetShiftRightIntArith on
291	TargetIntDivRoundTo "Undefined"
292	TargetEndianess "Unspecified"
293	TargetWordSize 32
294	TargetTypeEmulationWarnSuppressLevel 0
295	TargetPreprocMaxBitsSint 32
296	TargetPreprocMaxBitsUint 32
297	TargetHWDeviceType "Specified"
298	TargetUnknown off
299	ProdEqTarget on
300	}
301	Simulink.ModelReferenceCC {
302	$ObjectID 7
303	Version "1.4.0"
304	UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange"
305	CheckModelReferenceTargetMessage "error"
306	ModelReferenceNumInstancesAllowed "Multi"
307	ModelReferenceSigSizeVariationType "Always allowed"
308	ModelReferencePassRootInputsByReference on
309	ModelReferenceMinAlgLoopOccurrences off
310	}
311	Simulink.RTWCC {
312	$BackupClass "Simulink.RTWCC"
313	$ObjectID 8
314	Array {
315	Type "Cell"
316	Dimension 1
317	Cell "IncludeHyperlinkInReport"
318	PropName "DisabledProps"
319	}
320	Version "1.4.0"
321	SystemTargetFile "grt.tlc"
322	GenCodeOnly off
323	MakeCommand "make_rtw"
324	GenerateMakefile on
325	TemplateMakefile "grt_default_tmf"
326	GenerateReport off
327	SaveLog off
328	RTWVerbose on
329	RetainRTWFile off
330	ProfileTLC off
331	TLCDebug off
332	TLCCoverage off
333	TLCAssert off
334	ProcessScriptMode "Default"
335	ConfigurationMode "Optimized"
336	ConfigAtBuild off
337	IncludeHyperlinkInReport off
338	LaunchReport off
339	TargetLang "C"
340	IncludeBusHierarchyInRTWFileBlockHierarchyMap off
341	IncludeERTFirstTime off
342	GenerateTraceInfo off
343	GenerateTraceReport off
344	GenerateTraceReportSl off
345	GenerateTraceReportSf off
346	GenerateTraceReportEml off
347	GenerateCodeInfo off
348	RTWCompilerOptimization "Off"
349	Array {
350	Type "Handle"
351	Dimension 2
352	Simulink.CodeAppCC {
353	$ObjectID 9
354	Array {
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356	Dimension 16
357	Cell "IgnoreCustomStorageClasses"
358	Cell "InsertBlockDesc"
359	Cell "SFDataObjDesc"
360	Cell "SimulinkDataObjDesc"
361	Cell "DefineNamingRule"
362	Cell "SignalNamingRule"
363	Cell "ParamNamingRule"
364	Cell "InlinedPrmAccess"
365	Cell "CustomSymbolStr"
366	Cell "CustomSymbolStrGlobalVar"
367	Cell "CustomSymbolStrType"
368	Cell "CustomSymbolStrField"
369	Cell "CustomSymbolStrFcn"
370	Cell "CustomSymbolStrBlkIO"
371	Cell "CustomSymbolStrTmpVar"
372	Cell "CustomSymbolStrMacro"
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375	Version "1.4.0"
376	ForceParamTrailComments off
377	GenerateComments on
378	IgnoreCustomStorageClasses on
379	IncHierarchyInIds off
380	MaxIdLength 31
381	PreserveName off
382	PreserveNameWithParent off
383	ShowEliminatedStatement off
384	IncAutoGenComments off
385	SimulinkDataObjDesc off
386	SFDataObjDesc off
387	IncDataTypeInIds off
388	MangleLength 1
389	CustomSymbolStrGlobalVar "$R$N$M"
390	CustomSymbolStrType "$N$R$M"
391	CustomSymbolStrField "$N$M"
392	CustomSymbolStrFcn "$R$N$M$F"
393	CustomSymbolStrBlkIO "rtb_$N$M"
394	CustomSymbolStrTmpVar "$N$M"
395	CustomSymbolStrMacro "$R$N$M"
396	DefineNamingRule "None"
397	ParamNamingRule "None"
398	SignalNamingRule "None"
399	InsertBlockDesc off
400	SimulinkBlockComments on
401	EnableCustomComments off
402	InlinedPrmAccess "Literals"
403	ReqsInCode off
404	}
405	Simulink.GRTTargetCC {
406	$BackupClass "Simulink.TargetCC"
407	$ObjectID 10
408	Array {
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410	Dimension 15
411	Cell "IncludeMdlTerminateFcn"
412	Cell "CombineOutputUpdateFcns"
413	Cell "SuppressErrorStatus"
414	Cell "ERTCustomFileBanners"
415	Cell "GenerateSampleERTMain"
416	Cell "GenerateTestInterfaces"
417	Cell "ModelStepFunctionPrototypeControlCompliant"
418	Cell "MultiInstanceERTCode"
419	Cell "PurelyIntegerCode"
420	Cell "SupportNonFinite"
421	Cell "SupportComplex"
422	Cell "SupportAbsoluteTime"
423	Cell "SupportContinuousTime"
424	Cell "SupportNonInlinedSFcns"
425	Cell "PortableWordSizes"
426	PropName "DisabledProps"
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428	Version "1.4.0"
429	TargetFcnLib "ansi_tfl_tmw.mat"
430	TargetLibSuffix ""
431	TargetPreCompLibLocation ""
432	TargetFunctionLibrary "ANSI_C"
433	UtilityFuncGeneration "Auto"
434	GenerateFullHeader on
435	GenerateSampleERTMain off
436	GenerateTestInterfaces off
437	IsPILTarget off
438	ModelReferenceCompliant on
439	CompOptLevelCompliant on
440	IncludeMdlTerminateFcn on
441	CombineOutputUpdateFcns off
442	SuppressErrorStatus off
443	ERTFirstTimeCompliant off
444	IncludeFileDelimiter "Auto"
445	ERTCustomFileBanners off
446	SupportAbsoluteTime on
447	LogVarNameModifier "rt_"
448	MatFileLogging on
449	MultiInstanceERTCode off
450	SupportNonFinite on
451	SupportComplex on
452	PurelyIntegerCode off
453	SupportContinuousTime on
454	SupportNonInlinedSFcns on
455	EnableShiftOperators on
456	ParenthesesLevel "Nominal"
457	PortableWordSizes off
458	ModelStepFunctionPrototypeControlCompliant off
459	AutosarCompliant off
460	ExtMode off
461	ExtModeStaticAlloc off
462	ExtModeTesting off
463	ExtModeStaticAllocSize 1000000
464	ExtModeTransport 0
465	ExtModeMexFile "ext_comm"
466	ExtModeIntrfLevel "Level1"
467	RTWCAPISignals off
468	RTWCAPIParams off
469	RTWCAPIStates off
470	GenerateASAP2 off
471	}
472	PropName "Components"
473	}
474	}
475	PropName "Components"
476	}
477	Name "Configuration"
478	CurrentDlgPage "Solver"
479	}
480	PropName "ConfigurationSets"
481	}
482	Simulink.ConfigSet {
483	$PropName "ActiveConfigurationSet"
484	$ObjectID 1
485	}
486	BlockDefaults {
487	Orientation "right"
488	ForegroundColor "black"
489	BackgroundColor "white"
490	DropShadow off
491	NamePlacement "normal"
492	FontName "Arial"
493	FontSize 10
494	FontWeight "normal"
495	FontAngle "normal"
496	ShowName on
497	}
498	BlockParameterDefaults {
499	Block {
500	BlockType From
501	IconDisplay "Tag"
502	TagVisibility "local"
503	}
504	Block {
505	BlockType Goto
506	IconDisplay "Tag"
507	}
508	Block {
509	BlockType Inport
510	Port "1"
511	UseBusObject off
512	BusObject "BusObject"
513	BusOutputAsStruct off
514	PortDimensions "-1"
515	SampleTime "-1"
516	OutMin "[]"
517	OutMax "[]"
518	DataType "auto"
519	OutDataType "fixdt(1,16,0)"
520	OutScaling "[]"
521	OutDataTypeStr "Inherit: auto"
522	SignalType "auto"
523	SamplingMode "auto"
524	LatchByDelayingOutsideSignal off
525	LatchByCopyingInsideSignal off
526	Interpolate on
527	}
528	Block {
529	BlockType Outport
530	Port "1"
531	UseBusObject off
532	BusObject "BusObject"
533	BusOutputAsStruct off
534	PortDimensions "-1"
535	SampleTime "-1"
536	OutMin "[]"
537	OutMax "[]"
538	DataType "auto"
539	OutDataType "fixdt(1,16,0)"
540	OutScaling "[]"
541	OutDataTypeStr "Inherit: auto"
542	SignalType "auto"
543	SamplingMode "auto"
544	OutputWhenDisabled "held"
545	InitialOutput "[]"
546	}
547	Block {
548	BlockType Scope
549	ModelBased off
550	TickLabels "OneTimeTick"
551	ZoomMode "on"
552	Grid "on"
553	TimeRange "auto"
554	YMin "-5"
555	YMax "5"
556	SaveToWorkspace off
557	SaveName "ScopeData"
558	LimitDataPoints on
559	MaxDataPoints "5000"
560	Decimation "1"
561	SampleInput off
562	SampleTime "-1"
563	}
564	Block {
565	BlockType "S-Function"
566	FunctionName "system"
567	SFunctionModules "''"
568	PortCounts "[]"
569	SFunctionDeploymentMode off
570	}
571	Block {
572	BlockType SubSystem
573	ShowPortLabels "FromPortIcon"
574	Permissions "ReadWrite"
575	PermitHierarchicalResolution "All"
576	TreatAsAtomicUnit off
577	CheckFcnCallInpInsideContextMsg off
578	SystemSampleTime "-1"
579	RTWFcnNameOpts "Auto"
580	RTWFileNameOpts "Auto"
581	RTWMemSecFuncInitTerm "Inherit from model"
582	RTWMemSecFuncExecute "Inherit from model"
583	RTWMemSecDataConstants "Inherit from model"
584	RTWMemSecDataInternal "Inherit from model"
585	RTWMemSecDataParameters "Inherit from model"
586	SimViewingDevice off
587	DataTypeOverride "UseLocalSettings"
588	MinMaxOverflowLogging "UseLocalSettings"
589	}
590	Block {
591	BlockType Terminator
592	}
593	Block {
594	BlockType Constant
595	Value "1"
596	VectorParams1D on
597	SamplingMode "Sample based"
598	OutMin "[]"
599	OutMax "[]"
600	OutDataTypeMode "Inherit from 'Constant value'"
601	OutDataType "fixdt(1,16,0)"
602	ConRadixGroup "Use specified scaling"
603	OutScaling "[]"
604	OutDataTypeStr "Inherit: Inherit from 'Constant value'"
605	SampleTime "inf"
606	FramePeriod "inf"
607	}
608	Block {
609	BlockType DiscretePulseGenerator
610	PulseType "Sample based"
611	TimeSource "Use simulation time"
612	Amplitude "1"
613	Period "2"
614	PulseWidth "1"
615	PhaseDelay "0"
616	SampleTime "1"
617	VectorParams1D on
618	}
619	}
620	AnnotationDefaults {
621	HorizontalAlignment "center"
622	VerticalAlignment "middle"
623	ForegroundColor "black"
624	BackgroundColor "white"
625	DropShadow off
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627	FontSize 10
628	FontWeight "normal"
629	FontAngle "normal"
630	UseDisplayTextAsClickCallback off
631	}
632	LineDefaults {
633	FontName "Arial"
634	FontSize 9
635	FontWeight "normal"
636	FontAngle "normal"
637	}
638	System {
639	Name "warplab_mimo_4x4"
640	Location [2, 70, 1894, 1150]
641	Open on
642	ModelBrowserVisibility off
643	ModelBrowserWidth 200
644	ScreenColor "white"
645	PaperOrientation "landscape"
646	PaperPositionMode "auto"
647	PaperType "usletter"
648	PaperUnits "inches"
649	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
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662	inputs "3"
663	en off
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666	arith_type "Unsigned"
667	n_bits "16"
668	bin_pt "0"
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670	dbl_ovrd off
671	xl_use_area off
672	xl_area "[0,0,0,0,0,0,0]"
673	has_advanced_control "0"
674	sggui_pos "20,20,348,261"
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677	sg_icon_stat "40,66,1,1,white,blue,0,bd50cad4,right"
678	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 ],[0 0 66 66 ],[0.77 0.82 0.91]);\npatch([10 3 12 3 10 21 24 27 38 29 20 14 24 14 20 29 38 27 24 21 10 ],[17 24 33 42 49 49 46 49 49 40 49 43 33 23 17 26 17 17 20 17 17 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 66 66 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
679	}
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686	SourceType "Xilinx Logical Block Block"
687	logical_function "OR"
688	inputs "2"
689	en off
690	latency "0"
691	precision "Full"
692	arith_type "Unsigned"
693	n_bits "16"
694	bin_pt "0"
695	align_bp on
696	dbl_ovrd off
697	xl_use_area off
698	xl_area "[0,0,0,0,0,0,0]"
699	has_advanced_control "0"
700	sggui_pos "-1,-1,-1,-1"
701	block_type "logical"
702	block_version "9.1.01"
703	sg_icon_stat "40,56,1,1,white,blue,0,f4a65842,right"
704	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
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714	UserDataPersistent on
715	UserData "DataTag0"
716	SourceBlock "xbsIndex_r4/ System Generator"
717	SourceType "Xilinx System Generator Block"
718	ShowPortLabels "FromPortIcon"
719	SystemSampleTime "-1"
720	FunctionWithSeparateData off
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722	RTWMemSecFuncExecute "Inherit from model"
723	RTWMemSecDataConstants "Inherit from model"
724	RTWMemSecDataInternal "Inherit from model"
725	RTWMemSecDataParameters "Inherit from model"
726	infoedit " System Generator"
727	xilinxfamily "virtex2p"
728	part "xc2vp70"
729	speed "-6"
730	package "ff1517"
731	synthesis_tool "XST"
732	clock_wrapper "Clock Enables"
733	directory "C:/localhome/sgupta/tmp/netlist_4x4_v1"
734	testbench off
735	simulink_period "1"
736	sysclk_period "10"
737	dcm_input_clock_period "100"
738	incr_netlist off
739	trim_vbits "Everywhere in SubSystem"
740	dbl_ovrd "According to Block Masks"
741	core_generation "According to Block Masks"
742	run_coregen off
743	deprecated_control off
744	eval_field "0"
745	has_advanced_control "0"
746	sggui_pos "-1,-1,-1,-1"
747	block_type "sysgen"
748	block_version "10.1.3"
749	sg_icon_stat "51,50,-1,-1,red,beige,0,07734,right"
750	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 51 51 0 ],[0 0 50 50 ],[0.93 0.92 0.86]);\npatch([12 4 16 4 12 25 29 33 47 36 25 17 29 17 25 36 47 33 29 25 12 ],[5 13 25 37 45 45 41 45 45 34 45 37 25 13 5 16 5 5 9 5 5 ],[0.6 0.2 0.25]);\nplot([0 51 51 0 0 ],[0 0 50 50 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n"
751	}
752	Block {
753	BlockType Reference
754	Name "AGC_Done"
755	Ports [1, 1]
756	Position [130, 1014, 185, 1026]
757	NamePlacement "alternate"
758	SourceBlock "xbsIndex_r4/Gateway In"
759	SourceType "Xilinx Gateway In Block"
760	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
761	arith_type "Unsigned"
762	n_bits "1"
763	bin_pt "0"
764	quantization "Round (unbiased: +/- Inf)"
765	overflow "Saturate"
766	period "1"
767	dbl_ovrd off
768	timing_constraint "None"
769	locs_specified off
770	LOCs "{}"
771	xl_use_area off
772	xl_area "[0,0,0,0,0,0,0]"
773	has_advanced_control "0"
774	sggui_pos "20,20,356,432"
775	block_type "gatewayin"
776	block_version "VER_STRING_GOES_HERE"
777	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
778	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
779	}
780	Block {
781	BlockType Reference
782	Name "Convert2"
783	Ports [1, 1]
784	Position [420, 1011, 455, 1029]
785	ShowName off
786	SourceBlock "xbsIndex_r4/Convert"
787	SourceType "Xilinx Type Converter Block"
788	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
789	arith_type "Boolean"
790	n_bits "16"
791	bin_pt "14"
792	quantization "Truncate"
793	overflow "Wrap"
794	latency "0"
795	dbl_ovrd off
796	pipeline off
797	xl_use_area off
798	xl_area "[0,0,0,0,0,0,0]"
799	has_advanced_control "0"
800	sggui_pos "20,20,461,375"
801	block_type "convert"
802	block_version "8.2"
803	sg_icon_stat "35,18,1,1,white,blue,0,74901e60,right"
804	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
805	}
806	Block {
807	BlockType SubSystem
808	Name "EDK Processor"
809	Ports []
810	Position [146, 23, 208, 87]
811	CopyFcn "xlProcBlockCopyCallback(gcbh);xlBlockMoveCallback(gcbh);"
812	DeleteFcn "xlDestroyGui(gcbh);"
813	LoadFcn "xlBlockLoadCallback(gcbh);"
814	ModelCloseFcn "xlDestroyGui(gcbh);"
815	PreSaveFcn "xlBlockPreSaveCallback(gcbh);"
816	PostSaveFcn "xlBlockPostSaveCallback(gcbh);"
817	DestroyFcn "xlDestroyGui(gcbh);"
818	OpenFcn "bh=gcbh;xlProcBlockCallbacks('populatesharedmemorylistbox',bh);xlOpenGui(bh, 'edkprocessor_gui.xml', @xlProcBlockEnablement, @xlProcBlockAction)"
819	CloseFcn "xlDestroyGui(gcbh);"
820	MoveFcn "xlBlockMoveCallback(gcbh);"
821	MinAlgLoopOccurrences off
822	PropExecContextOutsideSubsystem off
823	RTWSystemCode "Auto"
824	FunctionWithSeparateData off
825	Opaque off
826	RequestExecContextInheritance off
827	MaskHideContents off
828	MaskType "Xilinx EDK Processor Block"
829	MaskDescription "Xilinx EDK Processor"
830	MaskHelp "eval('');xlDoc('-book','sysgen','-topic','EDK_Processor');"
831	MaskPromptString "Configure Processor for\|EDK Project\| \|Available Memories\| \| \|Bus Type\|Base Address\| \|Lock\| \|Dual Clocks\| \|Register Read-Back\|Constraint file\| \|Inherit Device Type\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| "
832	MaskStyleString "popup(EDK pcore generation\|HDL netlisting),edit,edit,popup(<empty>),edit,edit,popup(PLB\|FSL),edit,edit,checkbox,edit,checkbox,edit,checkbox,edit,edit,checkbox,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit"
833	MaskTunableValueString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
834	MaskCallbackString "\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|\|"
835	MaskEnableString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
836	MaskVisibilityString "on,on,off,on,on,off,on,on,off,on,off,on,off,on,on,off,on,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off"
837	MaskToolTipString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on"
838	MaskVarAliasString ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
839	MaskVariables "mode=&1;xmp=&2;MemVisToProc=&3;AvailableMemories=&4;portInterfaceTable=&5;bus_type_sgadvanced=&6;bus_type=@7;baseaddr=&8;baseaddr_lock_sgadvanced=&9;baseaddr_lock=@10;dual_clock_sgadvanced=&11;dual_clock=@12;reg_readback_sgadvanced=&13;reg_readback=@14;ucf_file=&15;inheritDeviceType_sgadvanced=&16;inheritDeviceType=@17;clock_name=&18;internalPortList=&19;resetPolarity=&20;memxtable=&21;procinfo=&22;memmapdirty=&23;blockname=&24;xpsintstyle=&25;has_advanced_control=@26;sggui_pos=&27;block_type=&28;block_version=&29;sg_icon_stat=&30;sg_mask_display=&31;sg_list_contents=&32;sg_blockgui_xml=&33;"
840	MaskInitialization "try\n tmp_gcb = gcb;\n tmp_gcbh = gcbh;\n if (strcmp('SysGenIndex',get_param(bdroot(tmp_gcbh),'tag')) && ~isempty(regexp(bdroot(tmp_gcb), '^xbs', 'once')))\n return;\n end;\n xlMungeMaskParams;\n\nblock_type='edkprocessor';\n serialized_declarations = '{,''block_type''=>''String''}';\n xledkprocessor_init();\n ptable_ = xlblockprep(get_param(tmp_gcb, 'MaskWSVariables'));\ncatch\n global dbgsysgen;\n if(~isempty(dbgsysgen) && dbgsysgen)\n e = regexprep(lasterr, '\\n', '\\nError: ');\n disp(['Error: While running MaskInit code on block ' tmp_gcb ': ' e]);\n error(e);\n end\nend\n"
841	MaskDisplay "fprintf('','COMMENT: begin icon graphics');\npatch([0 62 62 0 ],[0 0 64 64 ],[0.77 0.82 0.91]);\npatch([14 4 19 4 14 30 34 38 56 42 29 19 33 19 29 42 56 38 34 30 14 ],[8 18 33 48 58 58 54 58 58 44 57 47 33 19 9 22 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 62 62 0 0 ],[0 0 64 64 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ndisp('');\n\nfprintf('','COMMENT: end icon text');\n"
842	MaskSelfModifiable on
843	MaskIconFrame off
844	MaskIconOpaque on
845	MaskIconRotate "none"
846	MaskIconUnits "autoscale"
847	MaskValueString "EDK pcore generation\|\|<qt bgcolor=\"#FFFFFF\"><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<AGCDoneAddr>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<CaptureDone>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<DCO_EN_SEL>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<DebugRx1Buffers>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<DebugRx2Buffers>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<DebugRx3Buffers>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<DebugRx4Buffers>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<MGC_AGC_SEL>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<RADIO1RXBUFF_RXEN>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<RADIO1TXBUFF_TXEN>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<RADIO2RXBUFF_RXEN>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<RADIO2TXBUFF_TXEN>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<RADIO3RXBUFF_RXEN>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<RADIO3TXBUFF_TXEN>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<RADIO4RXBUFF_RXEN>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<RADIO4TXBUFF_TXEN>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<Radio1AGCDoneRSSI>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<Radio2AGCDoneRSSI>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<Radio3AGCDoneRSSI>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<Radio4AGCDoneRSSI>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<StartCapture>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<StartTx>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<StopTx>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<TransMode>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<TxDelay>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<TxLength>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\registerplus.gif\"> <<StartTxRx>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<RxBuff_Radio1>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<RxBuff_Radio2>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<RxBuff_Radio3>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<RxBuff_Radio4>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<TxBuff_Radio1>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<TxBuff_Radio2>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<TxBuff_Radio3>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<TxBuff_Radio4>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<RSSIBuff_Radio1>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<RSSIBuff_Radio2>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<RSSIBuff_Radio3>><br></div><div><img src=\"C:\\Xilinx\\10.1\\DSP_Tools\\common\\bin\\..\\..\\sysgen\\data\\images\\memoryplus.gif\"> <<RSSIBuff_Radio4>><br></div></qt>\|<empty>\|{'exposed'=>[],'portdir'=>[],'portname'=>[],'shortname'=>[]}\|\|PLB\|0x80000000\|\|off\|\|on\|\|on\|\|\|off\|plb\|{}\|0\|{'mlist'=>['warplab_mimo_4x4/Memmory-mapped Registers/AGCDoneAddr','warplab_mimo_4x4/Memmory-mapped Registers/To Register','warplab_mimo_4x4/Memmory-mapped Registers/From Register14','warplab_mimo_4x4/Memmory-mapped Registers/DebugRx1Buffers','warplab_mimo_4x4/Memmory-mapped Registers/DebugRx2Buffers','warplab_mimo_4x4/Memmory-mapped Registers/DebugRx3Buffers','warplab_mimo_4x4/Memmory-mapped Registers/DebugRx4Buffers','warplab_mimo_4x4/Memmory-mapped Registers/From Register13','warplab_mimo_4x4/Memmory-mapped Registers/From Register1','warplab_mimo_4x4/Memmory-mapped Registers/From Register6','warplab_mimo_4x4/Memmory-mapped Registers/From Register5','warplab_mimo_4x4/Memmory-mapped Registers/From Register9','warplab_mimo_4x4/Memmory-mapped Registers/From Register11','warplab_mimo_4x4/Memmory-mapped Registers/From Register10','warplab_mimo_4x4/Memmory-mapped Registers/From Register3','warplab_mimo_4x4/Memmory-mapped Registers/From Register12','warplab_mimo_4x4/Memmory-mapped Registers/Radio1AGCDoneRSSI','warplab_mimo_4x4/Memmory-mapped Registers/Radio2AGCDoneRSSI','warplab_mimo_4x4/Memmory-mapped Registers/Radio3AGCDoneRSSI','warplab_mimo_4x4/Memmory-mapped Registers/Radio4AGCDoneRSSI','warplab_mimo_4x4/Memmory-mapped Registers/From Register2','warplab_mimo_4x4/Memmory-mapped Registers/From Register4','warplab_mimo_4x4/Memmory-mapped Registers/From Register7','warplab_mimo_4x4/Memmory-mapped Registers/From Register8','warplab_mimo_4x4/Memmory-mapped Registers/TxDelay','warplab_mimo_4x4/Tx Control/From Register4','warplab_mimo_4x4/Memmory-mapped Registers/From Register15','warplab_mimo_4x4/Radio 1\nRx Buffers/Radio 1 I//Q\nBuffer/Shared Memory','warplab_mimo_4x4/Radio 2\nRx Buffers/Radio 2 I//Q\nBuffer/Shared Memory','warplab_mimo_4x4/Radio 3\nRx Buffers/Radio 3 I//Q\nBuffer/Shared Memory','warplab_mimo_4x4/Radio 4\nRx Buffers/Radio 4 I//Q\nBuffer/Shared Memory','warplab_mimo_4x4/Radio 1\nTx Buffer/Shared Memory','warplab_mimo_4x4/Radio 2\nTx Buffer/Shared Memory','warplab_mimo_4x4/Radio 3\nTx Buffer/Shared Memory','warplab_mimo_4x4/Radio 4\nTx Buffer/Shared Memory','warplab_mimo_4x4/Radio 1\nRx Buffers/Radio 1\nRSSI Buffer/Shared Memory','warplab_mimo_4x4/Radio 2\nRx Buffers/Radio 2\nRSSI Buffer/Shared Memory','warplab_mimo_4x4/Radio 3\nRx Buffers/Radio 3\nRSSI Buffer/Shared Memory','warplab_mimo_4x4/Radio 4\nRx Buffers/Radio 4\nRSSI Buffer/Shared Memory'],'mlname'=>['\\'AGCDoneAddr\\'','\\'CaptureDone\\'','\\'DCO_EN_SEL\\'','\\'DebugRx1Buffers\\'','\\'DebugRx2Buffers\\'','\\'DebugRx3Buffers\\'','\\'DebugRx4Buffers\\'','\\'MGC_AGC_SEL\\'','\\'RADIO1RXBUFF_RXEN\\'','\\'RADIO1TXBUFF_TXEN\\'','\\'RADIO2RXBUFF_RXEN\\'','\\'RADIO2TXBUFF_TXEN\\'','\\'RADIO3RXBUFF_RXEN\\'','\\'RADIO3TXBUFF_TXEN\\'','\\'RADIO4RXBUFF_RXEN\\'','\\'RADIO4TXBUFF_TXEN\\'','\\'Radio1AGCDoneRSSI\\'','\\'Radio2AGCDoneRSSI\\'','\\'Radio3AGCDoneRSSI\\'','\\'Radio4AGCDoneRSSI\\'','\\'StartCapture\\'','\\'StartTx\\'','\\'StopTx\\'','\\'TransMode\\'','\\'TxDelay\\'','\\'TxLength\\'','\\'StartTxRx\\'','\\'RxBuff_Radio1\\'','\\'RxBuff_Radio2\\'','\\'RxBuff_Radio3\\'','\\'RxBuff_Radio4\\'','\\'TxBuff_Radio1\\'','\\'TxBuff_Radio2\\'','\\'TxBuff_Radio3\\'','\\'TxBuff_Radio4\\'','\\'RSSIBuff_Radio1\\'','\\'RSSIBuff_Radio2\\'','\\'RSSIBuff_Radio3\\'','\\'RSSIBuff_Radio4\\''],'mlstate'=>[0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000]}\|{'xmliface'=>'Xilinx//microblaze//iface.xml'}\|off\|\|default\|0\|55,59,383,441\|edkprocessor\|2.5\|62,64,-1,-1,white,blue,0,07734,right\|fprintf('','COMMENT: begin icon graphics');\npatch([0 62 62 0 ],[0 0 64 64 ],[0.77 0.82 0.91]);\npatch([14 4 19 4 14 30 34 38 56 42 29 19 33 19 29 42 56 38 34 30 14 ],[8 18 33 48 58 58 54 58 58 44 57 47 33 19 9 22 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 62 62 0 0 ],[0 0 64 64 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n\|{'table'=>{'AvailableMemories'=>'popup(<empty>)','userSelections'=>{'AvailableMemories'=>'<empty>'}}}\|"
848	MaskTabNameString ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,"
849	System {
850	Name "EDK Processor"
851	Location [514, 91, 900, 269]
852	Open off
853	ModelBrowserVisibility off
854	ModelBrowserWidth 200
855	ScreenColor "white"
856	PaperOrientation "landscape"
857	PaperPositionMode "auto"
858	PaperType "usletter"
859	PaperUnits "inches"
860	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
861	TiledPageScale 1
862	ShowPageBoundaries off
863	ZoomFactor "100"
864	Block {
865	BlockType Constant
866	Name "Constant"
867	Position [40, 565, 60, 585]
868	}
869	Block {
870	BlockType Constant
871	Name "Constant1"
872	Position [40, 625, 60, 645]
873	}
874	Block {
875	BlockType Constant
876	Name "Constant2"
877	Position [40, 680, 60, 700]
878	}
879	Block {
880	BlockType Constant
881	Name "Constant3"
882	Position [40, 740, 60, 760]
883	}
884	Block {
885	BlockType Constant
886	Name "Constant4"
887	Position [40, 800, 60, 820]
888	}
889	Block {
890	BlockType Reference
891	Name "Constant5"
892	Ports [0, 1]
893	Position [20, 492, 75, 518]
894	ShowName off
895	SourceBlock "xbsIndex_r4/Constant"
896	SourceType "Xilinx Constant Block Block"
897	arith_type "Unsigned"
898	const "0"
899	n_bits "1"
900	bin_pt "0"
901	explicit_period on
902	period "xlGetSimulinkPeriod(gcb)"
903	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
904	equ "P=C"
905	opselect "C"
906	inp2 "PCIN>>17"
907	opr "+"
908	inp1 "P"
909	carry "CIN"
910	dbl_ovrd off
911	has_advanced_control "0"
912	sggui_pos "-1,-1,-1,-1"
913	block_type "constant"
914	block_version "10.1.3"
915	sg_icon_stat "55,26,1,1,white,blue,0,72d575a1,right"
916	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
917	Port {
918	PortNumber 1
919	Name "Sl_wait"
920	RTWStorageClass "Auto"
921	DataLoggingNameMode "SignalName"
922	}
923	}
924	Block {
925	BlockType Constant
926	Name "Constant6"
927	Position [40, 915, 60, 935]
928	}
929	Block {
930	BlockType Reference
931	Name "From Register"
932	Ports [0, 1]
933	Position [260, 1467, 320, 1523]
934	AttributesFormatString "<< %<shared_memory_name> >>"
935	SourceBlock "xbsIndex_r4/From Register"
936	SourceType "Xilinx Shared Memory Based From Register Block"
937	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
938	shared_memory_name "'AGCDoneAddr'"
939	init "0"
940	period "xlGetSimulinkPeriod(gcb)"
941	ownership "Owned and initialized elsewhere"
942	arith_type "Unsigned"
943	n_bits "14"
944	bin_pt "0"
945	dbl_ovrd off
946	xl_use_area off
947	xl_area "[0,0,0,0,0,0,0]"
948	has_advanced_control "0"
949	sggui_pos "-1,-1,-1,-1"
950	block_type "fromreg"
951	block_version "10.1.3"
952	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
953	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
954	Port {
955	PortNumber 1
956	Name "AGCDoneAddr_dout"
957	RTWStorageClass "Auto"
958	DataLoggingNameMode "SignalName"
959	}
960	}
961	Block {
962	BlockType Reference
963	Name "From Register1"
964	Ports [0, 1]
965	Position [260, 1552, 320, 1608]
966	AttributesFormatString "<< %<shared_memory_name> >>"
967	SourceBlock "xbsIndex_r4/From Register"
968	SourceType "Xilinx Shared Memory Based From Register Block"
969	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
970	shared_memory_name "'CaptureDone'"
971	init "0"
972	period "xlGetSimulinkPeriod(gcb)"
973	ownership "Owned and initialized elsewhere"
974	arith_type "Unsigned"
975	n_bits "1"
976	bin_pt "0"
977	dbl_ovrd off
978	xl_use_area off
979	xl_area "[0,0,0,0,0,0,0]"
980	has_advanced_control "0"
981	sggui_pos "-1,-1,-1,-1"
982	block_type "fromreg"
983	block_version "10.1.3"
984	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
985	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
986	Port {
987	PortNumber 1
988	Name "CaptureDone_dout"
989	RTWStorageClass "Auto"
990	DataLoggingNameMode "SignalName"
991	}
992	}
993	Block {
994	BlockType Reference
995	Name "From Register2"
996	Ports [0, 1]
997	Position [260, 1637, 320, 1693]
998	AttributesFormatString "<< %<shared_memory_name> >>"
999	SourceBlock "xbsIndex_r4/From Register"
1000	SourceType "Xilinx Shared Memory Based From Register Block"
1001	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
1002	shared_memory_name "'Radio1AGCDoneRSSI'"
1003	init "0"
1004	period "xlGetSimulinkPeriod(gcb)"
1005	ownership "Owned and initialized elsewhere"
1006	arith_type "Unsigned"
1007	n_bits "10"
1008	bin_pt "0"
1009	dbl_ovrd off
1010	xl_use_area off
1011	xl_area "[0,0,0,0,0,0,0]"
1012	has_advanced_control "0"
1013	sggui_pos "-1,-1,-1,-1"
1014	block_type "fromreg"
1015	block_version "10.1.3"
1016	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
1017	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1018	Port {
1019	PortNumber 1
1020	Name "Radio1AGCDoneRSSI_dout"
1021	RTWStorageClass "Auto"
1022	DataLoggingNameMode "SignalName"
1023	}
1024	}
1025	Block {
1026	BlockType Reference
1027	Name "From Register3"
1028	Ports [0, 1]
1029	Position [260, 1727, 320, 1783]
1030	AttributesFormatString "<< %<shared_memory_name> >>"
1031	SourceBlock "xbsIndex_r4/From Register"
1032	SourceType "Xilinx Shared Memory Based From Register Block"
1033	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
1034	shared_memory_name "'Radio2AGCDoneRSSI'"
1035	init "0"
1036	period "xlGetSimulinkPeriod(gcb)"
1037	ownership "Owned and initialized elsewhere"
1038	arith_type "Unsigned"
1039	n_bits "10"
1040	bin_pt "0"
1041	dbl_ovrd off
1042	xl_use_area off
1043	xl_area "[0,0,0,0,0,0,0]"
1044	has_advanced_control "0"
1045	sggui_pos "-1,-1,-1,-1"
1046	block_type "fromreg"
1047	block_version "10.1.3"
1048	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
1049	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1050	Port {
1051	PortNumber 1
1052	Name "Radio2AGCDoneRSSI_dout"
1053	RTWStorageClass "Auto"
1054	DataLoggingNameMode "SignalName"
1055	}
1056	}
1057	Block {
1058	BlockType Reference
1059	Name "From Register4"
1060	Ports [0, 1]
1061	Position [260, 1812, 320, 1868]
1062	AttributesFormatString "<< %<shared_memory_name> >>"
1063	SourceBlock "xbsIndex_r4/From Register"
1064	SourceType "Xilinx Shared Memory Based From Register Block"
1065	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
1066	shared_memory_name "'Radio3AGCDoneRSSI'"
1067	init "0"
1068	period "xlGetSimulinkPeriod(gcb)"
1069	ownership "Owned and initialized elsewhere"
1070	arith_type "Unsigned"
1071	n_bits "10"
1072	bin_pt "0"
1073	dbl_ovrd off
1074	xl_use_area off
1075	xl_area "[0,0,0,0,0,0,0]"
1076	has_advanced_control "0"
1077	sggui_pos "-1,-1,-1,-1"
1078	block_type "fromreg"
1079	block_version "10.1.3"
1080	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
1081	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1082	Port {
1083	PortNumber 1
1084	Name "Radio3AGCDoneRSSI_dout"
1085	RTWStorageClass "Auto"
1086	DataLoggingNameMode "SignalName"
1087	}
1088	}
1089	Block {
1090	BlockType Reference
1091	Name "From Register5"
1092	Ports [0, 1]
1093	Position [260, 1897, 320, 1953]
1094	AttributesFormatString "<< %<shared_memory_name> >>"
1095	SourceBlock "xbsIndex_r4/From Register"
1096	SourceType "Xilinx Shared Memory Based From Register Block"
1097	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
1098	shared_memory_name "'Radio4AGCDoneRSSI'"
1099	init "0"
1100	period "xlGetSimulinkPeriod(gcb)"
1101	ownership "Owned and initialized elsewhere"
1102	arith_type "Unsigned"
1103	n_bits "10"
1104	bin_pt "0"
1105	dbl_ovrd off
1106	xl_use_area off
1107	xl_area "[0,0,0,0,0,0,0]"
1108	has_advanced_control "0"
1109	sggui_pos "-1,-1,-1,-1"
1110	block_type "fromreg"
1111	block_version "10.1.3"
1112	sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right"
1113	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1114	Port {
1115	PortNumber 1
1116	Name "Radio4AGCDoneRSSI_dout"
1117	RTWStorageClass "Auto"
1118	DataLoggingNameMode "SignalName"
1119	}
1120	}
1121	Block {
1122	BlockType Reference
1123	Name "PLB_ABus"
1124	Ports [1, 1]
1125	Position [110, 625, 175, 645]
1126	SourceBlock "xbsIndex_r4/Gateway In"
1127	SourceType "Xilinx Gateway In Block"
1128	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
1129	arith_type "Unsigned"
1130	n_bits "32"
1131	bin_pt "0"
1132	quantization "Round (unbiased: +/- Inf)"
1133	overflow "Saturate"
1134	period "xlGetSimulinkPeriod(gcb)"
1135	dbl_ovrd off
1136	timing_constraint "None"
1137	locs_specified off
1138	LOCs "{}"
1139	xl_use_area off
1140	xl_area "[0,0,0,0,0,0,0]"
1141	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_ABus'}},'iopad'=>{'constraint'=>'#'}}"
1142	has_advanced_control "0"
1143	sggui_pos "-1,-1,-1,-1"
1144	block_type "gatewayin"
1145	block_version "10.1.3"
1146	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
1147	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
1148	Port {
1149	PortNumber 1
1150	Name "PLB_ABus"
1151	RTWStorageClass "Auto"
1152	DataLoggingNameMode "SignalName"
1153	}
1154	}
1155	Block {
1156	BlockType Reference
1157	Name "PLB_PAValid"
1158	Ports [1, 1]
1159	Position [110, 680, 175, 700]
1160	SourceBlock "xbsIndex_r4/Gateway In"
1161	SourceType "Xilinx Gateway In Block"
1162	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
1163	arith_type "Unsigned"
1164	n_bits "1"
1165	bin_pt "0"
1166	quantization "Round (unbiased: +/- Inf)"
1167	overflow "Saturate"
1168	period "xlGetSimulinkPeriod(gcb)"
1169	dbl_ovrd off
1170	timing_constraint "None"
1171	locs_specified off
1172	LOCs "{}"
1173	xl_use_area off
1174	xl_area "[0,0,0,0,0,0,0]"
1175	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_PAValid'}},'iopad'=>{'constraint'=>'#'}}"
1176	has_advanced_control "0"
1177	sggui_pos "-1,-1,-1,-1"
1178	block_type "gatewayin"
1179	block_version "10.1.3"
1180	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
1181	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
1182	Port {
1183	PortNumber 1
1184	Name "PLB_PAValid"
1185	RTWStorageClass "Auto"
1186	DataLoggingNameMode "SignalName"
1187	}
1188	}
1189	Block {
1190	BlockType Reference
1191	Name "PLB_RNW"
1192	Ports [1, 1]
1193	Position [110, 740, 175, 760]
1194	SourceBlock "xbsIndex_r4/Gateway In"
1195	SourceType "Xilinx Gateway In Block"
1196	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
1197	arith_type "Unsigned"
1198	n_bits "1"
1199	bin_pt "0"
1200	quantization "Round (unbiased: +/- Inf)"
1201	overflow "Saturate"
1202	period "xlGetSimulinkPeriod(gcb)"
1203	dbl_ovrd off
1204	timing_constraint "None"
1205	locs_specified off
1206	LOCs "{}"
1207	xl_use_area off
1208	xl_area "[0,0,0,0,0,0,0]"
1209	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_RNW'}},'iopad'=>{'constraint'=>'#'}}"
1210	has_advanced_control "0"
1211	sggui_pos "-1,-1,-1,-1"
1212	block_type "gatewayin"
1213	block_version "10.1.3"
1214	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
1215	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
1216	Port {
1217	PortNumber 1
1218	Name "PLB_RNW"
1219	RTWStorageClass "Auto"
1220	DataLoggingNameMode "SignalName"
1221	}
1222	}
1223	Block {
1224	BlockType Reference
1225	Name "PLB_wrDBus"
1226	Ports [1, 1]
1227	Position [110, 800, 175, 820]
1228	SourceBlock "xbsIndex_r4/Gateway In"
1229	SourceType "Xilinx Gateway In Block"
1230	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
1231	arith_type "Unsigned"
1232	n_bits "32"
1233	bin_pt "0"
1234	quantization "Round (unbiased: +/- Inf)"
1235	overflow "Saturate"
1236	period "xlGetSimulinkPeriod(gcb)"
1237	dbl_ovrd off
1238	timing_constraint "None"
1239	locs_specified off
1240	LOCs "{}"
1241	xl_use_area off
1242	xl_area "[0,0,0,0,0,0,0]"
1243	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_wrDBus'}},'iopad'=>{'constraint'=>'#'}}"
1244	has_advanced_control "0"
1245	sggui_pos "-1,-1,-1,-1"
1246	block_type "gatewayin"
1247	block_version "10.1.3"
1248	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
1249	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
1250	Port {
1251	PortNumber 1
1252	Name "PLB_wrDBus"
1253	RTWStorageClass "Auto"
1254	DataLoggingNameMode "SignalName"
1255	}
1256	}
1257	Block {
1258	BlockType Reference
1259	Name "SPLB_Rst"
1260	Ports [1, 1]
1261	Position [110, 565, 175, 585]
1262	SourceBlock "xbsIndex_r4/Gateway In"
1263	SourceType "Xilinx Gateway In Block"
1264	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
1265	arith_type "Unsigned"
1266	n_bits "1"
1267	bin_pt "0"
1268	quantization "Round (unbiased: +/- Inf)"
1269	overflow "Saturate"
1270	period "xlGetSimulinkPeriod(gcb)"
1271	dbl_ovrd off
1272	timing_constraint "None"
1273	locs_specified off
1274	LOCs "{}"
1275	xl_use_area off
1276	xl_area "[0,0,0,0,0,0,0]"
1277	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'SPLB_Rst'}},'iopad'=>{'constraint'=>'#'}}"
1278	has_advanced_control "0"
1279	sggui_pos "-1,-1,-1,-1"
1280	block_type "gatewayin"
1281	block_version "10.1.3"
1282	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
1283	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
1284	Port {
1285	PortNumber 1
1286	Name "SPLB_Rst"
1287	RTWStorageClass "Auto"
1288	DataLoggingNameMode "SignalName"
1289	}
1290	}
1291	Block {
1292	BlockType Reference
1293	Name "Shared Memory"
1294	Ports [3, 1]
1295	Position [605, 2145, 685, 2235]
1296	AttributesFormatString "<< %<shared_memory_name> >>"
1297	SourceBlock "xbsIndex_r4/Shared Memory"
1298	SourceType "Xilinx Shared Memory Random Access Memory Block"
1299	shared_memory_name "'RxBuff_Radio1'"
1300	depth "16384"
1301	ownership "Owned and Initialized Elsewhere"
1302	initVector "sin(pi*(0:15)/16)"
1303	mutex "Unprotected"
1304	mode "Read and Write"
1305	write_mode "Read After Write"
1306	time_out "0"
1307	latency "1"
1308	explicit_data_type off
1309	arith_type "Unsigned"
1310	n_bits "32"
1311	bin_pt "0"
1312	xl_use_area off
1313	xl_area "[0,0,0,0,0,0,0]"
1314	implementation "Block RAM"
1315	use_rpm "off"
1316	has_advanced_control "0"
1317	sggui_pos "-1,-1,-1,-1"
1318	block_type "shmem"
1319	block_version "10.1.3"
1320	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
1321	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1322	Port {
1323	PortNumber 1
1324	Name "RxBuff_Radio1_dout"
1325	RTWStorageClass "Auto"
1326	DataLoggingNameMode "SignalName"
1327	}
1328	}
1329	Block {
1330	BlockType Reference
1331	Name "Shared Memory1"
1332	Ports [3, 1]
1333	Position [605, 2269, 685, 2361]
1334	AttributesFormatString "<< %<shared_memory_name> >>"
1335	SourceBlock "xbsIndex_r4/Shared Memory"
1336	SourceType "Xilinx Shared Memory Random Access Memory Block"
1337	shared_memory_name "'RxBuff_Radio2'"
1338	depth "16384"
1339	ownership "Owned and Initialized Elsewhere"
1340	initVector "sin(pi*(0:15)/16)"
1341	mutex "Unprotected"
1342	mode "Read and Write"
1343	write_mode "Read After Write"
1344	time_out "0"
1345	latency "1"
1346	explicit_data_type off
1347	arith_type "Unsigned"
1348	n_bits "32"
1349	bin_pt "0"
1350	xl_use_area off
1351	xl_area "[0,0,0,0,0,0,0]"
1352	implementation "Block RAM"
1353	use_rpm "off"
1354	has_advanced_control "0"
1355	sggui_pos "-1,-1,-1,-1"
1356	block_type "shmem"
1357	block_version "10.1.3"
1358	sg_icon_stat "80,92,1,1,white,blue,0,e2c38f9a,right"
1359	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 92 92 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[15 28 47 66 79 79 73 79 79 61 78 66 47 28 16 33 15 15 21 15 15 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1360	Port {
1361	PortNumber 1
1362	Name "RxBuff_Radio2_dout"
1363	RTWStorageClass "Auto"
1364	DataLoggingNameMode "SignalName"
1365	}
1366	}
1367	Block {
1368	BlockType Reference
1369	Name "Shared Memory10"
1370	Ports [3, 1]
1371	Position [605, 3359, 685, 3451]
1372	AttributesFormatString "<< %<shared_memory_name> >>"
1373	SourceBlock "xbsIndex_r4/Shared Memory"
1374	SourceType "Xilinx Shared Memory Random Access Memory Block"
1375	shared_memory_name "'RSSIBuff_Radio3'"
1376	depth "2048"
1377	ownership "Owned and Initialized Elsewhere"
1378	initVector "sin(pi*(0:15)/16)"
1379	mutex "Unprotected"
1380	mode "Read and Write"
1381	write_mode "Read After Write"
1382	time_out "0"
1383	latency "1"
1384	explicit_data_type off
1385	arith_type "Unsigned"
1386	n_bits "32"
1387	bin_pt "0"
1388	xl_use_area off
1389	xl_area "[0,0,0,0,0,0,0]"
1390	implementation "Block RAM"
1391	use_rpm "off"
1392	has_advanced_control "0"
1393	sggui_pos "-1,-1,-1,-1"
1394	block_type "shmem"
1395	block_version "10.1.3"
1396	sg_icon_stat "80,92,1,1,white,blue,0,e2c38f9a,right"
1397	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 92 92 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[15 28 47 66 79 79 73 79 79 61 78 66 47 28 16 33 15 15 21 15 15 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1398	Port {
1399	PortNumber 1
1400	Name "RSSIBuff_Radio3_dout"
1401	RTWStorageClass "Auto"
1402	DataLoggingNameMode "SignalName"
1403	}
1404	}
1405	Block {
1406	BlockType Reference
1407	Name "Shared Memory11"
1408	Ports [3, 1]
1409	Position [605, 3479, 685, 3571]
1410	AttributesFormatString "<< %<shared_memory_name> >>"
1411	SourceBlock "xbsIndex_r4/Shared Memory"
1412	SourceType "Xilinx Shared Memory Random Access Memory Block"
1413	shared_memory_name "'RSSIBuff_Radio4'"
1414	depth "2048"
1415	ownership "Owned and Initialized Elsewhere"
1416	initVector "sin(pi*(0:15)/16)"
1417	mutex "Unprotected"
1418	mode "Read and Write"
1419	write_mode "Read After Write"
1420	time_out "0"
1421	latency "1"
1422	explicit_data_type off
1423	arith_type "Unsigned"
1424	n_bits "32"
1425	bin_pt "0"
1426	xl_use_area off
1427	xl_area "[0,0,0,0,0,0,0]"
1428	implementation "Block RAM"
1429	use_rpm "off"
1430	has_advanced_control "0"
1431	sggui_pos "-1,-1,-1,-1"
1432	block_type "shmem"
1433	block_version "10.1.3"
1434	sg_icon_stat "80,92,1,1,white,blue,0,e2c38f9a,right"
1435	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 92 92 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[15 28 47 66 79 79 73 79 79 61 78 66 47 28 16 33 15 15 21 15 15 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1436	Port {
1437	PortNumber 1
1438	Name "RSSIBuff_Radio4_dout"
1439	RTWStorageClass "Auto"
1440	DataLoggingNameMode "SignalName"
1441	}
1442	}
1443	Block {
1444	BlockType Reference
1445	Name "Shared Memory2"
1446	Ports [3, 1]
1447	Position [605, 2389, 685, 2481]
1448	AttributesFormatString "<< %<shared_memory_name> >>"
1449	SourceBlock "xbsIndex_r4/Shared Memory"
1450	SourceType "Xilinx Shared Memory Random Access Memory Block"
1451	shared_memory_name "'RxBuff_Radio3'"
1452	depth "16384"
1453	ownership "Owned and Initialized Elsewhere"
1454	initVector "sin(pi*(0:15)/16)"
1455	mutex "Unprotected"
1456	mode "Read and Write"
1457	write_mode "Read After Write"
1458	time_out "0"
1459	latency "1"
1460	explicit_data_type off
1461	arith_type "Unsigned"
1462	n_bits "32"
1463	bin_pt "0"
1464	xl_use_area off
1465	xl_area "[0,0,0,0,0,0,0]"
1466	implementation "Block RAM"
1467	use_rpm "off"
1468	has_advanced_control "0"
1469	sggui_pos "-1,-1,-1,-1"
1470	block_type "shmem"
1471	block_version "10.1.3"
1472	sg_icon_stat "80,92,1,1,white,blue,0,e2c38f9a,right"
1473	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 92 92 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[15 28 47 66 79 79 73 79 79 61 78 66 47 28 16 33 15 15 21 15 15 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1474	Port {
1475	PortNumber 1
1476	Name "RxBuff_Radio3_dout"
1477	RTWStorageClass "Auto"
1478	DataLoggingNameMode "SignalName"
1479	}
1480	}
1481	Block {
1482	BlockType Reference
1483	Name "Shared Memory3"
1484	Ports [3, 1]
1485	Position [605, 2510, 685, 2600]
1486	AttributesFormatString "<< %<shared_memory_name> >>"
1487	SourceBlock "xbsIndex_r4/Shared Memory"
1488	SourceType "Xilinx Shared Memory Random Access Memory Block"
1489	shared_memory_name "'RxBuff_Radio4'"
1490	depth "16384"
1491	ownership "Owned and Initialized Elsewhere"
1492	initVector "sin(pi*(0:15)/16)"
1493	mutex "Unprotected"
1494	mode "Read and Write"
1495	write_mode "Read After Write"
1496	time_out "0"
1497	latency "1"
1498	explicit_data_type off
1499	arith_type "Unsigned"
1500	n_bits "32"
1501	bin_pt "0"
1502	xl_use_area off
1503	xl_area "[0,0,0,0,0,0,0]"
1504	implementation "Block RAM"
1505	use_rpm "off"
1506	has_advanced_control "0"
1507	sggui_pos "-1,-1,-1,-1"
1508	block_type "shmem"
1509	block_version "10.1.3"
1510	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
1511	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1512	Port {
1513	PortNumber 1
1514	Name "RxBuff_Radio4_dout"
1515	RTWStorageClass "Auto"
1516	DataLoggingNameMode "SignalName"
1517	}
1518	}
1519	Block {
1520	BlockType Reference
1521	Name "Shared Memory4"
1522	Ports [3, 1]
1523	Position [605, 2634, 685, 2726]
1524	AttributesFormatString "<< %<shared_memory_name> >>"
1525	SourceBlock "xbsIndex_r4/Shared Memory"
1526	SourceType "Xilinx Shared Memory Random Access Memory Block"
1527	shared_memory_name "'TxBuff_Radio1'"
1528	depth "16384"
1529	ownership "Owned and Initialized Elsewhere"
1530	initVector "sin(pi*(0:15)/16)"
1531	mutex "Unprotected"
1532	mode "Read and Write"
1533	write_mode "Read After Write"
1534	time_out "0"
1535	latency "1"
1536	explicit_data_type off
1537	arith_type "Unsigned"
1538	n_bits "32"
1539	bin_pt "0"
1540	xl_use_area off
1541	xl_area "[0,0,0,0,0,0,0]"
1542	implementation "Block RAM"
1543	use_rpm "off"
1544	has_advanced_control "0"
1545	sggui_pos "-1,-1,-1,-1"
1546	block_type "shmem"
1547	block_version "10.1.3"
1548	sg_icon_stat "80,92,1,1,white,blue,0,e2c38f9a,right"
1549	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 92 92 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[15 28 47 66 79 79 73 79 79 61 78 66 47 28 16 33 15 15 21 15 15 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1550	Port {
1551	PortNumber 1
1552	Name "TxBuff_Radio1_dout"
1553	RTWStorageClass "Auto"
1554	DataLoggingNameMode "SignalName"
1555	}
1556	}
1557	Block {
1558	BlockType Reference
1559	Name "Shared Memory5"
1560	Ports [3, 1]
1561	Position [605, 2754, 685, 2846]
1562	AttributesFormatString "<< %<shared_memory_name> >>"
1563	SourceBlock "xbsIndex_r4/Shared Memory"
1564	SourceType "Xilinx Shared Memory Random Access Memory Block"
1565	shared_memory_name "'TxBuff_Radio2'"
1566	depth "16384"
1567	ownership "Owned and Initialized Elsewhere"
1568	initVector "sin(pi*(0:15)/16)"
1569	mutex "Unprotected"
1570	mode "Read and Write"
1571	write_mode "Read After Write"
1572	time_out "0"
1573	latency "1"
1574	explicit_data_type off
1575	arith_type "Unsigned"
1576	n_bits "32"
1577	bin_pt "0"
1578	xl_use_area off
1579	xl_area "[0,0,0,0,0,0,0]"
1580	implementation "Block RAM"
1581	use_rpm "off"
1582	has_advanced_control "0"
1583	sggui_pos "-1,-1,-1,-1"
1584	block_type "shmem"
1585	block_version "10.1.3"
1586	sg_icon_stat "80,92,1,1,white,blue,0,e2c38f9a,right"
1587	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 92 92 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[15 28 47 66 79 79 73 79 79 61 78 66 47 28 16 33 15 15 21 15 15 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1588	Port {
1589	PortNumber 1
1590	Name "TxBuff_Radio2_dout"
1591	RTWStorageClass "Auto"
1592	DataLoggingNameMode "SignalName"
1593	}
1594	}
1595	Block {
1596	BlockType Reference
1597	Name "Shared Memory6"
1598	Ports [3, 1]
1599	Position [605, 2875, 685, 2965]
1600	AttributesFormatString "<< %<shared_memory_name> >>"
1601	SourceBlock "xbsIndex_r4/Shared Memory"
1602	SourceType "Xilinx Shared Memory Random Access Memory Block"
1603	shared_memory_name "'TxBuff_Radio3'"
1604	depth "16384"
1605	ownership "Owned and Initialized Elsewhere"
1606	initVector "sin(pi*(0:15)/16)"
1607	mutex "Unprotected"
1608	mode "Read and Write"
1609	write_mode "Read After Write"
1610	time_out "0"
1611	latency "1"
1612	explicit_data_type off
1613	arith_type "Unsigned"
1614	n_bits "32"
1615	bin_pt "0"
1616	xl_use_area off
1617	xl_area "[0,0,0,0,0,0,0]"
1618	implementation "Block RAM"
1619	use_rpm "off"
1620	has_advanced_control "0"
1621	sggui_pos "-1,-1,-1,-1"
1622	block_type "shmem"
1623	block_version "10.1.3"
1624	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
1625	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1626	Port {
1627	PortNumber 1
1628	Name "TxBuff_Radio3_dout"
1629	RTWStorageClass "Auto"
1630	DataLoggingNameMode "SignalName"
1631	}
1632	}
1633	Block {
1634	BlockType Reference
1635	Name "Shared Memory7"
1636	Ports [3, 1]
1637	Position [605, 2994, 685, 3086]
1638	AttributesFormatString "<< %<shared_memory_name> >>"
1639	SourceBlock "xbsIndex_r4/Shared Memory"
1640	SourceType "Xilinx Shared Memory Random Access Memory Block"
1641	shared_memory_name "'TxBuff_Radio4'"
1642	depth "16384"
1643	ownership "Owned and Initialized Elsewhere"
1644	initVector "sin(pi*(0:15)/16)"
1645	mutex "Unprotected"
1646	mode "Read and Write"
1647	write_mode "Read After Write"
1648	time_out "0"
1649	latency "1"
1650	explicit_data_type off
1651	arith_type "Unsigned"
1652	n_bits "32"
1653	bin_pt "0"
1654	xl_use_area off
1655	xl_area "[0,0,0,0,0,0,0]"
1656	implementation "Block RAM"
1657	use_rpm "off"
1658	has_advanced_control "0"
1659	sggui_pos "-1,-1,-1,-1"
1660	block_type "shmem"
1661	block_version "10.1.3"
1662	sg_icon_stat "80,92,1,1,white,blue,0,e2c38f9a,right"
1663	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 92 92 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[15 28 47 66 79 79 73 79 79 61 78 66 47 28 16 33 15 15 21 15 15 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1664	Port {
1665	PortNumber 1
1666	Name "TxBuff_Radio4_dout"
1667	RTWStorageClass "Auto"
1668	DataLoggingNameMode "SignalName"
1669	}
1670	}
1671	Block {
1672	BlockType Reference
1673	Name "Shared Memory8"
1674	Ports [3, 1]
1675	Position [605, 3119, 685, 3211]
1676	AttributesFormatString "<< %<shared_memory_name> >>"
1677	SourceBlock "xbsIndex_r4/Shared Memory"
1678	SourceType "Xilinx Shared Memory Random Access Memory Block"
1679	shared_memory_name "'RSSIBuff_Radio1'"
1680	depth "2048"
1681	ownership "Owned and Initialized Elsewhere"
1682	initVector "sin(pi*(0:15)/16)"
1683	mutex "Unprotected"
1684	mode "Read and Write"
1685	write_mode "Read After Write"
1686	time_out "0"
1687	latency "1"
1688	explicit_data_type off
1689	arith_type "Unsigned"
1690	n_bits "32"
1691	bin_pt "0"
1692	xl_use_area off
1693	xl_area "[0,0,0,0,0,0,0]"
1694	implementation "Block RAM"
1695	use_rpm "off"
1696	has_advanced_control "0"
1697	sggui_pos "-1,-1,-1,-1"
1698	block_type "shmem"
1699	block_version "10.1.3"
1700	sg_icon_stat "80,92,1,1,white,blue,0,e2c38f9a,right"
1701	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 92 92 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[15 28 47 66 79 79 73 79 79 61 78 66 47 28 16 33 15 15 21 15 15 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 92 92 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1702	Port {
1703	PortNumber 1
1704	Name "RSSIBuff_Radio1_dout"
1705	RTWStorageClass "Auto"
1706	DataLoggingNameMode "SignalName"
1707	}
1708	}
1709	Block {
1710	BlockType Reference
1711	Name "Shared Memory9"
1712	Ports [3, 1]
1713	Position [605, 3240, 685, 3330]
1714	AttributesFormatString "<< %<shared_memory_name> >>"
1715	SourceBlock "xbsIndex_r4/Shared Memory"
1716	SourceType "Xilinx Shared Memory Random Access Memory Block"
1717	shared_memory_name "'RSSIBuff_Radio2'"
1718	depth "2048"
1719	ownership "Owned and Initialized Elsewhere"
1720	initVector "sin(pi*(0:15)/16)"
1721	mutex "Unprotected"
1722	mode "Read and Write"
1723	write_mode "Read After Write"
1724	time_out "0"
1725	latency "1"
1726	explicit_data_type off
1727	arith_type "Unsigned"
1728	n_bits "32"
1729	bin_pt "0"
1730	xl_use_area off
1731	xl_area "[0,0,0,0,0,0,0]"
1732	implementation "Block RAM"
1733	use_rpm "off"
1734	has_advanced_control "0"
1735	sggui_pos "-1,-1,-1,-1"
1736	block_type "shmem"
1737	block_version "10.1.3"
1738	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
1739	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1740	Port {
1741	PortNumber 1
1742	Name "RSSIBuff_Radio2_dout"
1743	RTWStorageClass "Auto"
1744	DataLoggingNameMode "SignalName"
1745	}
1746	}
1747	Block {
1748	BlockType Reference
1749	Name "Sl_addrAck"
1750	Ports [1, 1]
1751	Position [460, 100, 520, 120]
1752	SourceBlock "xbsIndex_r4/Gateway Out"
1753	SourceType "Xilinx Gateway Out Block"
1754	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
1755	hdl_port on
1756	timing_constraint "None"
1757	locs_specified off
1758	LOCs "{}"
1759	xl_use_area off
1760	xl_area "[0,0,0,0,0,0,0]"
1761	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_addrAck'}},'iopad'=>{'constraint'=>'#'}}"
1762	has_advanced_control "0"
1763	sggui_pos "-1,-1,-1,-1"
1764	block_type "gatewayout"
1765	block_version "10.1.3"
1766	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1767	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
1768	}
1769	Block {
1770	BlockType Reference
1771	Name "Sl_rdComp"
1772	Ports [1, 1]
1773	Position [460, 210, 520, 230]
1774	SourceBlock "xbsIndex_r4/Gateway Out"
1775	SourceType "Xilinx Gateway Out Block"
1776	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
1777	hdl_port on
1778	timing_constraint "None"
1779	locs_specified off
1780	LOCs "{}"
1781	xl_use_area off
1782	xl_area "[0,0,0,0,0,0,0]"
1783	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdComp'}},'iopad'=>{'constraint'=>'#'}}"
1784	has_advanced_control "0"
1785	sggui_pos "-1,-1,-1,-1"
1786	block_type "gatewayout"
1787	block_version "10.1.3"
1788	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1789	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
1790	}
1791	Block {
1792	BlockType Reference
1793	Name "Sl_rdDAck"
1794	Ports [1, 1]
1795	Position [460, 755, 520, 775]
1796	SourceBlock "xbsIndex_r4/Gateway Out"
1797	SourceType "Xilinx Gateway Out Block"
1798	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
1799	hdl_port on
1800	timing_constraint "None"
1801	locs_specified off
1802	LOCs "{}"
1803	xl_use_area off
1804	xl_area "[0,0,0,0,0,0,0]"
1805	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdDAck'}},'iopad'=>{'constraint'=>'#'}}"
1806	has_advanced_control "0"
1807	sggui_pos "-1,-1,-1,-1"
1808	block_type "gatewayout"
1809	block_version "10.1.3"
1810	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1811	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
1812	}
1813	Block {
1814	BlockType Reference
1815	Name "Sl_rdDBus"
1816	Ports [1, 1]
1817	Position [460, 840, 520, 860]
1818	SourceBlock "xbsIndex_r4/Gateway Out"
1819	SourceType "Xilinx Gateway Out Block"
1820	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
1821	hdl_port on
1822	timing_constraint "None"
1823	locs_specified off
1824	LOCs "{}"
1825	xl_use_area off
1826	xl_area "[0,0,0,0,0,0,0]"
1827	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdDBus'}},'iopad'=>{'constraint'=>'#'}}"
1828	has_advanced_control "0"
1829	sggui_pos "-1,-1,-1,-1"
1830	block_type "gatewayout"
1831	block_version "10.1.3"
1832	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1833	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
1834	}
1835	Block {
1836	BlockType Reference
1837	Name "Sl_wait"
1838	Ports [1, 1]
1839	Position [110, 495, 170, 515]
1840	SourceBlock "xbsIndex_r4/Gateway Out"
1841	SourceType "Xilinx Gateway Out Block"
1842	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
1843	hdl_port on
1844	timing_constraint "None"
1845	locs_specified off
1846	LOCs "{}"
1847	xl_use_area off
1848	xl_area "[0,0,0,0,0,0,0]"
1849	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wait'}},'iopad'=>{'constraint'=>'#'}}"
1850	has_advanced_control "0"
1851	sggui_pos "-1,-1,-1,-1"
1852	block_type "gatewayout"
1853	block_version "10.1.3"
1854	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1855	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
1856	}
1857	Block {
1858	BlockType Reference
1859	Name "Sl_wrComp"
1860	Ports [1, 1]
1861	Position [460, 665, 520, 685]
1862	SourceBlock "xbsIndex_r4/Gateway Out"
1863	SourceType "Xilinx Gateway Out Block"
1864	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
1865	hdl_port on
1866	timing_constraint "None"
1867	locs_specified off
1868	LOCs "{}"
1869	xl_use_area off
1870	xl_area "[0,0,0,0,0,0,0]"
1871	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wrComp'}},'iopad'=>{'constraint'=>'#'}}"
1872	has_advanced_control "0"
1873	sggui_pos "-1,-1,-1,-1"
1874	block_type "gatewayout"
1875	block_version "10.1.3"
1876	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1877	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
1878	}
1879	Block {
1880	BlockType Reference
1881	Name "Sl_wrDAck"
1882	Ports [1, 1]
1883	Position [460, 380, 520, 400]
1884	SourceBlock "xbsIndex_r4/Gateway Out"
1885	SourceType "Xilinx Gateway Out Block"
1886	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
1887	hdl_port on
1888	timing_constraint "None"
1889	locs_specified off
1890	LOCs "{}"
1891	xl_use_area off
1892	xl_area "[0,0,0,0,0,0,0]"
1893	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wrDAck'}},'iopad'=>{'constraint'=>'#'}}"
1894	has_advanced_control "0"
1895	sggui_pos "-1,-1,-1,-1"
1896	block_type "gatewayout"
1897	block_version "10.1.3"
1898	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
1899	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
1900	}
1901	Block {
1902	BlockType Terminator
1903	Name "Terminator"
1904	Position [635, 30, 655, 50]
1905	ShowName off
1906	}
1907	Block {
1908	BlockType Terminator
1909	Name "Terminator1"
1910	Position [635, 80, 655, 100]
1911	ShowName off
1912	}
1913	Block {
1914	BlockType Terminator
1915	Name "Terminator2"
1916	Position [635, 225, 655, 245]
1917	ShowName off
1918	}
1919	Block {
1920	BlockType Terminator
1921	Name "Terminator3"
1922	Position [635, 275, 655, 295]
1923	ShowName off
1924	}
1925	Block {
1926	BlockType Terminator
1927	Name "Terminator4"
1928	Position [280, 495, 300, 515]
1929	ShowName off
1930	}
1931	Block {
1932	BlockType Terminator
1933	Name "Terminator5"
1934	Position [635, 130, 655, 150]
1935	ShowName off
1936	}
1937	Block {
1938	BlockType Terminator
1939	Name "Terminator6"
1940	Position [635, 180, 655, 200]
1941	ShowName off
1942	}
1943	Block {
1944	BlockType Reference
1945	Name "To Register"
1946	Ports [2, 1]
1947	Position [615, 327, 675, 383]
1948	AttributesFormatString "<< %<shared_memory_name> >>"
1949	SourceBlock "xbsIndex_r4/To Register"
1950	SourceType "Xilinx Shared Memory Based To Register Block"
1951	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
1952	shared_memory_name "'DCO_EN_SEL'"
1953	init "0"
1954	ownership "Owned and initialized elsewhere"
1955	explicit_data_type on
1956	arith_type "Unsigned"
1957	n_bits "1"
1958	bin_pt "0"
1959	dbl_ovrd off
1960	xl_use_area off
1961	xl_area "[0,0,0,0,0,0,0]"
1962	has_advanced_control "0"
1963	sggui_pos "-1,-1,-1,-1"
1964	block_type "toreg"
1965	block_version "10.1.3"
1966	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
1967	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
1968	Port {
1969	PortNumber 1
1970	Name "DCO_EN_SEL_dout"
1971	RTWStorageClass "Auto"
1972	DataLoggingNameMode "SignalName"
1973	}
1974	}
1975	Block {
1976	BlockType Reference
1977	Name "To Register1"
1978	Ports [2, 1]
1979	Position [615, 412, 675, 468]
1980	AttributesFormatString "<< %<shared_memory_name> >>"
1981	SourceBlock "xbsIndex_r4/To Register"
1982	SourceType "Xilinx Shared Memory Based To Register Block"
1983	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
1984	shared_memory_name "'DebugRx1Buffers'"
1985	init "0"
1986	ownership "Owned and initialized elsewhere"
1987	explicit_data_type on
1988	arith_type "Unsigned"
1989	n_bits "1"
1990	bin_pt "0"
1991	dbl_ovrd off
1992	xl_use_area off
1993	xl_area "[0,0,0,0,0,0,0]"
1994	has_advanced_control "0"
1995	sggui_pos "-1,-1,-1,-1"
1996	block_type "toreg"
1997	block_version "10.1.3"
1998	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
1999	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2000	Port {
2001	PortNumber 1
2002	Name "DebugRx1Buffers_dout"
2003	RTWStorageClass "Auto"
2004	DataLoggingNameMode "SignalName"
2005	}
2006	}
2007	Block {
2008	BlockType Reference
2009	Name "To Register10"
2010	Ports [2, 1]
2011	Position [615, 1192, 675, 1248]
2012	AttributesFormatString "<< %<shared_memory_name> >>"
2013	SourceBlock "xbsIndex_r4/To Register"
2014	SourceType "Xilinx Shared Memory Based To Register Block"
2015	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2016	shared_memory_name "'RADIO3RXBUFF_RXEN'"
2017	init "0"
2018	ownership "Owned and initialized elsewhere"
2019	explicit_data_type on
2020	arith_type "Unsigned"
2021	n_bits "1"
2022	bin_pt "0"
2023	dbl_ovrd off
2024	xl_use_area off
2025	xl_area "[0,0,0,0,0,0,0]"
2026	has_advanced_control "0"
2027	sggui_pos "-1,-1,-1,-1"
2028	block_type "toreg"
2029	block_version "10.1.3"
2030	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2031	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2032	Port {
2033	PortNumber 1
2034	Name "RADIO3RXBUFF_RXEN_dout"
2035	RTWStorageClass "Auto"
2036	DataLoggingNameMode "SignalName"
2037	}
2038	}
2039	Block {
2040	BlockType Reference
2041	Name "To Register11"
2042	Ports [2, 1]
2043	Position [615, 1282, 675, 1338]
2044	AttributesFormatString "<< %<shared_memory_name> >>"
2045	SourceBlock "xbsIndex_r4/To Register"
2046	SourceType "Xilinx Shared Memory Based To Register Block"
2047	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2048	shared_memory_name "'RADIO3TXBUFF_TXEN'"
2049	init "0"
2050	ownership "Owned and initialized elsewhere"
2051	explicit_data_type on
2052	arith_type "Unsigned"
2053	n_bits "1"
2054	bin_pt "0"
2055	dbl_ovrd off
2056	xl_use_area off
2057	xl_area "[0,0,0,0,0,0,0]"
2058	has_advanced_control "0"
2059	sggui_pos "-1,-1,-1,-1"
2060	block_type "toreg"
2061	block_version "10.1.3"
2062	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2063	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2064	Port {
2065	PortNumber 1
2066	Name "RADIO3TXBUFF_TXEN_dout"
2067	RTWStorageClass "Auto"
2068	DataLoggingNameMode "SignalName"
2069	}
2070	}
2071	Block {
2072	BlockType Reference
2073	Name "To Register12"
2074	Ports [2, 1]
2075	Position [615, 1367, 675, 1423]
2076	AttributesFormatString "<< %<shared_memory_name> >>"
2077	SourceBlock "xbsIndex_r4/To Register"
2078	SourceType "Xilinx Shared Memory Based To Register Block"
2079	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2080	shared_memory_name "'RADIO4RXBUFF_RXEN'"
2081	init "0"
2082	ownership "Owned and initialized elsewhere"
2083	explicit_data_type on
2084	arith_type "Unsigned"
2085	n_bits "1"
2086	bin_pt "0"
2087	dbl_ovrd off
2088	xl_use_area off
2089	xl_area "[0,0,0,0,0,0,0]"
2090	has_advanced_control "0"
2091	sggui_pos "-1,-1,-1,-1"
2092	block_type "toreg"
2093	block_version "10.1.3"
2094	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2095	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2096	Port {
2097	PortNumber 1
2098	Name "RADIO4RXBUFF_RXEN_dout"
2099	RTWStorageClass "Auto"
2100	DataLoggingNameMode "SignalName"
2101	}
2102	}
2103	Block {
2104	BlockType Reference
2105	Name "To Register13"
2106	Ports [2, 1]
2107	Position [615, 1452, 675, 1508]
2108	AttributesFormatString "<< %<shared_memory_name> >>"
2109	SourceBlock "xbsIndex_r4/To Register"
2110	SourceType "Xilinx Shared Memory Based To Register Block"
2111	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2112	shared_memory_name "'RADIO4TXBUFF_TXEN'"
2113	init "0"
2114	ownership "Owned and initialized elsewhere"
2115	explicit_data_type on
2116	arith_type "Unsigned"
2117	n_bits "1"
2118	bin_pt "0"
2119	dbl_ovrd off
2120	xl_use_area off
2121	xl_area "[0,0,0,0,0,0,0]"
2122	has_advanced_control "0"
2123	sggui_pos "-1,-1,-1,-1"
2124	block_type "toreg"
2125	block_version "10.1.3"
2126	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2127	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2128	Port {
2129	PortNumber 1
2130	Name "RADIO4TXBUFF_TXEN_dout"
2131	RTWStorageClass "Auto"
2132	DataLoggingNameMode "SignalName"
2133	}
2134	}
2135	Block {
2136	BlockType Reference
2137	Name "To Register14"
2138	Ports [2, 1]
2139	Position [615, 1542, 675, 1598]
2140	AttributesFormatString "<< %<shared_memory_name> >>"
2141	SourceBlock "xbsIndex_r4/To Register"
2142	SourceType "Xilinx Shared Memory Based To Register Block"
2143	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2144	shared_memory_name "'StartCapture'"
2145	init "0"
2146	ownership "Owned and initialized elsewhere"
2147	explicit_data_type on
2148	arith_type "Unsigned"
2149	n_bits "1"
2150	bin_pt "0"
2151	dbl_ovrd off
2152	xl_use_area off
2153	xl_area "[0,0,0,0,0,0,0]"
2154	has_advanced_control "0"
2155	sggui_pos "-1,-1,-1,-1"
2156	block_type "toreg"
2157	block_version "10.1.3"
2158	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2159	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2160	Port {
2161	PortNumber 1
2162	Name "StartCapture_dout"
2163	RTWStorageClass "Auto"
2164	DataLoggingNameMode "SignalName"
2165	}
2166	}
2167	Block {
2168	BlockType Reference
2169	Name "To Register15"
2170	Ports [2, 1]
2171	Position [615, 1627, 675, 1683]
2172	AttributesFormatString "<< %<shared_memory_name> >>"
2173	SourceBlock "xbsIndex_r4/To Register"
2174	SourceType "Xilinx Shared Memory Based To Register Block"
2175	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2176	shared_memory_name "'StartTx'"
2177	init "0"
2178	ownership "Owned and initialized elsewhere"
2179	explicit_data_type on
2180	arith_type "Unsigned"
2181	n_bits "1"
2182	bin_pt "0"
2183	dbl_ovrd off
2184	xl_use_area off
2185	xl_area "[0,0,0,0,0,0,0]"
2186	has_advanced_control "0"
2187	sggui_pos "-1,-1,-1,-1"
2188	block_type "toreg"
2189	block_version "10.1.3"
2190	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2191	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2192	Port {
2193	PortNumber 1
2194	Name "StartTx_dout"
2195	RTWStorageClass "Auto"
2196	DataLoggingNameMode "SignalName"
2197	}
2198	}
2199	Block {
2200	BlockType Reference
2201	Name "To Register16"
2202	Ports [2, 1]
2203	Position [615, 1712, 675, 1768]
2204	AttributesFormatString "<< %<shared_memory_name> >>"
2205	SourceBlock "xbsIndex_r4/To Register"
2206	SourceType "Xilinx Shared Memory Based To Register Block"
2207	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2208	shared_memory_name "'StopTx'"
2209	init "0"
2210	ownership "Owned and initialized elsewhere"
2211	explicit_data_type on
2212	arith_type "Unsigned"
2213	n_bits "1"
2214	bin_pt "0"
2215	dbl_ovrd off
2216	xl_use_area off
2217	xl_area "[0,0,0,0,0,0,0]"
2218	has_advanced_control "0"
2219	sggui_pos "-1,-1,-1,-1"
2220	block_type "toreg"
2221	block_version "10.1.3"
2222	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2223	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2224	Port {
2225	PortNumber 1
2226	Name "StopTx_dout"
2227	RTWStorageClass "Auto"
2228	DataLoggingNameMode "SignalName"
2229	}
2230	}
2231	Block {
2232	BlockType Reference
2233	Name "To Register17"
2234	Ports [2, 1]
2235	Position [615, 1802, 675, 1858]
2236	AttributesFormatString "<< %<shared_memory_name> >>"
2237	SourceBlock "xbsIndex_r4/To Register"
2238	SourceType "Xilinx Shared Memory Based To Register Block"
2239	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2240	shared_memory_name "'TransMode'"
2241	init "0"
2242	ownership "Owned and initialized elsewhere"
2243	explicit_data_type on
2244	arith_type "Unsigned"
2245	n_bits "1"
2246	bin_pt "0"
2247	dbl_ovrd off
2248	xl_use_area off
2249	xl_area "[0,0,0,0,0,0,0]"
2250	has_advanced_control "0"
2251	sggui_pos "-1,-1,-1,-1"
2252	block_type "toreg"
2253	block_version "10.1.3"
2254	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2255	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2256	Port {
2257	PortNumber 1
2258	Name "TransMode_dout"
2259	RTWStorageClass "Auto"
2260	DataLoggingNameMode "SignalName"
2261	}
2262	}
2263	Block {
2264	BlockType Reference
2265	Name "To Register18"
2266	Ports [2, 1]
2267	Position [615, 1887, 675, 1943]
2268	AttributesFormatString "<< %<shared_memory_name> >>"
2269	SourceBlock "xbsIndex_r4/To Register"
2270	SourceType "Xilinx Shared Memory Based To Register Block"
2271	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2272	shared_memory_name "'TxDelay'"
2273	init "0"
2274	ownership "Owned and initialized elsewhere"
2275	explicit_data_type on
2276	arith_type "Unsigned"
2277	n_bits "14"
2278	bin_pt "0"
2279	dbl_ovrd off
2280	xl_use_area off
2281	xl_area "[0,0,0,0,0,0,0]"
2282	has_advanced_control "0"
2283	sggui_pos "-1,-1,-1,-1"
2284	block_type "toreg"
2285	block_version "10.1.3"
2286	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2287	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2288	Port {
2289	PortNumber 1
2290	Name "TxDelay_dout"
2291	RTWStorageClass "Auto"
2292	DataLoggingNameMode "SignalName"
2293	}
2294	}
2295	Block {
2296	BlockType Reference
2297	Name "To Register19"
2298	Ports [2, 1]
2299	Position [615, 1972, 675, 2028]
2300	AttributesFormatString "<< %<shared_memory_name> >>"
2301	SourceBlock "xbsIndex_r4/To Register"
2302	SourceType "Xilinx Shared Memory Based To Register Block"
2303	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2304	shared_memory_name "'TxLength'"
2305	init "0"
2306	ownership "Owned and initialized elsewhere"
2307	explicit_data_type on
2308	arith_type "Unsigned"
2309	n_bits "14"
2310	bin_pt "0"
2311	dbl_ovrd off
2312	xl_use_area off
2313	xl_area "[0,0,0,0,0,0,0]"
2314	has_advanced_control "0"
2315	sggui_pos "-1,-1,-1,-1"
2316	block_type "toreg"
2317	block_version "10.1.3"
2318	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2319	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2320	Port {
2321	PortNumber 1
2322	Name "TxLength_dout"
2323	RTWStorageClass "Auto"
2324	DataLoggingNameMode "SignalName"
2325	}
2326	}
2327	Block {
2328	BlockType Reference
2329	Name "To Register2"
2330	Ports [2, 1]
2331	Position [615, 502, 675, 558]
2332	AttributesFormatString "<< %<shared_memory_name> >>"
2333	SourceBlock "xbsIndex_r4/To Register"
2334	SourceType "Xilinx Shared Memory Based To Register Block"
2335	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2336	shared_memory_name "'DebugRx2Buffers'"
2337	init "0"
2338	ownership "Owned and initialized elsewhere"
2339	explicit_data_type on
2340	arith_type "Unsigned"
2341	n_bits "1"
2342	bin_pt "0"
2343	dbl_ovrd off
2344	xl_use_area off
2345	xl_area "[0,0,0,0,0,0,0]"
2346	has_advanced_control "0"
2347	sggui_pos "-1,-1,-1,-1"
2348	block_type "toreg"
2349	block_version "10.1.3"
2350	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2351	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2352	Port {
2353	PortNumber 1
2354	Name "DebugRx2Buffers_dout"
2355	RTWStorageClass "Auto"
2356	DataLoggingNameMode "SignalName"
2357	}
2358	}
2359	Block {
2360	BlockType Reference
2361	Name "To Register20"
2362	Ports [2, 1]
2363	Position [615, 2062, 675, 2118]
2364	AttributesFormatString "<< %<shared_memory_name> >>"
2365	SourceBlock "xbsIndex_r4/To Register"
2366	SourceType "Xilinx Shared Memory Based To Register Block"
2367	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2368	shared_memory_name "'StartTxRx'"
2369	init "0"
2370	ownership "Owned and initialized elsewhere"
2371	explicit_data_type on
2372	arith_type "Unsigned"
2373	n_bits "1"
2374	bin_pt "0"
2375	dbl_ovrd off
2376	xl_use_area off
2377	xl_area "[0,0,0,0,0,0,0]"
2378	has_advanced_control "0"
2379	sggui_pos "-1,-1,-1,-1"
2380	block_type "toreg"
2381	block_version "10.1.3"
2382	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2383	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2384	Port {
2385	PortNumber 1
2386	Name "StartTxRx_dout"
2387	RTWStorageClass "Auto"
2388	DataLoggingNameMode "SignalName"
2389	}
2390	}
2391	Block {
2392	BlockType Reference
2393	Name "To Register3"
2394	Ports [2, 1]
2395	Position [615, 587, 675, 643]
2396	AttributesFormatString "<< %<shared_memory_name> >>"
2397	SourceBlock "xbsIndex_r4/To Register"
2398	SourceType "Xilinx Shared Memory Based To Register Block"
2399	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2400	shared_memory_name "'DebugRx3Buffers'"
2401	init "0"
2402	ownership "Owned and initialized elsewhere"
2403	explicit_data_type on
2404	arith_type "Unsigned"
2405	n_bits "1"
2406	bin_pt "0"
2407	dbl_ovrd off
2408	xl_use_area off
2409	xl_area "[0,0,0,0,0,0,0]"
2410	has_advanced_control "0"
2411	sggui_pos "-1,-1,-1,-1"
2412	block_type "toreg"
2413	block_version "10.1.3"
2414	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2415	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2416	Port {
2417	PortNumber 1
2418	Name "DebugRx3Buffers_dout"
2419	RTWStorageClass "Auto"
2420	DataLoggingNameMode "SignalName"
2421	}
2422	}
2423	Block {
2424	BlockType Reference
2425	Name "To Register4"
2426	Ports [2, 1]
2427	Position [615, 672, 675, 728]
2428	AttributesFormatString "<< %<shared_memory_name> >>"
2429	SourceBlock "xbsIndex_r4/To Register"
2430	SourceType "Xilinx Shared Memory Based To Register Block"
2431	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2432	shared_memory_name "'DebugRx4Buffers'"
2433	init "0"
2434	ownership "Owned and initialized elsewhere"
2435	explicit_data_type on
2436	arith_type "Unsigned"
2437	n_bits "1"
2438	bin_pt "0"
2439	dbl_ovrd off
2440	xl_use_area off
2441	xl_area "[0,0,0,0,0,0,0]"
2442	has_advanced_control "0"
2443	sggui_pos "-1,-1,-1,-1"
2444	block_type "toreg"
2445	block_version "10.1.3"
2446	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2447	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2448	Port {
2449	PortNumber 1
2450	Name "DebugRx4Buffers_dout"
2451	RTWStorageClass "Auto"
2452	DataLoggingNameMode "SignalName"
2453	}
2454	}
2455	Block {
2456	BlockType Reference
2457	Name "To Register5"
2458	Ports [2, 1]
2459	Position [615, 762, 675, 818]
2460	AttributesFormatString "<< %<shared_memory_name> >>"
2461	SourceBlock "xbsIndex_r4/To Register"
2462	SourceType "Xilinx Shared Memory Based To Register Block"
2463	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2464	shared_memory_name "'MGC_AGC_SEL'"
2465	init "0"
2466	ownership "Owned and initialized elsewhere"
2467	explicit_data_type on
2468	arith_type "Unsigned"
2469	n_bits "1"
2470	bin_pt "0"
2471	dbl_ovrd off
2472	xl_use_area off
2473	xl_area "[0,0,0,0,0,0,0]"
2474	has_advanced_control "0"
2475	sggui_pos "-1,-1,-1,-1"
2476	block_type "toreg"
2477	block_version "10.1.3"
2478	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2479	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2480	Port {
2481	PortNumber 1
2482	Name "MGC_AGC_SEL_dout"
2483	RTWStorageClass "Auto"
2484	DataLoggingNameMode "SignalName"
2485	}
2486	}
2487	Block {
2488	BlockType Reference
2489	Name "To Register6"
2490	Ports [2, 1]
2491	Position [615, 847, 675, 903]
2492	AttributesFormatString "<< %<shared_memory_name> >>"
2493	SourceBlock "xbsIndex_r4/To Register"
2494	SourceType "Xilinx Shared Memory Based To Register Block"
2495	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2496	shared_memory_name "'RADIO1RXBUFF_RXEN'"
2497	init "0"
2498	ownership "Owned and initialized elsewhere"
2499	explicit_data_type on
2500	arith_type "Unsigned"
2501	n_bits "1"
2502	bin_pt "0"
2503	dbl_ovrd off
2504	xl_use_area off
2505	xl_area "[0,0,0,0,0,0,0]"
2506	has_advanced_control "0"
2507	sggui_pos "-1,-1,-1,-1"
2508	block_type "toreg"
2509	block_version "10.1.3"
2510	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2511	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2512	Port {
2513	PortNumber 1
2514	Name "RADIO1RXBUFF_RXEN_dout"
2515	RTWStorageClass "Auto"
2516	DataLoggingNameMode "SignalName"
2517	}
2518	}
2519	Block {
2520	BlockType Reference
2521	Name "To Register7"
2522	Ports [2, 1]
2523	Position [615, 932, 675, 988]
2524	AttributesFormatString "<< %<shared_memory_name> >>"
2525	SourceBlock "xbsIndex_r4/To Register"
2526	SourceType "Xilinx Shared Memory Based To Register Block"
2527	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2528	shared_memory_name "'RADIO1TXBUFF_TXEN'"
2529	init "0"
2530	ownership "Owned and initialized elsewhere"
2531	explicit_data_type on
2532	arith_type "Unsigned"
2533	n_bits "1"
2534	bin_pt "0"
2535	dbl_ovrd off
2536	xl_use_area off
2537	xl_area "[0,0,0,0,0,0,0]"
2538	has_advanced_control "0"
2539	sggui_pos "-1,-1,-1,-1"
2540	block_type "toreg"
2541	block_version "10.1.3"
2542	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2543	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2544	Port {
2545	PortNumber 1
2546	Name "RADIO1TXBUFF_TXEN_dout"
2547	RTWStorageClass "Auto"
2548	DataLoggingNameMode "SignalName"
2549	}
2550	}
2551	Block {
2552	BlockType Reference
2553	Name "To Register8"
2554	Ports [2, 1]
2555	Position [615, 1022, 675, 1078]
2556	AttributesFormatString "<< %<shared_memory_name> >>"
2557	SourceBlock "xbsIndex_r4/To Register"
2558	SourceType "Xilinx Shared Memory Based To Register Block"
2559	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2560	shared_memory_name "'RADIO2RXBUFF_RXEN'"
2561	init "0"
2562	ownership "Owned and initialized elsewhere"
2563	explicit_data_type on
2564	arith_type "Unsigned"
2565	n_bits "1"
2566	bin_pt "0"
2567	dbl_ovrd off
2568	xl_use_area off
2569	xl_area "[0,0,0,0,0,0,0]"
2570	has_advanced_control "0"
2571	sggui_pos "-1,-1,-1,-1"
2572	block_type "toreg"
2573	block_version "10.1.3"
2574	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2575	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2576	Port {
2577	PortNumber 1
2578	Name "RADIO2RXBUFF_RXEN_dout"
2579	RTWStorageClass "Auto"
2580	DataLoggingNameMode "SignalName"
2581	}
2582	}
2583	Block {
2584	BlockType Reference
2585	Name "To Register9"
2586	Ports [2, 1]
2587	Position [615, 1107, 675, 1163]
2588	AttributesFormatString "<< %<shared_memory_name> >>"
2589	SourceBlock "xbsIndex_r4/To Register"
2590	SourceType "Xilinx Shared Memory Based To Register Block"
2591	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
2592	shared_memory_name "'RADIO2TXBUFF_TXEN'"
2593	init "0"
2594	ownership "Owned and initialized elsewhere"
2595	explicit_data_type on
2596	arith_type "Unsigned"
2597	n_bits "1"
2598	bin_pt "0"
2599	dbl_ovrd off
2600	xl_use_area off
2601	xl_area "[0,0,0,0,0,0,0]"
2602	has_advanced_control "0"
2603	sggui_pos "-1,-1,-1,-1"
2604	block_type "toreg"
2605	block_version "10.1.3"
2606	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
2607	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
2608	Port {
2609	PortNumber 1
2610	Name "RADIO2TXBUFF_TXEN_dout"
2611	RTWStorageClass "Auto"
2612	DataLoggingNameMode "SignalName"
2613	}
2614	}
2615	Block {
2616	BlockType Reference
2617	Name "plb_decode"
2618	Ports [7, 9]
2619	Position [205, 544, 375, 956]
2620	SourceBlock "xbsIndex_r4/MCode"
2621	SourceType "Xilinx MCode Block Block"
2622	infoedit "Pass input values to a MATLAB function for evaluation in Xilinx fixed-point type. The input ports of the block are input arguments of the function. The output ports of the block are output arguments of the function."
2623	mfname "xlmax"
2624	explicit_period off
2625	period "1"
2626	dbl_ovrd off
2627	enable_stdout off
2628	enable_debug off
2629	xl_use_area off
2630	xl_area "[0,0,0,0,0,0,0]"
2631	mfilecontent "function [wrDBusReg, addrAck, rdComp, wrDAck, bankAddr, RNWReg, rdDAck, rdDBus, linearAddr] = ...\n plb_bus_decode(plbRst, plbABus, plbPAValid, plbRNW, plbWrDBus, rdData, addrPref)\n\n% constant variables (TODO: should pass from outside)\nADDRPREF_LEN = 10;\nBANKADDR_LEN = 2;\nLINEARADDR_LEN = 18;\nABUS_LEN = 32;\nDBUS_LEN = 32;\n\n% declare and initialize persistent variables\n% register input bus signals\npersistent plbRstReg_, plbRstReg_ = xl_state(0, {xlBoolean});\npersistent plbABusReg_, plbABusReg_ = xl_state(0, {xlUnsigned, ABUS_LEN, 0});\npersistent plbPAValidReg_, plbPAValidReg_ = xl_state(0, {xlBoolean});\npersistent plbRNWReg_, plbRNWReg_ = xl_state(0, {xlUnsigned, 1, 0});\npersistent plbWrDBusReg_, plbWrDBusReg_ = xl_state(0, {xlUnsigned, DBUS_LEN, 0});\n\n% ===== rest of the outputs =====\n\nbankAddr = xl_slice(plbABusReg_, 2+BANKADDR_LEN+LINEARADDR_LEN-1, 2+LINEARADDR_LEN);\nlinearAddr = xl_slice(plbABusReg_, 2+LINEARADDR_LEN-1, 2);\nRNWReg = plbRNWReg_;\nwrDBusReg = plbWrDBusReg_;\n\n% ===== p_select =====\n\n% register PAValid\npersistent aValidReg, aValidReg = xl_state(0, {xlBoolean});\naValidReg = plbPAValidReg_;\n\n% extract and register the address prefix\naddrPref_in = xl_slice(plbABusReg_, xl_nbits(plbABusReg_)-1, xl_nbits(plbABusReg_)-ADDRPREF_LEN);\nif addrPref_in == addrPref\n ps1 = true;\nelse \n ps1 = false;\nend \n\npersistent ps1Reg, ps1Reg = xl_state(0, ps1);\nps1Reg = ps1;\n\nps = xl_and(ps1Reg, aValidReg);\n\n% ===== addrAck =====\n\n% register ps\npersistent psReg, psReg = xl_state(0, ps);\n\naddrAck = xfix({xlUnsigned, 1, 0}, xl_and(xl_not(plbRstReg_), ps, xl_not(psReg)));\n\npsReg = ps;\n\n% ===== rdComp, rd/wr DAck =====\n \nrdComp1 = xfix({xlUnsigned, 1, 0}, xl_and(addrAck, RNWReg));\n\nNUM_rdCompDelay = 3;\npersistent rdCompDelay, rdCompDelay = xl_state(zeros(1, NUM_rdCompDelay), rdComp1, NUM_rdCompDelay);\nrdComp2 = rdCompDelay.back;\nrdCompDelay.push_front_pop_back(rdComp1);\n\npersistent rdCompReg, rdCompReg = xl_state(0, rdComp1);\nrdComp = rdCompReg;\nrdCompReg = rdComp2;\n\npersistent rdDAckReg, rdDAckReg = xl_state(0, rdComp1);\nrdDAck = rdDAckReg;\nrdDAckReg = rdComp;\n\npersistent wrDAckReg, wrDAckReg = xl_state(0, addrAck);\nwrDAck = wrDAckReg;\nwrDAckReg = xl_and(addrAck, xl_not(RNWReg));\n\n% ===== rdDBus =====\n\nrdSel = xl_or(rdComp2, rdComp);\n\nif rdSel == 1\n rdDBus1 = rdData;\nelse\n rdDBus1 = 0;\nend % if\n\npersistent rdDBusReg, rdDBusReg = xl_state(0, rdDBus1);\nrdDBus = rdDBusReg;\nrdDBusReg = rdDBus1;\n\n% rdDBus = xl_concat(rdDBus32, rdDBus32);\n% rdDBus = rdDBus32;\n\n% ===== update the persistent variables =====\n\nplbRstReg_ = plbRst;\nplbABusReg_ = plbABus;\nplbPAValidReg_ = plbPAValid;\nplbRNWReg_ = plbRNW;\nplbWrDBusReg_ = xl_slice(plbWrDBus, DBUS_LEN-1, 0);\n"
2632	suppress_output "1"
2633	defparams "{}"
2634	hide_port_list "{}"
2635	has_advanced_control "0"
2636	sggui_pos "-1,-1,-1,-1"
2637	block_type "mcode"
2638	block_version "10.1.3"
2639	sg_icon_stat "170,412,7,9,white,blue,0,8b15b975,right"
2640	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 170 170 0 ],[0 0 412 412 ],[0.77 0.82 0.91]);\npatch([40 12 52 12 40 85 97 109 157 119 83 57 97 57 83 119 157 109 97 85 40 ],[139 167 207 247 275 275 263 275 275 237 273 247 207 167 141 177 139 139 151 139 139 ],[0.98 0.96 0.92]);\nplot([0 170 170 0 0 ],[0 0 412 412 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'plbRst');\ncolor('black');port_label('input',2,'plbABus');\ncolor('black');port_label('input',3,'plbPAValid');\ncolor('black');port_label('input',4,'plbRNW');\ncolor('black');port_label('input',5,'plbWrDBus');\ncolor('black');port_label('input',6,'rdData');\ncolor('black');port_label('input',7,'addrPref');\ncolor('black');port_label('output',1,'wrDBusReg');\ncolor('black');port_label('output',2,'addrAck');\ncolor('black');port_label('output',3,'rdComp');\ncolor('black');port_label('output',4,'wrDAck');\ncolor('black');port_label('output',5,'bankAddr');\ncolor('black');port_label('output',6,'RNWReg');\ncolor('black');port_label('output',7,'rdDAck');\ncolor('black');port_label('output',8,'rdDBus');\ncolor('black');port_label('output',9,'linearAddr');\ncolor('black');disp('\\bf{xlmax}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
2641	Port {
2642	PortNumber 1
2643	Name "wrDBusReg"
2644	RTWStorageClass "Auto"
2645	DataLoggingNameMode "SignalName"
2646	}
2647	Port {
2648	PortNumber 2
2649	Name "Sl_addrAck"
2650	RTWStorageClass "Auto"
2651	DataLoggingNameMode "SignalName"
2652	}
2653	Port {
2654	PortNumber 3
2655	Name "Sl_rdComp"
2656	RTWStorageClass "Auto"
2657	DataLoggingNameMode "SignalName"
2658	}
2659	Port {
2660	PortNumber 4
2661	Name "Sl_wrDAck"
2662	RTWStorageClass "Auto"
2663	DataLoggingNameMode "SignalName"
2664	}
2665	Port {
2666	PortNumber 5
2667	Name "bankAddr"
2668	RTWStorageClass "Auto"
2669	DataLoggingNameMode "SignalName"
2670	}
2671	Port {
2672	PortNumber 6
2673	Name "RNWReg"
2674	RTWStorageClass "Auto"
2675	DataLoggingNameMode "SignalName"
2676	}
2677	Port {
2678	PortNumber 7
2679	Name "Sl_rdDAck"
2680	RTWStorageClass "Auto"
2681	DataLoggingNameMode "SignalName"
2682	}
2683	Port {
2684	PortNumber 8
2685	Name "Sl_rdDBus"
2686	RTWStorageClass "Auto"
2687	DataLoggingNameMode "SignalName"
2688	}
2689	Port {
2690	PortNumber 9
2691	Name "linearAddr"
2692	RTWStorageClass "Auto"
2693	DataLoggingNameMode "SignalName"
2694	}
2695	}
2696	Block {
2697	BlockType Reference
2698	Name "plb_memmap"
2699	Ports [44, 79]
2700	Position [405, 1639, 575, 2031]
2701	SourceBlock "xbsIndex_r4/MCode"
2702	SourceType "Xilinx MCode Block Block"
2703	infoedit "Pass input values to a MATLAB function for evaluation in Xilinx fixed-point type. The input ports of the block are input arguments of the function. The output ports of the block are output arguments of the function."
2704	mfname "xlmax"
2705	explicit_period off
2706	period "1"
2707	dbl_ovrd off
2708	enable_stdout off
2709	enable_debug off
2710	xl_use_area off
2711	xl_area "[0,0,0,0,0,0,0]"
2712	mfilecontent "function [read_bank_out, sm_DCO_EN_SEL_din, sm_DCO_EN_SEL_en, sm_DebugRx1Buffers_din, sm_DebugRx1Buffers_en, sm_DebugRx2Buffers_din, sm_DebugRx2Buffers_en, sm_DebugRx3Buffers_din, sm_DebugRx3Buffers_en, sm_DebugRx4Buffers_din, sm_DebugRx4Buffers_en, sm_MGC_AGC_SEL_din, sm_MGC_AGC_SEL_en, sm_RADIO1RXBUFF_RXEN_din, sm_RADIO1RXBUFF_RXEN_en, sm_RADIO1TXBUFF_TXEN_din, sm_RADIO1TXBUFF_TXEN_en, sm_RADIO2RXBUFF_RXEN_din, sm_RADIO2RXBUFF_RXEN_en, sm_RADIO2TXBUFF_TXEN_din, sm_RADIO2TXBUFF_TXEN_en, sm_RADIO3RXBUFF_RXEN_din, sm_RADIO3RXBUFF_RXEN_en, sm_RADIO3TXBUFF_TXEN_din, sm_RADIO3TXBUFF_TXEN_en, sm_RADIO4RXBUFF_RXEN_din, sm_RADIO4RXBUFF_RXEN_en, sm_RADIO4TXBUFF_TXEN_din, sm_RADIO4TXBUFF_TXEN_en, sm_StartCapture_din, sm_StartCapture_en, sm_StartTx_din, sm_StartTx_en, sm_StopTx_din, sm_StopTx_en, sm_TransMode_din, sm_TransMode_en, sm_TxDelay_din, sm_TxDelay_en, sm_TxLength_din, sm_TxLength_en, sm_StartTxRx_din, sm_StartTxRx_en, sm_RxBuff_Radio1_addr, sm_RxBuff_Radio1_din, sm_RxBuff_Radio1_we, sm_RxBuff_Radio2_addr, sm_RxBuff_Radio2_din, sm_RxBuff_Radio2_we, sm_RxBuff_Radio3_addr, sm_RxBuff_Radio3_din, sm_RxBuff_Radio3_we, sm_RxBuff_Radio4_addr, sm_RxBuff_Radio4_din, sm_RxBuff_Radio4_we, sm_TxBuff_Radio1_addr, sm_TxBuff_Radio1_din, sm_TxBuff_Radio1_we, sm_TxBuff_Radio2_addr, sm_TxBuff_Radio2_din, sm_TxBuff_Radio2_we, sm_TxBuff_Radio3_addr, sm_TxBuff_Radio3_din, sm_TxBuff_Radio3_we, sm_TxBuff_Radio4_addr, sm_TxBuff_Radio4_din, sm_TxBuff_Radio4_we, sm_RSSIBuff_Radio1_addr, sm_RSSIBuff_Radio1_din, sm_RSSIBuff_Radio1_we, sm_RSSIBuff_Radio2_addr, sm_RSSIBuff_Radio2_din, sm_RSSIBuff_Radio2_we, sm_RSSIBuff_Radio3_addr, sm_RSSIBuff_Radio3_din, sm_RSSIBuff_Radio3_we, sm_RSSIBuff_Radio4_addr, sm_RSSIBuff_Radio4_din, sm_RSSIBuff_Radio4_we] = plb_memmap(wrDBus, bankAddr, linearAddr, RNWReg, addrAck, sm_AGCDoneAddr, sm_CaptureDone, sm_Radio1AGCDoneRSSI, sm_Radio2AGCDoneRSSI, sm_Radio3AGCDoneRSSI, sm_Radio4AGCDoneRSSI, sm_DCO_EN_SEL, sm_DebugRx1Buffers, sm_DebugRx2Buffers, sm_DebugRx3Buffers, sm_DebugRx4Buffers, sm_MGC_AGC_SEL, sm_RADIO1RXBUFF_RXEN, sm_RADIO1TXBUFF_TXEN, sm_RADIO2RXBUFF_RXEN, sm_RADIO2TXBUFF_TXEN, sm_RADIO3RXBUFF_RXEN, sm_RADIO3TXBUFF_TXEN, sm_RADIO4RXBUFF_RXEN, sm_RADIO4TXBUFF_TXEN, sm_StartCapture, sm_StartTx, sm_StopTx, sm_TransMode, sm_TxDelay, sm_TxLength, sm_StartTxRx, sm_RxBuff_Radio1, sm_RxBuff_Radio2, sm_RxBuff_Radio3, sm_RxBuff_Radio4, sm_TxBuff_Radio1, sm_TxBuff_Radio2, sm_TxBuff_Radio3, sm_TxBuff_Radio4, sm_RSSIBuff_Radio1, sm_RSSIBuff_Radio2, sm_RSSIBuff_Radio3, sm_RSSIBuff_Radio4)\n\n\n% connvert the input data to UFix_32_0 (the bus data type)\n% 'From Register' blocks\n% sm_AGCDoneAddr_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_AGCDoneAddr_bus = xl_force(sm_AGCDoneAddr, xlUnsigned, 0);\n\n% sm_CaptureDone_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_CaptureDone_bus = xl_force(sm_CaptureDone, xlUnsigned, 0);\n\n% sm_Radio1AGCDoneRSSI_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_Radio1AGCDoneRSSI_bus = xl_force(sm_Radio1AGCDoneRSSI, xlUnsigned, 0);\n\n% sm_Radio2AGCDoneRSSI_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_Radio2AGCDoneRSSI_bus = xl_force(sm_Radio2AGCDoneRSSI, xlUnsigned, 0);\n\n% sm_Radio3AGCDoneRSSI_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_Radio3AGCDoneRSSI_bus = xl_force(sm_Radio3AGCDoneRSSI, xlUnsigned, 0);\n\n% sm_Radio4AGCDoneRSSI_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_Radio4AGCDoneRSSI_bus = xl_force(sm_Radio4AGCDoneRSSI, xlUnsigned, 0);\n\n% 'To Register' blocks\n\n% sm_DCO_EN_SEL_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_DCO_EN_SEL_dout = xl_force(sm_DCO_EN_SEL, xlUnsigned, 0);\n\n% sm_DebugRx1Buffers_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_DebugRx1Buffers_dout = xl_force(sm_DebugRx1Buffers, xlUnsigned, 0);\n\n% sm_DebugRx2Buffers_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_DebugRx2Buffers_dout = xl_force(sm_DebugRx2Buffers, xlUnsigned, 0);\n\n% sm_DebugRx3Buffers_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_DebugRx3Buffers_dout = xl_force(sm_DebugRx3Buffers, xlUnsigned, 0);\n\n% sm_DebugRx4Buffers_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_DebugRx4Buffers_dout = xl_force(sm_DebugRx4Buffers, xlUnsigned, 0);\n\n% sm_MGC_AGC_SEL_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_MGC_AGC_SEL_dout = xl_force(sm_MGC_AGC_SEL, xlUnsigned, 0);\n\n% sm_RADIO1RXBUFF_RXEN_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RADIO1RXBUFF_RXEN_dout = xl_force(sm_RADIO1RXBUFF_RXEN, xlUnsigned, 0);\n\n% sm_RADIO1TXBUFF_TXEN_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RADIO1TXBUFF_TXEN_dout = xl_force(sm_RADIO1TXBUFF_TXEN, xlUnsigned, 0);\n\n% sm_RADIO2RXBUFF_RXEN_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RADIO2RXBUFF_RXEN_dout = xl_force(sm_RADIO2RXBUFF_RXEN, xlUnsigned, 0);\n\n% sm_RADIO2TXBUFF_TXEN_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RADIO2TXBUFF_TXEN_dout = xl_force(sm_RADIO2TXBUFF_TXEN, xlUnsigned, 0);\n\n% sm_RADIO3RXBUFF_RXEN_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RADIO3RXBUFF_RXEN_dout = xl_force(sm_RADIO3RXBUFF_RXEN, xlUnsigned, 0);\n\n% sm_RADIO3TXBUFF_TXEN_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RADIO3TXBUFF_TXEN_dout = xl_force(sm_RADIO3TXBUFF_TXEN, xlUnsigned, 0);\n\n% sm_RADIO4RXBUFF_RXEN_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RADIO4RXBUFF_RXEN_dout = xl_force(sm_RADIO4RXBUFF_RXEN, xlUnsigned, 0);\n\n% sm_RADIO4TXBUFF_TXEN_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_RADIO4TXBUFF_TXEN_dout = xl_force(sm_RADIO4TXBUFF_TXEN, xlUnsigned, 0);\n\n% sm_StartCapture_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_StartCapture_dout = xl_force(sm_StartCapture, xlUnsigned, 0);\n\n% sm_StartTx_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_StartTx_dout = xl_force(sm_StartTx, xlUnsigned, 0);\n\n% sm_StopTx_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_StopTx_dout = xl_force(sm_StopTx, xlUnsigned, 0);\n\n% sm_TransMode_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TransMode_dout = xl_force(sm_TransMode, xlUnsigned, 0);\n\n% sm_TxDelay_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxDelay_dout = xl_force(sm_TxDelay, xlUnsigned, 0);\n\n% sm_TxLength_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxLength_dout = xl_force(sm_TxLength, xlUnsigned, 0);\n\n% sm_StartTxRx_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_StartTxRx_dout = xl_force(sm_StartTxRx, xlUnsigned, 0);\n\n\n% 'From FIFO' blocks\n% 'To FIFO' blocks\n% 'Shared Memory' blocks\n% RxBuff_Radio1_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RxBuff_Radio1_bus = xl_force(sm_RxBuff_Radio1, xlUnsigned, 0);\n\n% RxBuff_Radio2_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RxBuff_Radio2_bus = xl_force(sm_RxBuff_Radio2, xlUnsigned, 0);\n\n% RxBuff_Radio3_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RxBuff_Radio3_bus = xl_force(sm_RxBuff_Radio3, xlUnsigned, 0);\n\n% RxBuff_Radio4_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RxBuff_Radio4_bus = xl_force(sm_RxBuff_Radio4, xlUnsigned, 0);\n\n% TxBuff_Radio1_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxBuff_Radio1_bus = xl_force(sm_TxBuff_Radio1, xlUnsigned, 0);\n\n% TxBuff_Radio2_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxBuff_Radio2_bus = xl_force(sm_TxBuff_Radio2, xlUnsigned, 0);\n\n% TxBuff_Radio3_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxBuff_Radio3_bus = xl_force(sm_TxBuff_Radio3, xlUnsigned, 0);\n\n% TxBuff_Radio4_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_TxBuff_Radio4_bus = xl_force(sm_TxBuff_Radio4, xlUnsigned, 0);\n\n% RSSIBuff_Radio1_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RSSIBuff_Radio1_bus = xl_force(sm_RSSIBuff_Radio1, xlUnsigned, 0);\n\n% RSSIBuff_Radio2_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RSSIBuff_Radio2_bus = xl_force(sm_RSSIBuff_Radio2, xlUnsigned, 0);\n\n% RSSIBuff_Radio3_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RSSIBuff_Radio3_bus = xl_force(sm_RSSIBuff_Radio3, xlUnsigned, 0);\n\n% RSSIBuff_Radio4_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_RSSIBuff_Radio4_bus = xl_force(sm_RSSIBuff_Radio4, xlUnsigned, 0);\n\n\n% 'dout' ports of 'From Register' blocks\n\n% registered register mux output\npersistent reg_bank_out_reg; reg_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nreg_bank_out = reg_bank_out_reg;\n\nif linearAddr == 21\n reg_bank_out_reg = sm_AGCDoneAddr_bus;\nelseif linearAddr == 22\n reg_bank_out_reg = sm_CaptureDone_bus;\nelseif linearAddr == 23\n reg_bank_out_reg = sm_Radio1AGCDoneRSSI_bus;\nelseif linearAddr == 24\n reg_bank_out_reg = sm_Radio2AGCDoneRSSI_bus;\nelseif linearAddr == 25\n reg_bank_out_reg = sm_Radio3AGCDoneRSSI_bus;\nelseif linearAddr == 26\n reg_bank_out_reg = sm_Radio4AGCDoneRSSI_bus;\nelseif linearAddr == 0\n reg_bank_out_reg = sm_DCO_EN_SEL_dout;\nelseif linearAddr == 1\n reg_bank_out_reg = sm_DebugRx1Buffers_dout;\nelseif linearAddr == 2\n reg_bank_out_reg = sm_DebugRx2Buffers_dout;\nelseif linearAddr == 3\n reg_bank_out_reg = sm_DebugRx3Buffers_dout;\nelseif linearAddr == 4\n reg_bank_out_reg = sm_DebugRx4Buffers_dout;\nelseif linearAddr == 5\n reg_bank_out_reg = sm_MGC_AGC_SEL_dout;\nelseif linearAddr == 6\n reg_bank_out_reg = sm_RADIO1RXBUFF_RXEN_dout;\nelseif linearAddr == 7\n reg_bank_out_reg = sm_RADIO1TXBUFF_TXEN_dout;\nelseif linearAddr == 8\n reg_bank_out_reg = sm_RADIO2RXBUFF_RXEN_dout;\nelseif linearAddr == 9\n reg_bank_out_reg = sm_RADIO2TXBUFF_TXEN_dout;\nelseif linearAddr == 10\n reg_bank_out_reg = sm_RADIO3RXBUFF_RXEN_dout;\nelseif linearAddr == 11\n reg_bank_out_reg = sm_RADIO3TXBUFF_TXEN_dout;\nelseif linearAddr == 12\n reg_bank_out_reg = sm_RADIO4RXBUFF_RXEN_dout;\nelseif linearAddr == 13\n reg_bank_out_reg = sm_RADIO4TXBUFF_TXEN_dout;\nelseif linearAddr == 14\n reg_bank_out_reg = sm_StartCapture_dout;\nelseif linearAddr == 15\n reg_bank_out_reg = sm_StartTx_dout;\nelseif linearAddr == 16\n reg_bank_out_reg = sm_StopTx_dout;\nelseif linearAddr == 17\n reg_bank_out_reg = sm_TransMode_dout;\nelseif linearAddr == 18\n reg_bank_out_reg = sm_TxDelay_dout;\nelseif linearAddr == 19\n reg_bank_out_reg = sm_TxLength_dout;\nelseif linearAddr == 20\n reg_bank_out_reg = sm_StartTxRx_dout;\n\nend\n\n\n% 'From FIFO' and 'To FIFO' blocks\n\n\n\n\n\nopCode = xl_concat(addrAck, RNWReg, bankAddr, linearAddr);\n\n% 'Shared Memory' blocks\n\nsm_RxBuff_Radio1_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif sm_RxBuff_Radio1_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 0);\n sm_RxBuff_Radio1_sel = true;\nelse\n sm_RxBuff_Radio1_sel = false;\nend\nsm_RxBuff_Radio2_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif sm_RxBuff_Radio2_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 1);\n sm_RxBuff_Radio2_sel = true;\nelse\n sm_RxBuff_Radio2_sel = false;\nend\nsm_RxBuff_Radio3_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif sm_RxBuff_Radio3_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 2);\n sm_RxBuff_Radio3_sel = true;\nelse\n sm_RxBuff_Radio3_sel = false;\nend\nsm_RxBuff_Radio4_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif sm_RxBuff_Radio4_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 3);\n sm_RxBuff_Radio4_sel = true;\nelse\n sm_RxBuff_Radio4_sel = false;\nend\nsm_TxBuff_Radio1_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif sm_TxBuff_Radio1_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 4);\n sm_TxBuff_Radio1_sel = true;\nelse\n sm_TxBuff_Radio1_sel = false;\nend\nsm_TxBuff_Radio2_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif sm_TxBuff_Radio2_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 5);\n sm_TxBuff_Radio2_sel = true;\nelse\n sm_TxBuff_Radio2_sel = false;\nend\nsm_TxBuff_Radio3_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif sm_TxBuff_Radio3_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 6);\n sm_TxBuff_Radio3_sel = true;\nelse\n sm_TxBuff_Radio3_sel = false;\nend\nsm_TxBuff_Radio4_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif sm_TxBuff_Radio4_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 7);\n sm_TxBuff_Radio4_sel = true;\nelse\n sm_TxBuff_Radio4_sel = false;\nend\nsm_RSSIBuff_Radio1_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 11) ...\n );\nif sm_RSSIBuff_Radio1_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 11, ...\n 0}, ...\n 64);\n sm_RSSIBuff_Radio1_sel = true;\nelse\n sm_RSSIBuff_Radio1_sel = false;\nend\nsm_RSSIBuff_Radio2_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 11) ...\n );\nif sm_RSSIBuff_Radio2_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 11, ...\n 0}, ...\n 65);\n sm_RSSIBuff_Radio2_sel = true;\nelse\n sm_RSSIBuff_Radio2_sel = false;\nend\nsm_RSSIBuff_Radio3_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 11) ...\n );\nif sm_RSSIBuff_Radio3_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 11, ...\n 0}, ...\n 66);\n sm_RSSIBuff_Radio3_sel = true;\nelse\n sm_RSSIBuff_Radio3_sel = false;\nend\nsm_RSSIBuff_Radio4_sel_value = xl_concat(xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 11) ...\n );\nif sm_RSSIBuff_Radio4_sel_value == xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 11, ...\n 0}, ...\n 67);\n sm_RSSIBuff_Radio4_sel = true;\nelse\n sm_RSSIBuff_Radio4_sel = false;\nend\n\n\n% registered Shared Memory mux output\npersistent ram_bank_out_reg; ram_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nram_bank_out = ram_bank_out_reg;\nif sm_RxBuff_Radio1_sel\n ram_bank_out_reg = sm_RxBuff_Radio1_bus;\nelseif sm_RxBuff_Radio2_sel\n ram_bank_out_reg = sm_RxBuff_Radio2_bus;\nelseif sm_RxBuff_Radio3_sel\n ram_bank_out_reg = sm_RxBuff_Radio3_bus;\nelseif sm_RxBuff_Radio4_sel\n ram_bank_out_reg = sm_RxBuff_Radio4_bus;\nelseif sm_TxBuff_Radio1_sel\n ram_bank_out_reg = sm_TxBuff_Radio1_bus;\nelseif sm_TxBuff_Radio2_sel\n ram_bank_out_reg = sm_TxBuff_Radio2_bus;\nelseif sm_TxBuff_Radio3_sel\n ram_bank_out_reg = sm_TxBuff_Radio3_bus;\nelseif sm_TxBuff_Radio4_sel\n ram_bank_out_reg = sm_TxBuff_Radio4_bus;\nelseif sm_RSSIBuff_Radio1_sel\n ram_bank_out_reg = sm_RSSIBuff_Radio1_bus;\nelseif sm_RSSIBuff_Radio2_sel\n ram_bank_out_reg = sm_RSSIBuff_Radio2_bus;\nelseif sm_RSSIBuff_Radio3_sel\n ram_bank_out_reg = sm_RSSIBuff_Radio3_bus;\nelseif sm_RSSIBuff_Radio4_sel\n ram_bank_out_reg = sm_RSSIBuff_Radio4_bus;\nend\n\n% 'din' ports of 'Shared Memory' blocks\nsm_RxBuff_Radio1_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RxBuff_Radio2_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RxBuff_Radio3_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RxBuff_Radio4_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_TxBuff_Radio1_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_TxBuff_Radio2_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_TxBuff_Radio3_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_TxBuff_Radio4_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RSSIBuff_Radio1_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RSSIBuff_Radio2_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RSSIBuff_Radio3_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RSSIBuff_Radio4_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\n\n\n% 'we' ports of 'Shared Memory' blocks\npersistent sm_RxBuff_Radio1_we_reg; sm_RxBuff_Radio1_we_reg = xl_state(false, {xlBoolean});\nsm_RxBuff_Radio1_we = sm_RxBuff_Radio1_we_reg;\nopCode_sm_RxBuff_Radio1 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif opCode_sm_RxBuff_Radio1 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 0) ...\n );\n sm_RxBuff_Radio1_we_reg = true;\nelse\n sm_RxBuff_Radio1_we_reg = false;\nend\npersistent sm_RxBuff_Radio2_we_reg; sm_RxBuff_Radio2_we_reg = xl_state(false, {xlBoolean});\nsm_RxBuff_Radio2_we = sm_RxBuff_Radio2_we_reg;\nopCode_sm_RxBuff_Radio2 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif opCode_sm_RxBuff_Radio2 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 1) ...\n );\n sm_RxBuff_Radio2_we_reg = true;\nelse\n sm_RxBuff_Radio2_we_reg = false;\nend\npersistent sm_RxBuff_Radio3_we_reg; sm_RxBuff_Radio3_we_reg = xl_state(false, {xlBoolean});\nsm_RxBuff_Radio3_we = sm_RxBuff_Radio3_we_reg;\nopCode_sm_RxBuff_Radio3 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif opCode_sm_RxBuff_Radio3 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 2) ...\n );\n sm_RxBuff_Radio3_we_reg = true;\nelse\n sm_RxBuff_Radio3_we_reg = false;\nend\npersistent sm_RxBuff_Radio4_we_reg; sm_RxBuff_Radio4_we_reg = xl_state(false, {xlBoolean});\nsm_RxBuff_Radio4_we = sm_RxBuff_Radio4_we_reg;\nopCode_sm_RxBuff_Radio4 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif opCode_sm_RxBuff_Radio4 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 3) ...\n );\n sm_RxBuff_Radio4_we_reg = true;\nelse\n sm_RxBuff_Radio4_we_reg = false;\nend\npersistent sm_TxBuff_Radio1_we_reg; sm_TxBuff_Radio1_we_reg = xl_state(false, {xlBoolean});\nsm_TxBuff_Radio1_we = sm_TxBuff_Radio1_we_reg;\nopCode_sm_TxBuff_Radio1 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif opCode_sm_TxBuff_Radio1 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 4) ...\n );\n sm_TxBuff_Radio1_we_reg = true;\nelse\n sm_TxBuff_Radio1_we_reg = false;\nend\npersistent sm_TxBuff_Radio2_we_reg; sm_TxBuff_Radio2_we_reg = xl_state(false, {xlBoolean});\nsm_TxBuff_Radio2_we = sm_TxBuff_Radio2_we_reg;\nopCode_sm_TxBuff_Radio2 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif opCode_sm_TxBuff_Radio2 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 5) ...\n );\n sm_TxBuff_Radio2_we_reg = true;\nelse\n sm_TxBuff_Radio2_we_reg = false;\nend\npersistent sm_TxBuff_Radio3_we_reg; sm_TxBuff_Radio3_we_reg = xl_state(false, {xlBoolean});\nsm_TxBuff_Radio3_we = sm_TxBuff_Radio3_we_reg;\nopCode_sm_TxBuff_Radio3 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif opCode_sm_TxBuff_Radio3 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 6) ...\n );\n sm_TxBuff_Radio3_we_reg = true;\nelse\n sm_TxBuff_Radio3_we_reg = false;\nend\npersistent sm_TxBuff_Radio4_we_reg; sm_TxBuff_Radio4_we_reg = xl_state(false, {xlBoolean});\nsm_TxBuff_Radio4_we = sm_TxBuff_Radio4_we_reg;\nopCode_sm_TxBuff_Radio4 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 14) ...\n );\nif opCode_sm_TxBuff_Radio4 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 14, ...\n 0}, ...\n 7) ...\n );\n sm_TxBuff_Radio4_we_reg = true;\nelse\n sm_TxBuff_Radio4_we_reg = false;\nend\npersistent sm_RSSIBuff_Radio1_we_reg; sm_RSSIBuff_Radio1_we_reg = xl_state(false, {xlBoolean});\nsm_RSSIBuff_Radio1_we = sm_RSSIBuff_Radio1_we_reg;\nopCode_sm_RSSIBuff_Radio1 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 11) ...\n );\nif opCode_sm_RSSIBuff_Radio1 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 11, ...\n 0}, ...\n 64) ...\n );\n sm_RSSIBuff_Radio1_we_reg = true;\nelse\n sm_RSSIBuff_Radio1_we_reg = false;\nend\npersistent sm_RSSIBuff_Radio2_we_reg; sm_RSSIBuff_Radio2_we_reg = xl_state(false, {xlBoolean});\nsm_RSSIBuff_Radio2_we = sm_RSSIBuff_Radio2_we_reg;\nopCode_sm_RSSIBuff_Radio2 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 11) ...\n );\nif opCode_sm_RSSIBuff_Radio2 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 11, ...\n 0}, ...\n 65) ...\n );\n sm_RSSIBuff_Radio2_we_reg = true;\nelse\n sm_RSSIBuff_Radio2_we_reg = false;\nend\npersistent sm_RSSIBuff_Radio3_we_reg; sm_RSSIBuff_Radio3_we_reg = xl_state(false, {xlBoolean});\nsm_RSSIBuff_Radio3_we = sm_RSSIBuff_Radio3_we_reg;\nopCode_sm_RSSIBuff_Radio3 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 11) ...\n );\nif opCode_sm_RSSIBuff_Radio3 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 11, ...\n 0}, ...\n 66) ...\n );\n sm_RSSIBuff_Radio3_we_reg = true;\nelse\n sm_RSSIBuff_Radio3_we_reg = false;\nend\npersistent sm_RSSIBuff_Radio4_we_reg; sm_RSSIBuff_Radio4_we_reg = xl_state(false, {xlBoolean});\nsm_RSSIBuff_Radio4_we = sm_RSSIBuff_Radio4_we_reg;\nopCode_sm_RSSIBuff_Radio4 = xl_concat(addrAck, ...\n RNWReg, ...\n bankAddr, ...\n xl_slice(linearAddr, ...\n xl_nbits(linearAddr) - 1, ...\n 11) ...\n );\nif opCode_sm_RSSIBuff_Radio4 == xl_concat(xfix({xlUnsigned, 4, 0}, 8), ...\n xfix({xlUnsigned, ...\n xl_nbits(linearAddr) - 11, ...\n 0}, ...\n 67) ...\n );\n sm_RSSIBuff_Radio4_we_reg = true;\nelse\n sm_RSSIBuff_Radio4_we_reg = false;\nend\n\n\n% 'addr' ports of 'Shared Memory' blocks\npersistent sm_RxBuff_Radio1_addr_reg; \nsm_RxBuff_Radio1_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_RxBuff_Radio1_addr = sm_RxBuff_Radio1_addr_reg;\nif addrAck == 1\n sm_RxBuff_Radio1_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n sm_RxBuff_Radio1_addr_reg = sm_RxBuff_Radio1_addr_reg;\nend\npersistent sm_RxBuff_Radio2_addr_reg; \nsm_RxBuff_Radio2_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_RxBuff_Radio2_addr = sm_RxBuff_Radio2_addr_reg;\nif addrAck == 1\n sm_RxBuff_Radio2_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n sm_RxBuff_Radio2_addr_reg = sm_RxBuff_Radio2_addr_reg;\nend\npersistent sm_RxBuff_Radio3_addr_reg; \nsm_RxBuff_Radio3_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_RxBuff_Radio3_addr = sm_RxBuff_Radio3_addr_reg;\nif addrAck == 1\n sm_RxBuff_Radio3_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n sm_RxBuff_Radio3_addr_reg = sm_RxBuff_Radio3_addr_reg;\nend\npersistent sm_RxBuff_Radio4_addr_reg; \nsm_RxBuff_Radio4_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_RxBuff_Radio4_addr = sm_RxBuff_Radio4_addr_reg;\nif addrAck == 1\n sm_RxBuff_Radio4_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n sm_RxBuff_Radio4_addr_reg = sm_RxBuff_Radio4_addr_reg;\nend\npersistent sm_TxBuff_Radio1_addr_reg; \nsm_TxBuff_Radio1_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_TxBuff_Radio1_addr = sm_TxBuff_Radio1_addr_reg;\nif addrAck == 1\n sm_TxBuff_Radio1_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n sm_TxBuff_Radio1_addr_reg = sm_TxBuff_Radio1_addr_reg;\nend\npersistent sm_TxBuff_Radio2_addr_reg; \nsm_TxBuff_Radio2_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_TxBuff_Radio2_addr = sm_TxBuff_Radio2_addr_reg;\nif addrAck == 1\n sm_TxBuff_Radio2_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n sm_TxBuff_Radio2_addr_reg = sm_TxBuff_Radio2_addr_reg;\nend\npersistent sm_TxBuff_Radio3_addr_reg; \nsm_TxBuff_Radio3_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_TxBuff_Radio3_addr = sm_TxBuff_Radio3_addr_reg;\nif addrAck == 1\n sm_TxBuff_Radio3_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n sm_TxBuff_Radio3_addr_reg = sm_TxBuff_Radio3_addr_reg;\nend\npersistent sm_TxBuff_Radio4_addr_reg; \nsm_TxBuff_Radio4_addr_reg = xl_state(0, {xlUnsigned, 14, 0});\nsm_TxBuff_Radio4_addr = sm_TxBuff_Radio4_addr_reg;\nif addrAck == 1\n sm_TxBuff_Radio4_addr_reg = xl_slice(linearAddr, 14, 0);\nelse\n sm_TxBuff_Radio4_addr_reg = sm_TxBuff_Radio4_addr_reg;\nend\npersistent sm_RSSIBuff_Radio1_addr_reg; \nsm_RSSIBuff_Radio1_addr_reg = xl_state(0, {xlUnsigned, 11, 0});\nsm_RSSIBuff_Radio1_addr = sm_RSSIBuff_Radio1_addr_reg;\nif addrAck == 1\n sm_RSSIBuff_Radio1_addr_reg = xl_slice(linearAddr, 11, 0);\nelse\n sm_RSSIBuff_Radio1_addr_reg = sm_RSSIBuff_Radio1_addr_reg;\nend\npersistent sm_RSSIBuff_Radio2_addr_reg; \nsm_RSSIBuff_Radio2_addr_reg = xl_state(0, {xlUnsigned, 11, 0});\nsm_RSSIBuff_Radio2_addr = sm_RSSIBuff_Radio2_addr_reg;\nif addrAck == 1\n sm_RSSIBuff_Radio2_addr_reg = xl_slice(linearAddr, 11, 0);\nelse\n sm_RSSIBuff_Radio2_addr_reg = sm_RSSIBuff_Radio2_addr_reg;\nend\npersistent sm_RSSIBuff_Radio3_addr_reg; \nsm_RSSIBuff_Radio3_addr_reg = xl_state(0, {xlUnsigned, 11, 0});\nsm_RSSIBuff_Radio3_addr = sm_RSSIBuff_Radio3_addr_reg;\nif addrAck == 1\n sm_RSSIBuff_Radio3_addr_reg = xl_slice(linearAddr, 11, 0);\nelse\n sm_RSSIBuff_Radio3_addr_reg = sm_RSSIBuff_Radio3_addr_reg;\nend\npersistent sm_RSSIBuff_Radio4_addr_reg; \nsm_RSSIBuff_Radio4_addr_reg = xl_state(0, {xlUnsigned, 11, 0});\nsm_RSSIBuff_Radio4_addr = sm_RSSIBuff_Radio4_addr_reg;\nif addrAck == 1\n sm_RSSIBuff_Radio4_addr_reg = xl_slice(linearAddr, 11, 0);\nelse\n sm_RSSIBuff_Radio4_addr_reg = sm_RSSIBuff_Radio4_addr_reg;\nend\n\n\n% 're' ports of 'From FIFO' blocks\n\n\n% 'en' ports of 'To Register' blocks\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 0))\n sm_DCO_EN_SEL_en = true;\nelse\n sm_DCO_EN_SEL_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 1))\n sm_DebugRx1Buffers_en = true;\nelse\n sm_DebugRx1Buffers_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 2))\n sm_DebugRx2Buffers_en = true;\nelse\n sm_DebugRx2Buffers_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 3))\n sm_DebugRx3Buffers_en = true;\nelse\n sm_DebugRx3Buffers_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 4))\n sm_DebugRx4Buffers_en = true;\nelse\n sm_DebugRx4Buffers_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 5))\n sm_MGC_AGC_SEL_en = true;\nelse\n sm_MGC_AGC_SEL_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 6))\n sm_RADIO1RXBUFF_RXEN_en = true;\nelse\n sm_RADIO1RXBUFF_RXEN_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 7))\n sm_RADIO1TXBUFF_TXEN_en = true;\nelse\n sm_RADIO1TXBUFF_TXEN_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 8))\n sm_RADIO2RXBUFF_RXEN_en = true;\nelse\n sm_RADIO2RXBUFF_RXEN_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 9))\n sm_RADIO2TXBUFF_TXEN_en = true;\nelse\n sm_RADIO2TXBUFF_TXEN_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 10))\n sm_RADIO3RXBUFF_RXEN_en = true;\nelse\n sm_RADIO3RXBUFF_RXEN_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 11))\n sm_RADIO3TXBUFF_TXEN_en = true;\nelse\n sm_RADIO3TXBUFF_TXEN_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 12))\n sm_RADIO4RXBUFF_RXEN_en = true;\nelse\n sm_RADIO4RXBUFF_RXEN_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 13))\n sm_RADIO4TXBUFF_TXEN_en = true;\nelse\n sm_RADIO4TXBUFF_TXEN_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 14))\n sm_StartCapture_en = true;\nelse\n sm_StartCapture_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 15))\n sm_StartTx_en = true;\nelse\n sm_StartTx_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 16))\n sm_StopTx_en = true;\nelse\n sm_StopTx_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 17))\n sm_TransMode_en = true;\nelse\n sm_TransMode_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 18))\n sm_TxDelay_en = true;\nelse\n sm_TxDelay_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 19))\n sm_TxLength_en = true;\nelse\n sm_TxLength_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 20))\n sm_StartTxRx_en = true;\nelse\n sm_StartTxRx_en = false;\nend\n\n\n% 'din' ports of 'To FIFO' blocks\n\n\n% 'we' ports of 'To FIFO' blocks\n\n\n% 'din' ports of 'To Register' blocks\nsm_DCO_EN_SEL_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_DebugRx1Buffers_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_DebugRx2Buffers_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_DebugRx3Buffers_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_DebugRx4Buffers_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_MGC_AGC_SEL_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RADIO1RXBUFF_RXEN_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RADIO1TXBUFF_TXEN_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RADIO2RXBUFF_RXEN_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RADIO2TXBUFF_TXEN_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RADIO3RXBUFF_RXEN_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RADIO3TXBUFF_TXEN_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RADIO4RXBUFF_RXEN_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_RADIO4TXBUFF_TXEN_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_StartCapture_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_StartTx_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_StopTx_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_TransMode_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_TxDelay_din = xl_force(xl_slice(wrDBus, 14 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_TxLength_din = xl_force(xl_slice(wrDBus, 14 - 1, 0), ...\n xlUnsigned, ...\n 0);\nsm_StartTxRx_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned, ...\n 0);\n\n\npersistent read_bank_out_reg; read_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nread_bank_out = read_bank_out_reg;\n\npersistent bankAddr_reg; bankAddr_reg = xl_state(0, bankAddr);\n\nif bankAddr_reg == 0\n % Bank 0: Shared Memories\n read_bank_out_reg = ram_bank_out;\nelseif bankAddr_reg == 1\n % Bank 1: From/To FIFOs\n read_bank_out_reg = 0;\nelseif bankAddr_reg == 2\n % Bank 2: From/To Registers\n read_bank_out_reg = reg_bank_out;\nelseif bankAddr_reg == 3\n % Bank 3: Configuration Registers\n read_bank_out_reg = 0;\nend\n\nbankAddr_reg = bankAddr;\n"
2713	suppress_output "1"
2714	defparams "{}"
2715	hide_port_list "{}"
2716	has_advanced_control "0"
2717	sggui_pos "-1,-1,-1,-1"
2718	block_type "mcode"
2719	block_version "10.1.3"
2720	sg_icon_stat "170,392,44,79,white,blue,0,1500f9ed,right"
2721	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 170 170 0 ],[0 0 392 392 ],[0.77 0.82 0.91]);\npatch([40 12 52 12 40 85 97 109 157 119 83 57 97 57 83 119 157 109 97 85 40 ],[129 157 197 237 265 265 253 265 265 227 263 237 197 157 131 167 129 129 141 129 129 ],[0.98 0.96 0.92]);\nplot([0 170 170 0 0 ],[0 0 392 392 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'wrDBus');\ncolor('black');port_label('input',2,'bankAddr');\ncolor('black');port_label('input',3,'linearAddr');\ncolor('black');port_label('input',4,'RNWReg');\ncolor('black');port_label('input',5,'addrAck');\ncolor('black');port_label('input',6,'sm_AGCDoneAddr');\ncolor('black');port_label('input',7,'sm_CaptureDone');\ncolor('black');port_label('input',8,'sm_Radio1AGCDoneRSSI');\ncolor('black');port_label('input',9,'sm_Radio2AGCDoneRSSI');\ncolor('black');port_label('input',10,'sm_Radio3AGCDoneRSSI');\ncolor('black');port_label('input',11,'sm_Radio4AGCDoneRSSI');\ncolor('black');port_label('input',12,'sm_DCO_EN_SEL');\ncolor('black');port_label('input',13,'sm_DebugRx1Buffers');\ncolor('black');port_label('input',14,'sm_DebugRx2Buffers');\ncolor('black');port_label('input',15,'sm_DebugRx3Buffers');\ncolor('black');port_label('input',16,'sm_DebugRx4Buffers');\ncolor('black');port_label('input',17,'sm_MGC_AGC_SEL');\ncolor('black');port_label('input',18,'sm_RADIO1RXBUFF_RXEN');\ncolor('black');port_label('input',19,'sm_RADIO1TXBUFF_TXEN');\ncolor('black');port_label('input',20,'sm_RADIO2RXBUFF_RXEN');\ncolor('black');port_label('input',21,'sm_RADIO2TXBUFF_TXEN');\ncolor('black');port_label('input',22,'sm_RADIO3RXBUFF_RXEN');\ncolor('black');port_label('input',23,'sm_RADIO3TXBUFF_TXEN');\ncolor('black');port_label('input',24,'sm_RADIO4RXBUFF_RXEN');\ncolor('black');port_label('input',25,'sm_RADIO4TXBUFF_TXEN');\ncolor('black');port_label('input',26,'sm_StartCapture');\ncolor('black');port_label('input',27,'sm_StartTx');\ncolor('black');port_label('input',28,'sm_StopTx');\ncolor('black');port_label('input',29,'sm_TransMode');\ncolor('black');port_label('input',30,'sm_TxDelay');\ncolor('black');port_label('input',31,'sm_TxLength');\ncolor('black');port_label('input',32,'sm_StartTxRx');\ncolor('black');port_label('input',33,'sm_RxBuff_Radio1');\ncolor('black');port_label('input',34,'sm_RxBuff_Radio2');\ncolor('black');port_label('input',35,'sm_RxBuff_Radio3');\ncolor('black');port_label('input',36,'sm_RxBuff_Radio4');\ncolor('black');port_label('input',37,'sm_TxBuff_Radio1');\ncolor('black');port_label('input',38,'sm_TxBuff_Radio2');\ncolor('black');port_label('input',39,'sm_TxBuff_Radio3');\ncolor('black');port_label('input',40,'sm_TxBuff_Radio4');\ncolor('black');port_label('input',41,'sm_RSSIBuff_Radio1');\ncolor('black');port_label('input',42,'sm_RSSIBuff_Radio2');\ncolor('black');port_label('input',43,'sm_RSSIBuff_Radio3');\ncolor('black');port_label('input',44,'sm_RSSIBuff_Radio4');\ncolor('black');port_label('output',1,'read_bank_out');\ncolor('black');port_label('output',2,'sm_DCO_EN_SEL_din');\ncolor('black');port_label('output',3,'sm_DCO_EN_SEL_en');\ncolor('black');port_label('output',4,'sm_DebugRx1Buffers_din');\ncolor('black');port_label('output',5,'sm_DebugRx1Buffers_en');\ncolor('black');port_label('output',6,'sm_DebugRx2Buffers_din');\ncolor('black');port_label('output',7,'sm_DebugRx2Buffers_en');\ncolor('black');port_label('output',8,'sm_DebugRx3Buffers_din');\ncolor('black');port_label('output',9,'sm_DebugRx3Buffers_en');\ncolor('black');port_label('output',10,'sm_DebugRx4Buffers_din');\ncolor('black');port_label('output',11,'sm_DebugRx4Buffers_en');\ncolor('black');port_label('output',12,'sm_MGC_AGC_SEL_din');\ncolor('black');port_label('output',13,'sm_MGC_AGC_SEL_en');\ncolor('black');port_label('output',14,'sm_RADIO1RXBUFF_RXEN_din');\ncolor('black');port_label('output',15,'sm_RADIO1RXBUFF_RXEN_en');\ncolor('black');port_label('output',16,'sm_RADIO1TXBUFF_TXEN_din');\ncolor('black');port_label('output',17,'sm_RADIO1TXBUFF_TXEN_en');\ncolor('black');port_label('output',18,'sm_RADIO2RXBUFF_RXEN_din');\ncolor('black');port_label('output',19,'sm_RADIO2RXBUFF_RXEN_en');\ncolor('black');port_label('output',20,'sm_RADIO2TXBUFF_TXEN_din');\ncolor('black');port_label('output',21,'sm_RADIO2TXBUFF_TXEN_en');\ncolor('black');port_label('output',22,'sm_RADIO3RXBUFF_RXEN_din');\ncolor('black');port_label('output',23,'sm_RADIO3RXBUFF_RXEN_en');\ncolor('black');port_label('output',24,'sm_RADIO3TXBUFF_TXEN_din');\ncolor('black');port_label('output',25,'sm_RADIO3TXBUFF_TXEN_en');\ncolor('black');port_label('output',26,'sm_RADIO4RXBUFF_RXEN_din');\ncolor('black');port_label('output',27,'sm_RADIO4RXBUFF_RXEN_en');\ncolor('black');port_label('output',28,'sm_RADIO4TXBUFF_TXEN_din');\ncolor('black');port_label('output',29,'sm_RADIO4TXBUFF_TXEN_en');\ncolor('black');port_label('output',30,'sm_StartCapture_din');\ncolor('black');port_label('output',31,'sm_StartCapture_en');\ncolor('black');port_label('output',32,'sm_StartTx_din');\ncolor('black');port_label('output',33,'sm_StartTx_en');\ncolor('black');port_label('output',34,'sm_StopTx_din');\ncolor('black');port_label('output',35,'sm_StopTx_en');\ncolor('black');port_label('output',36,'sm_TransMode_din');\ncolor('black');port_label('output',37,'sm_TransMode_en');\ncolor('black');port_label('output',38,'sm_TxDelay_din');\ncolor('black');port_label('output',39,'sm_TxDelay_en');\ncolor('black');port_label('output',40,'sm_TxLength_din');\ncolor('black');port_label('output',41,'sm_TxLength_en');\ncolor('black');port_label('output',42,'sm_StartTxRx_din');\ncolor('black');port_label('output',43,'sm_StartTxRx_en');\ncolor('black');port_label('output',44,'sm_RxBuff_Radio1_addr');\ncolor('black');port_label('output',45,'sm_RxBuff_Radio1_din');\ncolor('black');port_label('output',46,'sm_RxBuff_Radio1_we');\ncolor('black');port_label('output',47,'sm_RxBuff_Radio2_addr');\ncolor('black');port_label('output',48,'sm_RxBuff_Radio2_din');\ncolor('black');port_label('output',49,'sm_RxBuff_Radio2_we');\ncolor('black');port_label('output',50,'sm_RxBuff_Radio3_addr');\ncolor('black');port_label('output',51,'sm_RxBuff_Radio3_din');\ncolor('black');port_label('output',52,'sm_RxBuff_Radio3_we');\ncolor('black');port_label('output',53,'sm_RxBuff_Radio4_addr');\ncolor('black');port_label('output',54,'sm_RxBuff_Radio4_din');\ncolor('black');port_label('output',55,'sm_RxBuff_Radio4_we');\ncolor('black');port_label('output',56,'sm_TxBuff_Radio1_addr');\ncolor('black');port_label('output',57,'sm_TxBuff_Radio1_din');\ncolor('black');port_label('output',58,'sm_TxBuff_Radio1_we');\ncolor('black');port_label('output',59,'sm_TxBuff_Radio2_addr');\ncolor('black');port_label('output',60,'sm_TxBuff_Radio2_din');\ncolor('black');port_label('output',61,'sm_TxBuff_Radio2_we');\ncolor('black');port_label('output',62,'sm_TxBuff_Radio3_addr');\ncolor('black');port_label('output',63,'sm_TxBuff_Radio3_din');\ncolor('black');port_label('output',64,'sm_TxBuff_Radio3_we');\ncolor('black');port_label('output',65,'sm_TxBuff_Radio4_addr');\ncolor('black');port_label('output',66,'sm_TxBuff_Radio4_din');\ncolor('black');port_label('output',67,'sm_TxBuff_Radio4_we');\ncolor('black');port_label('output',68,'sm_RSSIBuff_Radio1_addr');\ncolor('black');port_label('output',69,'sm_RSSIBuff_Radio1_din');\ncolor('black');port_label('output',70,'sm_RSSIBuff_Radio1_we');\ncolor('black');port_label('output',71,'sm_RSSIBuff_Radio2_addr');\ncolor('black');port_label('output',72,'sm_RSSIBuff_Radio2_din');\ncolor('black');port_label('output',73,'sm_RSSIBuff_Radio2_we');\ncolor('black');port_label('output',74,'sm_RSSIBuff_Radio3_addr');\ncolor('black');port_label('output',75,'sm_RSSIBuff_Radio3_din');\ncolor('black');port_label('output',76,'sm_RSSIBuff_Radio3_we');\ncolor('black');port_label('output',77,'sm_RSSIBuff_Radio4_addr');\ncolor('black');port_label('output',78,'sm_RSSIBuff_Radio4_din');\ncolor('black');port_label('output',79,'sm_RSSIBuff_Radio4_we');\ncolor('black');disp('\\bf{xlmax}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
2722	Port {
2723	PortNumber 1
2724	Name "rdData"
2725	RTWStorageClass "Auto"
2726	DataLoggingNameMode "SignalName"
2727	}
2728	Port {
2729	PortNumber 2
2730	Name "DCO_EN_SEL_din"
2731	RTWStorageClass "Auto"
2732	DataLoggingNameMode "SignalName"
2733	}
2734	Port {
2735	PortNumber 3
2736	Name "DCO_EN_SEL_en"
2737	RTWStorageClass "Auto"
2738	DataLoggingNameMode "SignalName"
2739	}
2740	Port {
2741	PortNumber 4
2742	Name "DebugRx1Buffers_din"
2743	RTWStorageClass "Auto"
2744	DataLoggingNameMode "SignalName"
2745	}
2746	Port {
2747	PortNumber 5
2748	Name "DebugRx1Buffers_en"
2749	RTWStorageClass "Auto"
2750	DataLoggingNameMode "SignalName"
2751	}
2752	Port {
2753	PortNumber 6
2754	Name "DebugRx2Buffers_din"
2755	RTWStorageClass "Auto"
2756	DataLoggingNameMode "SignalName"
2757	}
2758	Port {
2759	PortNumber 7
2760	Name "DebugRx2Buffers_en"
2761	RTWStorageClass "Auto"
2762	DataLoggingNameMode "SignalName"
2763	}
2764	Port {
2765	PortNumber 8
2766	Name "DebugRx3Buffers_din"
2767	RTWStorageClass "Auto"
2768	DataLoggingNameMode "SignalName"
2769	}
2770	Port {
2771	PortNumber 9
2772	Name "DebugRx3Buffers_en"
2773	RTWStorageClass "Auto"
2774	DataLoggingNameMode "SignalName"
2775	}
2776	Port {
2777	PortNumber 10
2778	Name "DebugRx4Buffers_din"
2779	RTWStorageClass "Auto"
2780	DataLoggingNameMode "SignalName"
2781	}
2782	Port {
2783	PortNumber 11
2784	Name "DebugRx4Buffers_en"
2785	RTWStorageClass "Auto"
2786	DataLoggingNameMode "SignalName"
2787	}
2788	Port {
2789	PortNumber 12
2790	Name "MGC_AGC_SEL_din"
2791	RTWStorageClass "Auto"
2792	DataLoggingNameMode "SignalName"
2793	}
2794	Port {
2795	PortNumber 13
2796	Name "MGC_AGC_SEL_en"
2797	RTWStorageClass "Auto"
2798	DataLoggingNameMode "SignalName"
2799	}
2800	Port {
2801	PortNumber 14
2802	Name "RADIO1RXBUFF_RXEN_din"
2803	RTWStorageClass "Auto"
2804	DataLoggingNameMode "SignalName"
2805	}
2806	Port {
2807	PortNumber 15
2808	Name "RADIO1RXBUFF_RXEN_en"
2809	RTWStorageClass "Auto"
2810	DataLoggingNameMode "SignalName"
2811	}
2812	Port {
2813	PortNumber 16
2814	Name "RADIO1TXBUFF_TXEN_din"
2815	RTWStorageClass "Auto"
2816	DataLoggingNameMode "SignalName"
2817	}
2818	Port {
2819	PortNumber 17
2820	Name "RADIO1TXBUFF_TXEN_en"
2821	RTWStorageClass "Auto"
2822	DataLoggingNameMode "SignalName"
2823	}
2824	Port {
2825	PortNumber 18
2826	Name "RADIO2RXBUFF_RXEN_din"
2827	RTWStorageClass "Auto"
2828	DataLoggingNameMode "SignalName"
2829	}
2830	Port {
2831	PortNumber 19
2832	Name "RADIO2RXBUFF_RXEN_en"
2833	RTWStorageClass "Auto"
2834	DataLoggingNameMode "SignalName"
2835	}
2836	Port {
2837	PortNumber 20
2838	Name "RADIO2TXBUFF_TXEN_din"
2839	RTWStorageClass "Auto"
2840	DataLoggingNameMode "SignalName"
2841	}
2842	Port {
2843	PortNumber 21
2844	Name "RADIO2TXBUFF_TXEN_en"
2845	RTWStorageClass "Auto"
2846	DataLoggingNameMode "SignalName"
2847	}
2848	Port {
2849	PortNumber 22
2850	Name "RADIO3RXBUFF_RXEN_din"
2851	RTWStorageClass "Auto"
2852	DataLoggingNameMode "SignalName"
2853	}
2854	Port {
2855	PortNumber 23
2856	Name "RADIO3RXBUFF_RXEN_en"
2857	RTWStorageClass "Auto"
2858	DataLoggingNameMode "SignalName"
2859	}
2860	Port {
2861	PortNumber 24
2862	Name "RADIO3TXBUFF_TXEN_din"
2863	RTWStorageClass "Auto"
2864	DataLoggingNameMode "SignalName"
2865	}
2866	Port {
2867	PortNumber 25
2868	Name "RADIO3TXBUFF_TXEN_en"
2869	RTWStorageClass "Auto"
2870	DataLoggingNameMode "SignalName"
2871	}
2872	Port {
2873	PortNumber 26
2874	Name "RADIO4RXBUFF_RXEN_din"
2875	RTWStorageClass "Auto"
2876	DataLoggingNameMode "SignalName"
2877	}
2878	Port {
2879	PortNumber 27
2880	Name "RADIO4RXBUFF_RXEN_en"
2881	RTWStorageClass "Auto"
2882	DataLoggingNameMode "SignalName"
2883	}
2884	Port {
2885	PortNumber 28
2886	Name "RADIO4TXBUFF_TXEN_din"
2887	RTWStorageClass "Auto"
2888	DataLoggingNameMode "SignalName"
2889	}
2890	Port {
2891	PortNumber 29
2892	Name "RADIO4TXBUFF_TXEN_en"
2893	RTWStorageClass "Auto"
2894	DataLoggingNameMode "SignalName"
2895	}
2896	Port {
2897	PortNumber 30
2898	Name "StartCapture_din"
2899	RTWStorageClass "Auto"
2900	DataLoggingNameMode "SignalName"
2901	}
2902	Port {
2903	PortNumber 31
2904	Name "StartCapture_en"
2905	RTWStorageClass "Auto"
2906	DataLoggingNameMode "SignalName"
2907	}
2908	Port {
2909	PortNumber 32
2910	Name "StartTx_din"
2911	RTWStorageClass "Auto"
2912	DataLoggingNameMode "SignalName"
2913	}
2914	Port {
2915	PortNumber 33
2916	Name "StartTx_en"
2917	RTWStorageClass "Auto"
2918	DataLoggingNameMode "SignalName"
2919	}
2920	Port {
2921	PortNumber 34
2922	Name "StopTx_din"
2923	RTWStorageClass "Auto"
2924	DataLoggingNameMode "SignalName"
2925	}
2926	Port {
2927	PortNumber 35
2928	Name "StopTx_en"
2929	RTWStorageClass "Auto"
2930	DataLoggingNameMode "SignalName"
2931	}
2932	Port {
2933	PortNumber 36
2934	Name "TransMode_din"
2935	RTWStorageClass "Auto"
2936	DataLoggingNameMode "SignalName"
2937	}
2938	Port {
2939	PortNumber 37
2940	Name "TransMode_en"
2941	RTWStorageClass "Auto"
2942	DataLoggingNameMode "SignalName"
2943	}
2944	Port {
2945	PortNumber 38
2946	Name "TxDelay_din"
2947	RTWStorageClass "Auto"
2948	DataLoggingNameMode "SignalName"
2949	}
2950	Port {
2951	PortNumber 39
2952	Name "TxDelay_en"
2953	RTWStorageClass "Auto"
2954	DataLoggingNameMode "SignalName"
2955	}
2956	Port {
2957	PortNumber 40
2958	Name "TxLength_din"
2959	RTWStorageClass "Auto"
2960	DataLoggingNameMode "SignalName"
2961	}
2962	Port {
2963	PortNumber 41
2964	Name "TxLength_en"
2965	RTWStorageClass "Auto"
2966	DataLoggingNameMode "SignalName"
2967	}
2968	Port {
2969	PortNumber 42
2970	Name "StartTxRx_din"
2971	RTWStorageClass "Auto"
2972	DataLoggingNameMode "SignalName"
2973	}
2974	Port {
2975	PortNumber 43
2976	Name "StartTxRx_en"
2977	RTWStorageClass "Auto"
2978	DataLoggingNameMode "SignalName"
2979	}
2980	Port {
2981	PortNumber 44
2982	Name "RxBuff_Radio1_addr"
2983	RTWStorageClass "Auto"
2984	DataLoggingNameMode "SignalName"
2985	}
2986	Port {
2987	PortNumber 45
2988	Name "RxBuff_Radio1_din"
2989	RTWStorageClass "Auto"
2990	DataLoggingNameMode "SignalName"
2991	}
2992	Port {
2993	PortNumber 46
2994	Name "RxBuff_Radio1_we"
2995	RTWStorageClass "Auto"
2996	DataLoggingNameMode "SignalName"
2997	}
2998	Port {
2999	PortNumber 47
3000	Name "RxBuff_Radio2_addr"
3001	RTWStorageClass "Auto"
3002	DataLoggingNameMode "SignalName"
3003	}
3004	Port {
3005	PortNumber 48
3006	Name "RxBuff_Radio2_din"
3007	RTWStorageClass "Auto"
3008	DataLoggingNameMode "SignalName"
3009	}
3010	Port {
3011	PortNumber 49
3012	Name "RxBuff_Radio2_we"
3013	RTWStorageClass "Auto"
3014	DataLoggingNameMode "SignalName"
3015	}
3016	Port {
3017	PortNumber 50
3018	Name "RxBuff_Radio3_addr"
3019	RTWStorageClass "Auto"
3020	DataLoggingNameMode "SignalName"
3021	}
3022	Port {
3023	PortNumber 51
3024	Name "RxBuff_Radio3_din"
3025	RTWStorageClass "Auto"
3026	DataLoggingNameMode "SignalName"
3027	}
3028	Port {
3029	PortNumber 52
3030	Name "RxBuff_Radio3_we"
3031	RTWStorageClass "Auto"
3032	DataLoggingNameMode "SignalName"
3033	}
3034	Port {
3035	PortNumber 53
3036	Name "RxBuff_Radio4_addr"
3037	RTWStorageClass "Auto"
3038	DataLoggingNameMode "SignalName"
3039	}
3040	Port {
3041	PortNumber 54
3042	Name "RxBuff_Radio4_din"
3043	RTWStorageClass "Auto"
3044	DataLoggingNameMode "SignalName"
3045	}
3046	Port {
3047	PortNumber 55
3048	Name "RxBuff_Radio4_we"
3049	RTWStorageClass "Auto"
3050	DataLoggingNameMode "SignalName"
3051	}
3052	Port {
3053	PortNumber 56
3054	Name "TxBuff_Radio1_addr"
3055	RTWStorageClass "Auto"
3056	DataLoggingNameMode "SignalName"
3057	}
3058	Port {
3059	PortNumber 57
3060	Name "TxBuff_Radio1_din"
3061	RTWStorageClass "Auto"
3062	DataLoggingNameMode "SignalName"
3063	}
3064	Port {
3065	PortNumber 58
3066	Name "TxBuff_Radio1_we"
3067	RTWStorageClass "Auto"
3068	DataLoggingNameMode "SignalName"
3069	}
3070	Port {
3071	PortNumber 59
3072	Name "TxBuff_Radio2_addr"
3073	RTWStorageClass "Auto"
3074	DataLoggingNameMode "SignalName"
3075	}
3076	Port {
3077	PortNumber 60
3078	Name "TxBuff_Radio2_din"
3079	RTWStorageClass "Auto"
3080	DataLoggingNameMode "SignalName"
3081	}
3082	Port {
3083	PortNumber 61
3084	Name "TxBuff_Radio2_we"
3085	RTWStorageClass "Auto"
3086	DataLoggingNameMode "SignalName"
3087	}
3088	Port {
3089	PortNumber 62
3090	Name "TxBuff_Radio3_addr"
3091	RTWStorageClass "Auto"
3092	DataLoggingNameMode "SignalName"
3093	}
3094	Port {
3095	PortNumber 63
3096	Name "TxBuff_Radio3_din"
3097	RTWStorageClass "Auto"
3098	DataLoggingNameMode "SignalName"
3099	}
3100	Port {
3101	PortNumber 64
3102	Name "TxBuff_Radio3_we"
3103	RTWStorageClass "Auto"
3104	DataLoggingNameMode "SignalName"
3105	}
3106	Port {
3107	PortNumber 65
3108	Name "TxBuff_Radio4_addr"
3109	RTWStorageClass "Auto"
3110	DataLoggingNameMode "SignalName"
3111	}
3112	Port {
3113	PortNumber 66
3114	Name "TxBuff_Radio4_din"
3115	RTWStorageClass "Auto"
3116	DataLoggingNameMode "SignalName"
3117	}
3118	Port {
3119	PortNumber 67
3120	Name "TxBuff_Radio4_we"
3121	RTWStorageClass "Auto"
3122	DataLoggingNameMode "SignalName"
3123	}
3124	Port {
3125	PortNumber 68
3126	Name "RSSIBuff_Radio1_addr"
3127	RTWStorageClass "Auto"
3128	DataLoggingNameMode "SignalName"
3129	}
3130	Port {
3131	PortNumber 69
3132	Name "RSSIBuff_Radio1_din"
3133	RTWStorageClass "Auto"
3134	DataLoggingNameMode "SignalName"
3135	}
3136	Port {
3137	PortNumber 70
3138	Name "RSSIBuff_Radio1_we"
3139	RTWStorageClass "Auto"
3140	DataLoggingNameMode "SignalName"
3141	}
3142	Port {
3143	PortNumber 71
3144	Name "RSSIBuff_Radio2_addr"
3145	RTWStorageClass "Auto"
3146	DataLoggingNameMode "SignalName"
3147	}
3148	Port {
3149	PortNumber 72
3150	Name "RSSIBuff_Radio2_din"
3151	RTWStorageClass "Auto"
3152	DataLoggingNameMode "SignalName"
3153	}
3154	Port {
3155	PortNumber 73
3156	Name "RSSIBuff_Radio2_we"
3157	RTWStorageClass "Auto"
3158	DataLoggingNameMode "SignalName"
3159	}
3160	Port {
3161	PortNumber 74
3162	Name "RSSIBuff_Radio3_addr"
3163	RTWStorageClass "Auto"
3164	DataLoggingNameMode "SignalName"
3165	}
3166	Port {
3167	PortNumber 75
3168	Name "RSSIBuff_Radio3_din"
3169	RTWStorageClass "Auto"
3170	DataLoggingNameMode "SignalName"
3171	}
3172	Port {
3173	PortNumber 76
3174	Name "RSSIBuff_Radio3_we"
3175	RTWStorageClass "Auto"
3176	DataLoggingNameMode "SignalName"
3177	}
3178	Port {
3179	PortNumber 77
3180	Name "RSSIBuff_Radio4_addr"
3181	RTWStorageClass "Auto"
3182	DataLoggingNameMode "SignalName"
3183	}
3184	Port {
3185	PortNumber 78
3186	Name "RSSIBuff_Radio4_din"
3187	RTWStorageClass "Auto"
3188	DataLoggingNameMode "SignalName"
3189	}
3190	Port {
3191	PortNumber 79
3192	Name "RSSIBuff_Radio4_we"
3193	RTWStorageClass "Auto"
3194	DataLoggingNameMode "SignalName"
3195	}
3196	}
3197	Block {
3198	BlockType Reference
3199	Name "sg_plb_addrpref"
3200	Ports [1, 1]
3201	Position [110, 915, 175, 935]
3202	SourceBlock "xbsIndex_r4/Gateway In"
3203	SourceType "Xilinx Gateway In Block"
3204	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
3205	arith_type "Unsigned"
3206	n_bits "10"
3207	bin_pt "0"
3208	quantization "Round (unbiased: +/- Inf)"
3209	overflow "Saturate"
3210	period "xlGetSimulinkPeriod(gcb)"
3211	dbl_ovrd off
3212	timing_constraint "None"
3213	locs_specified off
3214	LOCs "{}"
3215	xl_use_area off
3216	xl_area "[0,0,0,0,0,0,0]"
3217	sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'sg_plb_addrpref'}},'iopad'=>{'constraint'=>'#'}}"
3218	has_advanced_control "0"
3219	sggui_pos "-1,-1,-1,-1"
3220	block_type "gatewayin"
3221	block_version "10.1.3"
3222	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
3223	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
3224	Port {
3225	PortNumber 1
3226	Name "addrPref"
3227	RTWStorageClass "Auto"
3228	DataLoggingNameMode "SignalName"
3229	}
3230	}
3231	Line {
3232	Name "Sl_addrAck"
3233	SrcBlock "plb_decode"
3234	SrcPort 2
3235	Points [0, 0]
3236	Branch {
3237	Labels [1, 0]
3238	Points [5, 0; 0, 1135]
3239	DstBlock "plb_memmap"
3240	DstPort 5
3241	}
3242	Branch {
3243	Labels [0, 0]
3244	Points [30, 0; 0, -505]
3245	DstBlock "Sl_addrAck"
3246	DstPort 1
3247	}
3248	}
3249	Line {
3250	Name "Sl_wrDAck"
3251	SrcBlock "plb_decode"
3252	SrcPort 4
3253	Points [0, 0]
3254	Branch {
3255	Labels [1, 0]
3256	Points [30, 0; 0, -315]
3257	DstBlock "Sl_wrDAck"
3258	DstPort 1
3259	}
3260	Branch {
3261	Labels [0, 0]
3262	Points [30, 0; 0, -30]
3263	DstBlock "Sl_wrComp"
3264	DstPort 1
3265	}
3266	}
3267	Line {
3268	Name "RSSIBuff_Radio4_we"
3269	Labels [0, 0]
3270	SrcBlock "plb_memmap"
3271	SrcPort 79
3272	Points [5, 0; 0, 1525]
3273	DstBlock "Shared Memory11"
3274	DstPort 3
3275	}
3276	Line {
3277	Name "RSSIBuff_Radio4_din"
3278	Labels [0, 0]
3279	SrcBlock "plb_memmap"
3280	SrcPort 78
3281	Points [5, 0; 0, 1500]
3282	DstBlock "Shared Memory11"
3283	DstPort 2
3284	}
3285	Line {
3286	Name "RSSIBuff_Radio4_addr"
3287	Labels [0, 0]
3288	SrcBlock "plb_memmap"
3289	SrcPort 77
3290	Points [5, 0; 0, 1475]
3291	DstBlock "Shared Memory11"
3292	DstPort 1
3293	}
3294	Line {
3295	Name "RSSIBuff_Radio3_we"
3296	Labels [0, 0]
3297	SrcBlock "plb_memmap"
3298	SrcPort 76
3299	Points [5, 0; 0, 1420]
3300	DstBlock "Shared Memory10"
3301	DstPort 3
3302	}
3303	Line {
3304	Name "RSSIBuff_Radio3_din"
3305	Labels [0, 0]
3306	SrcBlock "plb_memmap"
3307	SrcPort 75
3308	Points [5, 0; 0, 1395]
3309	DstBlock "Shared Memory10"
3310	DstPort 2
3311	}
3312	Line {
3313	Name "RSSIBuff_Radio3_addr"
3314	Labels [0, 0]
3315	SrcBlock "plb_memmap"
3316	SrcPort 74
3317	Points [5, 0; 0, 1370]
3318	DstBlock "Shared Memory10"
3319	DstPort 1
3320	}
3321	Line {
3322	Name "RSSIBuff_Radio2_we"
3323	Labels [0, 0]
3324	SrcBlock "plb_memmap"
3325	SrcPort 73
3326	Points [5, 0; 0, 1315]
3327	DstBlock "Shared Memory9"
3328	DstPort 3
3329	}
3330	Line {
3331	Name "RSSIBuff_Radio2_din"
3332	Labels [0, 0]
3333	SrcBlock "plb_memmap"
3334	SrcPort 72
3335	Points [5, 0; 0, 1290]
3336	DstBlock "Shared Memory9"
3337	DstPort 2
3338	}
3339	Line {
3340	Name "RSSIBuff_Radio2_addr"
3341	Labels [0, 0]
3342	SrcBlock "plb_memmap"
3343	SrcPort 71
3344	Points [5, 0; 0, 1265]
3345	DstBlock "Shared Memory9"
3346	DstPort 1
3347	}
3348	Line {
3349	Name "RSSIBuff_Radio1_we"
3350	Labels [0, 0]
3351	SrcBlock "plb_memmap"
3352	SrcPort 70
3353	Points [5, 0; 0, 1210]
3354	DstBlock "Shared Memory8"
3355	DstPort 3
3356	}
3357	Line {
3358	Name "RSSIBuff_Radio1_din"
3359	Labels [0, 0]
3360	SrcBlock "plb_memmap"
3361	SrcPort 69
3362	Points [5, 0; 0, 1185]
3363	DstBlock "Shared Memory8"
3364	DstPort 2
3365	}
3366	Line {
3367	Name "RSSIBuff_Radio1_addr"
3368	Labels [0, 0]
3369	SrcBlock "plb_memmap"
3370	SrcPort 68
3371	Points [5, 0; 0, 1160]
3372	DstBlock "Shared Memory8"
3373	DstPort 1
3374	}
3375	Line {
3376	Name "TxBuff_Radio4_we"
3377	Labels [0, 0]
3378	SrcBlock "plb_memmap"
3379	SrcPort 67
3380	Points [5, 0; 0, 1100]
3381	DstBlock "Shared Memory7"
3382	DstPort 3
3383	}
3384	Line {
3385	Name "TxBuff_Radio4_din"
3386	Labels [0, 0]
3387	SrcBlock "plb_memmap"
3388	SrcPort 66
3389	Points [5, 0; 0, 1075]
3390	DstBlock "Shared Memory7"
3391	DstPort 2
3392	}
3393	Line {
3394	Name "TxBuff_Radio4_addr"
3395	Labels [0, 0]
3396	SrcBlock "plb_memmap"
3397	SrcPort 65
3398	Points [5, 0; 0, 1050]
3399	DstBlock "Shared Memory7"
3400	DstPort 1
3401	}
3402	Line {
3403	Name "TxBuff_Radio3_we"
3404	Labels [0, 0]
3405	SrcBlock "plb_memmap"
3406	SrcPort 64
3407	Points [5, 0; 0, 995]
3408	DstBlock "Shared Memory6"
3409	DstPort 3
3410	}
3411	Line {
3412	Name "TxBuff_Radio3_din"
3413	Labels [0, 0]
3414	SrcBlock "plb_memmap"
3415	SrcPort 63
3416	Points [5, 0; 0, 970]
3417	DstBlock "Shared Memory6"
3418	DstPort 2
3419	}
3420	Line {
3421	Name "TxBuff_Radio3_addr"
3422	Labels [0, 0]
3423	SrcBlock "plb_memmap"
3424	SrcPort 62
3425	Points [5, 0; 0, 945]
3426	DstBlock "Shared Memory6"
3427	DstPort 1
3428	}
3429	Line {
3430	Name "TxBuff_Radio2_we"
3431	Labels [0, 0]
3432	SrcBlock "plb_memmap"
3433	SrcPort 61
3434	Points [5, 0; 0, 890]
3435	DstBlock "Shared Memory5"
3436	DstPort 3
3437	}
3438	Line {
3439	Name "TxBuff_Radio2_din"
3440	Labels [0, 0]
3441	SrcBlock "plb_memmap"
3442	SrcPort 60
3443	Points [5, 0; 0, 865]
3444	DstBlock "Shared Memory5"
3445	DstPort 2
3446	}
3447	Line {
3448	Name "TxBuff_Radio2_addr"
3449	Labels [0, 0]
3450	SrcBlock "plb_memmap"
3451	SrcPort 59
3452	Points [5, 0; 0, 840]
3453	DstBlock "Shared Memory5"
3454	DstPort 1
3455	}
3456	Line {
3457	Name "TxBuff_Radio1_we"
3458	Labels [0, 0]
3459	SrcBlock "plb_memmap"
3460	SrcPort 58
3461	Points [5, 0; 0, 785]
3462	DstBlock "Shared Memory4"
3463	DstPort 3
3464	}
3465	Line {
3466	Name "TxBuff_Radio1_din"
3467	Labels [0, 0]
3468	SrcBlock "plb_memmap"
3469	SrcPort 57
3470	Points [5, 0; 0, 760]
3471	DstBlock "Shared Memory4"
3472	DstPort 2
3473	}
3474	Line {
3475	Name "TxBuff_Radio1_addr"
3476	Labels [0, 0]
3477	SrcBlock "plb_memmap"
3478	SrcPort 56
3479	Points [5, 0; 0, 735]
3480	DstBlock "Shared Memory4"
3481	DstPort 1
3482	}
3483	Line {
3484	Name "RxBuff_Radio4_we"
3485	Labels [0, 0]
3486	SrcBlock "plb_memmap"
3487	SrcPort 55
3488	Points [5, 0; 0, 675]
3489	DstBlock "Shared Memory3"
3490	DstPort 3
3491	}
3492	Line {
3493	Name "RxBuff_Radio4_din"
3494	Labels [0, 0]
3495	SrcBlock "plb_memmap"
3496	SrcPort 54
3497	Points [5, 0; 0, 650]
3498	DstBlock "Shared Memory3"
3499	DstPort 2
3500	}
3501	Line {
3502	Name "RxBuff_Radio4_addr"
3503	Labels [0, 0]
3504	SrcBlock "plb_memmap"
3505	SrcPort 53
3506	Points [5, 0; 0, 625]
3507	DstBlock "Shared Memory3"
3508	DstPort 1
3509	}
3510	Line {
3511	Name "RxBuff_Radio3_we"
3512	Labels [0, 0]
3513	SrcBlock "plb_memmap"
3514	SrcPort 52
3515	Points [5, 0; 0, 570]
3516	DstBlock "Shared Memory2"
3517	DstPort 3
3518	}
3519	Line {
3520	Name "RxBuff_Radio3_din"
3521	Labels [0, 0]
3522	SrcBlock "plb_memmap"
3523	SrcPort 51
3524	Points [5, 0; 0, 545]
3525	DstBlock "Shared Memory2"
3526	DstPort 2
3527	}
3528	Line {
3529	Name "RxBuff_Radio3_addr"
3530	Labels [0, 0]
3531	SrcBlock "plb_memmap"
3532	SrcPort 50
3533	Points [5, 0; 0, 520]
3534	DstBlock "Shared Memory2"
3535	DstPort 1
3536	}
3537	Line {
3538	Name "RxBuff_Radio2_we"
3539	Labels [0, 0]
3540	SrcBlock "plb_memmap"
3541	SrcPort 49
3542	Points [5, 0; 0, 465]
3543	DstBlock "Shared Memory1"
3544	DstPort 3
3545	}
3546	Line {
3547	Name "RxBuff_Radio2_din"
3548	Labels [0, 0]
3549	SrcBlock "plb_memmap"
3550	SrcPort 48
3551	Points [5, 0; 0, 440]
3552	DstBlock "Shared Memory1"
3553	DstPort 2
3554	}
3555	Line {
3556	Name "RxBuff_Radio2_addr"
3557	Labels [0, 0]
3558	SrcBlock "plb_memmap"
3559	SrcPort 47
3560	Points [5, 0; 0, 415]
3561	DstBlock "Shared Memory1"
3562	DstPort 1
3563	}
3564	Line {
3565	Name "RxBuff_Radio1_we"
3566	Labels [0, 0]
3567	SrcBlock "plb_memmap"
3568	SrcPort 46
3569	Points [5, 0; 0, 355]
3570	DstBlock "Shared Memory"
3571	DstPort 3
3572	}
3573	Line {
3574	Name "RxBuff_Radio1_din"
3575	Labels [0, 0]
3576	SrcBlock "plb_memmap"
3577	SrcPort 45
3578	Points [5, 0; 0, 330]
3579	DstBlock "Shared Memory"
3580	DstPort 2
3581	}
3582	Line {
3583	Name "RxBuff_Radio1_addr"
3584	Labels [0, 0]
3585	SrcBlock "plb_memmap"
3586	SrcPort 44
3587	Points [10, 0]
3588	DstBlock "Shared Memory"
3589	DstPort 1
3590	}
3591	Line {
3592	Name "StartTxRx_en"
3593	Labels [0, 0]
3594	SrcBlock "plb_memmap"
3595	SrcPort 43
3596	Points [15, 0; 0, 255]
3597	DstBlock "To Register20"
3598	DstPort 2
3599	}
3600	Line {
3601	Name "StartTxRx_din"
3602	Labels [0, 0]
3603	SrcBlock "plb_memmap"
3604	SrcPort 42
3605	Points [15, 0; 0, 230]
3606	DstBlock "To Register20"
3607	DstPort 1
3608	}
3609	Line {
3610	Name "TxLength_en"
3611	Labels [0, 0]
3612	SrcBlock "plb_memmap"
3613	SrcPort 41
3614	Points [15, 0; 0, 175]
3615	DstBlock "To Register19"
3616	DstPort 2
3617	}
3618	Line {
3619	Name "TxLength_din"
3620	Labels [0, 0]
3621	SrcBlock "plb_memmap"
3622	SrcPort 40
3623	Points [15, 0; 0, 150]
3624	DstBlock "To Register19"
3625	DstPort 1
3626	}
3627	Line {
3628	Name "TxDelay_en"
3629	Labels [0, 0]
3630	SrcBlock "plb_memmap"
3631	SrcPort 39
3632	Points [15, 0; 0, 100]
3633	DstBlock "To Register18"
3634	DstPort 2
3635	}
3636	Line {
3637	Name "TxDelay_din"
3638	Labels [0, 0]
3639	SrcBlock "plb_memmap"
3640	SrcPort 38
3641	Points [15, 0; 0, 75]
3642	DstBlock "To Register18"
3643	DstPort 1
3644	}
3645	Line {
3646	Name "TransMode_en"
3647	Labels [0, 0]
3648	SrcBlock "plb_memmap"
3649	SrcPort 37
3650	Points [15, 0; 0, 25]
3651	DstBlock "To Register17"
3652	DstPort 2
3653	}
3654	Line {
3655	Name "TransMode_din"
3656	Labels [0, 0]
3657	SrcBlock "plb_memmap"
3658	SrcPort 36
3659	DstBlock "To Register17"
3660	DstPort 1
3661	}
3662	Line {
3663	Name "StopTx_en"
3664	Labels [0, 0]
3665	SrcBlock "plb_memmap"
3666	SrcPort 35
3667	Points [15, 0; 0, -55]
3668	DstBlock "To Register16"
3669	DstPort 2
3670	}
3671	Line {
3672	Name "StopTx_din"
3673	Labels [0, 0]
3674	SrcBlock "plb_memmap"
3675	SrcPort 34
3676	Points [15, 0; 0, -80]
3677	DstBlock "To Register16"
3678	DstPort 1
3679	}
3680	Line {
3681	Name "StartTx_en"
3682	Labels [0, 0]
3683	SrcBlock "plb_memmap"
3684	SrcPort 33
3685	Points [15, 0; 0, -130]
3686	DstBlock "To Register15"
3687	DstPort 2
3688	}
3689	Line {
3690	Name "StartTx_din"
3691	Labels [0, 0]
3692	SrcBlock "plb_memmap"
3693	SrcPort 32
3694	Points [15, 0; 0, -155]
3695	DstBlock "To Register15"
3696	DstPort 1
3697	}
3698	Line {
3699	Name "StartCapture_en"
3700	Labels [0, 0]
3701	SrcBlock "plb_memmap"
3702	SrcPort 31
3703	Points [15, 0; 0, -205]
3704	DstBlock "To Register14"
3705	DstPort 2
3706	}
3707	Line {
3708	Name "StartCapture_din"
3709	Labels [0, 0]
3710	SrcBlock "plb_memmap"
3711	SrcPort 30
3712	Points [15, 0; 0, -230]
3713	DstBlock "To Register14"
3714	DstPort 1
3715	}
3716	Line {
3717	Name "RADIO4TXBUFF_TXEN_en"
3718	Labels [0, 0]
3719	SrcBlock "plb_memmap"
3720	SrcPort 29
3721	Points [15, 0; 0, -285]
3722	DstBlock "To Register13"
3723	DstPort 2
3724	}
3725	Line {
3726	Name "RADIO4TXBUFF_TXEN_din"
3727	Labels [0, 0]
3728	SrcBlock "plb_memmap"
3729	SrcPort 28
3730	Points [15, 0; 0, -310]
3731	DstBlock "To Register13"
3732	DstPort 1
3733	}
3734	Line {
3735	Name "RADIO4RXBUFF_RXEN_en"
3736	Labels [0, 0]
3737	SrcBlock "plb_memmap"
3738	SrcPort 27
3739	Points [15, 0; 0, -360]
3740	DstBlock "To Register12"
3741	DstPort 2
3742	}
3743	Line {
3744	Name "RADIO4RXBUFF_RXEN_din"
3745	Labels [0, 0]
3746	SrcBlock "plb_memmap"
3747	SrcPort 26
3748	Points [15, 0; 0, -385]
3749	DstBlock "To Register12"
3750	DstPort 1
3751	}
3752	Line {
3753	Name "RADIO3TXBUFF_TXEN_en"
3754	Labels [0, 0]
3755	SrcBlock "plb_memmap"
3756	SrcPort 25
3757	Points [15, 0; 0, -435]
3758	DstBlock "To Register11"
3759	DstPort 2
3760	}
3761	Line {
3762	Name "RADIO3TXBUFF_TXEN_din"
3763	Labels [0, 0]
3764	SrcBlock "plb_memmap"
3765	SrcPort 24
3766	Points [15, 0; 0, -460]
3767	DstBlock "To Register11"
3768	DstPort 1
3769	}
3770	Line {
3771	Name "RADIO3RXBUFF_RXEN_en"
3772	Labels [0, 0]
3773	SrcBlock "plb_memmap"
3774	SrcPort 23
3775	Points [15, 0; 0, -515]
3776	DstBlock "To Register10"
3777	DstPort 2
3778	}
3779	Line {
3780	Name "RADIO3RXBUFF_RXEN_din"
3781	Labels [0, 0]
3782	SrcBlock "plb_memmap"
3783	SrcPort 22
3784	Points [15, 0; 0, -540]
3785	DstBlock "To Register10"
3786	DstPort 1
3787	}
3788	Line {
3789	Name "RADIO2TXBUFF_TXEN_en"
3790	Labels [0, 0]
3791	SrcBlock "plb_memmap"
3792	SrcPort 21
3793	Points [15, 0; 0, -590]
3794	DstBlock "To Register9"
3795	DstPort 2
3796	}
3797	Line {
3798	Name "RADIO2TXBUFF_TXEN_din"
3799	Labels [0, 0]
3800	SrcBlock "plb_memmap"
3801	SrcPort 20
3802	Points [15, 0; 0, -615]
3803	DstBlock "To Register9"
3804	DstPort 1
3805	}
3806	Line {
3807	Name "RADIO2RXBUFF_RXEN_en"
3808	Labels [0, 0]
3809	SrcBlock "plb_memmap"
3810	SrcPort 19
3811	Points [15, 0; 0, -665]
3812	DstBlock "To Register8"
3813	DstPort 2
3814	}
3815	Line {
3816	Name "RADIO2RXBUFF_RXEN_din"
3817	Labels [0, 0]
3818	SrcBlock "plb_memmap"
3819	SrcPort 18
3820	Points [15, 0; 0, -690]
3821	DstBlock "To Register8"
3822	DstPort 1
3823	}
3824	Line {
3825	Name "RADIO1TXBUFF_TXEN_en"
3826	Labels [0, 0]
3827	SrcBlock "plb_memmap"
3828	SrcPort 17
3829	Points [15, 0; 0, -745]
3830	DstBlock "To Register7"
3831	DstPort 2
3832	}
3833	Line {
3834	Name "RADIO1TXBUFF_TXEN_din"
3835	Labels [0, 0]
3836	SrcBlock "plb_memmap"
3837	SrcPort 16
3838	Points [15, 0; 0, -770]
3839	DstBlock "To Register7"
3840	DstPort 1
3841	}
3842	Line {
3843	Name "RADIO1RXBUFF_RXEN_en"
3844	Labels [0, 0]
3845	SrcBlock "plb_memmap"
3846	SrcPort 15
3847	Points [15, 0; 0, -820]
3848	DstBlock "To Register6"
3849	DstPort 2
3850	}
3851	Line {
3852	Name "RADIO1RXBUFF_RXEN_din"
3853	Labels [0, 0]
3854	SrcBlock "plb_memmap"
3855	SrcPort 14
3856	Points [15, 0; 0, -845]
3857	DstBlock "To Register6"
3858	DstPort 1
3859	}
3860	Line {
3861	Name "MGC_AGC_SEL_en"
3862	Labels [0, 0]
3863	SrcBlock "plb_memmap"
3864	SrcPort 13
3865	Points [15, 0; 0, -895]
3866	DstBlock "To Register5"
3867	DstPort 2
3868	}
3869	Line {
3870	Name "MGC_AGC_SEL_din"
3871	Labels [0, 0]
3872	SrcBlock "plb_memmap"
3873	SrcPort 12
3874	Points [15, 0; 0, -920]
3875	DstBlock "To Register5"
3876	DstPort 1
3877	}
3878	Line {
3879	Name "DebugRx4Buffers_en"
3880	Labels [0, 0]
3881	SrcBlock "plb_memmap"
3882	SrcPort 11
3883	Points [15, 0; 0, -975]
3884	DstBlock "To Register4"
3885	DstPort 2
3886	}
3887	Line {
3888	Name "DebugRx4Buffers_din"
3889	Labels [0, 0]
3890	SrcBlock "plb_memmap"
3891	SrcPort 10
3892	Points [15, 0; 0, -1000]
3893	DstBlock "To Register4"
3894	DstPort 1
3895	}
3896	Line {
3897	Name "DebugRx3Buffers_en"
3898	Labels [0, 0]
3899	SrcBlock "plb_memmap"
3900	SrcPort 9
3901	Points [15, 0; 0, -1050]
3902	DstBlock "To Register3"
3903	DstPort 2
3904	}
3905	Line {
3906	Name "DebugRx3Buffers_din"
3907	Labels [0, 0]
3908	SrcBlock "plb_memmap"
3909	SrcPort 8
3910	Points [15, 0; 0, -1075]
3911	DstBlock "To Register3"
3912	DstPort 1
3913	}
3914	Line {
3915	Name "DebugRx2Buffers_en"
3916	Labels [0, 0]
3917	SrcBlock "plb_memmap"
3918	SrcPort 7
3919	Points [15, 0; 0, -1125]
3920	DstBlock "To Register2"
3921	DstPort 2
3922	}
3923	Line {
3924	Name "DebugRx2Buffers_din"
3925	Labels [0, 0]
3926	SrcBlock "plb_memmap"
3927	SrcPort 6
3928	Points [15, 0; 0, -1150]
3929	DstBlock "To Register2"
3930	DstPort 1
3931	}
3932	Line {
3933	Name "DebugRx1Buffers_en"
3934	Labels [0, 0]
3935	SrcBlock "plb_memmap"
3936	SrcPort 5
3937	Points [15, 0; 0, -1205]
3938	DstBlock "To Register1"
3939	DstPort 2
3940	}
3941	Line {
3942	Name "DebugRx1Buffers_din"
3943	Labels [0, 0]
3944	SrcBlock "plb_memmap"
3945	SrcPort 4
3946	Points [15, 0; 0, -1230]
3947	DstBlock "To Register1"
3948	DstPort 1
3949	}
3950	Line {
3951	Name "DCO_EN_SEL_en"
3952	Labels [0, 0]
3953	SrcBlock "plb_memmap"
3954	SrcPort 3
3955	Points [15, 0; 0, -1280]
3956	DstBlock "To Register"
3957	DstPort 2
3958	}
3959	Line {
3960	Name "DCO_EN_SEL_din"
3961	Labels [0, 0]
3962	SrcBlock "plb_memmap"
3963	SrcPort 2
3964	Points [15, 0; 0, -1305]
3965	DstBlock "To Register"
3966	DstPort 1
3967	}
3968	Line {
3969	Name "rdData"
3970	Labels [0, 0]
3971	SrcBlock "plb_memmap"
3972	SrcPort 1
3973	Points [0, -675; -395, 0; 0, -95]
3974	DstBlock "plb_decode"
3975	DstPort 6
3976	}
3977	Line {
3978	Name "RSSIBuff_Radio4_dout"
3979	Labels [0, 0]
3980	SrcBlock "Shared Memory11"
3981	SrcPort 1
3982	Points [0, -65; -300, 0]
3983	DstBlock "plb_memmap"
3984	DstPort 44
3985	}
3986	Line {
3987	Name "RSSIBuff_Radio3_dout"
3988	Labels [0, 0]
3989	SrcBlock "Shared Memory10"
3990	SrcPort 1
3991	Points [0, -70; -305, 0; 0, -1395]
3992	DstBlock "plb_memmap"
3993	DstPort 43
3994	}
3995	Line {
3996	Name "RSSIBuff_Radio2_dout"
3997	Labels [0, 0]
3998	SrcBlock "Shared Memory9"
3999	SrcPort 1
4000	Points [0, -65; -305, 0; 0, -1285]
4001	DstBlock "plb_memmap"
4002	DstPort 42
4003	}
4004	Line {
4005	Name "RSSIBuff_Radio1_dout"
4006	Labels [0, 0]
4007	SrcBlock "Shared Memory8"
4008	SrcPort 1
4009	Points [0, -70; -305, 0; 0, -1165]
4010	DstBlock "plb_memmap"
4011	DstPort 41
4012	}
4013	Line {
4014	Name "TxBuff_Radio4_dout"
4015	Labels [0, 0]
4016	SrcBlock "Shared Memory7"
4017	SrcPort 1
4018	Points [0, -70; -305, 0; 0, -1045]
4019	DstBlock "plb_memmap"
4020	DstPort 40
4021	}
4022	Line {
4023	Name "TxBuff_Radio3_dout"
4024	Labels [0, 0]
4025	SrcBlock "Shared Memory6"
4026	SrcPort 1
4027	Points [0, -65; -305, 0; 0, -935]
4028	DstBlock "plb_memmap"
4029	DstPort 39
4030	}
4031	Line {
4032	Name "TxBuff_Radio2_dout"
4033	Labels [0, 0]
4034	SrcBlock "Shared Memory5"
4035	SrcPort 1
4036	Points [0, -65; -305, 0; 0, -820]
4037	DstBlock "plb_memmap"
4038	DstPort 38
4039	}
4040	Line {
4041	Name "TxBuff_Radio1_dout"
4042	Labels [0, 0]
4043	SrcBlock "Shared Memory4"
4044	SrcPort 1
4045	Points [0, -75; -305, 0; 0, -695]
4046	DstBlock "plb_memmap"
4047	DstPort 37
4048	}
4049	Line {
4050	Name "RxBuff_Radio4_dout"
4051	Labels [0, 0]
4052	SrcBlock "Shared Memory3"
4053	SrcPort 1
4054	Points [0, -65; -305, 0; 0, -585]
4055	DstBlock "plb_memmap"
4056	DstPort 36
4057	}
4058	Line {
4059	Name "RxBuff_Radio3_dout"
4060	Labels [0, 0]
4061	SrcBlock "Shared Memory2"
4062	SrcPort 1
4063	Points [0, -65; -305, 0; 0, -470]
4064	DstBlock "plb_memmap"
4065	DstPort 35
4066	}
4067	Line {
4068	Name "RxBuff_Radio2_dout"
4069	Labels [0, 0]
4070	SrcBlock "Shared Memory1"
4071	SrcPort 1
4072	Points [0, -75; -305, 0; 0, -345]
4073	DstBlock "plb_memmap"
4074	DstPort 34
4075	}
4076	Line {
4077	Name "RxBuff_Radio1_dout"
4078	Labels [0, 0]
4079	SrcBlock "Shared Memory"
4080	SrcPort 1
4081	Points [0, -150; -305, 0; 0, -150]
4082	DstBlock "plb_memmap"
4083	DstPort 33
4084	}
4085	Line {
4086	Name "StartTxRx_dout"
4087	Labels [0, 0]
4088	SrcBlock "To Register20"
4089	SrcPort 1
4090	Points [0, -50; -295, 0; 0, -155]
4091	DstBlock "plb_memmap"
4092	DstPort 32
4093	}
4094	Line {
4095	Name "TxLength_dout"
4096	Labels [0, 0]
4097	SrcBlock "To Register19"
4098	SrcPort 1
4099	Points [0, 40; -295, 0; 0, -160]
4100	DstBlock "plb_memmap"
4101	DstPort 31
4102	}
4103	Line {
4104	Name "TxDelay_dout"
4105	Labels [0, 0]
4106	SrcBlock "To Register18"
4107	SrcPort 1
4108	Points [0, 50; -95, 0; 0, 75; -200, 0; 0, -165]
4109	DstBlock "plb_memmap"
4110	DstPort 30
4111	}
4112	Line {
4113	Name "TransMode_dout"
4114	Labels [0, 0]
4115	SrcBlock "To Register17"
4116	SrcPort 1
4117	Points [0, 50; -95, 0; 0, 160; -200, 0; 0, -170]
4118	DstBlock "plb_memmap"
4119	DstPort 29
4120	}
4121	Line {
4122	Name "StopTx_dout"
4123	Labels [0, 0]
4124	SrcBlock "To Register16"
4125	SrcPort 1
4126	Points [0, -50; -95, 0; 0, -55; -200, 0; 0, 230]
4127	DstBlock "plb_memmap"
4128	DstPort 28
4129	}
4130	Line {
4131	Name "StartTx_dout"
4132	Labels [0, 0]
4133	SrcBlock "To Register15"
4134	SrcPort 1
4135	Points [0, -35; -295, 0; 0, 240]
4136	DstBlock "plb_memmap"
4137	DstPort 27
4138	}
4139	Line {
4140	Name "StartCapture_dout"
4141	Labels [0, 0]
4142	SrcBlock "To Register14"
4143	SrcPort 1
4144	Points [0, 50; -295, 0; 0, 235]
4145	DstBlock "plb_memmap"
4146	DstPort 26
4147	}
4148	Line {
4149	Name "RADIO4TXBUFF_TXEN_dout"
4150	Labels [0, 0]
4151	SrcBlock "To Register13"
4152	SrcPort 1
4153	Points [0, 55; -295, 0; 0, 315]
4154	DstBlock "plb_memmap"
4155	DstPort 25
4156	}
4157	Line {
4158	Name "RADIO4RXBUFF_RXEN_dout"
4159	Labels [0, 0]
4160	SrcBlock "To Register12"
4161	SrcPort 1
4162	Points [0, 50; -295, 0; 0, 400]
4163	DstBlock "plb_memmap"
4164	DstPort 24
4165	}
4166	Line {
4167	Name "RADIO3TXBUFF_TXEN_dout"
4168	Labels [0, 0]
4169	SrcBlock "To Register11"
4170	SrcPort 1
4171	Points [0, 50; -295, 0; 0, 480]
4172	DstBlock "plb_memmap"
4173	DstPort 23
4174	}
4175	Line {
4176	Name "RADIO3RXBUFF_RXEN_dout"
4177	Labels [0, 0]
4178	SrcBlock "To Register10"
4179	SrcPort 1
4180	Points [0, 55; -295, 0; 0, 560]
4181	DstBlock "plb_memmap"
4182	DstPort 22
4183	}
4184	Line {
4185	Name "RADIO2TXBUFF_TXEN_dout"
4186	Labels [0, 0]
4187	SrcBlock "To Register9"
4188	SrcPort 1
4189	Points [0, 50; -295, 0; 0, 645]
4190	DstBlock "plb_memmap"
4191	DstPort 21
4192	}
4193	Line {
4194	Name "RADIO2RXBUFF_RXEN_dout"
4195	Labels [0, 0]
4196	SrcBlock "To Register8"
4197	SrcPort 1
4198	Points [0, 50; -295, 0; 0, 725]
4199	DstBlock "plb_memmap"
4200	DstPort 20
4201	}
4202	Line {
4203	Name "RADIO1TXBUFF_TXEN_dout"
4204	Labels [0, 0]
4205	SrcBlock "To Register7"
4206	SrcPort 1
4207	Points [0, 55; -295, 0; 0, 805]
4208	DstBlock "plb_memmap"
4209	DstPort 19
4210	}
4211	Line {
4212	Name "RADIO1RXBUFF_RXEN_dout"
4213	Labels [0, 0]
4214	SrcBlock "To Register6"
4215	SrcPort 1
4216	Points [0, 50; -295, 0; 0, 890]
4217	DstBlock "plb_memmap"
4218	DstPort 18
4219	}
4220	Line {
4221	Name "MGC_AGC_SEL_dout"
4222	Labels [0, 0]
4223	SrcBlock "To Register5"
4224	SrcPort 1
4225	Points [0, 50; -150, 0; 0, 795; -145, 0; 0, 175]
4226	DstBlock "plb_memmap"
4227	DstPort 17
4228	}
4229	Line {
4230	Name "DebugRx4Buffers_dout"
4231	Labels [0, 0]
4232	SrcBlock "To Register4"
4233	SrcPort 1
4234	Points [0, 55; -150, 0; 0, 880; -145, 0; 0, 170]
4235	DstBlock "plb_memmap"
4236	DstPort 16
4237	}
4238	Line {
4239	Name "DebugRx3Buffers_dout"
4240	Labels [0, 0]
4241	SrcBlock "To Register3"
4242	SrcPort 1
4243	Points [0, 50; -150, 0; 0, 970; -145, 0; 0, 165]
4244	DstBlock "plb_memmap"
4245	DstPort 15
4246	}
4247	Line {
4248	Name "DebugRx2Buffers_dout"
4249	Labels [0, 0]
4250	SrcBlock "To Register2"
4251	SrcPort 1
4252	Points [0, 50; -295, 0; 0, 1215]
4253	DstBlock "plb_memmap"
4254	DstPort 14
4255	}
4256	Line {
4257	Name "DebugRx1Buffers_dout"
4258	Labels [0, 0]
4259	SrcBlock "To Register1"
4260	SrcPort 1
4261	Points [0, 55; -295, 0; 0, 1295]
4262	DstBlock "plb_memmap"
4263	DstPort 13
4264	}
4265	Line {
4266	Name "DCO_EN_SEL_dout"
4267	Labels [0, 0]
4268	SrcBlock "To Register"
4269	SrcPort 1
4270	Points [0, 50; -295, 0; 0, 1380]
4271	DstBlock "plb_memmap"
4272	DstPort 12
4273	}
4274	Line {
4275	Name "Radio4AGCDoneRSSI_dout"
4276	Labels [0, 0]
4277	SrcBlock "From Register5"
4278	SrcPort 1
4279	Points [60, 0; 0, -145]
4280	DstBlock "plb_memmap"
4281	DstPort 11
4282	}
4283	Line {
4284	Name "Radio3AGCDoneRSSI_dout"
4285	Labels [0, 0]
4286	SrcBlock "From Register4"
4287	SrcPort 1
4288	Points [60, 0; 0, -65]
4289	DstBlock "plb_memmap"
4290	DstPort 10
4291	}
4292	Line {
4293	Name "Radio2AGCDoneRSSI_dout"
4294	Labels [0, 0]
4295	SrcBlock "From Register3"
4296	SrcPort 1
4297	Points [60, 0; 0, 15]
4298	DstBlock "plb_memmap"
4299	DstPort 9
4300	}
4301	Line {
4302	Name "Radio1AGCDoneRSSI_dout"
4303	Labels [0, 0]
4304	SrcBlock "From Register2"
4305	SrcPort 1
4306	Points [60, 0; 0, 100]
4307	DstBlock "plb_memmap"
4308	DstPort 8
4309	}
4310	Line {
4311	Name "CaptureDone_dout"
4312	Labels [0, 0]
4313	SrcBlock "From Register1"
4314	SrcPort 1
4315	Points [60, 0; 0, 180]
4316	DstBlock "plb_memmap"
4317	DstPort 7
4318	}
4319	Line {
4320	Name "AGCDoneAddr_dout"
4321	Labels [0, 0]
4322	SrcBlock "From Register"
4323	SrcPort 1
4324	Points [60, 0; 0, 260]
4325	DstBlock "plb_memmap"
4326	DstPort 6
4327	}
4328	Line {
4329	Name "RNWReg"
4330	Labels [0, 0]
4331	SrcBlock "plb_decode"
4332	SrcPort 6
4333	Points [5, 0; 0, 950]
4334	DstBlock "plb_memmap"
4335	DstPort 4
4336	}
4337	Line {
4338	Name "linearAddr"
4339	Labels [0, 0]
4340	SrcBlock "plb_decode"
4341	SrcPort 9
4342	Points [5, 0; 0, 810]
4343	DstBlock "plb_memmap"
4344	DstPort 3
4345	}
4346	Line {
4347	Name "bankAddr"
4348	Labels [0, 0]
4349	SrcBlock "plb_decode"
4350	SrcPort 5
4351	Points [5, 0; 0, 985]
4352	DstBlock "plb_memmap"
4353	DstPort 2
4354	}
4355	Line {
4356	Name "wrDBusReg"
4357	Labels [0, 0]
4358	SrcBlock "plb_decode"
4359	SrcPort 1
4360	Points [10, 0]
4361	DstBlock "plb_memmap"
4362	DstPort 1
4363	}
4364	Line {
4365	Name "Sl_rdDBus"
4366	Labels [0, 0]
4367	SrcBlock "plb_decode"
4368	SrcPort 8
4369	Points [65, 0]
4370	DstBlock "Sl_rdDBus"
4371	DstPort 1
4372	}
4373	Line {
4374	Name "Sl_rdDAck"
4375	Labels [0, 0]
4376	SrcBlock "plb_decode"
4377	SrcPort 7
4378	Points [65, 0]
4379	DstBlock "Sl_rdDAck"
4380	DstPort 1
4381	}
4382	Line {
4383	Name "Sl_rdComp"
4384	Labels [0, 0]
4385	SrcBlock "plb_decode"
4386	SrcPort 3
4387	Points [60, 0; 0, -440]
4388	DstBlock "Sl_rdComp"
4389	DstPort 1
4390	}
4391	Line {
4392	Name "addrPref"
4393	Labels [0, 0]
4394	SrcBlock "sg_plb_addrpref"
4395	SrcPort 1
4396	Points [10, 0]
4397	DstBlock "plb_decode"
4398	DstPort 7
4399	}
4400	Line {
4401	Name "PLB_wrDBus"
4402	Labels [0, 0]
4403	SrcBlock "PLB_wrDBus"
4404	SrcPort 1
4405	DstBlock "plb_decode"
4406	DstPort 5
4407	}
4408	Line {
4409	Name "PLB_RNW"
4410	Labels [0, 0]
4411	SrcBlock "PLB_RNW"
4412	SrcPort 1
4413	DstBlock "plb_decode"
4414	DstPort 4
4415	}
4416	Line {
4417	Name "PLB_PAValid"
4418	Labels [0, 0]
4419	SrcBlock "PLB_PAValid"
4420	SrcPort 1
4421	DstBlock "plb_decode"
4422	DstPort 3
4423	}
4424	Line {
4425	Name "PLB_ABus"
4426	Labels [0, 0]
4427	SrcBlock "PLB_ABus"
4428	SrcPort 1
4429	Points [5, 0; 0, -5]
4430	DstBlock "plb_decode"
4431	DstPort 2
4432	}
4433	Line {
4434	Name "SPLB_Rst"
4435	Labels [0, 0]
4436	SrcBlock "SPLB_Rst"
4437	SrcPort 1
4438	Points [5, 0; 0, -5]
4439	DstBlock "plb_decode"
4440	DstPort 1
4441	}
4442	Line {
4443	SrcBlock "Constant6"
4444	SrcPort 1
4445	DstBlock "sg_plb_addrpref"
4446	DstPort 1
4447	}
4448	Line {
4449	Name "Sl_wait"
4450	Labels [0, 0]
4451	SrcBlock "Constant5"
4452	SrcPort 1
4453	DstBlock "Sl_wait"
4454	DstPort 1
4455	}
4456	Line {
4457	SrcBlock "Constant4"
4458	SrcPort 1
4459	DstBlock "PLB_wrDBus"
4460	DstPort 1
4461	}
4462	Line {
4463	SrcBlock "Constant3"
4464	SrcPort 1
4465	DstBlock "PLB_RNW"
4466	DstPort 1
4467	}
4468	Line {
4469	SrcBlock "Constant2"
4470	SrcPort 1
4471	DstBlock "PLB_PAValid"
4472	DstPort 1
4473	}
4474	Line {
4475	SrcBlock "Constant1"
4476	SrcPort 1
4477	DstBlock "PLB_ABus"
4478	DstPort 1
4479	}
4480	Line {
4481	SrcBlock "Constant"
4482	SrcPort 1
4483	DstBlock "SPLB_Rst"
4484	DstPort 1
4485	}
4486	Line {
4487	SrcBlock "Sl_wrComp"
4488	SrcPort 1
4489	Points [70, 0; 0, -485]
4490	DstBlock "Terminator6"
4491	DstPort 1
4492	}
4493	Line {
4494	SrcBlock "Sl_wrDAck"
4495	SrcPort 1
4496	Points [70, 0; 0, -250]
4497	DstBlock "Terminator5"
4498	DstPort 1
4499	}
4500	Line {
4501	SrcBlock "Sl_wait"
4502	SrcPort 1
4503	DstBlock "Terminator4"
4504	DstPort 1
4505	}
4506	Line {
4507	SrcBlock "Sl_rdDBus"
4508	SrcPort 1
4509	Points [70, 0; 0, -565]
4510	DstBlock "Terminator3"
4511	DstPort 1
4512	}
4513	Line {
4514	SrcBlock "Sl_rdDAck"
4515	SrcPort 1
4516	Points [70, 0; 0, -530]
4517	DstBlock "Terminator2"
4518	DstPort 1
4519	}
4520	Line {
4521	SrcBlock "Sl_rdComp"
4522	SrcPort 1
4523	Points [90, 0; 0, -130]
4524	DstBlock "Terminator1"
4525	DstPort 1
4526	}
4527	Line {
4528	SrcBlock "Sl_addrAck"
4529	SrcPort 1
4530	Points [45, 0; 0, -70]
4531	DstBlock "Terminator"
4532	DstPort 1
4533	}
4534	}
4535	}
4536	Block {
4537	BlockType From
4538	Name "From1"
4539	Position [115, 766, 250, 784]
4540	ShowName off
4541	CloseFcn "tagdialog Close"
4542	GotoTag "StopTx"
4543	TagVisibility "global"
4544	}
4545	Block {
4546	BlockType From
4547	Name "From10"
4548	Position [940, 121, 1075, 139]
4549	ShowName off
4550	CloseFcn "tagdialog Close"
4551	GotoTag "RADIO1RXBUFF_RXEN"
4552	TagVisibility "global"
4553	}
4554	Block {
4555	BlockType From
4556	Name "From11"
4557	Position [945, 266, 1080, 284]
4558	ShowName off
4559	CloseFcn "tagdialog Close"
4560	GotoTag "RADIO2RXBUFF_RXEN"
4561	TagVisibility "global"
4562	}
4563	Block {
4564	BlockType From
4565	Name "From12"
4566	Position [945, 406, 1080, 424]
4567	ShowName off
4568	CloseFcn "tagdialog Close"
4569	GotoTag "RADIO3RXBUFF_RXEN"
4570	TagVisibility "global"
4571	}
4572	Block {
4573	BlockType From
4574	Name "From13"
4575	Position [945, 546, 1080, 564]
4576	ShowName off
4577	CloseFcn "tagdialog Close"
4578	GotoTag "RADIO4RXBUFF_RXEN"
4579	TagVisibility "global"
4580	}
4581	Block {
4582	BlockType From
4583	Name "From14"
4584	Position [710, 36, 845, 54]
4585	ShowName off
4586	CloseFcn "tagdialog Close"
4587	GotoTag "DebugRx1Buffers"
4588	TagVisibility "global"
4589	}
4590	Block {
4591	BlockType From
4592	Name "From15"
4593	Position [715, 181, 850, 199]
4594	ShowName off
4595	CloseFcn "tagdialog Close"
4596	GotoTag "DebugRx2Buffers"
4597	TagVisibility "global"
4598	}
4599	Block {
4600	BlockType From
4601	Name "From16"
4602	Position [715, 316, 850, 334]
4603	ShowName off
4604	CloseFcn "tagdialog Close"
4605	GotoTag "DebugRx3Buffers"
4606	TagVisibility "global"
4607	}
4608	Block {
4609	BlockType From
4610	Name "From17"
4611	Position [710, 456, 845, 474]
4612	ShowName off
4613	CloseFcn "tagdialog Close"
4614	GotoTag "DebugRx4Buffers"
4615	TagVisibility "global"
4616	}
4617	Block {
4618	BlockType From
4619	Name "From18"
4620	Position [705, 549, 855, 571]
4621	ShowName off
4622	CloseFcn "tagdialog Close"
4623	GotoTag "MGCAGC_AGCDCO_SEL"
4624	TagVisibility "global"
4625	}
4626	Block {
4627	BlockType From
4628	Name "From19"
4629	Position [40, 466, 175, 484]
4630	ShowName off
4631	CloseFcn "tagdialog Close"
4632	GotoTag "StartTxRx"
4633	TagVisibility "global"
4634	}
4635	Block {
4636	BlockType From
4637	Name "From2"
4638	Position [275, 821, 410, 839]
4639	ShowName off
4640	CloseFcn "tagdialog Close"
4641	GotoTag "TransMode"
4642	TagVisibility "global"
4643	}
4644	Block {
4645	BlockType From
4646	Name "From3"
4647	Position [110, 671, 245, 689]
4648	ShowName off
4649	CloseFcn "tagdialog Close"
4650	GotoTag "StartTx"
4651	TagVisibility "global"
4652	}
4653	Block {
4654	BlockType From
4655	Name "From4"
4656	Position [270, 896, 405, 914]
4657	ShowName off
4658	CloseFcn "tagdialog Close"
4659	GotoTag "TxDelay"
4660	TagVisibility "global"
4661	}
4662	Block {
4663	BlockType From
4664	Name "From5"
4665	Position [860, 701, 995, 719]
4666	ShowName off
4667	CloseFcn "tagdialog Close"
4668	GotoTag "RADIO1TXBUFF_TXEN"
4669	TagVisibility "global"
4670	}
4671	Block {
4672	BlockType From
4673	Name "From6"
4674	Position [860, 796, 995, 814]
4675	ShowName off
4676	CloseFcn "tagdialog Close"
4677	GotoTag "RADIO2TXBUFF_TXEN"
4678	TagVisibility "global"
4679	}
4680	Block {
4681	BlockType From
4682	Name "From7"
4683	Position [860, 891, 995, 909]
4684	ShowName off
4685	CloseFcn "tagdialog Close"
4686	GotoTag "RADIO3TXBUFF_TXEN"
4687	TagVisibility "global"
4688	}
4689	Block {
4690	BlockType From
4691	Name "From8"
4692	Position [860, 991, 995, 1009]
4693	ShowName off
4694	CloseFcn "tagdialog Close"
4695	GotoTag "RADIO4TXBUFF_TXEN"
4696	TagVisibility "global"
4697	}
4698	Block {
4699	BlockType From
4700	Name "From9"
4701	Position [80, 236, 215, 254]
4702	ShowName off
4703	CloseFcn "tagdialog Close"
4704	GotoTag "StartCapture"
4705	TagVisibility "global"
4706	}
4707	Block {
4708	BlockType Goto
4709	Name "Goto1"
4710	Position [555, 129, 660, 151]
4711	ShowName off
4712	GotoTag "WR_ADDR"
4713	TagVisibility "global"
4714	}
4715	Block {
4716	BlockType Goto
4717	Name "Goto2"
4718	Position [1270, 17, 1430, 43]
4719	ShowName off
4720	GotoTag "Radio1_RSSI"
4721	TagVisibility "global"
4722	}
4723	Block {
4724	BlockType Goto
4725	Name "Goto3"
4726	Position [495, 1007, 655, 1033]
4727	ShowName off
4728	GotoTag "AGC_Done_Detect"
4729	TagVisibility "global"
4730	}
4731	Block {
4732	BlockType Goto
4733	Name "Goto4"
4734	Position [1275, 162, 1435, 188]
4735	ShowName off
4736	GotoTag "Radio2_RSSI"
4737	TagVisibility "global"
4738	}
4739	Block {
4740	BlockType Goto
4741	Name "Goto5"
4742	Position [1275, 297, 1435, 323]
4743	ShowName off
4744	GotoTag "Radio3_RSSI"
4745	TagVisibility "global"
4746	}
4747	Block {
4748	BlockType Goto
4749	Name "Goto6"
4750	Position [1275, 437, 1435, 463]
4751	ShowName off
4752	GotoTag "Radio4_RSSI"
4753	TagVisibility "global"
4754	}
4755	Block {
4756	BlockType Reference
4757	Name "Inverter"
4758	Ports [1, 1]
4759	Position [770, 691, 795, 709]
4760	ShowName off
4761	SourceBlock "xbsIndex_r4/Inverter"
4762	SourceType "Xilinx Inverter Block"
4763	infoedit "Bitwise logical negation (one's complement) operator."
4764	en off
4765	latency "0"
4766	dbl_ovrd off
4767	xl_use_area off
4768	xl_area "[0,0,0,0,0,0,0]"
4769	has_advanced_control "0"
4770	sggui_pos "-1,-1,-1,-1"
4771	block_type "inv"
4772	block_version "8.2"
4773	sg_icon_stat "25,18,1,1,white,blue,0,1ab4a85f,right"
4774	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
4775	}
4776	Block {
4777	BlockType Reference
4778	Name "Logical"
4779	Ports [3, 1]
4780	Position [235, 205, 275, 285]
4781	ShowName off
4782	SourceBlock "xbsIndex_r4/Logical"
4783	SourceType "Xilinx Logical Block Block"
4784	logical_function "OR"
4785	inputs "3"
4786	en off
4787	latency "0"
4788	precision "Full"
4789	arith_type "Unsigned"
4790	n_bits "16"
4791	bin_pt "0"
4792	align_bp on
4793	dbl_ovrd off
4794	xl_use_area off
4795	xl_area "[0,0,0,0,0,0,0]"
4796	has_advanced_control "0"
4797	sggui_pos "20,20,348,261"
4798	block_type "logical"
4799	block_version "8.2"
4800	sg_icon_stat "40,80,1,1,white,blue,0,bd50cad4,right"
4801	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
4802	}
4803	Block {
4804	BlockType SubSystem
4805	Name "Memmory-mapped Registers"
4806	Ports []
4807	Position [270, 25, 310, 85]
4808	MinAlgLoopOccurrences off
4809	PropExecContextOutsideSubsystem off
4810	RTWSystemCode "Auto"
4811	FunctionWithSeparateData off
4812	Opaque off
4813	RequestExecContextInheritance off
4814	MaskHideContents off
4815	System {
4816	Name "Memmory-mapped Registers"
4817	Location [280, 119, 1540, 841]
4818	Open off
4819	ModelBrowserVisibility off
4820	ModelBrowserWidth 200
4821	ScreenColor "white"
4822	PaperOrientation "landscape"
4823	PaperPositionMode "auto"
4824	PaperType "usletter"
4825	PaperUnits "inches"
4826	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
4827	TiledPageScale 1
4828	ShowPageBoundaries off
4829	ZoomFactor "100"
4830	Block {
4831	BlockType Reference
4832	Name "AGCDoneAddr"
4833	Ports [2, 1]
4834	Position [975, 17, 1035, 73]
4835	AttributesFormatString "<< %<shared_memory_name> >>"
4836	SourceBlock "xbsIndex_r4/To Register"
4837	SourceType "Xilinx Shared Memory Based To Register Block"
4838	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
4839	shared_memory_name "'AGCDoneAddr'"
4840	init "0"
4841	ownership "Locally owned and initialized"
4842	explicit_data_type on
4843	arith_type "Unsigned"
4844	n_bits "14"
4845	bin_pt "0"
4846	dbl_ovrd off
4847	xl_use_area off
4848	xl_area "[0,0,0,0,0,0,0]"
4849	has_advanced_control "0"
4850	sggui_pos "20,20,381,266"
4851	block_type "toreg"
4852	block_version "10.1.3"
4853	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
4854	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
4855	}
4856	Block {
4857	BlockType Reference
4858	Name "Convert1"
4859	Ports [1, 1]
4860	Position [870, 512, 895, 528]
4861	ShowName off
4862	SourceBlock "xbsIndex_r4/Convert"
4863	SourceType "Xilinx Type Converter Block"
4864	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
4865	arith_type "Boolean"
4866	n_bits "16"
4867	bin_pt "14"
4868	quantization "Truncate"
4869	overflow "Wrap"
4870	latency "0"
4871	dbl_ovrd off
4872	pipeline off
4873	xl_use_area off
4874	xl_area "[0,0,0,0,0,0,0]"
4875	has_advanced_control "0"
4876	sggui_pos "20,20,461,375"
4877	block_type "convert"
4878	block_version "8.2"
4879	sg_icon_stat "25,16,1,1,white,blue,0,74901e60,right"
4880	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
4881	}
4882	Block {
4883	BlockType Reference
4884	Name "Convert2"
4885	Ports [1, 1]
4886	Position [870, 582, 895, 598]
4887	ShowName off
4888	SourceBlock "xbsIndex_r4/Convert"
4889	SourceType "Xilinx Type Converter Block"
4890	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
4891	arith_type "Boolean"
4892	n_bits "16"
4893	bin_pt "14"
4894	quantization "Truncate"
4895	overflow "Wrap"
4896	latency "0"
4897	dbl_ovrd off
4898	pipeline off
4899	xl_use_area off
4900	xl_area "[0,0,0,0,0,0,0]"
4901	has_advanced_control "0"
4902	sggui_pos "20,20,461,375"
4903	block_type "convert"
4904	block_version "8.2"
4905	sg_icon_stat "25,16,1,1,white,blue,0,74901e60,right"
4906	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
4907	}
4908	Block {
4909	BlockType Reference
4910	Name "Convert3"
4911	Ports [1, 1]
4912	Position [1035, 527, 1060, 543]
4913	ShowName off
4914	SourceBlock "xbsIndex_r4/Convert"
4915	SourceType "Xilinx Type Converter Block"
4916	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
4917	arith_type "Unsigned"
4918	n_bits "1"
4919	bin_pt "0"
4920	quantization "Truncate"
4921	overflow "Wrap"
4922	latency "0"
4923	dbl_ovrd off
4924	pipeline off
4925	xl_use_area off
4926	xl_area "[0,0,0,0,0,0,0]"
4927	has_advanced_control "0"
4928	sggui_pos "20,20,461,375"
4929	block_type "convert"
4930	block_version "8.2"
4931	sg_icon_stat "25,16,1,1,white,blue,0,74901e60,right"
4932	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
4933	}
4934	Block {
4935	BlockType Reference
4936	Name "DebugRx1Buffers"
4937	Ports [0, 1]
4938	Position [450, 430, 495, 460]
4939	AttributesFormatString "<< %<shared_memory_name> >>"
4940	SourceBlock "xbsIndex_r4/From Register"
4941	SourceType "Xilinx Shared Memory Based From Register Block"
4942	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
4943	shared_memory_name "'DebugRx1Buffers'"
4944	init "0"
4945	period "1"
4946	ownership "Locally owned and initialized"
4947	arith_type "Unsigned"
4948	n_bits "1"
4949	bin_pt "0"
4950	dbl_ovrd off
4951	xl_use_area off
4952	xl_area "[0,0,0,0,0,0,0]"
4953	has_advanced_control "0"
4954	sggui_pos "20,20,381,234"
4955	block_type "fromreg"
4956	block_version "10.1.2"
4957	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
4958	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
4959	}
4960	Block {
4961	BlockType Reference
4962	Name "DebugRx2Buffers"
4963	Ports [0, 1]
4964	Position [450, 510, 495, 540]
4965	AttributesFormatString "<< %<shared_memory_name> >>"
4966	SourceBlock "xbsIndex_r4/From Register"
4967	SourceType "Xilinx Shared Memory Based From Register Block"
4968	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
4969	shared_memory_name "'DebugRx2Buffers'"
4970	init "0"
4971	period "1"
4972	ownership "Locally owned and initialized"
4973	arith_type "Unsigned"
4974	n_bits "1"
4975	bin_pt "0"
4976	dbl_ovrd off
4977	xl_use_area off
4978	xl_area "[0,0,0,0,0,0,0]"
4979	has_advanced_control "0"
4980	sggui_pos "20,20,381,234"
4981	block_type "fromreg"
4982	block_version "10.1.2"
4983	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
4984	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
4985	}
4986	Block {
4987	BlockType Reference
4988	Name "DebugRx3Buffers"
4989	Ports [0, 1]
4990	Position [450, 595, 495, 625]
4991	AttributesFormatString "<< %<shared_memory_name> >>"
4992	SourceBlock "xbsIndex_r4/From Register"
4993	SourceType "Xilinx Shared Memory Based From Register Block"
4994	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
4995	shared_memory_name "'DebugRx3Buffers'"
4996	init "0"
4997	period "1"
4998	ownership "Locally owned and initialized"
4999	arith_type "Unsigned"
5000	n_bits "1"
5001	bin_pt "0"
5002	dbl_ovrd off
5003	xl_use_area off
5004	xl_area "[0,0,0,0,0,0,0]"
5005	has_advanced_control "0"
5006	sggui_pos "20,20,381,234"
5007	block_type "fromreg"
5008	block_version "10.1.2"
5009	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5010	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5011	}
5012	Block {
5013	BlockType Reference
5014	Name "DebugRx4Buffers"
5015	Ports [0, 1]
5016	Position [450, 695, 495, 725]
5017	AttributesFormatString "<< %<shared_memory_name> >>"
5018	SourceBlock "xbsIndex_r4/From Register"
5019	SourceType "Xilinx Shared Memory Based From Register Block"
5020	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5021	shared_memory_name "'DebugRx4Buffers'"
5022	init "0"
5023	period "1"
5024	ownership "Locally owned and initialized"
5025	arith_type "Unsigned"
5026	n_bits "1"
5027	bin_pt "0"
5028	dbl_ovrd off
5029	xl_use_area off
5030	xl_area "[0,0,0,0,0,0,0]"
5031	has_advanced_control "0"
5032	sggui_pos "20,20,381,234"
5033	block_type "fromreg"
5034	block_version "10.1.2"
5035	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5036	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5037	}
5038	Block {
5039	BlockType Reference
5040	Name "From Register1"
5041	Ports [0, 1]
5042	Position [450, 100, 495, 130]
5043	ShowName off
5044	AttributesFormatString "RADIO1RXBUFF_RXEN\\n<< %<shared_memory_name> >>"
5045	SourceBlock "xbsIndex_r4/From Register"
5046	SourceType "Xilinx Shared Memory Based From Register Block"
5047	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5048	shared_memory_name "'RADIO1RXBUFF_RXEN'"
5049	init "0"
5050	period "1"
5051	ownership "Locally owned and initialized"
5052	arith_type "Unsigned"
5053	n_bits "1"
5054	bin_pt "0"
5055	dbl_ovrd off
5056	xl_use_area off
5057	xl_area "[0,0,0,0,0,0,0]"
5058	has_advanced_control "0"
5059	sggui_pos "20,20,381,246"
5060	block_type "fromreg"
5061	block_version "8.2"
5062	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5063	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5064	}
5065	Block {
5066	BlockType Reference
5067	Name "From Register10"
5068	Ports [0, 1]
5069	Position [55, 590, 100, 620]
5070	ShowName off
5071	AttributesFormatString "RADIO3TXBUFF_TXEN\\n<< %<shared_memory_name> >>"
5072	SourceBlock "xbsIndex_r4/From Register"
5073	SourceType "Xilinx Shared Memory Based From Register Block"
5074	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5075	shared_memory_name "'RADIO3TXBUFF_TXEN'"
5076	init "0"
5077	period "1"
5078	ownership "Locally owned and initialized"
5079	arith_type "Unsigned"
5080	n_bits "1"
5081	bin_pt "0"
5082	dbl_ovrd off
5083	xl_use_area off
5084	xl_area "[0,0,0,0,0,0,0]"
5085	has_advanced_control "0"
5086	sggui_pos "20,20,379,246"
5087	block_type "fromreg"
5088	block_version "8.2"
5089	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5090	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5091	}
5092	Block {
5093	BlockType Reference
5094	Name "From Register11"
5095	Ports [0, 1]
5096	Position [450, 265, 495, 295]
5097	ShowName off
5098	AttributesFormatString "RADIO3RXBUFF_RXEN\\n<< %<shared_memory_name> >>"
5099	SourceBlock "xbsIndex_r4/From Register"
5100	SourceType "Xilinx Shared Memory Based From Register Block"
5101	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5102	shared_memory_name "'RADIO3RXBUFF_RXEN'"
5103	init "0"
5104	period "1"
5105	ownership "Locally owned and initialized"
5106	arith_type "Unsigned"
5107	n_bits "1"
5108	bin_pt "0"
5109	dbl_ovrd off
5110	xl_use_area off
5111	xl_area "[0,0,0,0,0,0,0]"
5112	has_advanced_control "0"
5113	sggui_pos "20,20,381,246"
5114	block_type "fromreg"
5115	block_version "8.2"
5116	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5117	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5118	}
5119	Block {
5120	BlockType Reference
5121	Name "From Register12"
5122	Ports [0, 1]
5123	Position [55, 670, 100, 700]
5124	ShowName off
5125	AttributesFormatString "RADIO4TXBUFF_TXEN\\n<< %<shared_memory_name> >>"
5126	SourceBlock "xbsIndex_r4/From Register"
5127	SourceType "Xilinx Shared Memory Based From Register Block"
5128	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5129	shared_memory_name "'RADIO4TXBUFF_TXEN'"
5130	init "0"
5131	period "1"
5132	ownership "Locally owned and initialized"
5133	arith_type "Unsigned"
5134	n_bits "1"
5135	bin_pt "0"
5136	dbl_ovrd off
5137	xl_use_area off
5138	xl_area "[0,0,0,0,0,0,0]"
5139	has_advanced_control "0"
5140	sggui_pos "20,20,381,246"
5141	block_type "fromreg"
5142	block_version "8.2"
5143	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5144	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5145	}
5146	Block {
5147	BlockType Reference
5148	Name "From Register13"
5149	Ports [0, 1]
5150	Position [770, 505, 815, 535]
5151	ShowName off
5152	AttributesFormatString "MGC_AGC_SEL\\n<< %<shared_memory_name> >>"
5153	SourceBlock "xbsIndex_r4/From Register"
5154	SourceType "Xilinx Shared Memory Based From Register Block"
5155	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5156	shared_memory_name "'MGC_AGC_SEL'"
5157	init "1"
5158	period "1"
5159	ownership "Locally owned and initialized"
5160	arith_type "Unsigned"
5161	n_bits "1"
5162	bin_pt "0"
5163	dbl_ovrd off
5164	xl_use_area off
5165	xl_area "[0,0,0,0,0,0,0]"
5166	has_advanced_control "0"
5167	sggui_pos "20,20,447,246"
5168	block_type "fromreg"
5169	block_version "8.2"
5170	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5171	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5172	}
5173	Block {
5174	BlockType Reference
5175	Name "From Register14"
5176	Ports [0, 1]
5177	Position [770, 575, 815, 605]
5178	ShowName off
5179	AttributesFormatString "DCO_EN_SEL\\n<< %<shared_memory_name> >>"
5180	SourceBlock "xbsIndex_r4/From Register"
5181	SourceType "Xilinx Shared Memory Based From Register Block"
5182	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5183	shared_memory_name "'DCO_EN_SEL'"
5184	init "1"
5185	period "1"
5186	ownership "Locally owned and initialized"
5187	arith_type "Unsigned"
5188	n_bits "1"
5189	bin_pt "0"
5190	dbl_ovrd off
5191	xl_use_area off
5192	xl_area "[0,0,0,0,0,0,0]"
5193	has_advanced_control "0"
5194	sggui_pos "20,20,447,246"
5195	block_type "fromreg"
5196	block_version "8.2"
5197	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5198	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5199	}
5200	Block {
5201	BlockType Reference
5202	Name "From Register15"
5203	Ports [0, 1]
5204	Position [55, 185, 100, 215]
5205	ShowName off
5206	AttributesFormatString "StartTxRx\\n<< %<shared_memory_name> >>"
5207	SourceBlock "xbsIndex_r4/From Register"
5208	SourceType "Xilinx Shared Memory Based From Register Block"
5209	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5210	shared_memory_name "'StartTxRx'"
5211	init "0"
5212	period "1"
5213	ownership "Locally owned and initialized"
5214	arith_type "Unsigned"
5215	n_bits "1"
5216	bin_pt "0"
5217	dbl_ovrd off
5218	xl_use_area off
5219	xl_area "[0,0,0,0,0,0,0]"
5220	has_advanced_control "0"
5221	sggui_pos "20,20,381,246"
5222	block_type "fromreg"
5223	block_version "8.2"
5224	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5225	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5226	}
5227	Block {
5228	BlockType Reference
5229	Name "From Register2"
5230	Ports [0, 1]
5231	Position [450, 15, 495, 45]
5232	ShowName off
5233	AttributesFormatString "StartCapture\\n<< %<shared_memory_name> >>"
5234	SourceBlock "xbsIndex_r4/From Register"
5235	SourceType "Xilinx Shared Memory Based From Register Block"
5236	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5237	shared_memory_name "'StartCapture'"
5238	init "0"
5239	period "1"
5240	ownership "Locally owned and initialized"
5241	arith_type "Unsigned"
5242	n_bits "1"
5243	bin_pt "0"
5244	dbl_ovrd off
5245	xl_use_area off
5246	xl_area "[0,0,0,0,0,0,0]"
5247	has_advanced_control "0"
5248	sggui_pos "20,20,447,246"
5249	block_type "fromreg"
5250	block_version "8.2"
5251	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5252	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5253	}
5254	Block {
5255	BlockType Reference
5256	Name "From Register3"
5257	Ports [0, 1]
5258	Position [450, 345, 495, 375]
5259	ShowName off
5260	AttributesFormatString "RADIO4RXBUFF_RXEN\\n<< %<shared_memory_name> >>"
5261	SourceBlock "xbsIndex_r4/From Register"
5262	SourceType "Xilinx Shared Memory Based From Register Block"
5263	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5264	shared_memory_name "'RADIO4RXBUFF_RXEN'"
5265	init "0"
5266	period "1"
5267	ownership "Locally owned and initialized"
5268	arith_type "Unsigned"
5269	n_bits "1"
5270	bin_pt "0"
5271	dbl_ovrd off
5272	xl_use_area off
5273	xl_area "[0,0,0,0,0,0,0]"
5274	has_advanced_control "0"
5275	sggui_pos "20,20,381,246"
5276	block_type "fromreg"
5277	block_version "8.2"
5278	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5279	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5280	}
5281	Block {
5282	BlockType Reference
5283	Name "From Register4"
5284	Ports [0, 1]
5285	Position [55, 25, 100, 55]
5286	ShowName off
5287	AttributesFormatString "StartTx\\n<< %<shared_memory_name> >>"
5288	SourceBlock "xbsIndex_r4/From Register"
5289	SourceType "Xilinx Shared Memory Based From Register Block"
5290	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5291	shared_memory_name "'StartTx'"
5292	init "0"
5293	period "1"
5294	ownership "Locally owned and initialized"
5295	arith_type "Unsigned"
5296	n_bits "1"
5297	bin_pt "0"
5298	dbl_ovrd off
5299	xl_use_area off
5300	xl_area "[0,0,0,0,0,0,0]"
5301	has_advanced_control "0"
5302	sggui_pos "20,20,379,246"
5303	block_type "fromreg"
5304	block_version "8.2"
5305	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5306	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5307	}
5308	Block {
5309	BlockType Reference
5310	Name "From Register5"
5311	Ports [0, 1]
5312	Position [450, 185, 495, 215]
5313	ShowName off
5314	AttributesFormatString "RADIO2RXBUFF_RXEN\\n<< %<shared_memory_name> >>"
5315	SourceBlock "xbsIndex_r4/From Register"
5316	SourceType "Xilinx Shared Memory Based From Register Block"
5317	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5318	shared_memory_name "'RADIO2RXBUFF_RXEN'"
5319	init "0"
5320	period "1"
5321	ownership "Locally owned and initialized"
5322	arith_type "Unsigned"
5323	n_bits "1"
5324	bin_pt "0"
5325	dbl_ovrd off
5326	xl_use_area off
5327	xl_area "[0,0,0,0,0,0,0]"
5328	has_advanced_control "0"
5329	sggui_pos "20,20,381,246"
5330	block_type "fromreg"
5331	block_version "8.2"
5332	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5333	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5334	}
5335	Block {
5336	BlockType Reference
5337	Name "From Register6"
5338	Ports [0, 1]
5339	Position [55, 430, 100, 460]
5340	ShowName off
5341	AttributesFormatString "RADIO1TXBUFF_TXEN\\n<< %<shared_memory_name> >>"
5342	SourceBlock "xbsIndex_r4/From Register"
5343	SourceType "Xilinx Shared Memory Based From Register Block"
5344	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5345	shared_memory_name "'RADIO1TXBUFF_TXEN'"
5346	init "0"
5347	period "1"
5348	ownership "Locally owned and initialized"
5349	arith_type "Unsigned"
5350	n_bits "1"
5351	bin_pt "0"
5352	dbl_ovrd off
5353	xl_use_area off
5354	xl_area "[0,0,0,0,0,0,0]"
5355	has_advanced_control "0"
5356	sggui_pos "20,20,381,246"
5357	block_type "fromreg"
5358	block_version "8.2"
5359	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5360	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5361	}
5362	Block {
5363	BlockType Reference
5364	Name "From Register7"
5365	Ports [0, 1]
5366	Position [55, 105, 100, 135]
5367	ShowName off
5368	AttributesFormatString "StopTx\\n<< %<shared_memory_name> >>"
5369	SourceBlock "xbsIndex_r4/From Register"
5370	SourceType "Xilinx Shared Memory Based From Register Block"
5371	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5372	shared_memory_name "'StopTx'"
5373	init "0"
5374	period "1"
5375	ownership "Locally owned and initialized"
5376	arith_type "Unsigned"
5377	n_bits "1"
5378	bin_pt "0"
5379	dbl_ovrd off
5380	xl_use_area off
5381	xl_area "[0,0,0,0,0,0,0]"
5382	has_advanced_control "0"
5383	sggui_pos "20,20,381,246"
5384	block_type "fromreg"
5385	block_version "8.2"
5386	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5387	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5388	}
5389	Block {
5390	BlockType Reference
5391	Name "From Register8"
5392	Ports [0, 1]
5393	Position [55, 265, 100, 295]
5394	ShowName off
5395	AttributesFormatString "TransMode\\n<< %<shared_memory_name> >>"
5396	SourceBlock "xbsIndex_r4/From Register"
5397	SourceType "Xilinx Shared Memory Based From Register Block"
5398	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5399	shared_memory_name "'TransMode'"
5400	init "0"
5401	period "1"
5402	ownership "Locally owned and initialized"
5403	arith_type "Unsigned"
5404	n_bits "1"
5405	bin_pt "0"
5406	dbl_ovrd off
5407	xl_use_area off
5408	xl_area "[0,0,0,0,0,0,0]"
5409	has_advanced_control "0"
5410	sggui_pos "20,20,381,246"
5411	block_type "fromreg"
5412	block_version "8.2"
5413	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5414	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5415	}
5416	Block {
5417	BlockType Reference
5418	Name "From Register9"
5419	Ports [0, 1]
5420	Position [55, 510, 100, 540]
5421	ShowName off
5422	AttributesFormatString "RADIO2TXBUFF_TXEN\\n<< %<shared_memory_name> >>"
5423	SourceBlock "xbsIndex_r4/From Register"
5424	SourceType "Xilinx Shared Memory Based From Register Block"
5425	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5426	shared_memory_name "'RADIO2TXBUFF_TXEN'"
5427	init "0"
5428	period "1"
5429	ownership "Locally owned and initialized"
5430	arith_type "Unsigned"
5431	n_bits "1"
5432	bin_pt "0"
5433	dbl_ovrd off
5434	xl_use_area off
5435	xl_area "[0,0,0,0,0,0,0]"
5436	has_advanced_control "0"
5437	sggui_pos "20,20,379,246"
5438	block_type "fromreg"
5439	block_version "8.2"
5440	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5441	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5442	}
5443	Block {
5444	BlockType From
5445	Name "From1"
5446	Position [770, 21, 905, 39]
5447	ShowName off
5448	CloseFcn "tagdialog Close"
5449	GotoTag "WR_ADDR"
5450	TagVisibility "global"
5451	}
5452	Block {
5453	BlockType From
5454	Name "From10"
5455	Position [765, 116, 900, 134]
5456	ShowName off
5457	CloseFcn "tagdialog Close"
5458	GotoTag "Radio1_RSSI"
5459	TagVisibility "global"
5460	}
5461	Block {
5462	BlockType From
5463	Name "From2"
5464	Position [770, 51, 905, 69]
5465	ShowName off
5466	CloseFcn "tagdialog Close"
5467	GotoTag "AGC_Done_Detect"
5468	TagVisibility "global"
5469	}
5470	Block {
5471	BlockType From
5472	Name "From3"
5473	Position [765, 676, 900, 694]
5474	ShowName off
5475	CloseFcn "tagdialog Close"
5476	GotoTag "CAPTURE_IS_DONE"
5477	TagVisibility "global"
5478	}
5479	Block {
5480	BlockType From
5481	Name "From4"
5482	Position [765, 206, 900, 224]
5483	ShowName off
5484	CloseFcn "tagdialog Close"
5485	GotoTag "Radio2_RSSI"
5486	TagVisibility "global"
5487	}
5488	Block {
5489	BlockType From
5490	Name "From6"
5491	Position [765, 296, 900, 314]
5492	ShowName off
5493	CloseFcn "tagdialog Close"
5494	GotoTag "Radio3_RSSI"
5495	TagVisibility "global"
5496	}
5497	Block {
5498	BlockType From
5499	Name "From8"
5500	Position [770, 401, 905, 419]
5501	ShowName off
5502	CloseFcn "tagdialog Close"
5503	GotoTag "Radio4_RSSI"
5504	TagVisibility "global"
5505	}
5506	Block {
5507	BlockType Goto
5508	Name "Goto1"
5509	Position [175, 107, 335, 133]
5510	ShowName off
5511	GotoTag "StopTx"
5512	TagVisibility "global"
5513	}
5514	Block {
5515	BlockType Goto
5516	Name "Goto10"
5517	Position [175, 27, 335, 53]
5518	ShowName off
5519	GotoTag "StartTx"
5520	TagVisibility "global"
5521	}
5522	Block {
5523	BlockType Goto
5524	Name "Goto11"
5525	Position [575, 187, 735, 213]
5526	ShowName off
5527	GotoTag "RADIO2RXBUFF_RXEN"
5528	TagVisibility "global"
5529	}
5530	Block {
5531	BlockType Goto
5532	Name "Goto12"
5533	Position [575, 267, 735, 293]
5534	ShowName off
5535	GotoTag "RADIO3RXBUFF_RXEN"
5536	TagVisibility "global"
5537	}
5538	Block {
5539	BlockType Goto
5540	Name "Goto13"
5541	Position [575, 347, 735, 373]
5542	ShowName off
5543	GotoTag "RADIO4RXBUFF_RXEN"
5544	TagVisibility "global"
5545	}
5546	Block {
5547	BlockType Goto
5548	Name "Goto14"
5549	Position [575, 432, 735, 458]
5550	ShowName off
5551	GotoTag "DebugRx1Buffers"
5552	TagVisibility "global"
5553	}
5554	Block {
5555	BlockType Goto
5556	Name "Goto15"
5557	Position [575, 512, 735, 538]
5558	ShowName off
5559	GotoTag "DebugRx2Buffers"
5560	TagVisibility "global"
5561	}
5562	Block {
5563	BlockType Goto
5564	Name "Goto16"
5565	Position [575, 597, 735, 623]
5566	ShowName off
5567	GotoTag "DebugRx3Buffers"
5568	TagVisibility "global"
5569	}
5570	Block {
5571	BlockType Goto
5572	Name "Goto17"
5573	Position [575, 697, 735, 723]
5574	ShowName off
5575	GotoTag "DebugRx4Buffers"
5576	TagVisibility "global"
5577	}
5578	Block {
5579	BlockType Goto
5580	Name "Goto18"
5581	Position [1090, 522, 1250, 548]
5582	ShowName off
5583	GotoTag "MGCAGC_AGCDCO_SEL"
5584	TagVisibility "global"
5585	}
5586	Block {
5587	BlockType Goto
5588	Name "Goto19"
5589	Position [175, 187, 335, 213]
5590	ShowName off
5591	GotoTag "StartTxRx"
5592	TagVisibility "global"
5593	}
5594	Block {
5595	BlockType Goto
5596	Name "Goto2"
5597	Position [175, 347, 335, 373]
5598	ShowName off
5599	GotoTag "TxDelay"
5600	TagVisibility "global"
5601	}
5602	Block {
5603	BlockType Goto
5604	Name "Goto3"
5605	Position [175, 267, 335, 293]
5606	ShowName off
5607	GotoTag "TransMode"
5608	TagVisibility "global"
5609	}
5610	Block {
5611	BlockType Goto
5612	Name "Goto4"
5613	Position [175, 432, 335, 458]
5614	ShowName off
5615	GotoTag "RADIO1TXBUFF_TXEN"
5616	TagVisibility "global"
5617	}
5618	Block {
5619	BlockType Goto
5620	Name "Goto5"
5621	Position [175, 512, 335, 538]
5622	ShowName off
5623	GotoTag "RADIO2TXBUFF_TXEN"
5624	TagVisibility "global"
5625	}
5626	Block {
5627	BlockType Goto
5628	Name "Goto6"
5629	Position [175, 592, 335, 618]
5630	ShowName off
5631	GotoTag "RADIO3TXBUFF_TXEN"
5632	TagVisibility "global"
5633	}
5634	Block {
5635	BlockType Goto
5636	Name "Goto7"
5637	Position [175, 672, 335, 698]
5638	ShowName off
5639	GotoTag "RADIO4TXBUFF_TXEN"
5640	TagVisibility "global"
5641	}
5642	Block {
5643	BlockType Goto
5644	Name "Goto8"
5645	Position [575, 17, 735, 43]
5646	ShowName off
5647	GotoTag "StartCapture"
5648	TagVisibility "global"
5649	}
5650	Block {
5651	BlockType Goto
5652	Name "Goto9"
5653	Position [575, 102, 735, 128]
5654	ShowName off
5655	GotoTag "RADIO1RXBUFF_RXEN"
5656	TagVisibility "global"
5657	}
5658	Block {
5659	BlockType Reference
5660	Name "Logical"
5661	Ports [2, 1]
5662	Position [945, 505, 1000, 565]
5663	SourceBlock "xbsIndex_r4/Logical"
5664	SourceType "Xilinx Logical Block Block"
5665	logical_function "AND"
5666	inputs "2"
5667	en off
5668	latency "0"
5669	precision "Full"
5670	arith_type "Unsigned"
5671	n_bits "16"
5672	bin_pt "0"
5673	align_bp on
5674	dbl_ovrd off
5675	xl_use_area off
5676	xl_area "[0,0,0,0,0,0,0]"
5677	has_advanced_control "0"
5678	sggui_pos "20,20,348,261"
5679	block_type "logical"
5680	block_version "10.1.3"
5681	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
5682	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
5683	}
5684	Block {
5685	BlockType Reference
5686	Name "Radio1AGCDoneRSSI"
5687	Ports [2, 1]
5688	Position [970, 112, 1030, 168]
5689	AttributesFormatString "<< %<shared_memory_name> >>"
5690	SourceBlock "xbsIndex_r4/To Register"
5691	SourceType "Xilinx Shared Memory Based To Register Block"
5692	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
5693	shared_memory_name "'Radio1AGCDoneRSSI'"
5694	init "0"
5695	ownership "Locally owned and initialized"
5696	explicit_data_type on
5697	arith_type "Unsigned"
5698	n_bits "10"
5699	bin_pt "0"
5700	dbl_ovrd off
5701	xl_use_area off
5702	xl_area "[0,0,0,0,0,0,0]"
5703	has_advanced_control "0"
5704	sggui_pos "20,20,381,266"
5705	block_type "toreg"
5706	block_version "10.1.3"
5707	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
5708	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5709	}
5710	Block {
5711	BlockType Reference
5712	Name "Radio2AGCDoneRSSI"
5713	Ports [2, 1]
5714	Position [970, 202, 1030, 258]
5715	AttributesFormatString "<< %<shared_memory_name> >>"
5716	SourceBlock "xbsIndex_r4/To Register"
5717	SourceType "Xilinx Shared Memory Based To Register Block"
5718	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
5719	shared_memory_name "'Radio2AGCDoneRSSI'"
5720	init "0"
5721	ownership "Locally owned and initialized"
5722	explicit_data_type on
5723	arith_type "Unsigned"
5724	n_bits "10"
5725	bin_pt "0"
5726	dbl_ovrd off
5727	xl_use_area off
5728	xl_area "[0,0,0,0,0,0,0]"
5729	has_advanced_control "0"
5730	sggui_pos "20,20,381,266"
5731	block_type "toreg"
5732	block_version "10.1.3"
5733	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
5734	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5735	}
5736	Block {
5737	BlockType Reference
5738	Name "Radio3AGCDoneRSSI"
5739	Ports [2, 1]
5740	Position [970, 292, 1030, 348]
5741	AttributesFormatString "<< %<shared_memory_name> >>"
5742	SourceBlock "xbsIndex_r4/To Register"
5743	SourceType "Xilinx Shared Memory Based To Register Block"
5744	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
5745	shared_memory_name "'Radio3AGCDoneRSSI'"
5746	init "0"
5747	ownership "Locally owned and initialized"
5748	explicit_data_type on
5749	arith_type "Unsigned"
5750	n_bits "10"
5751	bin_pt "0"
5752	dbl_ovrd off
5753	xl_use_area off
5754	xl_area "[0,0,0,0,0,0,0]"
5755	has_advanced_control "0"
5756	sggui_pos "20,20,381,266"
5757	block_type "toreg"
5758	block_version "10.1.3"
5759	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
5760	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5761	}
5762	Block {
5763	BlockType Reference
5764	Name "Radio4AGCDoneRSSI"
5765	Ports [2, 1]
5766	Position [975, 397, 1035, 453]
5767	AttributesFormatString "<< %<shared_memory_name> >>"
5768	SourceBlock "xbsIndex_r4/To Register"
5769	SourceType "Xilinx Shared Memory Based To Register Block"
5770	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
5771	shared_memory_name "'Radio4AGCDoneRSSI'"
5772	init "0"
5773	ownership "Locally owned and initialized"
5774	explicit_data_type on
5775	arith_type "Unsigned"
5776	n_bits "10"
5777	bin_pt "0"
5778	dbl_ovrd off
5779	xl_use_area off
5780	xl_area "[0,0,0,0,0,0,0]"
5781	has_advanced_control "0"
5782	sggui_pos "20,20,381,266"
5783	block_type "toreg"
5784	block_version "10.1.3"
5785	sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right"
5786	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5787	}
5788	Block {
5789	BlockType Reference
5790	Name "To Register"
5791	Ports [2, 1]
5792	Position [935, 671, 980, 729]
5793	NamePlacement "alternate"
5794	ShowName off
5795	AttributesFormatString "CaptureDone\\n<< %<shared_memory_name> >>"
5796	SourceBlock "xbsIndex_r4/To Register"
5797	SourceType "Xilinx Shared Memory Based To Register Block"
5798	infoedit "Register block that writes data to a shared memory register. Delay of one sample period."
5799	shared_memory_name "'CaptureDone'"
5800	init "0"
5801	ownership "Locally owned and initialized"
5802	explicit_data_type on
5803	arith_type "Unsigned"
5804	n_bits "1"
5805	bin_pt "0"
5806	dbl_ovrd off
5807	xl_use_area off
5808	xl_area "[0,0,0,0,0,0,0]"
5809	has_advanced_control "0"
5810	sggui_pos "20,20,381,270"
5811	block_type "toreg"
5812	block_version "8.2"
5813	sg_icon_stat "45,58,1,1,white,blue,0,77cabcdf,right"
5814	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5815	}
5816	Block {
5817	BlockType Reference
5818	Name "TxDelay"
5819	Ports [0, 1]
5820	Position [55, 345, 100, 375]
5821	AttributesFormatString "<< %<shared_memory_name> >>"
5822	SourceBlock "xbsIndex_r4/From Register"
5823	SourceType "Xilinx Shared Memory Based From Register Block"
5824	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
5825	shared_memory_name "'TxDelay'"
5826	init "1000"
5827	period "1"
5828	ownership "Locally owned and initialized"
5829	arith_type "Unsigned"
5830	n_bits "14"
5831	bin_pt "0"
5832	dbl_ovrd off
5833	xl_use_area off
5834	xl_area "[0,0,0,0,0,0,0]"
5835	has_advanced_control "0"
5836	sggui_pos "20,20,381,234"
5837	block_type "fromreg"
5838	block_version "10.1.2"
5839	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,right"
5840	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
5841	}
5842	Block {
5843	BlockType Reference
5844	Name "zero1"
5845	Ports [0, 1]
5846	Position [865, 706, 885, 724]
5847	ShowName off
5848	SourceBlock "xbsIndex_r4/Constant"
5849	SourceType "Xilinx Constant Block Block"
5850	arith_type "Boolean"
5851	const "1"
5852	n_bits "1"
5853	bin_pt "0"
5854	explicit_period off
5855	period "1"
5856	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
5857	equ "P=C"
5858	opselect "C"
5859	inp2 "PCIN>>17"
5860	opr "+"
5861	inp1 "P"
5862	carry "CIN"
5863	dbl_ovrd off
5864	has_advanced_control "0"
5865	sggui_pos "-1,-1,-1,-1"
5866	block_type "constant"
5867	block_version "VER_STRING_GOES_HERE"
5868	sg_icon_stat "20,18,1,1,white,blue,0,06094819,right"
5869	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: end icon text');\n"
5870	}
5871	Line {
5872	SrcBlock "From Register4"
5873	SrcPort 1
5874	DstBlock "Goto10"
5875	DstPort 1
5876	}
5877	Line {
5878	SrcBlock "From Register7"
5879	SrcPort 1
5880	DstBlock "Goto1"
5881	DstPort 1
5882	}
5883	Line {
5884	SrcBlock "From Register8"
5885	SrcPort 1
5886	DstBlock "Goto3"
5887	DstPort 1
5888	}
5889	Line {
5890	SrcBlock "TxDelay"
5891	SrcPort 1
5892	DstBlock "Goto2"
5893	DstPort 1
5894	}
5895	Line {
5896	SrcBlock "From Register6"
5897	SrcPort 1
5898	DstBlock "Goto4"
5899	DstPort 1
5900	}
5901	Line {
5902	SrcBlock "From Register9"
5903	SrcPort 1
5904	DstBlock "Goto5"
5905	DstPort 1
5906	}
5907	Line {
5908	SrcBlock "From Register10"
5909	SrcPort 1
5910	DstBlock "Goto6"
5911	DstPort 1
5912	}
5913	Line {
5914	SrcBlock "From Register12"
5915	SrcPort 1
5916	DstBlock "Goto7"
5917	DstPort 1
5918	}
5919	Line {
5920	SrcBlock "From Register2"
5921	SrcPort 1
5922	DstBlock "Goto8"
5923	DstPort 1
5924	}
5925	Line {
5926	SrcBlock "From Register5"
5927	SrcPort 1
5928	DstBlock "Goto11"
5929	DstPort 1
5930	}
5931	Line {
5932	SrcBlock "From Register11"
5933	SrcPort 1
5934	DstBlock "Goto12"
5935	DstPort 1
5936	}
5937	Line {
5938	SrcBlock "From Register3"
5939	SrcPort 1
5940	DstBlock "Goto13"
5941	DstPort 1
5942	}
5943	Line {
5944	SrcBlock "From Register1"
5945	SrcPort 1
5946	DstBlock "Goto9"
5947	DstPort 1
5948	}
5949	Line {
5950	SrcBlock "DebugRx1Buffers"
5951	SrcPort 1
5952	DstBlock "Goto14"
5953	DstPort 1
5954	}
5955	Line {
5956	SrcBlock "DebugRx2Buffers"
5957	SrcPort 1
5958	DstBlock "Goto15"
5959	DstPort 1
5960	}
5961	Line {
5962	SrcBlock "DebugRx3Buffers"
5963	SrcPort 1
5964	DstBlock "Goto16"
5965	DstPort 1
5966	}
5967	Line {
5968	SrcBlock "DebugRx4Buffers"
5969	SrcPort 1
5970	DstBlock "Goto17"
5971	DstPort 1
5972	}
5973	Line {
5974	SrcBlock "From2"
5975	SrcPort 1
5976	Points [15, 0]
5977	Branch {
5978	DstBlock "AGCDoneAddr"
5979	DstPort 2
5980	}
5981	Branch {
5982	Points [0, 95]
5983	Branch {
5984	DstBlock "Radio1AGCDoneRSSI"
5985	DstPort 2
5986	}
5987	Branch {
5988	Points [0, 90]
5989	Branch {
5990	Points [0, 90]
5991	Branch {
5992	Points [0, 105]
5993	DstBlock "Radio4AGCDoneRSSI"
5994	DstPort 2
5995	}
5996	Branch {
5997	DstBlock "Radio3AGCDoneRSSI"
5998	DstPort 2
5999	}
6000	}
6001	Branch {
6002	DstBlock "Radio2AGCDoneRSSI"
6003	DstPort 2
6004	}
6005	}
6006	}
6007	}
6008	Line {
6009	SrcBlock "From1"
6010	SrcPort 1
6011	DstBlock "AGCDoneAddr"
6012	DstPort 1
6013	}
6014	Line {
6015	SrcBlock "From4"
6016	SrcPort 1
6017	DstBlock "Radio2AGCDoneRSSI"
6018	DstPort 1
6019	}
6020	Line {
6021	SrcBlock "From6"
6022	SrcPort 1
6023	DstBlock "Radio3AGCDoneRSSI"
6024	DstPort 1
6025	}
6026	Line {
6027	SrcBlock "From8"
6028	SrcPort 1
6029	DstBlock "Radio4AGCDoneRSSI"
6030	DstPort 1
6031	}
6032	Line {
6033	SrcBlock "From10"
6034	SrcPort 1
6035	DstBlock "Radio1AGCDoneRSSI"
6036	DstPort 1
6037	}
6038	Line {
6039	SrcBlock "From Register13"
6040	SrcPort 1
6041	DstBlock "Convert1"
6042	DstPort 1
6043	}
6044	Line {
6045	SrcBlock "From Register14"
6046	SrcPort 1
6047	DstBlock "Convert2"
6048	DstPort 1
6049	}
6050	Line {
6051	SrcBlock "Convert1"
6052	SrcPort 1
6053	DstBlock "Logical"
6054	DstPort 1
6055	}
6056	Line {
6057	SrcBlock "Convert2"
6058	SrcPort 1
6059	Points [25, 0; 0, -40]
6060	DstBlock "Logical"
6061	DstPort 2
6062	}
6063	Line {
6064	SrcBlock "Logical"
6065	SrcPort 1
6066	DstBlock "Convert3"
6067	DstPort 1
6068	}
6069	Line {
6070	SrcBlock "Convert3"
6071	SrcPort 1
6072	DstBlock "Goto18"
6073	DstPort 1
6074	}
6075	Line {
6076	SrcBlock "zero1"
6077	SrcPort 1
6078	DstBlock "To Register"
6079	DstPort 2
6080	}
6081	Line {
6082	SrcBlock "From3"
6083	SrcPort 1
6084	DstBlock "To Register"
6085	DstPort 1
6086	}
6087	Line {
6088	SrcBlock "From Register15"
6089	SrcPort 1
6090	DstBlock "Goto19"
6091	DstPort 1
6092	}
6093	Annotation {
6094	Name "MGCAGC_AGCDCO_SEL will go high\nonly when AGC is selected (MGC_AGC_SEL=1) AND\nDC Offset (DCO) Correction in enabled (DCO_EN_SEL=1)"
6095	Position [1140, 572]
6096	}
6097	}
6098	}
6099	Block {
6100	BlockType SubSystem
6101	Name "Posedge"
6102	Ports [1, 1]
6103	Position [330, 233, 375, 257]
6104	MinAlgLoopOccurrences off
6105	PropExecContextOutsideSubsystem off
6106	RTWSystemCode "Auto"
6107	FunctionWithSeparateData off
6108	Opaque off
6109	RequestExecContextInheritance off
6110	MaskHideContents off
6111	System {
6112	Name "Posedge"
6113	Location [132, 719, 452, 817]
6114	Open off
6115	ModelBrowserVisibility off
6116	ModelBrowserWidth 200
6117	ScreenColor "white"
6118	PaperOrientation "landscape"
6119	PaperPositionMode "auto"
6120	PaperType "usletter"
6121	PaperUnits "inches"
6122	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
6123	TiledPageScale 1
6124	ShowPageBoundaries off
6125	ZoomFactor "100"
6126	Block {
6127	BlockType Inport
6128	Name "D"
6129	Position [25, 33, 55, 47]
6130	IconDisplay "Port number"
6131	OutDataType "sfix(16)"
6132	OutScaling "2^0"
6133	}
6134	Block {
6135	BlockType Reference
6136	Name "Delay"
6137	Ports [1, 1]
6138	Position [145, 45, 175, 75]
6139	ShowName off
6140	SourceBlock "xbsIndex_r4/Delay"
6141	SourceType "Xilinx Delay Block"
6142	infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-flops."
6143	en off
6144	latency "1"
6145	dbl_ovrd off
6146	reg_retiming off
6147	xl_use_area off
6148	xl_area "[0,0,0,0,0,0,0]"
6149	has_advanced_control "0"
6150	sggui_pos "-1,-1,-1,-1"
6151	block_type "delay"
6152	block_version "8.2"
6153	sg_icon_stat "30,30,1,1,white,blue,0,fc531c0e,right"
6154	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6155	}
6156	Block {
6157	BlockType Reference
6158	Name "Inverter"
6159	Ports [1, 1]
6160	Position [90, 47, 120, 73]
6161	ShowName off
6162	SourceBlock "xbsIndex_r4/Inverter"
6163	SourceType "Xilinx Inverter Block"
6164	infoedit "Bitwise logical negation (one's complement) operator."
6165	en off
6166	latency "0"
6167	dbl_ovrd off
6168	xl_use_area off
6169	xl_area "[0,0,0,0,0,0,0]"
6170	has_advanced_control "0"
6171	sggui_pos "-1,-1,-1,-1"
6172	block_type "inv"
6173	block_version "8.2"
6174	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
6175	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
6176	}
6177	Block {
6178	BlockType Reference
6179	Name "Logical"
6180	Ports [2, 1]
6181	Position [205, 29, 240, 71]
6182	ShowName off
6183	SourceBlock "xbsIndex_r4/Logical"
6184	SourceType "Xilinx Logical Block Block"
6185	logical_function "AND"
6186	inputs "2"
6187	en off
6188	latency "0"
6189	precision "Full"
6190	arith_type "Unsigned"
6191	n_bits "16"
6192	bin_pt "0"
6193	align_bp on
6194	dbl_ovrd off
6195	xl_use_area off
6196	xl_area "[0,0,0,0,0,0,0]"
6197	has_advanced_control "0"
6198	sggui_pos "-1,-1,-1,-1"
6199	block_type "logical"
6200	block_version "8.2"
6201	sg_icon_stat "35,42,1,1,white,blue,0,087b5522,right"
6202	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6203	}
6204	Block {
6205	BlockType Outport
6206	Name "Q"
6207	Position [265, 43, 295, 57]
6208	IconDisplay "Port number"
6209	OutDataType "sfix(16)"
6210	OutScaling "2^0"
6211	}
6212	Line {
6213	SrcBlock "D"
6214	SrcPort 1
6215	Points [0, 0; 15, 0]
6216	Branch {
6217	DstBlock "Inverter"
6218	DstPort 1
6219	}
6220	Branch {
6221	DstBlock "Logical"
6222	DstPort 1
6223	}
6224	}
6225	Line {
6226	SrcBlock "Inverter"
6227	SrcPort 1
6228	DstBlock "Delay"
6229	DstPort 1
6230	}
6231	Line {
6232	SrcBlock "Delay"
6233	SrcPort 1
6234	Points [0, 0]
6235	DstBlock "Logical"
6236	DstPort 2
6237	}
6238	Line {
6239	SrcBlock "Logical"
6240	SrcPort 1
6241	Points [0, 0]
6242	DstBlock "Q"
6243	DstPort 1
6244	}
6245	}
6246	}
6247	Block {
6248	BlockType SubSystem
6249	Name "Posedge1"
6250	Ports [1, 1]
6251	Position [365, 648, 410, 672]
6252	MinAlgLoopOccurrences off
6253	PropExecContextOutsideSubsystem off
6254	RTWSystemCode "Auto"
6255	FunctionWithSeparateData off
6256	Opaque off
6257	RequestExecContextInheritance off
6258	MaskHideContents off
6259	System {
6260	Name "Posedge1"
6261	Location [132, 719, 452, 817]
6262	Open off
6263	ModelBrowserVisibility off
6264	ModelBrowserWidth 200
6265	ScreenColor "white"
6266	PaperOrientation "landscape"
6267	PaperPositionMode "auto"
6268	PaperType "usletter"
6269	PaperUnits "inches"
6270	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
6271	TiledPageScale 1
6272	ShowPageBoundaries off
6273	ZoomFactor "100"
6274	Block {
6275	BlockType Inport
6276	Name "D"
6277	Position [25, 33, 55, 47]
6278	IconDisplay "Port number"
6279	OutDataType "sfix(16)"
6280	OutScaling "2^0"
6281	}
6282	Block {
6283	BlockType Reference
6284	Name "Delay"
6285	Ports [1, 1]
6286	Position [145, 45, 175, 75]
6287	ShowName off
6288	SourceBlock "xbsIndex_r4/Delay"
6289	SourceType "Xilinx Delay Block"
6290	infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-flops."
6291	en off
6292	latency "1"
6293	dbl_ovrd off
6294	reg_retiming off
6295	xl_use_area off
6296	xl_area "[0,0,0,0,0,0,0]"
6297	has_advanced_control "0"
6298	sggui_pos "-1,-1,-1,-1"
6299	block_type "delay"
6300	block_version "8.2"
6301	sg_icon_stat "30,30,1,1,white,blue,0,fc531c0e,right"
6302	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6303	}
6304	Block {
6305	BlockType Reference
6306	Name "Inverter"
6307	Ports [1, 1]
6308	Position [90, 47, 120, 73]
6309	ShowName off
6310	SourceBlock "xbsIndex_r4/Inverter"
6311	SourceType "Xilinx Inverter Block"
6312	infoedit "Bitwise logical negation (one's complement) operator."
6313	en off
6314	latency "0"
6315	dbl_ovrd off
6316	xl_use_area off
6317	xl_area "[0,0,0,0,0,0,0]"
6318	has_advanced_control "0"
6319	sggui_pos "-1,-1,-1,-1"
6320	block_type "inv"
6321	block_version "8.2"
6322	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
6323	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
6324	}
6325	Block {
6326	BlockType Reference
6327	Name "Logical"
6328	Ports [2, 1]
6329	Position [205, 29, 240, 71]
6330	ShowName off
6331	SourceBlock "xbsIndex_r4/Logical"
6332	SourceType "Xilinx Logical Block Block"
6333	logical_function "AND"
6334	inputs "2"
6335	en off
6336	latency "0"
6337	precision "Full"
6338	arith_type "Unsigned"
6339	n_bits "16"
6340	bin_pt "0"
6341	align_bp on
6342	dbl_ovrd off
6343	xl_use_area off
6344	xl_area "[0,0,0,0,0,0,0]"
6345	has_advanced_control "0"
6346	sggui_pos "-1,-1,-1,-1"
6347	block_type "logical"
6348	block_version "8.2"
6349	sg_icon_stat "35,42,1,1,white,blue,0,087b5522,right"
6350	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6351	}
6352	Block {
6353	BlockType Outport
6354	Name "Q"
6355	Position [265, 43, 295, 57]
6356	IconDisplay "Port number"
6357	OutDataType "sfix(16)"
6358	OutScaling "2^0"
6359	}
6360	Line {
6361	SrcBlock "Logical"
6362	SrcPort 1
6363	Points [0, 0]
6364	DstBlock "Q"
6365	DstPort 1
6366	}
6367	Line {
6368	SrcBlock "Delay"
6369	SrcPort 1
6370	Points [0, 0]
6371	DstBlock "Logical"
6372	DstPort 2
6373	}
6374	Line {
6375	SrcBlock "Inverter"
6376	SrcPort 1
6377	DstBlock "Delay"
6378	DstPort 1
6379	}
6380	Line {
6381	SrcBlock "D"
6382	SrcPort 1
6383	Points [0, 0; 15, 0]
6384	Branch {
6385	DstBlock "Logical"
6386	DstPort 1
6387	}
6388	Branch {
6389	DstBlock "Inverter"
6390	DstPort 1
6391	}
6392	}
6393	}
6394	}
6395	Block {
6396	BlockType SubSystem
6397	Name "Posedge2"
6398	Ports [1, 1]
6399	Position [365, 748, 410, 772]
6400	MinAlgLoopOccurrences off
6401	PropExecContextOutsideSubsystem off
6402	RTWSystemCode "Auto"
6403	FunctionWithSeparateData off
6404	Opaque off
6405	RequestExecContextInheritance off
6406	MaskHideContents off
6407	System {
6408	Name "Posedge2"
6409	Location [132, 719, 452, 817]
6410	Open off
6411	ModelBrowserVisibility off
6412	ModelBrowserWidth 200
6413	ScreenColor "white"
6414	PaperOrientation "landscape"
6415	PaperPositionMode "auto"
6416	PaperType "usletter"
6417	PaperUnits "inches"
6418	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
6419	TiledPageScale 1
6420	ShowPageBoundaries off
6421	ZoomFactor "100"
6422	Block {
6423	BlockType Inport
6424	Name "D"
6425	Position [25, 33, 55, 47]
6426	IconDisplay "Port number"
6427	OutDataType "sfix(16)"
6428	OutScaling "2^0"
6429	}
6430	Block {
6431	BlockType Reference
6432	Name "Delay"
6433	Ports [1, 1]
6434	Position [145, 45, 175, 75]
6435	ShowName off
6436	SourceBlock "xbsIndex_r4/Delay"
6437	SourceType "Xilinx Delay Block"
6438	infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-flops."
6439	en off
6440	latency "1"
6441	dbl_ovrd off
6442	reg_retiming off
6443	xl_use_area off
6444	xl_area "[0,0,0,0,0,0,0]"
6445	has_advanced_control "0"
6446	sggui_pos "-1,-1,-1,-1"
6447	block_type "delay"
6448	block_version "8.2"
6449	sg_icon_stat "30,30,1,1,white,blue,0,fc531c0e,right"
6450	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6451	}
6452	Block {
6453	BlockType Reference
6454	Name "Inverter"
6455	Ports [1, 1]
6456	Position [90, 47, 120, 73]
6457	ShowName off
6458	SourceBlock "xbsIndex_r4/Inverter"
6459	SourceType "Xilinx Inverter Block"
6460	infoedit "Bitwise logical negation (one's complement) operator."
6461	en off
6462	latency "0"
6463	dbl_ovrd off
6464	xl_use_area off
6465	xl_area "[0,0,0,0,0,0,0]"
6466	has_advanced_control "0"
6467	sggui_pos "-1,-1,-1,-1"
6468	block_type "inv"
6469	block_version "8.2"
6470	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
6471	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
6472	}
6473	Block {
6474	BlockType Reference
6475	Name "Logical"
6476	Ports [2, 1]
6477	Position [205, 29, 240, 71]
6478	ShowName off
6479	SourceBlock "xbsIndex_r4/Logical"
6480	SourceType "Xilinx Logical Block Block"
6481	logical_function "AND"
6482	inputs "2"
6483	en off
6484	latency "0"
6485	precision "Full"
6486	arith_type "Unsigned"
6487	n_bits "16"
6488	bin_pt "0"
6489	align_bp on
6490	dbl_ovrd off
6491	xl_use_area off
6492	xl_area "[0,0,0,0,0,0,0]"
6493	has_advanced_control "0"
6494	sggui_pos "-1,-1,-1,-1"
6495	block_type "logical"
6496	block_version "8.2"
6497	sg_icon_stat "35,42,1,1,white,blue,0,087b5522,right"
6498	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6499	}
6500	Block {
6501	BlockType Outport
6502	Name "Q"
6503	Position [265, 43, 295, 57]
6504	IconDisplay "Port number"
6505	OutDataType "sfix(16)"
6506	OutScaling "2^0"
6507	}
6508	Line {
6509	SrcBlock "Logical"
6510	SrcPort 1
6511	Points [0, 0]
6512	DstBlock "Q"
6513	DstPort 1
6514	}
6515	Line {
6516	SrcBlock "Delay"
6517	SrcPort 1
6518	Points [0, 0]
6519	DstBlock "Logical"
6520	DstPort 2
6521	}
6522	Line {
6523	SrcBlock "Inverter"
6524	SrcPort 1
6525	DstBlock "Delay"
6526	DstPort 1
6527	}
6528	Line {
6529	SrcBlock "D"
6530	SrcPort 1
6531	Points [0, 0; 15, 0]
6532	Branch {
6533	DstBlock "Logical"
6534	DstPort 1
6535	}
6536	Branch {
6537	DstBlock "Inverter"
6538	DstPort 1
6539	}
6540	}
6541	}
6542	}
6543	Block {
6544	BlockType SubSystem
6545	Name "Posedge3"
6546	Ports [1, 1]
6547	Position [325, 1008, 370, 1032]
6548	MinAlgLoopOccurrences off
6549	PropExecContextOutsideSubsystem off
6550	RTWSystemCode "Auto"
6551	FunctionWithSeparateData off
6552	Opaque off
6553	RequestExecContextInheritance off
6554	MaskHideContents off
6555	System {
6556	Name "Posedge3"
6557	Location [132, 719, 452, 817]
6558	Open off
6559	ModelBrowserVisibility off
6560	ModelBrowserWidth 200
6561	ScreenColor "white"
6562	PaperOrientation "landscape"
6563	PaperPositionMode "auto"
6564	PaperType "usletter"
6565	PaperUnits "inches"
6566	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
6567	TiledPageScale 1
6568	ShowPageBoundaries off
6569	ZoomFactor "100"
6570	Block {
6571	BlockType Inport
6572	Name "D"
6573	Position [25, 33, 55, 47]
6574	IconDisplay "Port number"
6575	OutDataType "sfix(16)"
6576	OutScaling "2^0"
6577	}
6578	Block {
6579	BlockType Reference
6580	Name "Delay"
6581	Ports [1, 1]
6582	Position [145, 45, 175, 75]
6583	ShowName off
6584	SourceBlock "xbsIndex_r4/Delay"
6585	SourceType "Xilinx Delay Block"
6586	infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-flops."
6587	en off
6588	latency "1"
6589	dbl_ovrd off
6590	reg_retiming off
6591	xl_use_area off
6592	xl_area "[0,0,0,0,0,0,0]"
6593	has_advanced_control "0"
6594	sggui_pos "-1,-1,-1,-1"
6595	block_type "delay"
6596	block_version "8.2"
6597	sg_icon_stat "30,30,1,1,white,blue,0,fc531c0e,right"
6598	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6599	}
6600	Block {
6601	BlockType Reference
6602	Name "Inverter"
6603	Ports [1, 1]
6604	Position [90, 47, 120, 73]
6605	ShowName off
6606	SourceBlock "xbsIndex_r4/Inverter"
6607	SourceType "Xilinx Inverter Block"
6608	infoedit "Bitwise logical negation (one's complement) operator."
6609	en off
6610	latency "0"
6611	dbl_ovrd off
6612	xl_use_area off
6613	xl_area "[0,0,0,0,0,0,0]"
6614	has_advanced_control "0"
6615	sggui_pos "-1,-1,-1,-1"
6616	block_type "inv"
6617	block_version "8.2"
6618	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
6619	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
6620	}
6621	Block {
6622	BlockType Reference
6623	Name "Logical"
6624	Ports [2, 1]
6625	Position [205, 29, 240, 71]
6626	ShowName off
6627	SourceBlock "xbsIndex_r4/Logical"
6628	SourceType "Xilinx Logical Block Block"
6629	logical_function "AND"
6630	inputs "2"
6631	en off
6632	latency "0"
6633	precision "Full"
6634	arith_type "Unsigned"
6635	n_bits "16"
6636	bin_pt "0"
6637	align_bp on
6638	dbl_ovrd off
6639	xl_use_area off
6640	xl_area "[0,0,0,0,0,0,0]"
6641	has_advanced_control "0"
6642	sggui_pos "-1,-1,-1,-1"
6643	block_type "logical"
6644	block_version "8.2"
6645	sg_icon_stat "35,42,1,1,white,blue,0,087b5522,right"
6646	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6647	}
6648	Block {
6649	BlockType Outport
6650	Name "Q"
6651	Position [265, 43, 295, 57]
6652	IconDisplay "Port number"
6653	OutDataType "sfix(16)"
6654	OutScaling "2^0"
6655	}
6656	Line {
6657	SrcBlock "D"
6658	SrcPort 1
6659	Points [0, 0; 15, 0]
6660	Branch {
6661	DstBlock "Inverter"
6662	DstPort 1
6663	}
6664	Branch {
6665	DstBlock "Logical"
6666	DstPort 1
6667	}
6668	}
6669	Line {
6670	SrcBlock "Inverter"
6671	SrcPort 1
6672	DstBlock "Delay"
6673	DstPort 1
6674	}
6675	Line {
6676	SrcBlock "Delay"
6677	SrcPort 1
6678	Points [0, 0]
6679	DstBlock "Logical"
6680	DstPort 2
6681	}
6682	Line {
6683	SrcBlock "Logical"
6684	SrcPort 1
6685	Points [0, 0]
6686	DstBlock "Q"
6687	DstPort 1
6688	}
6689	}
6690	}
6691	Block {
6692	BlockType DiscretePulseGenerator
6693	Name "Pulse\nGenerator"
6694	Ports [0, 1]
6695	Position [35, 202, 65, 238]
6696	Period "1000000"
6697	PulseWidth "50"
6698	PhaseDelay "2"
6699	}
6700	Block {
6701	BlockType DiscretePulseGenerator
6702	Name "Pulse\nGenerator1"
6703	Ports [0, 1]
6704	Position [60, 643, 105, 677]
6705	Period "10 * 2^14"
6706	PulseWidth "50"
6707	PhaseDelay "2"
6708	}
6709	Block {
6710	BlockType DiscretePulseGenerator
6711	Name "Pulse\nGenerator2"
6712	Ports [0, 1]
6713	Position [60, 728, 105, 762]
6714	Period "10 * 2^14"
6715	PulseWidth "50"
6716	PhaseDelay "2.5 * 2^14"
6717	}
6718	Block {
6719	BlockType DiscretePulseGenerator
6720	Name "Pulse\nGenerator3"
6721	Ports [0, 1]
6722	Position [55, 1003, 100, 1037]
6723	Period "20000"
6724	PulseWidth "50"
6725	PhaseDelay "374"
6726	}
6727	Block {
6728	BlockType Reference
6729	Name "RSSI Clock\nGenerator"
6730	Ports [0, 1]
6731	Position [65, 942, 110, 968]
6732	SourceBlock "xbsIndex_r4/Counter"
6733	SourceType "Xilinx Counter Block"
6734	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
6735	cnt_type "Free Running"
6736	cnt_to "Inf"
6737	operation "Up"
6738	start_count "0"
6739	cnt_by_val "1"
6740	arith_type "Unsigned"
6741	n_bits "1"
6742	bin_pt "0"
6743	load_pin off
6744	rst off
6745	en off
6746	explicit_period "on"
6747	period "2"
6748	dbl_ovrd off
6749	use_behavioral_HDL off
6750	use_rpm off
6751	implementation "Fabric"
6752	xl_use_area off
6753	xl_area "[0,0,0,0,0,0,0]"
6754	has_advanced_control "0"
6755	sggui_pos "20,20,356,630"
6756	block_type "counter"
6757	block_version "VER_STRING_GOES_HERE"
6758	sg_icon_stat "45,26,1,1,white,blue,0,a170c862,right"
6759	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
6760	}
6761	Block {
6762	BlockType Reference
6763	Name "RSSI_ADC_CLK"
6764	Ports [1, 1]
6765	Position [170, 948, 210, 962]
6766	SourceBlock "xbsIndex_r4/Gateway Out"
6767	SourceType "Xilinx Gateway Out Block"
6768	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
6769	hdl_port on
6770	timing_constraint "None"
6771	locs_specified off
6772	LOCs "{}"
6773	xl_use_area off
6774	xl_area "[0,0,0,0,0,0,0]"
6775	has_advanced_control "0"
6776	sggui_pos "-1,-1,-1,-1"
6777	block_type "gatewayout"
6778	block_version "8.2"
6779	sg_icon_stat "40,14,1,1,white,yellow,0,38220381,right"
6780	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([16 14 17 14 16 20 21 22 26 23 20 18 21 18 20 23 26 22 21 20 16 ],[2 4 7 10 12 12 11 12 12 9 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6781	}
6782	Block {
6783	BlockType SubSystem
6784	Name "Radio 1\nRx Buffers"
6785	Ports [5]
6786	Position [1175, 38, 1240, 142]
6787	MinAlgLoopOccurrences off
6788	PropExecContextOutsideSubsystem off
6789	RTWSystemCode "Auto"
6790	FunctionWithSeparateData off
6791	Opaque off
6792	RequestExecContextInheritance off
6793	MaskHideContents off
6794	System {
6795	Name "Radio 1\nRx Buffers"
6796	Location [2, 74, 1270, 726]
6797	Open off
6798	ModelBrowserVisibility off
6799	ModelBrowserWidth 200
6800	ScreenColor "white"
6801	PaperOrientation "landscape"
6802	PaperPositionMode "auto"
6803	PaperType "usletter"
6804	PaperUnits "inches"
6805	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
6806	TiledPageScale 1
6807	ShowPageBoundaries off
6808	ZoomFactor "100"
6809	Block {
6810	BlockType Inport
6811	Name "RSSI"
6812	Position [450, 313, 480, 327]
6813	IconDisplay "Port number"
6814	OutDataType "sfix(16)"
6815	OutScaling "2^0"
6816	}
6817	Block {
6818	BlockType Inport
6819	Name "I/Q"
6820	Position [545, 163, 575, 177]
6821	Port "2"
6822	IconDisplay "Port number"
6823	OutDataType "sfix(16)"
6824	OutScaling "2^0"
6825	}
6826	Block {
6827	BlockType Inport
6828	Name "Addr"
6829	Position [325, 128, 355, 142]
6830	Port "3"
6831	IconDisplay "Port number"
6832	OutDataType "sfix(16)"
6833	OutScaling "2^0"
6834	}
6835	Block {
6836	BlockType Inport
6837	Name "WE"
6838	Position [110, 183, 140, 197]
6839	Port "4"
6840	IconDisplay "Port number"
6841	OutDataType "sfix(16)"
6842	OutScaling "2^0"
6843	}
6844	Block {
6845	BlockType Inport
6846	Name "EN"
6847	Position [110, 213, 140, 227]
6848	Port "5"
6849	IconDisplay "Port number"
6850	OutDataType "sfix(16)"
6851	OutScaling "2^0"
6852	}
6853	Block {
6854	BlockType Reference
6855	Name "Convert1"
6856	Ports [1, 1]
6857	Position [185, 212, 210, 228]
6858	ShowName off
6859	SourceBlock "xbsIndex_r4/Convert"
6860	SourceType "Xilinx Type Converter Block"
6861	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
6862	arith_type "Boolean"
6863	n_bits "16"
6864	bin_pt "14"
6865	quantization "Truncate"
6866	overflow "Wrap"
6867	latency "0"
6868	dbl_ovrd off
6869	pipeline off
6870	xl_use_area off
6871	xl_area "[0,0,0,0,0,0,0]"
6872	has_advanced_control "0"
6873	sggui_pos "20,20,374,375"
6874	block_type "convert"
6875	block_version "8.2"
6876	sg_icon_stat "25,16,1,1,white,blue,0,74901e60,right"
6877	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
6878	}
6879	Block {
6880	BlockType Reference
6881	Name "Gateway Out"
6882	Ports [1, 1]
6883	Position [500, 30, 530, 40]
6884	ShowName off
6885	SourceBlock "xbsIndex_r4/Gateway Out"
6886	SourceType "Xilinx Gateway Out Block"
6887	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
6888	hdl_port off
6889	timing_constraint "None"
6890	locs_specified off
6891	LOCs "{}"
6892	xl_use_area off
6893	xl_area "[0,0,0,0,0,0,0]"
6894	has_advanced_control "0"
6895	sggui_pos "20,20,336,386"
6896	block_type "gatewayout"
6897	block_version "10.1.2"
6898	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
6899	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6900	}
6901	Block {
6902	BlockType Reference
6903	Name "Gateway Out1"
6904	Ports [1, 1]
6905	Position [500, 70, 530, 80]
6906	ShowName off
6907	SourceBlock "xbsIndex_r4/Gateway Out"
6908	SourceType "Xilinx Gateway Out Block"
6909	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
6910	hdl_port off
6911	timing_constraint "None"
6912	locs_specified off
6913	LOCs "{}"
6914	xl_use_area off
6915	xl_area "[0,0,0,0,0,0,0]"
6916	has_advanced_control "0"
6917	sggui_pos "20,20,336,386"
6918	block_type "gatewayout"
6919	block_version "10.1.2"
6920	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
6921	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6922	}
6923	Block {
6924	BlockType Reference
6925	Name "Logical"
6926	Ports [2, 1]
6927	Position [255, 175, 310, 235]
6928	SourceBlock "xbsIndex_r4/Logical"
6929	SourceType "Xilinx Logical Block Block"
6930	logical_function "AND"
6931	inputs "2"
6932	en off
6933	latency "0"
6934	precision "Full"
6935	arith_type "Unsigned"
6936	n_bits "16"
6937	bin_pt "0"
6938	align_bp on
6939	dbl_ovrd off
6940	xl_use_area off
6941	xl_area "[0,0,0,0,0,0,0]"
6942	has_advanced_control "0"
6943	sggui_pos "-1,-1,-1,-1"
6944	block_type "logical"
6945	block_version "9.1.01"
6946	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
6947	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
6948	}
6949	Block {
6950	BlockType SubSystem
6951	Name "Radio 1\nRSSI Buffer"
6952	Ports [3]
6953	Position [645, 264, 700, 376]
6954	MinAlgLoopOccurrences off
6955	PropExecContextOutsideSubsystem off
6956	RTWSystemCode "Auto"
6957	FunctionWithSeparateData off
6958	Opaque off
6959	RequestExecContextInheritance off
6960	MaskHideContents off
6961	System {
6962	Name "Radio 1\nRSSI Buffer"
6963	Location [2, 70, 1918, 1150]
6964	Open off
6965	ModelBrowserVisibility off
6966	ModelBrowserWidth 200
6967	ScreenColor "white"
6968	PaperOrientation "landscape"
6969	PaperPositionMode "auto"
6970	PaperType "usletter"
6971	PaperUnits "inches"
6972	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
6973	TiledPageScale 1
6974	ShowPageBoundaries off
6975	ZoomFactor "100"
6976	Block {
6977	BlockType Inport
6978	Name "Addr_14b"
6979	Position [325, 348, 355, 362]
6980	NamePlacement "alternate"
6981	IconDisplay "Port number"
6982	OutDataType "sfix(16)"
6983	OutScaling "2^0"
6984	}
6985	Block {
6986	BlockType Inport
6987	Name "RSSI"
6988	Position [95, 383, 125, 397]
6989	Port "2"
6990	IconDisplay "Port number"
6991	OutDataType "sfix(16)"
6992	OutScaling "2^0"
6993	}
6994	Block {
6995	BlockType Inport
6996	Name "WE"
6997	Position [720, 478, 750, 492]
6998	Port "3"
6999	IconDisplay "Port number"
7000	OutDataType "sfix(16)"
7001	OutScaling "2^0"
7002	}
7003	Block {
7004	BlockType Reference
7005	Name "11MSB"
7006	Ports [1, 1]
7007	Position [430, 346, 470, 364]
7008	NamePlacement "alternate"
7009	SourceBlock "xbsIndex_r4/Slice"
7010	SourceType "Xilinx Bit Slice Extractor Block"
7011	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
7012	nbits "11"
7013	boolean_output off
7014	mode "Upper Bit Location + Width"
7015	bit1 "0"
7016	base1 "MSB of Input"
7017	bit0 "0"
7018	base0 "LSB of Input"
7019	dbl_ovrd off
7020	has_advanced_control "0"
7021	sggui_pos "20,20,449,407"
7022	block_type "slice"
7023	block_version "8.2"
7024	sg_icon_stat "40,18,1,1,white,blue,0,b1026674,right"
7025	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
7026	}
7027	Block {
7028	BlockType Reference
7029	Name "BIT[2]"
7030	Ports [1, 1]
7031	Position [430, 401, 470, 419]
7032	SourceBlock "xbsIndex_r4/Slice"
7033	SourceType "Xilinx Bit Slice Extractor Block"
7034	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
7035	nbits "1"
7036	boolean_output on
7037	mode "Lower Bit Location + Width"
7038	bit1 "0"
7039	base1 "MSB of Input"
7040	bit0 "2"
7041	base0 "LSB of Input"
7042	dbl_ovrd off
7043	has_advanced_control "0"
7044	sggui_pos "20,20,449,407"
7045	block_type "slice"
7046	block_version "8.2"
7047	sg_icon_stat "40,18,1,1,white,blue,0,b1026674,right"
7048	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
7049	}
7050	Block {
7051	BlockType Reference
7052	Name "Concat"
7053	Ports [2, 1]
7054	Position [685, 381, 725, 459]
7055	ShowName off
7056	SourceBlock "xbsIndex_r4/Concat"
7057	SourceType "Xilinx Bus Concatenator Block"
7058	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
7059	num_inputs "2"
7060	dbl_ovrd off
7061	has_advanced_control "0"
7062	sggui_pos "-1,-1,-1,-1"
7063	block_type "concat"
7064	block_version "10.1.2"
7065	sg_icon_stat "40,78,1,1,white,blue,0,df1e5aba,right"
7066	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
7067	}
7068	Block {
7069	BlockType Reference
7070	Name "Convert"
7071	Ports [1, 1]
7072	Position [285, 382, 320, 398]
7073	ShowName off
7074	SourceBlock "xbsIndex_r4/Convert"
7075	SourceType "Xilinx Type Converter Block"
7076	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
7077	arith_type "Unsigned"
7078	n_bits "16"
7079	bin_pt "0"
7080	quantization "Truncate"
7081	overflow "Wrap"
7082	latency "0"
7083	dbl_ovrd off
7084	pipeline off
7085	xl_use_area off
7086	xl_area "[0,0,0,0,0,0,0]"
7087	has_advanced_control "0"
7088	sggui_pos "20,20,461,375"
7089	block_type "convert"
7090	block_version "8.2"
7091	sg_icon_stat "35,16,1,1,white,blue,0,74901e60,right"
7092	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
7093	}
7094	Block {
7095	BlockType Reference
7096	Name "Inverter"
7097	Ports [1, 1]
7098	Position [510, 402, 540, 418]
7099	ShowName off
7100	SourceBlock "xbsIndex_r4/Inverter"
7101	SourceType "Xilinx Inverter Block"
7102	infoedit "Bitwise logical negation (one's complement) operator."
7103	en off
7104	latency "0"
7105	dbl_ovrd off
7106	xl_use_area off
7107	xl_area "[0,0,0,0,0,0,0]"
7108	has_advanced_control "0"
7109	sggui_pos "20,20,348,251"
7110	block_type "inv"
7111	block_version "10.1.2"
7112	sg_icon_stat "30,16,1,1,white,blue,0,1ab4a85f,right"
7113	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
7114	}
7115	Block {
7116	BlockType Reference
7117	Name "Register"
7118	Ports [2, 1]
7119	Position [580, 378, 625, 422]
7120	ShowName off
7121	SourceBlock "xbsIndex_r4/Register"
7122	SourceType "Xilinx Register Block"
7123	init "0"
7124	rst off
7125	en on
7126	dbl_ovrd off
7127	xl_use_area off
7128	xl_area "[0,0,0,0,0,0,0]"
7129	has_advanced_control "0"
7130	sggui_pos "20,20,348,193"
7131	block_type "register"
7132	block_version "10.1.2"
7133	sg_icon_stat "45,44,1,1,white,blue,0,cc3303a0,right"
7134	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
7135	}
7136	Block {
7137	BlockType Reference
7138	Name "Reinterpret1"
7139	Ports [1, 1]
7140	Position [180, 382, 215, 398]
7141	ShowName off
7142	SourceBlock "xbsIndex_r4/Reinterpret"
7143	SourceType "Xilinx Type Reinterpreter Block"
7144	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
7145	force_arith_type on
7146	arith_type "Unsigned"
7147	force_bin_pt on
7148	bin_pt "0"
7149	has_advanced_control "0"
7150	sggui_pos "436,54,356,312"
7151	block_type "reinterpret"
7152	block_version "9.1.01"
7153	sg_icon_stat "35,16,1,1,white,blue,0,8982c1db,right"
7154	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
7155	}
7156	Block {
7157	BlockType Reference
7158	Name "Shared Memory"
7159	Ports [3, 1]
7160	Position [800, 323, 880, 517]
7161	AttributesFormatString "<< %<shared_memory_name> >>"
7162	SourceBlock "xbsIndex_r4/Shared Memory"
7163	SourceType "Xilinx Shared Memory Random Access Memory Block"
7164	shared_memory_name "'RSSIBuff_Radio1'"
7165	depth "2^11"
7166	ownership "Locally Owned and Initialized"
7167	initVector "0"
7168	mutex "Unprotected"
7169	mode "Read and Write"
7170	write_mode "Read After Write"
7171	time_out "0"
7172	latency "1"
7173	explicit_data_type on
7174	arith_type "Unsigned"
7175	n_bits "32"
7176	bin_pt "0"
7177	xl_use_area off
7178	xl_area "[0,0,0,0,0,0,0]"
7179	implementation "Block RAM"
7180	use_rpm "off"
7181	has_advanced_control "0"
7182	sggui_pos "20,20,384,381"
7183	block_type "shmem"
7184	block_version "10.1.2"
7185	sg_icon_stat "80,194,1,1,white,blue,0,e2c38f9a,right"
7186	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
7187	}
7188	Block {
7189	BlockType Terminator
7190	Name "Terminator2"
7191	Position [945, 410, 965, 430]
7192	ShowName off
7193	}
7194	Line {
7195	SrcBlock "RSSI"
7196	SrcPort 1
7197	DstBlock "Reinterpret1"
7198	DstPort 1
7199	}
7200	Line {
7201	SrcBlock "Convert"
7202	SrcPort 1
7203	Points [35, 0]
7204	Branch {
7205	DstBlock "Register"
7206	DstPort 1
7207	}
7208	Branch {
7209	Points [0, 50]
7210	DstBlock "Concat"
7211	DstPort 2
7212	}
7213	}
7214	Line {
7215	SrcBlock "Addr_14b"
7216	SrcPort 1
7217	Points [40, 0]
7218	Branch {
7219	DstBlock "11MSB"
7220	DstPort 1
7221	}
7222	Branch {
7223	Points [0, 55]
7224	DstBlock "BIT[2]"
7225	DstPort 1
7226	}
7227	}
7228	Line {
7229	SrcBlock "WE"
7230	SrcPort 1
7231	DstBlock "Shared Memory"
7232	DstPort 3
7233	}
7234	Line {
7235	SrcBlock "Reinterpret1"
7236	SrcPort 1
7237	DstBlock "Convert"
7238	DstPort 1
7239	}
7240	Line {
7241	SrcBlock "Concat"
7242	SrcPort 1
7243	DstBlock "Shared Memory"
7244	DstPort 2
7245	}
7246	Line {
7247	SrcBlock "BIT[2]"
7248	SrcPort 1
7249	DstBlock "Inverter"
7250	DstPort 1
7251	}
7252	Line {
7253	SrcBlock "11MSB"
7254	SrcPort 1
7255	DstBlock "Shared Memory"
7256	DstPort 1
7257	}
7258	Line {
7259	SrcBlock "Shared Memory"
7260	SrcPort 1
7261	DstBlock "Terminator2"
7262	DstPort 1
7263	}
7264	Line {
7265	SrcBlock "Register"
7266	SrcPort 1
7267	DstBlock "Concat"
7268	DstPort 1
7269	}
7270	Line {
7271	SrcBlock "Inverter"
7272	SrcPort 1
7273	DstBlock "Register"
7274	DstPort 2
7275	}
7276	}
7277	}
7278	Block {
7279	BlockType SubSystem
7280	Name "Radio 1 I/Q\nBuffer"
7281	Ports [3]
7282	Position [645, 118, 700, 222]
7283	MinAlgLoopOccurrences off
7284	PropExecContextOutsideSubsystem off
7285	RTWSystemCode "Auto"
7286	FunctionWithSeparateData off
7287	Opaque off
7288	RequestExecContextInheritance off
7289	MaskHideContents off
7290	System {
7291	Name "Radio 1 I/Q\nBuffer"
7292	Location [2, 74, 1270, 726]
7293	Open off
7294	ModelBrowserVisibility off
7295	ModelBrowserWidth 200
7296	ScreenColor "white"
7297	PaperOrientation "landscape"
7298	PaperPositionMode "auto"
7299	PaperType "usletter"
7300	PaperUnits "inches"
7301	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
7302	TiledPageScale 1
7303	ShowPageBoundaries off
7304	ZoomFactor "100"
7305	Block {
7306	BlockType Inport
7307	Name "Addr_14b"
7308	Position [190, 68, 220, 82]
7309	IconDisplay "Port number"
7310	OutDataType "sfix(16)"
7311	OutScaling "2^0"
7312	}
7313	Block {
7314	BlockType Inport
7315	Name "I/Q_32b"
7316	Position [190, 98, 220, 112]
7317	Port "2"
7318	IconDisplay "Port number"
7319	OutDataType "sfix(16)"
7320	OutScaling "2^0"
7321	}
7322	Block {
7323	BlockType Inport
7324	Name "WE"
7325	Position [190, 128, 220, 142]
7326	Port "3"
7327	IconDisplay "Port number"
7328	OutDataType "sfix(16)"
7329	OutScaling "2^0"
7330	}
7331	Block {
7332	BlockType Reference
7333	Name "Shared Memory"
7334	Ports [3, 1]
7335	Position [320, 60, 400, 150]
7336	AttributesFormatString "<< %<shared_memory_name> >>"
7337	SourceBlock "xbsIndex_r4/Shared Memory"
7338	SourceType "Xilinx Shared Memory Random Access Memory Block"
7339	shared_memory_name "'RxBuff_Radio1'"
7340	depth "2^14"
7341	ownership "Locally Owned and Initialized"
7342	initVector "0"
7343	mutex "Unprotected"
7344	mode "Read and Write"
7345	write_mode "Read After Write"
7346	time_out "0"
7347	latency "1"
7348	explicit_data_type on
7349	arith_type "Unsigned"
7350	n_bits "32"
7351	bin_pt "0"
7352	xl_use_area off
7353	xl_area "[0,0,0,0,0,0,0]"
7354	implementation "Block RAM"
7355	use_rpm "off"
7356	has_advanced_control "0"
7357	sggui_pos "20,20,384,381"
7358	block_type "shmem"
7359	block_version "10.1.2"
7360	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
7361	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
7362	}
7363	Block {
7364	BlockType Terminator
7365	Name "Terminator"
7366	Position [450, 95, 470, 115]
7367	ShowName off
7368	}
7369	Line {
7370	SrcBlock "Addr_14b"
7371	SrcPort 1
7372	DstBlock "Shared Memory"
7373	DstPort 1
7374	}
7375	Line {
7376	SrcBlock "I/Q_32b"
7377	SrcPort 1
7378	DstBlock "Shared Memory"
7379	DstPort 2
7380	}
7381	Line {
7382	SrcBlock "WE"
7383	SrcPort 1
7384	DstBlock "Shared Memory"
7385	DstPort 3
7386	}
7387	Line {
7388	SrcBlock "Shared Memory"
7389	SrcPort 1
7390	DstBlock "Terminator"
7391	DstPort 1
7392	}
7393	}
7394	}
7395	Block {
7396	BlockType Scope
7397	Name "Scope"
7398	Ports [2]
7399	Position [585, 14, 625, 96]
7400	Floating off
7401	Location [5, 49, 1285, 757]
7402	Open off
7403	NumInputPorts "2"
7404	ZoomMode "yonly"
7405	List {
7406	ListType AxesTitles
7407	axes1 "%<SignalLabel>"
7408	axes2 "%<SignalLabel>"
7409	}
7410	YMin "-5~-5"
7411	YMax "5~5"
7412	SaveName "ScopeData2"
7413	DataFormat "StructureWithTime"
7414	MaxDataPoints "40000"
7415	SampleTime "0"
7416	}
7417	Line {
7418	SrcBlock "Logical"
7419	SrcPort 1
7420	Points [55, 0]
7421	Branch {
7422	Points [95, 0]
7423	Branch {
7424	Points [0, -130]
7425	DstBlock "Gateway Out1"
7426	DstPort 1
7427	}
7428	Branch {
7429	Labels [0, 0]
7430	DstBlock "Radio 1 I/Q\nBuffer"
7431	DstPort 3
7432	}
7433	}
7434	Branch {
7435	Points [0, 150]
7436	DstBlock "Radio 1\nRSSI Buffer"
7437	DstPort 3
7438	}
7439	}
7440	Line {
7441	SrcBlock "Addr"
7442	SrcPort 1
7443	Points [75, 0]
7444	Branch {
7445	Points [0, -100]
7446	DstBlock "Gateway Out"
7447	DstPort 1
7448	}
7449	Branch {
7450	Labels [0, 0]
7451	DstBlock "Radio 1 I/Q\nBuffer"
7452	DstPort 1
7453	}
7454	Branch {
7455	Points [0, 150]
7456	DstBlock "Radio 1\nRSSI Buffer"
7457	DstPort 1
7458	}
7459	}
7460	Line {
7461	SrcBlock "WE"
7462	SrcPort 1
7463	DstBlock "Logical"
7464	DstPort 1
7465	}
7466	Line {
7467	SrcBlock "EN"
7468	SrcPort 1
7469	DstBlock "Convert1"
7470	DstPort 1
7471	}
7472	Line {
7473	SrcBlock "Convert1"
7474	SrcPort 1
7475	DstBlock "Logical"
7476	DstPort 2
7477	}
7478	Line {
7479	SrcBlock "I/Q"
7480	SrcPort 1
7481	DstBlock "Radio 1 I/Q\nBuffer"
7482	DstPort 2
7483	}
7484	Line {
7485	SrcBlock "Gateway Out"
7486	SrcPort 1
7487	DstBlock "Scope"
7488	DstPort 1
7489	}
7490	Line {
7491	SrcBlock "Gateway Out1"
7492	SrcPort 1
7493	DstBlock "Scope"
7494	DstPort 2
7495	}
7496	Line {
7497	SrcBlock "RSSI"
7498	SrcPort 1
7499	DstBlock "Radio 1\nRSSI Buffer"
7500	DstPort 2
7501	}
7502	}
7503	}
7504	Block {
7505	BlockType SubSystem
7506	Name "Radio 1\nTx Buffer"
7507	Ports [3, 1]
7508	Position [1015, 661, 1095, 719]
7509	MinAlgLoopOccurrences off
7510	PropExecContextOutsideSubsystem off
7511	RTWSystemCode "Auto"
7512	FunctionWithSeparateData off
7513	Opaque off
7514	RequestExecContextInheritance off
7515	MaskHideContents off
7516	System {
7517	Name "Radio 1\nTx Buffer"
7518	Location [6, 74, 1274, 696]
7519	Open off
7520	ModelBrowserVisibility off
7521	ModelBrowserWidth 200
7522	ScreenColor "white"
7523	PaperOrientation "landscape"
7524	PaperPositionMode "auto"
7525	PaperType "usletter"
7526	PaperUnits "inches"
7527	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
7528	TiledPageScale 1
7529	ShowPageBoundaries off
7530	ZoomFactor "100"
7531	Block {
7532	BlockType Inport
7533	Name "RdAddr_14b"
7534	Position [350, 288, 380, 302]
7535	NamePlacement "alternate"
7536	IconDisplay "Port number"
7537	OutDataType "sfix(16)"
7538	OutScaling "2^0"
7539	}
7540	Block {
7541	BlockType Inport
7542	Name "Rst"
7543	Position [30, 173, 60, 187]
7544	Port "2"
7545	IconDisplay "Port number"
7546	OutDataType "sfix(16)"
7547	OutScaling "2^0"
7548	}
7549	Block {
7550	BlockType Inport
7551	Name "En"
7552	Position [30, 203, 60, 217]
7553	Port "3"
7554	IconDisplay "Port number"
7555	OutDataType "sfix(16)"
7556	OutScaling "2^0"
7557	}
7558	Block {
7559	BlockType Reference
7560	Name "Constant"
7561	Ports [0, 1]
7562	Position [630, 350, 655, 370]
7563	ShowName off
7564	SourceBlock "xbsIndex_r4/Constant"
7565	SourceType "Xilinx Constant Block Block"
7566	arith_type "Unsigned"
7567	const "0"
7568	n_bits "32"
7569	bin_pt "0"
7570	explicit_period off
7571	period "1"
7572	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
7573	equ "P=C"
7574	opselect "C"
7575	inp2 "PCIN>>17"
7576	opr "+"
7577	inp1 "P"
7578	carry "CIN"
7579	dbl_ovrd off
7580	has_advanced_control "0"
7581	sggui_pos "20,20,400,346"
7582	block_type "constant"
7583	block_version "10.1.2"
7584	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
7585	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
7586	}
7587	Block {
7588	BlockType Reference
7589	Name "Constant1"
7590	Ports [0, 1]
7591	Position [355, 345, 380, 365]
7592	ShowName off
7593	SourceBlock "xbsIndex_r4/Constant"
7594	SourceType "Xilinx Constant Block Block"
7595	arith_type "Boolean"
7596	const "0"
7597	n_bits "32"
7598	bin_pt "0"
7599	explicit_period off
7600	period "1"
7601	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
7602	equ "P=C"
7603	opselect "C"
7604	inp2 "PCIN>>17"
7605	opr "+"
7606	inp1 "P"
7607	carry "CIN"
7608	dbl_ovrd off
7609	has_advanced_control "0"
7610	sggui_pos "20,20,400,346"
7611	block_type "constant"
7612	block_version "10.1.2"
7613	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
7614	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
7615	}
7616	Block {
7617	BlockType Reference
7618	Name "Constant2"
7619	Ports [0, 1]
7620	Position [355, 315, 380, 335]
7621	ShowName off
7622	SourceBlock "xbsIndex_r4/Constant"
7623	SourceType "Xilinx Constant Block Block"
7624	arith_type "Unsigned"
7625	const "0"
7626	n_bits "32"
7627	bin_pt "0"
7628	explicit_period off
7629	period "1"
7630	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
7631	equ "P=C"
7632	opselect "C"
7633	inp2 "PCIN>>17"
7634	opr "+"
7635	inp1 "P"
7636	carry "CIN"
7637	dbl_ovrd off
7638	has_advanced_control "0"
7639	sggui_pos "20,20,400,346"
7640	block_type "constant"
7641	block_version "10.1.2"
7642	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
7643	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
7644	}
7645	Block {
7646	BlockType Reference
7647	Name "Convert"
7648	Ports [1, 1]
7649	Position [350, 188, 375, 202]
7650	ShowName off
7651	SourceBlock "xbsIndex_r4/Convert"
7652	SourceType "Xilinx Type Converter Block"
7653	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
7654	arith_type "Boolean"
7655	n_bits "16"
7656	bin_pt "14"
7657	quantization "Truncate"
7658	overflow "Wrap"
7659	latency "0"
7660	dbl_ovrd off
7661	pipeline off
7662	xl_use_area off
7663	xl_area "[0,0,0,0,0,0,0]"
7664	has_advanced_control "0"
7665	sggui_pos "20,20,374,375"
7666	block_type "convert"
7667	block_version "8.2"
7668	sg_icon_stat "25,14,1,1,white,blue,0,74901e60,right"
7669	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
7670	}
7671	Block {
7672	BlockType Reference
7673	Name "Convert1"
7674	Ports [1, 1]
7675	Position [100, 203, 120, 217]
7676	ShowName off
7677	SourceBlock "xbsIndex_r4/Convert"
7678	SourceType "Xilinx Type Converter Block"
7679	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
7680	arith_type "Boolean"
7681	n_bits "16"
7682	bin_pt "14"
7683	quantization "Truncate"
7684	overflow "Wrap"
7685	latency "0"
7686	dbl_ovrd off
7687	pipeline off
7688	xl_use_area off
7689	xl_area "[0,0,0,0,0,0,0]"
7690	has_advanced_control "0"
7691	sggui_pos "20,20,374,375"
7692	block_type "convert"
7693	block_version "8.2"
7694	sg_icon_stat "20,14,1,1,white,blue,0,74901e60,right"
7695	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
7696	}
7697	Block {
7698	BlockType Reference
7699	Name "Inverter"
7700	Ports [1, 1]
7701	Position [150, 201, 180, 219]
7702	SourceBlock "xbsIndex_r4/Inverter"
7703	SourceType "Xilinx Inverter Block"
7704	infoedit "Bitwise logical negation (one's complement) operator."
7705	en off
7706	latency "0"
7707	dbl_ovrd off
7708	xl_use_area off
7709	xl_area "[0,0,0,0,0,0,0]"
7710	has_advanced_control "0"
7711	sggui_pos "-1,-1,-1,-1"
7712	block_type "inv"
7713	block_version "9.1.01"
7714	sg_icon_stat "30,18,1,1,white,blue,0,1ab4a85f,right"
7715	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
7716	}
7717	Block {
7718	BlockType Reference
7719	Name "Logical"
7720	Ports [2, 1]
7721	Position [215, 165, 270, 225]
7722	SourceBlock "xbsIndex_r4/Logical"
7723	SourceType "Xilinx Logical Block Block"
7724	logical_function "OR"
7725	inputs "2"
7726	en off
7727	latency "0"
7728	precision "Full"
7729	arith_type "Unsigned"
7730	n_bits "16"
7731	bin_pt "0"
7732	align_bp on
7733	dbl_ovrd off
7734	xl_use_area off
7735	xl_area "[0,0,0,0,0,0,0]"
7736	has_advanced_control "0"
7737	sggui_pos "20,20,348,261"
7738	block_type "logical"
7739	block_version "9.1.01"
7740	sg_icon_stat "55,60,1,1,white,blue,0,f4a65842,right"
7741	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
7742	}
7743	Block {
7744	BlockType Reference
7745	Name "Mux"
7746	Ports [3, 1]
7747	Position [750, 273, 795, 377]
7748	SourceBlock "xbsIndex_r4/Mux"
7749	SourceType "Xilinx Bus Multiplexer Block"
7750	inputs "2"
7751	en off
7752	latency "0"
7753	precision "Full"
7754	arith_type "Unsigned"
7755	n_bits "16"
7756	bin_pt "14"
7757	quantization "Truncate"
7758	overflow "Wrap"
7759	dbl_ovrd off
7760	xl_use_area off
7761	xl_area "[0,0,0,0,0,0,0]"
7762	has_advanced_control "0"
7763	sggui_pos "20,20,348,303"
7764	block_type "mux"
7765	block_version "10.1.2"
7766	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
7767	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
7768	}
7769	Block {
7770	BlockType Reference
7771	Name "Shared Memory"
7772	Ports [3, 1]
7773	Position [445, 280, 525, 370]
7774	AttributesFormatString "<< %<shared_memory_name> >>"
7775	SourceBlock "xbsIndex_r4/Shared Memory"
7776	SourceType "Xilinx Shared Memory Random Access Memory Block"
7777	shared_memory_name "'TxBuff_Radio1'"
7778	depth "2^14"
7779	ownership "Locally Owned and Initialized"
7780	initVector "0"
7781	mutex "Unprotected"
7782	mode "Read and Write"
7783	write_mode "Read After Write"
7784	time_out "0"
7785	latency "1"
7786	explicit_data_type on
7787	arith_type "Unsigned"
7788	n_bits "32"
7789	bin_pt "0"
7790	xl_use_area off
7791	xl_area "[0,0,0,0,0,0,0]"
7792	implementation "Block RAM"
7793	use_rpm "off"
7794	has_advanced_control "0"
7795	sggui_pos "20,20,384,381"
7796	block_type "shmem"
7797	block_version "10.1.2"
7798	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
7799	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
7800	}
7801	Block {
7802	BlockType Outport
7803	Name "IQ_32b"
7804	Position [885, 318, 915, 332]
7805	IconDisplay "Port number"
7806	OutDataType "sfix(16)"
7807	OutScaling "2^0"
7808	}
7809	Line {
7810	SrcBlock "Logical"
7811	SrcPort 1
7812	DstBlock "Convert"
7813	DstPort 1
7814	}
7815	Line {
7816	SrcBlock "Convert"
7817	SrcPort 1
7818	Points [160, 0; 0, 95]
7819	DstBlock "Mux"
7820	DstPort 1
7821	}
7822	Line {
7823	SrcBlock "Rst"
7824	SrcPort 1
7825	DstBlock "Logical"
7826	DstPort 1
7827	}
7828	Line {
7829	SrcBlock "En"
7830	SrcPort 1
7831	DstBlock "Convert1"
7832	DstPort 1
7833	}
7834	Line {
7835	SrcBlock "Convert1"
7836	SrcPort 1
7837	DstBlock "Inverter"
7838	DstPort 1
7839	}
7840	Line {
7841	SrcBlock "Inverter"
7842	SrcPort 1
7843	DstBlock "Logical"
7844	DstPort 2
7845	}
7846	Line {
7847	SrcBlock "RdAddr_14b"
7848	SrcPort 1
7849	DstBlock "Shared Memory"
7850	DstPort 1
7851	}
7852	Line {
7853	SrcBlock "Constant"
7854	SrcPort 1
7855	DstBlock "Mux"
7856	DstPort 3
7857	}
7858	Line {
7859	SrcBlock "Shared Memory"
7860	SrcPort 1
7861	DstBlock "Mux"
7862	DstPort 2
7863	}
7864	Line {
7865	SrcBlock "Constant1"
7866	SrcPort 1
7867	DstBlock "Shared Memory"
7868	DstPort 3
7869	}
7870	Line {
7871	SrcBlock "Constant2"
7872	SrcPort 1
7873	DstBlock "Shared Memory"
7874	DstPort 2
7875	}
7876	Line {
7877	SrcBlock "Mux"
7878	SrcPort 1
7879	DstBlock "IQ_32b"
7880	DstPort 1
7881	}
7882	}
7883	}
7884	Block {
7885	BlockType SubSystem
7886	Name "Radio 1 Inputs"
7887	Ports [2, 2]
7888	Position [900, 32, 1085, 83]
7889	NamePlacement "alternate"
7890	MinAlgLoopOccurrences off
7891	PropExecContextOutsideSubsystem off
7892	RTWSystemCode "Auto"
7893	FunctionWithSeparateData off
7894	Opaque off
7895	RequestExecContextInheritance off
7896	MaskHideContents off
7897	System {
7898	Name "Radio 1 Inputs"
7899	Location [534, 197, 1546, 748]
7900	Open off
7901	ModelBrowserVisibility off
7902	ModelBrowserWidth 200
7903	ScreenColor "white"
7904	PaperOrientation "landscape"
7905	PaperPositionMode "auto"
7906	PaperType "usletter"
7907	PaperUnits "inches"
7908	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
7909	TiledPageScale 1
7910	ShowPageBoundaries off
7911	ZoomFactor "100"
7912	Block {
7913	BlockType Inport
7914	Name "DebugRxBuffers"
7915	Position [180, 258, 210, 272]
7916	IconDisplay "Port number"
7917	OutDataType "sfix(16)"
7918	OutScaling "2^0"
7919	}
7920	Block {
7921	BlockType Inport
7922	Name "MGCAGC_AGCDCO_SEL"
7923	Position [185, 348, 215, 362]
7924	Port "2"
7925	IconDisplay "Port number"
7926	OutDataType "sfix(16)"
7927	OutScaling "2^0"
7928	}
7929	Block {
7930	BlockType SubSystem
7931	Name "ADC I"
7932	Ports [2, 2]
7933	Position [420, 254, 575, 301]
7934	NamePlacement "alternate"
7935	MinAlgLoopOccurrences off
7936	PropExecContextOutsideSubsystem off
7937	RTWSystemCode "Auto"
7938	FunctionWithSeparateData off
7939	Opaque off
7940	RequestExecContextInheritance off
7941	MaskHideContents off
7942	System {
7943	Name "ADC I"
7944	Location [693, 213, 1705, 865]
7945	Open off
7946	ModelBrowserVisibility off
7947	ModelBrowserWidth 200
7948	ScreenColor "white"
7949	PaperOrientation "landscape"
7950	PaperPositionMode "auto"
7951	PaperType "usletter"
7952	PaperUnits "inches"
7953	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
7954	TiledPageScale 1
7955	ShowPageBoundaries off
7956	ZoomFactor "100"
7957	Block {
7958	BlockType Inport
7959	Name "Debug"
7960	Position [685, 53, 715, 67]
7961	IconDisplay "Port number"
7962	OutDataType "sfix(16)"
7963	OutScaling "2^0"
7964	}
7965	Block {
7966	BlockType Inport
7967	Name "MGCAGC_AGCDCO_SEL"
7968	Position [130, 243, 160, 257]
7969	Port "2"
7970	IconDisplay "Port number"
7971	OutDataType "sfix(16)"
7972	OutScaling "2^0"
7973	}
7974	Block {
7975	BlockType Constant
7976	Name "Constant1"
7977	Position [15, 320, 45, 350]
7978	ShowName off
7979	Value "0"
7980	OutDataType "sfix(16)"
7981	OutScaling "2^0"
7982	}
7983	Block {
7984	BlockType Reference
7985	Name "Counter"
7986	Ports [0, 1]
7987	Position [520, 340, 580, 400]
7988	SourceBlock "xbsIndex_r4/Counter"
7989	SourceType "Xilinx Counter Block"
7990	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
7991	cnt_type "Free Running"
7992	cnt_to "Inf"
7993	operation "Down"
7994	start_count "2^14-1"
7995	cnt_by_val "1"
7996	arith_type "Unsigned"
7997	n_bits "14"
7998	bin_pt "0"
7999	load_pin off
8000	rst off
8001	en off
8002	explicit_period "on"
8003	period "1"
8004	dbl_ovrd off
8005	use_behavioral_HDL off
8006	use_rpm off
8007	implementation "Fabric"
8008	xl_use_area off
8009	xl_area "[0,0,0,0,0,0,0]"
8010	has_advanced_control "0"
8011	sggui_pos "20,20,348,619"
8012	block_type "counter"
8013	block_version "10.1.3"
8014	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
8015	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
8016	}
8017	Block {
8018	BlockType Reference
8019	Name "FromAGC_Radio1_I"
8020	Ports [1, 1]
8021	Position [115, 425, 180, 445]
8022	SourceBlock "xbsIndex_r4/Gateway In"
8023	SourceType "Xilinx Gateway In Block"
8024	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
8025	arith_type "Signed (2's comp)"
8026	n_bits "14"
8027	bin_pt "13"
8028	quantization "Round (unbiased: +/- Inf)"
8029	overflow "Saturate"
8030	period "1"
8031	dbl_ovrd off
8032	timing_constraint "None"
8033	locs_specified off
8034	LOCs "{}"
8035	xl_use_area off
8036	xl_area "[0,0,0,0,0,0,0]"
8037	has_advanced_control "0"
8038	sggui_pos "20,20,348,406"
8039	block_type "gatewayin"
8040	block_version "10.1.3"
8041	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
8042	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
8043	}
8044	Block {
8045	BlockType Reference
8046	Name "Mux"
8047	Ports [3, 1]
8048	Position [820, 88, 865, 192]
8049	SourceBlock "xbsIndex_r4/Mux"
8050	SourceType "Xilinx Bus Multiplexer Block"
8051	inputs "2"
8052	en off
8053	latency "0"
8054	precision "Full"
8055	arith_type "Unsigned"
8056	n_bits "1"
8057	bin_pt "0"
8058	quantization "Truncate"
8059	overflow "Wrap"
8060	dbl_ovrd off
8061	xl_use_area off
8062	xl_area "[0,0,0,0,0,0,0]"
8063	has_advanced_control "0"
8064	sggui_pos "20,20,348,303"
8065	block_type "mux"
8066	block_version "10.1.3"
8067	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
8068	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
8069	}
8070	Block {
8071	BlockType Reference
8072	Name "Mux1"
8073	Ports [3, 1]
8074	Position [820, 283, 865, 387]
8075	SourceBlock "xbsIndex_r4/Mux"
8076	SourceType "Xilinx Bus Multiplexer Block"
8077	inputs "2"
8078	en off
8079	latency "0"
8080	precision "Full"
8081	arith_type "Unsigned"
8082	n_bits "1"
8083	bin_pt "0"
8084	quantization "Truncate"
8085	overflow "Wrap"
8086	dbl_ovrd off
8087	xl_use_area off
8088	xl_area "[0,0,0,0,0,0,0]"
8089	has_advanced_control "0"
8090	sggui_pos "20,20,348,303"
8091	block_type "mux"
8092	block_version "10.1.3"
8093	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
8094	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
8095	}
8096	Block {
8097	BlockType Reference
8098	Name "Mux2"
8099	Ports [3, 1]
8100	Position [275, 283, 320, 387]
8101	SourceBlock "xbsIndex_r4/Mux"
8102	SourceType "Xilinx Bus Multiplexer Block"
8103	inputs "2"
8104	en off
8105	latency "0"
8106	precision "Full"
8107	arith_type "Unsigned"
8108	n_bits "1"
8109	bin_pt "0"
8110	quantization "Truncate"
8111	overflow "Wrap"
8112	dbl_ovrd off
8113	xl_use_area off
8114	xl_area "[0,0,0,0,0,0,0]"
8115	has_advanced_control "0"
8116	sggui_pos "20,20,348,303"
8117	block_type "mux"
8118	block_version "10.1.3"
8119	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
8120	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
8121	}
8122	Block {
8123	BlockType Reference
8124	Name "Radio 1 ADC I"
8125	Ports [1, 1]
8126	Position [105, 314, 200, 356]
8127	LinkData {
8128	BlockName "radio1_adc_I"
8129	DialogParameters {
8130	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
8131	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
8132	}
8133	}
8134	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 1 ADC I"
8135	SourceType ""
8136	ShowPortLabels "FromPortIcon"
8137	SystemSampleTime "-1"
8138	FunctionWithSeparateData off
8139	RTWMemSecFuncInitTerm "Inherit from model"
8140	RTWMemSecFuncExecute "Inherit from model"
8141	RTWMemSecDataConstants "Inherit from model"
8142	RTWMemSecDataInternal "Inherit from model"
8143	RTWMemSecDataParameters "Inherit from model"
8144	samp_period "1"
8145	}
8146	Block {
8147	BlockType Reference
8148	Name "Register"
8149	Ports [1, 1]
8150	Position [450, 321, 485, 349]
8151	ShowName off
8152	SourceBlock "xbsIndex_r4/Register"
8153	SourceType "Xilinx Register Block"
8154	init "0"
8155	rst off
8156	en off
8157	dbl_ovrd off
8158	xl_use_area off
8159	xl_area "[0,0,0,0,0,0,0]"
8160	has_advanced_control "0"
8161	sggui_pos "-1,-1,-1,-1"
8162	block_type "register"
8163	block_version "8.2"
8164	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
8165	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
8166	}
8167	Block {
8168	BlockType Reference
8169	Name "Reinterpret"
8170	Ports [1, 1]
8171	Position [665, 354, 715, 386]
8172	SourceBlock "xbsIndex_r4/Reinterpret"
8173	SourceType "Xilinx Type Reinterpreter Block"
8174	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
8175	force_arith_type on
8176	arith_type "Signed (2's comp)"
8177	force_bin_pt on
8178	bin_pt "13"
8179	has_advanced_control "0"
8180	sggui_pos "20,20,336,312"
8181	block_type "reinterpret"
8182	block_version "10.1.3"
8183	sg_icon_stat "50,32,1,1,white,blue,0,8982c1db,right"
8184	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
8185	}
8186	Block {
8187	BlockType Reference
8188	Name "Slice"
8189	Ports [1, 1]
8190	Position [670, 160, 730, 190]
8191	SourceBlock "xbsIndex_r4/Slice"
8192	SourceType "Xilinx Bit Slice Extractor Block"
8193	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
8194	nbits "1"
8195	boolean_output off
8196	mode "Lower Bit Location + Width"
8197	bit1 "0"
8198	base1 "MSB of Input"
8199	bit0 "0"
8200	base0 "LSB of Input"
8201	dbl_ovrd off
8202	has_advanced_control "0"
8203	sggui_pos "20,20,449,376"
8204	block_type "slice"
8205	block_version "10.1.3"
8206	sg_icon_stat "60,30,1,1,white,blue,0,b1026674,right"
8207	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
8208	}
8209	Block {
8210	BlockType Reference
8211	Name "radio1_ADC_I_OTR"
8212	Ports [1, 1]
8213	Position [110, 134, 165, 146]
8214	NamePlacement "alternate"
8215	SourceBlock "xbsIndex_r4/Gateway In"
8216	SourceType "Xilinx Gateway In Block"
8217	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
8218	arith_type "Unsigned"
8219	n_bits "1"
8220	bin_pt "0"
8221	quantization "Round (unbiased: +/- Inf)"
8222	overflow "Saturate"
8223	period "1"
8224	dbl_ovrd off
8225	timing_constraint "None"
8226	locs_specified off
8227	LOCs "{}"
8228	xl_use_area off
8229	xl_area "[0,0,0,0,0,0,0]"
8230	has_advanced_control "0"
8231	sggui_pos "20,20,356,432"
8232	block_type "gatewayin"
8233	block_version "VER_STRING_GOES_HERE"
8234	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
8235	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
8236	}
8237	Block {
8238	BlockType Outport
8239	Name "OTR I"
8240	Position [925, 133, 955, 147]
8241	IconDisplay "Port number"
8242	OutDataType "sfix(16)"
8243	OutScaling "2^0"
8244	}
8245	Block {
8246	BlockType Outport
8247	Name "ADC I"
8248	Position [925, 328, 955, 342]
8249	Port "2"
8250	IconDisplay "Port number"
8251	OutDataType "sfix(16)"
8252	OutScaling "2^0"
8253	}
8254	Line {
8255	SrcBlock "Constant1"
8256	SrcPort 1
8257	Points [20, 0]
8258	Branch {
8259	Points [0, -195]
8260	DstBlock "radio1_ADC_I_OTR"
8261	DstPort 1
8262	}
8263	Branch {
8264	DstBlock "Radio 1 ADC I"
8265	DstPort 1
8266	}
8267	Branch {
8268	Points [0, 100]
8269	DstBlock "FromAGC_Radio1_I"
8270	DstPort 1
8271	}
8272	}
8273	Line {
8274	SrcBlock "Mux"
8275	SrcPort 1
8276	DstBlock "OTR I"
8277	DstPort 1
8278	}
8279	Line {
8280	SrcBlock "Debug"
8281	SrcPort 1
8282	Points [40, 0; 0, 45]
8283	Branch {
8284	DstBlock "Mux"
8285	DstPort 1
8286	}
8287	Branch {
8288	Points [0, 195]
8289	DstBlock "Mux1"
8290	DstPort 1
8291	}
8292	}
8293	Line {
8294	SrcBlock "radio1_ADC_I_OTR"
8295	SrcPort 1
8296	DstBlock "Mux"
8297	DstPort 2
8298	}
8299	Line {
8300	SrcBlock "Slice"
8301	SrcPort 1
8302	DstBlock "Mux"
8303	DstPort 3
8304	}
8305	Line {
8306	SrcBlock "Mux1"
8307	SrcPort 1
8308	DstBlock "ADC I"
8309	DstPort 1
8310	}
8311	Line {
8312	SrcBlock "Register"
8313	SrcPort 1
8314	DstBlock "Mux1"
8315	DstPort 2
8316	}
8317	Line {
8318	SrcBlock "Reinterpret"
8319	SrcPort 1
8320	DstBlock "Mux1"
8321	DstPort 3
8322	}
8323	Line {
8324	SrcBlock "Counter"
8325	SrcPort 1
8326	Points [25, 0]
8327	Branch {
8328	DstBlock "Reinterpret"
8329	DstPort 1
8330	}
8331	Branch {
8332	Points [0, -195]
8333	DstBlock "Slice"
8334	DstPort 1
8335	}
8336	}
8337	Line {
8338	SrcBlock "MGCAGC_AGCDCO_SEL"
8339	SrcPort 1
8340	Points [70, 0; 0, 50]
8341	DstBlock "Mux2"
8342	DstPort 1
8343	}
8344	Line {
8345	SrcBlock "FromAGC_Radio1_I"
8346	SrcPort 1
8347	Points [50, 0; 0, -65]
8348	DstBlock "Mux2"
8349	DstPort 3
8350	}
8351	Line {
8352	SrcBlock "Mux2"
8353	SrcPort 1
8354	DstBlock "Register"
8355	DstPort 1
8356	}
8357	Line {
8358	SrcBlock "Radio 1 ADC I"
8359	SrcPort 1
8360	DstBlock "Mux2"
8361	DstPort 2
8362	}
8363	}
8364	}
8365	Block {
8366	BlockType SubSystem
8367	Name "ADC Q"
8368	Ports [2, 2]
8369	Position [420, 324, 575, 366]
8370	MinAlgLoopOccurrences off
8371	PropExecContextOutsideSubsystem off
8372	RTWSystemCode "Auto"
8373	FunctionWithSeparateData off
8374	Opaque off
8375	RequestExecContextInheritance off
8376	MaskHideContents off
8377	System {
8378	Name "ADC Q"
8379	Location [66, 91, 1078, 743]
8380	Open off
8381	ModelBrowserVisibility off
8382	ModelBrowserWidth 200
8383	ScreenColor "white"
8384	PaperOrientation "landscape"
8385	PaperPositionMode "auto"
8386	PaperType "usletter"
8387	PaperUnits "inches"
8388	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
8389	TiledPageScale 1
8390	ShowPageBoundaries off
8391	ZoomFactor "100"
8392	Block {
8393	BlockType Inport
8394	Name "Debug"
8395	Position [630, 43, 660, 57]
8396	IconDisplay "Port number"
8397	OutDataType "sfix(16)"
8398	OutScaling "2^0"
8399	}
8400	Block {
8401	BlockType Inport
8402	Name "MGCAGC_AGCDCO_SEL"
8403	Position [120, 233, 150, 247]
8404	Port "2"
8405	IconDisplay "Port number"
8406	OutDataType "sfix(16)"
8407	OutScaling "2^0"
8408	}
8409	Block {
8410	BlockType Constant
8411	Name "Constant1"
8412	Position [15, 310, 45, 340]
8413	ShowName off
8414	Value "0"
8415	OutDataType "sfix(16)"
8416	OutScaling "2^0"
8417	}
8418	Block {
8419	BlockType Reference
8420	Name "Counter"
8421	Ports [0, 1]
8422	Position [460, 330, 520, 390]
8423	SourceBlock "xbsIndex_r4/Counter"
8424	SourceType "Xilinx Counter Block"
8425	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
8426	cnt_type "Free Running"
8427	cnt_to "Inf"
8428	operation "Up"
8429	start_count "0"
8430	cnt_by_val "1"
8431	arith_type "Unsigned"
8432	n_bits "14"
8433	bin_pt "0"
8434	load_pin off
8435	rst off
8436	en off
8437	explicit_period "on"
8438	period "1"
8439	dbl_ovrd off
8440	use_behavioral_HDL off
8441	use_rpm off
8442	implementation "Fabric"
8443	xl_use_area off
8444	xl_area "[0,0,0,0,0,0,0]"
8445	has_advanced_control "0"
8446	sggui_pos "20,20,348,619"
8447	block_type "counter"
8448	block_version "10.1.3"
8449	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
8450	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
8451	}
8452	Block {
8453	BlockType Reference
8454	Name "FromAGC_Radio1_Q"
8455	Ports [1, 1]
8456	Position [105, 415, 170, 435]
8457	SourceBlock "xbsIndex_r4/Gateway In"
8458	SourceType "Xilinx Gateway In Block"
8459	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
8460	arith_type "Signed (2's comp)"
8461	n_bits "14"
8462	bin_pt "13"
8463	quantization "Round (unbiased: +/- Inf)"
8464	overflow "Saturate"
8465	period "1"
8466	dbl_ovrd off
8467	timing_constraint "None"
8468	locs_specified off
8469	LOCs "{}"
8470	xl_use_area off
8471	xl_area "[0,0,0,0,0,0,0]"
8472	has_advanced_control "0"
8473	sggui_pos "20,20,348,406"
8474	block_type "gatewayin"
8475	block_version "10.1.3"
8476	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
8477	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
8478	}
8479	Block {
8480	BlockType Reference
8481	Name "Mux"
8482	Ports [3, 1]
8483	Position [765, 78, 810, 182]
8484	SourceBlock "xbsIndex_r4/Mux"
8485	SourceType "Xilinx Bus Multiplexer Block"
8486	inputs "2"
8487	en off
8488	latency "0"
8489	precision "Full"
8490	arith_type "Unsigned"
8491	n_bits "1"
8492	bin_pt "0"
8493	quantization "Truncate"
8494	overflow "Wrap"
8495	dbl_ovrd off
8496	xl_use_area off
8497	xl_area "[0,0,0,0,0,0,0]"
8498	has_advanced_control "0"
8499	sggui_pos "20,20,348,303"
8500	block_type "mux"
8501	block_version "10.1.3"
8502	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
8503	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
8504	}
8505	Block {
8506	BlockType Reference
8507	Name "Mux1"
8508	Ports [3, 1]
8509	Position [765, 273, 810, 377]
8510	SourceBlock "xbsIndex_r4/Mux"
8511	SourceType "Xilinx Bus Multiplexer Block"
8512	inputs "2"
8513	en off
8514	latency "0"
8515	precision "Full"
8516	arith_type "Unsigned"
8517	n_bits "1"
8518	bin_pt "0"
8519	quantization "Truncate"
8520	overflow "Wrap"
8521	dbl_ovrd off
8522	xl_use_area off
8523	xl_area "[0,0,0,0,0,0,0]"
8524	has_advanced_control "0"
8525	sggui_pos "20,20,348,303"
8526	block_type "mux"
8527	block_version "10.1.3"
8528	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
8529	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
8530	}
8531	Block {
8532	BlockType Reference
8533	Name "Mux2"
8534	Ports [3, 1]
8535	Position [265, 273, 310, 377]
8536	SourceBlock "xbsIndex_r4/Mux"
8537	SourceType "Xilinx Bus Multiplexer Block"
8538	inputs "2"
8539	en off
8540	latency "0"
8541	precision "Full"
8542	arith_type "Unsigned"
8543	n_bits "1"
8544	bin_pt "0"
8545	quantization "Truncate"
8546	overflow "Wrap"
8547	dbl_ovrd off
8548	xl_use_area off
8549	xl_area "[0,0,0,0,0,0,0]"
8550	has_advanced_control "0"
8551	sggui_pos "20,20,348,303"
8552	block_type "mux"
8553	block_version "10.1.3"
8554	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
8555	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
8556	}
8557	Block {
8558	BlockType Reference
8559	Name "Radio 1 ADC Q"
8560	Ports [1, 1]
8561	Position [90, 304, 185, 346]
8562	LinkData {
8563	BlockName "radio1_adc_Q"
8564	DialogParameters {
8565	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
8566	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
8567	}
8568	}
8569	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 1 ADC Q"
8570	SourceType ""
8571	ShowPortLabels "FromPortIcon"
8572	SystemSampleTime "-1"
8573	FunctionWithSeparateData off
8574	RTWMemSecFuncInitTerm "Inherit from model"
8575	RTWMemSecFuncExecute "Inherit from model"
8576	RTWMemSecDataConstants "Inherit from model"
8577	RTWMemSecDataInternal "Inherit from model"
8578	RTWMemSecDataParameters "Inherit from model"
8579	samp_period "1"
8580	}
8581	Block {
8582	BlockType Reference
8583	Name "Register"
8584	Ports [1, 1]
8585	Position [390, 311, 425, 339]
8586	ShowName off
8587	SourceBlock "xbsIndex_r4/Register"
8588	SourceType "Xilinx Register Block"
8589	init "0"
8590	rst off
8591	en off
8592	dbl_ovrd off
8593	xl_use_area off
8594	xl_area "[0,0,0,0,0,0,0]"
8595	has_advanced_control "0"
8596	sggui_pos "-1,-1,-1,-1"
8597	block_type "register"
8598	block_version "8.2"
8599	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
8600	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
8601	}
8602	Block {
8603	BlockType Reference
8604	Name "Reinterpret"
8605	Ports [1, 1]
8606	Position [610, 344, 660, 376]
8607	SourceBlock "xbsIndex_r4/Reinterpret"
8608	SourceType "Xilinx Type Reinterpreter Block"
8609	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
8610	force_arith_type on
8611	arith_type "Signed (2's comp)"
8612	force_bin_pt on
8613	bin_pt "13"
8614	has_advanced_control "0"
8615	sggui_pos "20,20,336,312"
8616	block_type "reinterpret"
8617	block_version "10.1.3"
8618	sg_icon_stat "50,32,1,1,white,blue,0,8982c1db,right"
8619	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
8620	}
8621	Block {
8622	BlockType Reference
8623	Name "Slice"
8624	Ports [1, 1]
8625	Position [615, 150, 675, 180]
8626	SourceBlock "xbsIndex_r4/Slice"
8627	SourceType "Xilinx Bit Slice Extractor Block"
8628	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
8629	nbits "1"
8630	boolean_output off
8631	mode "Lower Bit Location + Width"
8632	bit1 "0"
8633	base1 "MSB of Input"
8634	bit0 "0"
8635	base0 "LSB of Input"
8636	dbl_ovrd off
8637	has_advanced_control "0"
8638	sggui_pos "20,20,449,376"
8639	block_type "slice"
8640	block_version "10.1.3"
8641	sg_icon_stat "60,30,1,1,white,blue,0,b1026674,right"
8642	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
8643	}
8644	Block {
8645	BlockType Reference
8646	Name "radio1_ADC_Q_OTR"
8647	Ports [1, 1]
8648	Position [115, 124, 170, 136]
8649	SourceBlock "xbsIndex_r4/Gateway In"
8650	SourceType "Xilinx Gateway In Block"
8651	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
8652	arith_type "Unsigned"
8653	n_bits "1"
8654	bin_pt "0"
8655	quantization "Round (unbiased: +/- Inf)"
8656	overflow "Saturate"
8657	period "1"
8658	dbl_ovrd off
8659	timing_constraint "None"
8660	locs_specified off
8661	LOCs "{}"
8662	xl_use_area off
8663	xl_area "[0,0,0,0,0,0,0]"
8664	has_advanced_control "0"
8665	sggui_pos "20,20,356,432"
8666	block_type "gatewayin"
8667	block_version "VER_STRING_GOES_HERE"
8668	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
8669	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
8670	}
8671	Block {
8672	BlockType Outport
8673	Name "OTR Q"
8674	Position [905, 123, 935, 137]
8675	IconDisplay "Port number"
8676	OutDataType "sfix(16)"
8677	OutScaling "2^0"
8678	}
8679	Block {
8680	BlockType Outport
8681	Name "ADC Q"
8682	Position [905, 318, 935, 332]
8683	Port "2"
8684	IconDisplay "Port number"
8685	OutDataType "sfix(16)"
8686	OutScaling "2^0"
8687	}
8688	Line {
8689	SrcBlock "Constant1"
8690	SrcPort 1
8691	Points [20, 0]
8692	Branch {
8693	Points [0, -195]
8694	DstBlock "radio1_ADC_Q_OTR"
8695	DstPort 1
8696	}
8697	Branch {
8698	DstBlock "Radio 1 ADC Q"
8699	DstPort 1
8700	}
8701	Branch {
8702	Points [0, 100]
8703	DstBlock "FromAGC_Radio1_Q"
8704	DstPort 1
8705	}
8706	}
8707	Line {
8708	SrcBlock "Mux"
8709	SrcPort 1
8710	DstBlock "OTR Q"
8711	DstPort 1
8712	}
8713	Line {
8714	SrcBlock "Debug"
8715	SrcPort 1
8716	Points [40, 0; 0, 45]
8717	Branch {
8718	DstBlock "Mux"
8719	DstPort 1
8720	}
8721	Branch {
8722	Points [0, 195]
8723	DstBlock "Mux1"
8724	DstPort 1
8725	}
8726	}
8727	Line {
8728	SrcBlock "radio1_ADC_Q_OTR"
8729	SrcPort 1
8730	DstBlock "Mux"
8731	DstPort 2
8732	}
8733	Line {
8734	SrcBlock "Slice"
8735	SrcPort 1
8736	DstBlock "Mux"
8737	DstPort 3
8738	}
8739	Line {
8740	SrcBlock "Mux1"
8741	SrcPort 1
8742	DstBlock "ADC Q"
8743	DstPort 1
8744	}
8745	Line {
8746	SrcBlock "Register"
8747	SrcPort 1
8748	DstBlock "Mux1"
8749	DstPort 2
8750	}
8751	Line {
8752	SrcBlock "Reinterpret"
8753	SrcPort 1
8754	DstBlock "Mux1"
8755	DstPort 3
8756	}
8757	Line {
8758	SrcBlock "Counter"
8759	SrcPort 1
8760	Points [30, 0]
8761	Branch {
8762	DstBlock "Reinterpret"
8763	DstPort 1
8764	}
8765	Branch {
8766	Points [0, -195]
8767	DstBlock "Slice"
8768	DstPort 1
8769	}
8770	}
8771	Line {
8772	SrcBlock "MGCAGC_AGCDCO_SEL"
8773	SrcPort 1
8774	Points [70, 0; 0, 50]
8775	DstBlock "Mux2"
8776	DstPort 1
8777	}
8778	Line {
8779	SrcBlock "FromAGC_Radio1_Q"
8780	SrcPort 1
8781	Points [50, 0; 0, -65]
8782	DstBlock "Mux2"
8783	DstPort 3
8784	}
8785	Line {
8786	SrcBlock "Radio 1 ADC Q"
8787	SrcPort 1
8788	DstBlock "Mux2"
8789	DstPort 2
8790	}
8791	Line {
8792	SrcBlock "Mux2"
8793	SrcPort 1
8794	DstBlock "Register"
8795	DstPort 1
8796	}
8797	}
8798	}
8799	Block {
8800	BlockType SubSystem
8801	Name "Concatenates_1"
8802	Ports [4, 1]
8803	Position [695, 218, 740, 372]
8804	NamePlacement "alternate"
8805	MinAlgLoopOccurrences off
8806	PropExecContextOutsideSubsystem off
8807	RTWSystemCode "Auto"
8808	FunctionWithSeparateData off
8809	Opaque off
8810	RequestExecContextInheritance off
8811	MaskHideContents off
8812	System {
8813	Name "Concatenates_1"
8814	Location [2, 74, 1270, 726]
8815	Open off
8816	ModelBrowserVisibility off
8817	ModelBrowserWidth 200
8818	ScreenColor "white"
8819	PaperOrientation "landscape"
8820	PaperPositionMode "auto"
8821	PaperType "usletter"
8822	PaperUnits "inches"
8823	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
8824	TiledPageScale 1
8825	ShowPageBoundaries off
8826	ZoomFactor "100"
8827	Block {
8828	BlockType Inport
8829	Name "OTR_I"
8830	Position [395, 43, 425, 57]
8831	IconDisplay "Port number"
8832	OutDataType "sfix(16)"
8833	OutScaling "2^0"
8834	}
8835	Block {
8836	BlockType Inport
8837	Name "ADC_I"
8838	Position [330, 93, 360, 107]
8839	Port "2"
8840	IconDisplay "Port number"
8841	OutDataType "sfix(16)"
8842	OutScaling "2^0"
8843	}
8844	Block {
8845	BlockType Inport
8846	Name "OTR_Q"
8847	Position [390, 163, 420, 177]
8848	Port "3"
8849	IconDisplay "Port number"
8850	OutDataType "sfix(16)"
8851	OutScaling "2^0"
8852	}
8853	Block {
8854	BlockType Inport
8855	Name "ADC_Q"
8856	Position [330, 213, 360, 227]
8857	Port "4"
8858	IconDisplay "Port number"
8859	OutDataType "sfix(16)"
8860	OutScaling "2^0"
8861	}
8862	Block {
8863	BlockType Reference
8864	Name "Concat1"
8865	Ports [2, 1]
8866	Position [490, 191, 520, 229]
8867	ShowName off
8868	SourceBlock "xbsIndex_r4/Concat"
8869	SourceType "Xilinx Bus Concatenator Block"
8870	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
8871	num_inputs "2"
8872	dbl_ovrd off
8873	has_advanced_control "0"
8874	sggui_pos "-1,-1,-1,-1"
8875	block_type "concat"
8876	block_version "8.2"
8877	sg_icon_stat "30,38,1,1,white,blue,0,df1e5aba,right"
8878	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
8879	}
8880	Block {
8881	BlockType Reference
8882	Name "Concat2"
8883	Ports [2, 1]
8884	Position [490, 71, 520, 109]
8885	ShowName off
8886	SourceBlock "xbsIndex_r4/Concat"
8887	SourceType "Xilinx Bus Concatenator Block"
8888	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
8889	num_inputs "2"
8890	dbl_ovrd off
8891	has_advanced_control "0"
8892	sggui_pos "-1,-1,-1,-1"
8893	block_type "concat"
8894	block_version "8.2"
8895	sg_icon_stat "30,38,1,1,white,blue,0,df1e5aba,right"
8896	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
8897	}
8898	Block {
8899	BlockType Reference
8900	Name "Concat3"
8901	Ports [2, 1]
8902	Position [550, 150, 575, 230]
8903	ShowName off
8904	SourceBlock "xbsIndex_r4/Concat"
8905	SourceType "Xilinx Bus Concatenator Block"
8906	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
8907	num_inputs "2"
8908	dbl_ovrd off
8909	has_advanced_control "0"
8910	sggui_pos "-1,-1,-1,-1"
8911	block_type "concat"
8912	block_version "8.2"
8913	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
8914	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
8915	}
8916	Block {
8917	BlockType Reference
8918	Name "Concat4"
8919	Ports [2, 1]
8920	Position [550, 30, 575, 110]
8921	ShowName off
8922	SourceBlock "xbsIndex_r4/Concat"
8923	SourceType "Xilinx Bus Concatenator Block"
8924	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
8925	num_inputs "2"
8926	dbl_ovrd off
8927	has_advanced_control "0"
8928	sggui_pos "-1,-1,-1,-1"
8929	block_type "concat"
8930	block_version "8.2"
8931	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
8932	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
8933	}
8934	Block {
8935	BlockType Reference
8936	Name "Concat5"
8937	Ports [2, 1]
8938	Position [635, 50, 660, 130]
8939	ShowName off
8940	SourceBlock "xbsIndex_r4/Concat"
8941	SourceType "Xilinx Bus Concatenator Block"
8942	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
8943	num_inputs "2"
8944	dbl_ovrd off
8945	has_advanced_control "0"
8946	sggui_pos "-1,-1,-1,-1"
8947	block_type "concat"
8948	block_version "8.2"
8949	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
8950	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
8951	}
8952	Block {
8953	BlockType Reference
8954	Name "Reinterpret"
8955	Ports [1, 1]
8956	Position [385, 90, 420, 110]
8957	ShowName off
8958	SourceBlock "xbsIndex_r4/Reinterpret"
8959	SourceType "Xilinx Type Reinterpreter Block"
8960	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
8961	force_arith_type on
8962	arith_type "Unsigned"
8963	force_bin_pt on
8964	bin_pt "0"
8965	has_advanced_control "0"
8966	sggui_pos "20,20,356,309"
8967	block_type "reinterpret"
8968	block_version "8.2"
8969	sg_icon_stat "35,20,1,1,white,blue,0,8982c1db,right"
8970	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
8971	}
8972	Block {
8973	BlockType Reference
8974	Name "Reinterpret1"
8975	Ports [1, 1]
8976	Position [390, 210, 425, 230]
8977	ShowName off
8978	SourceBlock "xbsIndex_r4/Reinterpret"
8979	SourceType "Xilinx Type Reinterpreter Block"
8980	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
8981	force_arith_type on
8982	arith_type "Unsigned"
8983	force_bin_pt on
8984	bin_pt "0"
8985	has_advanced_control "0"
8986	sggui_pos "20,20,356,309"
8987	block_type "reinterpret"
8988	block_version "8.2"
8989	sg_icon_stat "35,20,1,1,white,blue,0,8982c1db,right"
8990	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
8991	}
8992	Block {
8993	BlockType Reference
8994	Name "zero"
8995	Ports [0, 1]
8996	Position [440, 191, 460, 209]
8997	ShowName off
8998	SourceBlock "xbsIndex_r4/Constant"
8999	SourceType "Xilinx Constant Block Block"
9000	arith_type "Unsigned"
9001	const "0"
9002	n_bits "1"
9003	bin_pt "0"
9004	explicit_period off
9005	period "1"
9006	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
9007	equ "P=C"
9008	opselect "C"
9009	inp2 "PCIN>>17"
9010	opr "+"
9011	inp1 "P"
9012	carry "CIN"
9013	dbl_ovrd off
9014	has_advanced_control "0"
9015	sggui_pos "-1,-1,-1,-1"
9016	block_type "constant"
9017	block_version "VER_STRING_GOES_HERE"
9018	sg_icon_stat "20,18,1,1,white,blue,0,72d575a1,right"
9019	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
9020	}
9021	Block {
9022	BlockType Reference
9023	Name "zero1"
9024	Ports [0, 1]
9025	Position [440, 71, 460, 89]
9026	ShowName off
9027	SourceBlock "xbsIndex_r4/Constant"
9028	SourceType "Xilinx Constant Block Block"
9029	arith_type "Unsigned"
9030	const "0"
9031	n_bits "1"
9032	bin_pt "0"
9033	explicit_period off
9034	period "1"
9035	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
9036	equ "P=C"
9037	opselect "C"
9038	inp2 "PCIN>>17"
9039	opr "+"
9040	inp1 "P"
9041	carry "CIN"
9042	dbl_ovrd off
9043	has_advanced_control "0"
9044	sggui_pos "-1,-1,-1,-1"
9045	block_type "constant"
9046	block_version "VER_STRING_GOES_HERE"
9047	sg_icon_stat "20,18,1,1,white,blue,0,72d575a1,right"
9048	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
9049	}
9050	Block {
9051	BlockType Outport
9052	Name "32b"
9053	Position [685, 83, 715, 97]
9054	IconDisplay "Port number"
9055	OutDataType "sfix(16)"
9056	OutScaling "2^0"
9057	}
9058	Line {
9059	SrcBlock "Reinterpret1"
9060	SrcPort 1
9061	DstBlock "Concat1"
9062	DstPort 2
9063	}
9064	Line {
9065	SrcBlock "Reinterpret"
9066	SrcPort 1
9067	DstBlock "Concat2"
9068	DstPort 2
9069	}
9070	Line {
9071	SrcBlock "ADC_Q"
9072	SrcPort 1
9073	DstBlock "Reinterpret1"
9074	DstPort 1
9075	}
9076	Line {
9077	SrcBlock "OTR_Q"
9078	SrcPort 1
9079	DstBlock "Concat3"
9080	DstPort 1
9081	}
9082	Line {
9083	SrcBlock "ADC_I"
9084	SrcPort 1
9085	DstBlock "Reinterpret"
9086	DstPort 1
9087	}
9088	Line {
9089	SrcBlock "Concat5"
9090	SrcPort 1
9091	DstBlock "32b"
9092	DstPort 1
9093	}
9094	Line {
9095	SrcBlock "OTR_I"
9096	SrcPort 1
9097	DstBlock "Concat4"
9098	DstPort 1
9099	}
9100	Line {
9101	SrcBlock "Concat3"
9102	SrcPort 1
9103	Points [25, 0; 0, -80]
9104	DstBlock "Concat5"
9105	DstPort 2
9106	}
9107	Line {
9108	SrcBlock "Concat4"
9109	SrcPort 1
9110	DstBlock "Concat5"
9111	DstPort 1
9112	}
9113	Line {
9114	SrcBlock "Concat2"
9115	SrcPort 1
9116	Points [0, 0]
9117	DstBlock "Concat4"
9118	DstPort 2
9119	}
9120	Line {
9121	SrcBlock "zero1"
9122	SrcPort 1
9123	DstBlock "Concat2"
9124	DstPort 1
9125	}
9126	Line {
9127	SrcBlock "Concat1"
9128	SrcPort 1
9129	DstBlock "Concat3"
9130	DstPort 2
9131	}
9132	Line {
9133	SrcBlock "zero"
9134	SrcPort 1
9135	DstBlock "Concat1"
9136	DstPort 1
9137	}
9138	}
9139	}
9140	Block {
9141	BlockType Reference
9142	Name "Gateway Out1"
9143	Ports [1, 1]
9144	Position [710, 135, 740, 145]
9145	ShowName off
9146	SourceBlock "xbsIndex_r4/Gateway Out"
9147	SourceType "Xilinx Gateway Out Block"
9148	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
9149	hdl_port off
9150	timing_constraint "None"
9151	locs_specified off
9152	LOCs "{}"
9153	xl_use_area off
9154	xl_area "[0,0,0,0,0,0,0]"
9155	has_advanced_control "0"
9156	sggui_pos "20,20,336,386"
9157	block_type "gatewayout"
9158	block_version "10.1.2"
9159	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
9160	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9161	}
9162	Block {
9163	BlockType Reference
9164	Name "Gateway Out4"
9165	Ports [1, 1]
9166	Position [710, 120, 740, 130]
9167	ShowName off
9168	SourceBlock "xbsIndex_r4/Gateway Out"
9169	SourceType "Xilinx Gateway Out Block"
9170	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
9171	hdl_port off
9172	timing_constraint "None"
9173	locs_specified off
9174	LOCs "{}"
9175	xl_use_area off
9176	xl_area "[0,0,0,0,0,0,0]"
9177	has_advanced_control "0"
9178	sggui_pos "20,20,336,386"
9179	block_type "gatewayout"
9180	block_version "10.1.2"
9181	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
9182	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9183	}
9184	Block {
9185	BlockType SubSystem
9186	Name "RSSI"
9187	Ports [1, 1]
9188	Position [470, 397, 540, 433]
9189	MinAlgLoopOccurrences off
9190	PropExecContextOutsideSubsystem off
9191	RTWSystemCode "Auto"
9192	FunctionWithSeparateData off
9193	Opaque off
9194	RequestExecContextInheritance off
9195	MaskHideContents off
9196	System {
9197	Name "RSSI"
9198	Location [2, 74, 1184, 726]
9199	Open off
9200	ModelBrowserVisibility off
9201	ModelBrowserWidth 200
9202	ScreenColor "white"
9203	PaperOrientation "landscape"
9204	PaperPositionMode "auto"
9205	PaperType "usletter"
9206	PaperUnits "inches"
9207	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
9208	TiledPageScale 1
9209	ShowPageBoundaries off
9210	ZoomFactor "100"
9211	Block {
9212	BlockType Inport
9213	Name "Debug"
9214	Position [465, 28, 495, 42]
9215	IconDisplay "Port number"
9216	OutDataType "sfix(16)"
9217	OutScaling "2^0"
9218	}
9219	Block {
9220	BlockType Constant
9221	Name "Constant1"
9222	Position [160, 100, 190, 130]
9223	ShowName off
9224	Value "0"
9225	OutDataType "sfix(16)"
9226	OutScaling "2^0"
9227	}
9228	Block {
9229	BlockType Reference
9230	Name "Counter"
9231	Ports [0, 1]
9232	Position [380, 120, 440, 180]
9233	SourceBlock "xbsIndex_r4/Counter"
9234	SourceType "Xilinx Counter Block"
9235	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
9236	cnt_type "Free Running"
9237	cnt_to "Inf"
9238	operation "Up"
9239	start_count "0"
9240	cnt_by_val "1"
9241	arith_type "Unsigned"
9242	n_bits "10"
9243	bin_pt "0"
9244	load_pin off
9245	rst off
9246	en off
9247	explicit_period "on"
9248	period "1"
9249	dbl_ovrd off
9250	use_behavioral_HDL off
9251	use_rpm off
9252	implementation "Fabric"
9253	xl_use_area off
9254	xl_area "[0,0,0,0,0,0,0]"
9255	has_advanced_control "0"
9256	sggui_pos "20,20,348,619"
9257	block_type "counter"
9258	block_version "10.1.3"
9259	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
9260	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
9261	}
9262	Block {
9263	BlockType Reference
9264	Name "Mux"
9265	Ports [3, 1]
9266	Position [600, 63, 645, 167]
9267	SourceBlock "xbsIndex_r4/Mux"
9268	SourceType "Xilinx Bus Multiplexer Block"
9269	inputs "2"
9270	en off
9271	latency "0"
9272	precision "Full"
9273	arith_type "Unsigned"
9274	n_bits "1"
9275	bin_pt "0"
9276	quantization "Truncate"
9277	overflow "Wrap"
9278	dbl_ovrd off
9279	xl_use_area off
9280	xl_area "[0,0,0,0,0,0,0]"
9281	has_advanced_control "0"
9282	sggui_pos "20,20,348,303"
9283	block_type "mux"
9284	block_version "10.1.3"
9285	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
9286	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9287	}
9288	Block {
9289	BlockType Reference
9290	Name "radio1_RSSI"
9291	Ports [1, 1]
9292	Position [280, 109, 335, 121]
9293	NamePlacement "alternate"
9294	SourceBlock "xbsIndex_r4/Gateway In"
9295	SourceType "Xilinx Gateway In Block"
9296	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
9297	arith_type "Unsigned"
9298	n_bits "10"
9299	bin_pt "0"
9300	quantization "Truncate"
9301	overflow "Wrap"
9302	period "1"
9303	dbl_ovrd off
9304	timing_constraint "None"
9305	locs_specified off
9306	LOCs "{}"
9307	xl_use_area off
9308	xl_area "[0,0,0,0,0,0,0]"
9309	has_advanced_control "0"
9310	sggui_pos "20,20,356,432"
9311	block_type "gatewayin"
9312	block_version "VER_STRING_GOES_HERE"
9313	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
9314	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
9315	}
9316	Block {
9317	BlockType Outport
9318	Name "RSSI"
9319	Position [740, 108, 770, 122]
9320	IconDisplay "Port number"
9321	OutDataType "sfix(16)"
9322	OutScaling "2^0"
9323	}
9324	Line {
9325	SrcBlock "Constant1"
9326	SrcPort 1
9327	DstBlock "radio1_RSSI"
9328	DstPort 1
9329	}
9330	Line {
9331	SrcBlock "Debug"
9332	SrcPort 1
9333	Points [40, 0; 0, 45]
9334	DstBlock "Mux"
9335	DstPort 1
9336	}
9337	Line {
9338	SrcBlock "radio1_RSSI"
9339	SrcPort 1
9340	DstBlock "Mux"
9341	DstPort 2
9342	}
9343	Line {
9344	SrcBlock "Counter"
9345	SrcPort 1
9346	DstBlock "Mux"
9347	DstPort 3
9348	}
9349	Line {
9350	SrcBlock "Mux"
9351	SrcPort 1
9352	DstBlock "RSSI"
9353	DstPort 1
9354	}
9355	}
9356	}
9357	Block {
9358	BlockType Scope
9359	Name "Scope"
9360	Ports [2]
9361	Position [800, 111, 830, 164]
9362	Floating off
9363	Location [5, 34, 1285, 912]
9364	Open off
9365	NumInputPorts "2"
9366	List {
9367	ListType AxesTitles
9368	axes1 "%<SignalLabel>"
9369	axes2 "%<SignalLabel>"
9370	}
9371	YMin "-5~-5"
9372	YMax "5~5"
9373	DataFormat "StructureWithTime"
9374	SampleTime "0"
9375	}
9376	Block {
9377	BlockType Outport
9378	Name "Radio 1 RSSI"
9379	Position [655, 408, 685, 422]
9380	IconDisplay "Port number"
9381	OutDataType "sfix(16)"
9382	OutScaling "2^0"
9383	}
9384	Block {
9385	BlockType Outport
9386	Name "Radio 1 I/Q"
9387	Position [865, 288, 895, 302]
9388	Port "2"
9389	IconDisplay "Port number"
9390	OutDataType "sfix(16)"
9391	OutScaling "2^0"
9392	}
9393	Line {
9394	SrcBlock "ADC Q"
9395	SrcPort 2
9396	Points [85, 0]
9397	Branch {
9398	DstBlock "Concatenates_1"
9399	DstPort 4
9400	}
9401	Branch {
9402	Points [0, -215]
9403	DstBlock "Gateway Out1"
9404	DstPort 1
9405	}
9406	}
9407	Line {
9408	SrcBlock "ADC Q"
9409	SrcPort 1
9410	Points [0, -20]
9411	DstBlock "Concatenates_1"
9412	DstPort 3
9413	}
9414	Line {
9415	Labels [0, 0]
9416	SrcBlock "ADC I"
9417	SrcPort 2
9418	Points [0, -15; 75, 0]
9419	Branch {
9420	DstBlock "Concatenates_1"
9421	DstPort 2
9422	}
9423	Branch {
9424	Points [0, -150]
9425	DstBlock "Gateway Out4"
9426	DstPort 1
9427	}
9428	}
9429	Line {
9430	SrcBlock "ADC I"
9431	SrcPort 1
9432	Points [35, 0; 0, -30]
9433	DstBlock "Concatenates_1"
9434	DstPort 1
9435	}
9436	Line {
9437	SrcBlock "Concatenates_1"
9438	SrcPort 1
9439	Points [0, 0]
9440	DstBlock "Radio 1 I/Q"
9441	DstPort 1
9442	}
9443	Line {
9444	SrcBlock "Gateway Out4"
9445	SrcPort 1
9446	DstBlock "Scope"
9447	DstPort 1
9448	}
9449	Line {
9450	SrcBlock "Gateway Out1"
9451	SrcPort 1
9452	Points [40, 0]
9453	DstBlock "Scope"
9454	DstPort 2
9455	}
9456	Line {
9457	SrcBlock "DebugRxBuffers"
9458	SrcPort 1
9459	Points [160, 0]
9460	Branch {
9461	DstBlock "ADC I"
9462	DstPort 1
9463	}
9464	Branch {
9465	Points [0, 70]
9466	Branch {
9467	DstBlock "ADC Q"
9468	DstPort 1
9469	}
9470	Branch {
9471	Points [0, 80]
9472	DstBlock "RSSI"
9473	DstPort 1
9474	}
9475	}
9476	}
9477	Line {
9478	SrcBlock "RSSI"
9479	SrcPort 1
9480	DstBlock "Radio 1 RSSI"
9481	DstPort 1
9482	}
9483	Line {
9484	SrcBlock "MGCAGC_AGCDCO_SEL"
9485	SrcPort 1
9486	Points [110, 0]
9487	Branch {
9488	DstBlock "ADC Q"
9489	DstPort 2
9490	}
9491	Branch {
9492	Points [0, -65]
9493	DstBlock "ADC I"
9494	DstPort 2
9495	}
9496	}
9497	}
9498	}
9499	Block {
9500	BlockType SubSystem
9501	Name "Radio 1 Outputs"
9502	Ports [1]
9503	Position [1180, 666, 1230, 714]
9504	NamePlacement "alternate"
9505	MinAlgLoopOccurrences off
9506	PropExecContextOutsideSubsystem off
9507	RTWSystemCode "Auto"
9508	FunctionWithSeparateData off
9509	Opaque off
9510	RequestExecContextInheritance off
9511	MaskHideContents off
9512	System {
9513	Name "Radio 1 Outputs"
9514	Location [2, 74, 1078, 531]
9515	Open off
9516	ModelBrowserVisibility off
9517	ModelBrowserWidth 200
9518	ScreenColor "white"
9519	PaperOrientation "landscape"
9520	PaperPositionMode "auto"
9521	PaperType "usletter"
9522	PaperUnits "inches"
9523	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
9524	TiledPageScale 1
9525	ShowPageBoundaries off
9526	ZoomFactor "100"
9527	Block {
9528	BlockType Inport
9529	Name "32b"
9530	Position [250, 93, 280, 107]
9531	IconDisplay "Port number"
9532	OutDataType "sfix(16)"
9533	OutScaling "2^0"
9534	}
9535	Block {
9536	BlockType Reference
9537	Name "16LSB"
9538	Ports [1, 1]
9539	Position [430, 92, 470, 108]
9540	SourceBlock "xbsIndex_r4/Slice"
9541	SourceType "Xilinx Bit Slice Extractor Block"
9542	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
9543	nbits "16"
9544	boolean_output off
9545	mode "Lower Bit Location + Width"
9546	bit1 "0"
9547	base1 "MSB of Input"
9548	bit0 "0"
9549	base0 "LSB of Input"
9550	dbl_ovrd off
9551	has_advanced_control "0"
9552	sggui_pos "20,20,442,407"
9553	block_type "slice"
9554	block_version "8.2"
9555	sg_icon_stat "40,16,1,1,white,blue,0,b1026674,right"
9556	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
9557	}
9558	Block {
9559	BlockType Reference
9560	Name "16MSB"
9561	Ports [1, 1]
9562	Position [430, 36, 470, 54]
9563	NamePlacement "alternate"
9564	SourceBlock "xbsIndex_r4/Slice"
9565	SourceType "Xilinx Bit Slice Extractor Block"
9566	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
9567	nbits "16"
9568	boolean_output off
9569	mode "Upper Bit Location + Width"
9570	bit1 "0"
9571	base1 "MSB of Input"
9572	bit0 "0"
9573	base0 "LSB of Input"
9574	dbl_ovrd off
9575	has_advanced_control "0"
9576	sggui_pos "20,20,442,407"
9577	block_type "slice"
9578	block_version "8.2"
9579	sg_icon_stat "40,18,1,1,white,blue,0,b1026674,right"
9580	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
9581	}
9582	Block {
9583	BlockType Reference
9584	Name "Radio 1 DAC I"
9585	Ports [1, 1]
9586	Position [685, 24, 780, 66]
9587	LinkData {
9588	BlockName "Convert"
9589	DialogParameters {
9590	sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right"
9591	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
9592	}
9593	BlockName "radio1_dac_I"
9594	DialogParameters {
9595	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
9596	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9597	}
9598	}
9599	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 1 DAC I"
9600	SourceType ""
9601	ShowPortLabels "FromPortIcon"
9602	SystemSampleTime "-1"
9603	FunctionWithSeparateData off
9604	RTWMemSecFuncInitTerm "Inherit from model"
9605	RTWMemSecFuncExecute "Inherit from model"
9606	RTWMemSecDataConstants "Inherit from model"
9607	RTWMemSecDataInternal "Inherit from model"
9608	RTWMemSecDataParameters "Inherit from model"
9609	}
9610	Block {
9611	BlockType Reference
9612	Name "Radio 1 DAC Q"
9613	Ports [1, 1]
9614	Position [685, 79, 780, 121]
9615	LinkData {
9616	BlockName "Convert"
9617	DialogParameters {
9618	sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right"
9619	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
9620	}
9621	BlockName "radio1_dac_Q"
9622	DialogParameters {
9623	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
9624	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9625	}
9626	}
9627	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 1 DAC Q"
9628	SourceType ""
9629	ShowPortLabels "FromPortIcon"
9630	SystemSampleTime "-1"
9631	FunctionWithSeparateData off
9632	RTWMemSecFuncInitTerm "Inherit from model"
9633	RTWMemSecFuncExecute "Inherit from model"
9634	RTWMemSecDataConstants "Inherit from model"
9635	RTWMemSecDataInternal "Inherit from model"
9636	RTWMemSecDataParameters "Inherit from model"
9637	}
9638	Block {
9639	BlockType Reference
9640	Name "Register"
9641	Ports [1, 1]
9642	Position [595, 31, 630, 59]
9643	ShowName off
9644	SourceBlock "xbsIndex_r4/Register"
9645	SourceType "Xilinx Register Block"
9646	init "0"
9647	rst off
9648	en off
9649	dbl_ovrd off
9650	xl_use_area off
9651	xl_area "[0,0,0,0,0,0,0]"
9652	has_advanced_control "0"
9653	sggui_pos "-1,-1,-1,-1"
9654	block_type "register"
9655	block_version "8.2"
9656	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
9657	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9658	}
9659	Block {
9660	BlockType Reference
9661	Name "Register1"
9662	Ports [1, 1]
9663	Position [595, 86, 630, 114]
9664	ShowName off
9665	SourceBlock "xbsIndex_r4/Register"
9666	SourceType "Xilinx Register Block"
9667	init "0"
9668	rst off
9669	en off
9670	dbl_ovrd off
9671	xl_use_area off
9672	xl_area "[0,0,0,0,0,0,0]"
9673	has_advanced_control "0"
9674	sggui_pos "-1,-1,-1,-1"
9675	block_type "register"
9676	block_version "8.2"
9677	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
9678	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9679	}
9680	Block {
9681	BlockType Reference
9682	Name "Reinterpret"
9683	Ports [1, 1]
9684	Position [530, 35, 575, 55]
9685	ShowName off
9686	SourceBlock "xbsIndex_r4/Reinterpret"
9687	SourceType "Xilinx Type Reinterpreter Block"
9688	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
9689	force_arith_type on
9690	arith_type "Signed (2's comp)"
9691	force_bin_pt on
9692	bin_pt "15"
9693	has_advanced_control "0"
9694	sggui_pos "20,20,356,309"
9695	block_type "reinterpret"
9696	block_version "8.2"
9697	sg_icon_stat "45,20,1,1,white,blue,0,8982c1db,right"
9698	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
9699	}
9700	Block {
9701	BlockType Reference
9702	Name "Reinterpret1"
9703	Ports [1, 1]
9704	Position [530, 90, 575, 110]
9705	ShowName off
9706	SourceBlock "xbsIndex_r4/Reinterpret"
9707	SourceType "Xilinx Type Reinterpreter Block"
9708	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
9709	force_arith_type on
9710	arith_type "Signed (2's comp)"
9711	force_bin_pt on
9712	bin_pt "15"
9713	has_advanced_control "0"
9714	sggui_pos "20,20,356,309"
9715	block_type "reinterpret"
9716	block_version "8.2"
9717	sg_icon_stat "45,20,1,1,white,blue,0,8982c1db,right"
9718	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
9719	}
9720	Block {
9721	BlockType Terminator
9722	Name "Terminator1"
9723	Position [840, 35, 860, 55]
9724	ShowName off
9725	}
9726	Block {
9727	BlockType Terminator
9728	Name "Terminator2"
9729	Position [840, 90, 860, 110]
9730	ShowName off
9731	}
9732	Line {
9733	SrcBlock "Radio 1 DAC Q"
9734	SrcPort 1
9735	DstBlock "Terminator2"
9736	DstPort 1
9737	}
9738	Line {
9739	SrcBlock "Radio 1 DAC I"
9740	SrcPort 1
9741	DstBlock "Terminator1"
9742	DstPort 1
9743	}
9744	Line {
9745	SrcBlock "Reinterpret1"
9746	SrcPort 1
9747	DstBlock "Register1"
9748	DstPort 1
9749	}
9750	Line {
9751	SrcBlock "Reinterpret"
9752	SrcPort 1
9753	DstBlock "Register"
9754	DstPort 1
9755	}
9756	Line {
9757	SrcBlock "16LSB"
9758	SrcPort 1
9759	DstBlock "Reinterpret1"
9760	DstPort 1
9761	}
9762	Line {
9763	SrcBlock "16MSB"
9764	SrcPort 1
9765	DstBlock "Reinterpret"
9766	DstPort 1
9767	}
9768	Line {
9769	SrcBlock "Register"
9770	SrcPort 1
9771	DstBlock "Radio 1 DAC I"
9772	DstPort 1
9773	}
9774	Line {
9775	SrcBlock "Register1"
9776	SrcPort 1
9777	DstBlock "Radio 1 DAC Q"
9778	DstPort 1
9779	}
9780	Line {
9781	SrcBlock "32b"
9782	SrcPort 1
9783	Points [65, 0]
9784	Branch {
9785	Points [0, -55]
9786	DstBlock "16MSB"
9787	DstPort 1
9788	}
9789	Branch {
9790	DstBlock "16LSB"
9791	DstPort 1
9792	}
9793	}
9794	}
9795	}
9796	Block {
9797	BlockType SubSystem
9798	Name "Radio 2\nRx Buffers"
9799	Ports [5]
9800	Position [1175, 184, 1240, 286]
9801	MinAlgLoopOccurrences off
9802	PropExecContextOutsideSubsystem off
9803	RTWSystemCode "Auto"
9804	FunctionWithSeparateData off
9805	Opaque off
9806	RequestExecContextInheritance off
9807	MaskHideContents off
9808	System {
9809	Name "Radio 2\nRx Buffers"
9810	Location [2, 74, 1270, 726]
9811	Open off
9812	ModelBrowserVisibility off
9813	ModelBrowserWidth 200
9814	ScreenColor "white"
9815	PaperOrientation "landscape"
9816	PaperPositionMode "auto"
9817	PaperType "usletter"
9818	PaperUnits "inches"
9819	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
9820	TiledPageScale 1
9821	ShowPageBoundaries off
9822	ZoomFactor "100"
9823	Block {
9824	BlockType Inport
9825	Name "RSSI"
9826	Position [450, 313, 480, 327]
9827	IconDisplay "Port number"
9828	OutDataType "sfix(16)"
9829	OutScaling "2^0"
9830	}
9831	Block {
9832	BlockType Inport
9833	Name "I/Q"
9834	Position [545, 163, 575, 177]
9835	Port "2"
9836	IconDisplay "Port number"
9837	OutDataType "sfix(16)"
9838	OutScaling "2^0"
9839	}
9840	Block {
9841	BlockType Inport
9842	Name "Addr"
9843	Position [325, 128, 355, 142]
9844	Port "3"
9845	IconDisplay "Port number"
9846	OutDataType "sfix(16)"
9847	OutScaling "2^0"
9848	}
9849	Block {
9850	BlockType Inport
9851	Name "WE"
9852	Position [110, 183, 140, 197]
9853	Port "4"
9854	IconDisplay "Port number"
9855	OutDataType "sfix(16)"
9856	OutScaling "2^0"
9857	}
9858	Block {
9859	BlockType Inport
9860	Name "EN"
9861	Position [110, 213, 140, 227]
9862	Port "5"
9863	IconDisplay "Port number"
9864	OutDataType "sfix(16)"
9865	OutScaling "2^0"
9866	}
9867	Block {
9868	BlockType Reference
9869	Name "Convert1"
9870	Ports [1, 1]
9871	Position [185, 212, 210, 228]
9872	ShowName off
9873	SourceBlock "xbsIndex_r4/Convert"
9874	SourceType "Xilinx Type Converter Block"
9875	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
9876	arith_type "Boolean"
9877	n_bits "16"
9878	bin_pt "14"
9879	quantization "Truncate"
9880	overflow "Wrap"
9881	latency "0"
9882	dbl_ovrd off
9883	pipeline off
9884	xl_use_area off
9885	xl_area "[0,0,0,0,0,0,0]"
9886	has_advanced_control "0"
9887	sggui_pos "20,20,374,375"
9888	block_type "convert"
9889	block_version "8.2"
9890	sg_icon_stat "25,16,1,1,white,blue,0,74901e60,right"
9891	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
9892	}
9893	Block {
9894	BlockType Reference
9895	Name "Gateway Out"
9896	Ports [1, 1]
9897	Position [500, 30, 530, 40]
9898	ShowName off
9899	SourceBlock "xbsIndex_r4/Gateway Out"
9900	SourceType "Xilinx Gateway Out Block"
9901	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
9902	hdl_port off
9903	timing_constraint "None"
9904	locs_specified off
9905	LOCs "{}"
9906	xl_use_area off
9907	xl_area "[0,0,0,0,0,0,0]"
9908	has_advanced_control "0"
9909	sggui_pos "20,20,336,386"
9910	block_type "gatewayout"
9911	block_version "10.1.2"
9912	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
9913	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9914	}
9915	Block {
9916	BlockType Reference
9917	Name "Gateway Out1"
9918	Ports [1, 1]
9919	Position [500, 70, 530, 80]
9920	ShowName off
9921	SourceBlock "xbsIndex_r4/Gateway Out"
9922	SourceType "Xilinx Gateway Out Block"
9923	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
9924	hdl_port off
9925	timing_constraint "None"
9926	locs_specified off
9927	LOCs "{}"
9928	xl_use_area off
9929	xl_area "[0,0,0,0,0,0,0]"
9930	has_advanced_control "0"
9931	sggui_pos "20,20,336,386"
9932	block_type "gatewayout"
9933	block_version "10.1.2"
9934	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
9935	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9936	}
9937	Block {
9938	BlockType Reference
9939	Name "Logical"
9940	Ports [2, 1]
9941	Position [255, 175, 310, 235]
9942	SourceBlock "xbsIndex_r4/Logical"
9943	SourceType "Xilinx Logical Block Block"
9944	logical_function "AND"
9945	inputs "2"
9946	en off
9947	latency "0"
9948	precision "Full"
9949	arith_type "Unsigned"
9950	n_bits "16"
9951	bin_pt "0"
9952	align_bp on
9953	dbl_ovrd off
9954	xl_use_area off
9955	xl_area "[0,0,0,0,0,0,0]"
9956	has_advanced_control "0"
9957	sggui_pos "-1,-1,-1,-1"
9958	block_type "logical"
9959	block_version "9.1.01"
9960	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
9961	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
9962	}
9963	Block {
9964	BlockType SubSystem
9965	Name "Radio 2\nRSSI Buffer"
9966	Ports [3]
9967	Position [645, 264, 700, 376]
9968	MinAlgLoopOccurrences off
9969	PropExecContextOutsideSubsystem off
9970	RTWSystemCode "Auto"
9971	FunctionWithSeparateData off
9972	Opaque off
9973	RequestExecContextInheritance off
9974	MaskHideContents off
9975	System {
9976	Name "Radio 2\nRSSI Buffer"
9977	Location [6, 74, 1682, 1006]
9978	Open off
9979	ModelBrowserVisibility off
9980	ModelBrowserWidth 200
9981	ScreenColor "white"
9982	PaperOrientation "landscape"
9983	PaperPositionMode "auto"
9984	PaperType "usletter"
9985	PaperUnits "inches"
9986	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
9987	TiledPageScale 1
9988	ShowPageBoundaries off
9989	ZoomFactor "100"
9990	Block {
9991	BlockType Inport
9992	Name "Addr_14b"
9993	Position [325, 348, 355, 362]
9994	NamePlacement "alternate"
9995	IconDisplay "Port number"
9996	OutDataType "sfix(16)"
9997	OutScaling "2^0"
9998	}
9999	Block {
10000	BlockType Inport
10001	Name "RSSI"
10002	Position [95, 383, 125, 397]
10003	Port "2"
10004	IconDisplay "Port number"
10005	OutDataType "sfix(16)"
10006	OutScaling "2^0"
10007	}
10008	Block {
10009	BlockType Inport
10010	Name "WE"
10011	Position [720, 478, 750, 492]
10012	Port "3"
10013	IconDisplay "Port number"
10014	OutDataType "sfix(16)"
10015	OutScaling "2^0"
10016	}
10017	Block {
10018	BlockType Reference
10019	Name "11MSB"
10020	Ports [1, 1]
10021	Position [430, 346, 470, 364]
10022	NamePlacement "alternate"
10023	SourceBlock "xbsIndex_r4/Slice"
10024	SourceType "Xilinx Bit Slice Extractor Block"
10025	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
10026	nbits "11"
10027	boolean_output off
10028	mode "Upper Bit Location + Width"
10029	bit1 "0"
10030	base1 "MSB of Input"
10031	bit0 "0"
10032	base0 "LSB of Input"
10033	dbl_ovrd off
10034	has_advanced_control "0"
10035	sggui_pos "20,20,449,407"
10036	block_type "slice"
10037	block_version "8.2"
10038	sg_icon_stat "40,18,1,1,white,blue,0,b1026674,right"
10039	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
10040	}
10041	Block {
10042	BlockType Reference
10043	Name "BIT[2]"
10044	Ports [1, 1]
10045	Position [430, 401, 470, 419]
10046	SourceBlock "xbsIndex_r4/Slice"
10047	SourceType "Xilinx Bit Slice Extractor Block"
10048	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
10049	nbits "1"
10050	boolean_output on
10051	mode "Lower Bit Location + Width"
10052	bit1 "0"
10053	base1 "MSB of Input"
10054	bit0 "2"
10055	base0 "LSB of Input"
10056	dbl_ovrd off
10057	has_advanced_control "0"
10058	sggui_pos "20,20,449,407"
10059	block_type "slice"
10060	block_version "8.2"
10061	sg_icon_stat "40,18,1,1,white,blue,0,b1026674,right"
10062	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
10063	}
10064	Block {
10065	BlockType Reference
10066	Name "Concat"
10067	Ports [2, 1]
10068	Position [685, 381, 725, 459]
10069	ShowName off
10070	SourceBlock "xbsIndex_r4/Concat"
10071	SourceType "Xilinx Bus Concatenator Block"
10072	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
10073	num_inputs "2"
10074	dbl_ovrd off
10075	has_advanced_control "0"
10076	sggui_pos "-1,-1,-1,-1"
10077	block_type "concat"
10078	block_version "10.1.2"
10079	sg_icon_stat "40,78,1,1,white,blue,0,df1e5aba,right"
10080	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
10081	}
10082	Block {
10083	BlockType Reference
10084	Name "Convert"
10085	Ports [1, 1]
10086	Position [285, 382, 320, 398]
10087	ShowName off
10088	SourceBlock "xbsIndex_r4/Convert"
10089	SourceType "Xilinx Type Converter Block"
10090	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
10091	arith_type "Unsigned"
10092	n_bits "16"
10093	bin_pt "0"
10094	quantization "Truncate"
10095	overflow "Wrap"
10096	latency "0"
10097	dbl_ovrd off
10098	pipeline off
10099	xl_use_area off
10100	xl_area "[0,0,0,0,0,0,0]"
10101	has_advanced_control "0"
10102	sggui_pos "20,20,461,375"
10103	block_type "convert"
10104	block_version "8.2"
10105	sg_icon_stat "35,16,1,1,white,blue,0,74901e60,right"
10106	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
10107	}
10108	Block {
10109	BlockType Reference
10110	Name "Inverter"
10111	Ports [1, 1]
10112	Position [510, 402, 540, 418]
10113	ShowName off
10114	SourceBlock "xbsIndex_r4/Inverter"
10115	SourceType "Xilinx Inverter Block"
10116	infoedit "Bitwise logical negation (one's complement) operator."
10117	en off
10118	latency "0"
10119	dbl_ovrd off
10120	xl_use_area off
10121	xl_area "[0,0,0,0,0,0,0]"
10122	has_advanced_control "0"
10123	sggui_pos "20,20,348,251"
10124	block_type "inv"
10125	block_version "10.1.2"
10126	sg_icon_stat "30,16,1,1,white,blue,0,1ab4a85f,right"
10127	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
10128	}
10129	Block {
10130	BlockType Reference
10131	Name "Register"
10132	Ports [2, 1]
10133	Position [580, 378, 625, 422]
10134	ShowName off
10135	SourceBlock "xbsIndex_r4/Register"
10136	SourceType "Xilinx Register Block"
10137	init "0"
10138	rst off
10139	en on
10140	dbl_ovrd off
10141	xl_use_area off
10142	xl_area "[0,0,0,0,0,0,0]"
10143	has_advanced_control "0"
10144	sggui_pos "20,20,348,193"
10145	block_type "register"
10146	block_version "10.1.2"
10147	sg_icon_stat "45,44,1,1,white,blue,0,cc3303a0,right"
10148	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
10149	}
10150	Block {
10151	BlockType Reference
10152	Name "Reinterpret1"
10153	Ports [1, 1]
10154	Position [180, 382, 215, 398]
10155	ShowName off
10156	SourceBlock "xbsIndex_r4/Reinterpret"
10157	SourceType "Xilinx Type Reinterpreter Block"
10158	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
10159	force_arith_type on
10160	arith_type "Unsigned"
10161	force_bin_pt on
10162	bin_pt "0"
10163	has_advanced_control "0"
10164	sggui_pos "436,54,356,312"
10165	block_type "reinterpret"
10166	block_version "9.1.01"
10167	sg_icon_stat "35,16,1,1,white,blue,0,8982c1db,right"
10168	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
10169	}
10170	Block {
10171	BlockType Reference
10172	Name "Shared Memory"
10173	Ports [3, 1]
10174	Position [800, 323, 880, 517]
10175	AttributesFormatString "<< %<shared_memory_name> >>"
10176	SourceBlock "xbsIndex_r4/Shared Memory"
10177	SourceType "Xilinx Shared Memory Random Access Memory Block"
10178	shared_memory_name "'RSSIBuff_Radio2'"
10179	depth "2^11"
10180	ownership "Locally Owned and Initialized"
10181	initVector "0"
10182	mutex "Unprotected"
10183	mode "Read and Write"
10184	write_mode "Read After Write"
10185	time_out "0"
10186	latency "1"
10187	explicit_data_type on
10188	arith_type "Unsigned"
10189	n_bits "32"
10190	bin_pt "0"
10191	xl_use_area off
10192	xl_area "[0,0,0,0,0,0,0]"
10193	implementation "Block RAM"
10194	use_rpm "off"
10195	has_advanced_control "0"
10196	sggui_pos "20,20,384,381"
10197	block_type "shmem"
10198	block_version "10.1.2"
10199	sg_icon_stat "80,194,1,1,white,blue,0,e2c38f9a,right"
10200	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
10201	}
10202	Block {
10203	BlockType Terminator
10204	Name "Terminator2"
10205	Position [945, 410, 965, 430]
10206	ShowName off
10207	}
10208	Line {
10209	SrcBlock "RSSI"
10210	SrcPort 1
10211	DstBlock "Reinterpret1"
10212	DstPort 1
10213	}
10214	Line {
10215	SrcBlock "Convert"
10216	SrcPort 1
10217	Points [35, 0]
10218	Branch {
10219	DstBlock "Register"
10220	DstPort 1
10221	}
10222	Branch {
10223	Points [0, 50]
10224	DstBlock "Concat"
10225	DstPort 2
10226	}
10227	}
10228	Line {
10229	SrcBlock "Addr_14b"
10230	SrcPort 1
10231	Points [40, 0]
10232	Branch {
10233	DstBlock "11MSB"
10234	DstPort 1
10235	}
10236	Branch {
10237	Points [0, 55]
10238	DstBlock "BIT[2]"
10239	DstPort 1
10240	}
10241	}
10242	Line {
10243	SrcBlock "WE"
10244	SrcPort 1
10245	DstBlock "Shared Memory"
10246	DstPort 3
10247	}
10248	Line {
10249	SrcBlock "Reinterpret1"
10250	SrcPort 1
10251	DstBlock "Convert"
10252	DstPort 1
10253	}
10254	Line {
10255	SrcBlock "Concat"
10256	SrcPort 1
10257	DstBlock "Shared Memory"
10258	DstPort 2
10259	}
10260	Line {
10261	SrcBlock "BIT[2]"
10262	SrcPort 1
10263	DstBlock "Inverter"
10264	DstPort 1
10265	}
10266	Line {
10267	SrcBlock "11MSB"
10268	SrcPort 1
10269	DstBlock "Shared Memory"
10270	DstPort 1
10271	}
10272	Line {
10273	SrcBlock "Shared Memory"
10274	SrcPort 1
10275	DstBlock "Terminator2"
10276	DstPort 1
10277	}
10278	Line {
10279	SrcBlock "Register"
10280	SrcPort 1
10281	DstBlock "Concat"
10282	DstPort 1
10283	}
10284	Line {
10285	SrcBlock "Inverter"
10286	SrcPort 1
10287	DstBlock "Register"
10288	DstPort 2
10289	}
10290	}
10291	}
10292	Block {
10293	BlockType SubSystem
10294	Name "Radio 2 I/Q\nBuffer"
10295	Ports [3]
10296	Position [645, 118, 700, 222]
10297	MinAlgLoopOccurrences off
10298	PropExecContextOutsideSubsystem off
10299	RTWSystemCode "Auto"
10300	FunctionWithSeparateData off
10301	Opaque off
10302	RequestExecContextInheritance off
10303	MaskHideContents off
10304	System {
10305	Name "Radio 2 I/Q\nBuffer"
10306	Location [2, 74, 1270, 726]
10307	Open off
10308	ModelBrowserVisibility off
10309	ModelBrowserWidth 200
10310	ScreenColor "white"
10311	PaperOrientation "landscape"
10312	PaperPositionMode "auto"
10313	PaperType "usletter"
10314	PaperUnits "inches"
10315	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
10316	TiledPageScale 1
10317	ShowPageBoundaries off
10318	ZoomFactor "100"
10319	Block {
10320	BlockType Inport
10321	Name "Addr_14b"
10322	Position [205, 68, 235, 82]
10323	IconDisplay "Port number"
10324	OutDataType "sfix(16)"
10325	OutScaling "2^0"
10326	}
10327	Block {
10328	BlockType Inport
10329	Name "I/Q_32b"
10330	Position [205, 98, 235, 112]
10331	Port "2"
10332	IconDisplay "Port number"
10333	OutDataType "sfix(16)"
10334	OutScaling "2^0"
10335	}
10336	Block {
10337	BlockType Inport
10338	Name "WE"
10339	Position [205, 128, 235, 142]
10340	Port "3"
10341	IconDisplay "Port number"
10342	OutDataType "sfix(16)"
10343	OutScaling "2^0"
10344	}
10345	Block {
10346	BlockType Reference
10347	Name "Shared Memory"
10348	Ports [3, 1]
10349	Position [315, 60, 395, 150]
10350	AttributesFormatString "<< %<shared_memory_name> >>"
10351	SourceBlock "xbsIndex_r4/Shared Memory"
10352	SourceType "Xilinx Shared Memory Random Access Memory Block"
10353	shared_memory_name "'RxBuff_Radio2'"
10354	depth "2^14"
10355	ownership "Locally Owned and Initialized"
10356	initVector "0"
10357	mutex "Unprotected"
10358	mode "Read and Write"
10359	write_mode "Read After Write"
10360	time_out "0"
10361	latency "1"
10362	explicit_data_type on
10363	arith_type "Unsigned"
10364	n_bits "32"
10365	bin_pt "0"
10366	xl_use_area off
10367	xl_area "[0,0,0,0,0,0,0]"
10368	implementation "Block RAM"
10369	use_rpm "off"
10370	has_advanced_control "0"
10371	sggui_pos "20,20,384,381"
10372	block_type "shmem"
10373	block_version "10.1.2"
10374	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
10375	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
10376	}
10377	Block {
10378	BlockType Terminator
10379	Name "Terminator"
10380	Position [445, 95, 465, 115]
10381	ShowName off
10382	}
10383	Line {
10384	SrcBlock "Addr_14b"
10385	SrcPort 1
10386	DstBlock "Shared Memory"
10387	DstPort 1
10388	}
10389	Line {
10390	SrcBlock "I/Q_32b"
10391	SrcPort 1
10392	DstBlock "Shared Memory"
10393	DstPort 2
10394	}
10395	Line {
10396	SrcBlock "WE"
10397	SrcPort 1
10398	DstBlock "Shared Memory"
10399	DstPort 3
10400	}
10401	Line {
10402	SrcBlock "Shared Memory"
10403	SrcPort 1
10404	DstBlock "Terminator"
10405	DstPort 1
10406	}
10407	}
10408	}
10409	Block {
10410	BlockType Scope
10411	Name "Scope"
10412	Ports [2]
10413	Position [585, 14, 625, 96]
10414	Floating off
10415	Location [5, 49, 1285, 757]
10416	Open off
10417	NumInputPorts "2"
10418	ZoomMode "yonly"
10419	List {
10420	ListType AxesTitles
10421	axes1 "%<SignalLabel>"
10422	axes2 "%<SignalLabel>"
10423	}
10424	YMin "-5~-5"
10425	YMax "5~5"
10426	SaveName "ScopeData2"
10427	DataFormat "StructureWithTime"
10428	MaxDataPoints "40000"
10429	SampleTime "0"
10430	}
10431	Line {
10432	SrcBlock "Logical"
10433	SrcPort 1
10434	Points [45, 0]
10435	Branch {
10436	Points [105, 0]
10437	Branch {
10438	Points [0, -130]
10439	DstBlock "Gateway Out1"
10440	DstPort 1
10441	}
10442	Branch {
10443	Labels [0, 0]
10444	DstBlock "Radio 2 I/Q\nBuffer"
10445	DstPort 3
10446	}
10447	}
10448	Branch {
10449	Points [0, 150]
10450	DstBlock "Radio 2\nRSSI Buffer"
10451	DstPort 3
10452	}
10453	}
10454	Line {
10455	SrcBlock "Addr"
10456	SrcPort 1
10457	Points [75, 0]
10458	Branch {
10459	Points [0, -100]
10460	DstBlock "Gateway Out"
10461	DstPort 1
10462	}
10463	Branch {
10464	Labels [0, 0]
10465	DstBlock "Radio 2 I/Q\nBuffer"
10466	DstPort 1
10467	}
10468	Branch {
10469	Points [0, 150]
10470	DstBlock "Radio 2\nRSSI Buffer"
10471	DstPort 1
10472	}
10473	}
10474	Line {
10475	SrcBlock "WE"
10476	SrcPort 1
10477	DstBlock "Logical"
10478	DstPort 1
10479	}
10480	Line {
10481	SrcBlock "EN"
10482	SrcPort 1
10483	DstBlock "Convert1"
10484	DstPort 1
10485	}
10486	Line {
10487	SrcBlock "Convert1"
10488	SrcPort 1
10489	DstBlock "Logical"
10490	DstPort 2
10491	}
10492	Line {
10493	SrcBlock "I/Q"
10494	SrcPort 1
10495	DstBlock "Radio 2 I/Q\nBuffer"
10496	DstPort 2
10497	}
10498	Line {
10499	SrcBlock "Gateway Out"
10500	SrcPort 1
10501	DstBlock "Scope"
10502	DstPort 1
10503	}
10504	Line {
10505	SrcBlock "Gateway Out1"
10506	SrcPort 1
10507	DstBlock "Scope"
10508	DstPort 2
10509	}
10510	Line {
10511	SrcBlock "RSSI"
10512	SrcPort 1
10513	DstBlock "Radio 2\nRSSI Buffer"
10514	DstPort 2
10515	}
10516	}
10517	}
10518	Block {
10519	BlockType SubSystem
10520	Name "Radio 2\nTx Buffer"
10521	Ports [3, 1]
10522	Position [1015, 756, 1095, 814]
10523	MinAlgLoopOccurrences off
10524	PropExecContextOutsideSubsystem off
10525	RTWSystemCode "Auto"
10526	FunctionWithSeparateData off
10527	Opaque off
10528	RequestExecContextInheritance off
10529	MaskHideContents off
10530	System {
10531	Name "Radio 2\nTx Buffer"
10532	Location [2, 74, 827, 638]
10533	Open off
10534	ModelBrowserVisibility off
10535	ModelBrowserWidth 200
10536	ScreenColor "white"
10537	PaperOrientation "landscape"
10538	PaperPositionMode "auto"
10539	PaperType "usletter"
10540	PaperUnits "inches"
10541	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
10542	TiledPageScale 1
10543	ShowPageBoundaries off
10544	ZoomFactor "100"
10545	Block {
10546	BlockType Inport
10547	Name "RdAddr_14b"
10548	Position [355, 288, 385, 302]
10549	NamePlacement "alternate"
10550	IconDisplay "Port number"
10551	OutDataType "sfix(16)"
10552	OutScaling "2^0"
10553	}
10554	Block {
10555	BlockType Inport
10556	Name "Rst"
10557	Position [30, 173, 60, 187]
10558	Port "2"
10559	IconDisplay "Port number"
10560	OutDataType "sfix(16)"
10561	OutScaling "2^0"
10562	}
10563	Block {
10564	BlockType Inport
10565	Name "En"
10566	Position [30, 203, 60, 217]
10567	Port "3"
10568	IconDisplay "Port number"
10569	OutDataType "sfix(16)"
10570	OutScaling "2^0"
10571	}
10572	Block {
10573	BlockType Reference
10574	Name "Constant"
10575	Ports [0, 1]
10576	Position [630, 350, 655, 370]
10577	ShowName off
10578	SourceBlock "xbsIndex_r4/Constant"
10579	SourceType "Xilinx Constant Block Block"
10580	arith_type "Unsigned"
10581	const "0"
10582	n_bits "32"
10583	bin_pt "0"
10584	explicit_period off
10585	period "1"
10586	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
10587	equ "P=C"
10588	opselect "C"
10589	inp2 "PCIN>>17"
10590	opr "+"
10591	inp1 "P"
10592	carry "CIN"
10593	dbl_ovrd off
10594	has_advanced_control "0"
10595	sggui_pos "20,20,400,346"
10596	block_type "constant"
10597	block_version "10.1.2"
10598	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
10599	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
10600	}
10601	Block {
10602	BlockType Reference
10603	Name "Constant1"
10604	Ports [0, 1]
10605	Position [355, 345, 380, 365]
10606	ShowName off
10607	SourceBlock "xbsIndex_r4/Constant"
10608	SourceType "Xilinx Constant Block Block"
10609	arith_type "Boolean"
10610	const "0"
10611	n_bits "32"
10612	bin_pt "0"
10613	explicit_period off
10614	period "1"
10615	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
10616	equ "P=C"
10617	opselect "C"
10618	inp2 "PCIN>>17"
10619	opr "+"
10620	inp1 "P"
10621	carry "CIN"
10622	dbl_ovrd off
10623	has_advanced_control "0"
10624	sggui_pos "20,20,400,346"
10625	block_type "constant"
10626	block_version "10.1.2"
10627	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
10628	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
10629	}
10630	Block {
10631	BlockType Reference
10632	Name "Constant2"
10633	Ports [0, 1]
10634	Position [355, 315, 380, 335]
10635	ShowName off
10636	SourceBlock "xbsIndex_r4/Constant"
10637	SourceType "Xilinx Constant Block Block"
10638	arith_type "Unsigned"
10639	const "0"
10640	n_bits "32"
10641	bin_pt "0"
10642	explicit_period off
10643	period "1"
10644	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
10645	equ "P=C"
10646	opselect "C"
10647	inp2 "PCIN>>17"
10648	opr "+"
10649	inp1 "P"
10650	carry "CIN"
10651	dbl_ovrd off
10652	has_advanced_control "0"
10653	sggui_pos "20,20,400,346"
10654	block_type "constant"
10655	block_version "10.1.2"
10656	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
10657	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
10658	}
10659	Block {
10660	BlockType Reference
10661	Name "Convert"
10662	Ports [1, 1]
10663	Position [350, 188, 375, 202]
10664	ShowName off
10665	SourceBlock "xbsIndex_r4/Convert"
10666	SourceType "Xilinx Type Converter Block"
10667	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
10668	arith_type "Boolean"
10669	n_bits "16"
10670	bin_pt "14"
10671	quantization "Truncate"
10672	overflow "Wrap"
10673	latency "0"
10674	dbl_ovrd off
10675	pipeline off
10676	xl_use_area off
10677	xl_area "[0,0,0,0,0,0,0]"
10678	has_advanced_control "0"
10679	sggui_pos "20,20,374,375"
10680	block_type "convert"
10681	block_version "8.2"
10682	sg_icon_stat "25,14,1,1,white,blue,0,74901e60,right"
10683	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
10684	}
10685	Block {
10686	BlockType Reference
10687	Name "Convert1"
10688	Ports [1, 1]
10689	Position [100, 203, 120, 217]
10690	ShowName off
10691	SourceBlock "xbsIndex_r4/Convert"
10692	SourceType "Xilinx Type Converter Block"
10693	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
10694	arith_type "Boolean"
10695	n_bits "16"
10696	bin_pt "14"
10697	quantization "Truncate"
10698	overflow "Wrap"
10699	latency "0"
10700	dbl_ovrd off
10701	pipeline off
10702	xl_use_area off
10703	xl_area "[0,0,0,0,0,0,0]"
10704	has_advanced_control "0"
10705	sggui_pos "20,20,374,375"
10706	block_type "convert"
10707	block_version "8.2"
10708	sg_icon_stat "20,14,1,1,white,blue,0,74901e60,right"
10709	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
10710	}
10711	Block {
10712	BlockType Reference
10713	Name "Inverter"
10714	Ports [1, 1]
10715	Position [150, 201, 180, 219]
10716	SourceBlock "xbsIndex_r4/Inverter"
10717	SourceType "Xilinx Inverter Block"
10718	infoedit "Bitwise logical negation (one's complement) operator."
10719	en off
10720	latency "0"
10721	dbl_ovrd off
10722	xl_use_area off
10723	xl_area "[0,0,0,0,0,0,0]"
10724	has_advanced_control "0"
10725	sggui_pos "-1,-1,-1,-1"
10726	block_type "inv"
10727	block_version "9.1.01"
10728	sg_icon_stat "30,18,1,1,white,blue,0,1ab4a85f,right"
10729	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
10730	}
10731	Block {
10732	BlockType Reference
10733	Name "Logical"
10734	Ports [2, 1]
10735	Position [215, 165, 270, 225]
10736	SourceBlock "xbsIndex_r4/Logical"
10737	SourceType "Xilinx Logical Block Block"
10738	logical_function "OR"
10739	inputs "2"
10740	en off
10741	latency "0"
10742	precision "Full"
10743	arith_type "Unsigned"
10744	n_bits "16"
10745	bin_pt "0"
10746	align_bp on
10747	dbl_ovrd off
10748	xl_use_area off
10749	xl_area "[0,0,0,0,0,0,0]"
10750	has_advanced_control "0"
10751	sggui_pos "-1,-1,-1,-1"
10752	block_type "logical"
10753	block_version "9.1.01"
10754	sg_icon_stat "55,60,1,1,white,blue,0,f4a65842,right"
10755	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
10756	}
10757	Block {
10758	BlockType Reference
10759	Name "Mux"
10760	Ports [3, 1]
10761	Position [750, 273, 795, 377]
10762	SourceBlock "xbsIndex_r4/Mux"
10763	SourceType "Xilinx Bus Multiplexer Block"
10764	inputs "2"
10765	en off
10766	latency "0"
10767	precision "Full"
10768	arith_type "Unsigned"
10769	n_bits "16"
10770	bin_pt "14"
10771	quantization "Truncate"
10772	overflow "Wrap"
10773	dbl_ovrd off
10774	xl_use_area off
10775	xl_area "[0,0,0,0,0,0,0]"
10776	has_advanced_control "0"
10777	sggui_pos "20,20,348,303"
10778	block_type "mux"
10779	block_version "10.1.2"
10780	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
10781	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
10782	}
10783	Block {
10784	BlockType Reference
10785	Name "Shared Memory"
10786	Ports [3, 1]
10787	Position [445, 280, 525, 370]
10788	AttributesFormatString "<< %<shared_memory_name> >>"
10789	SourceBlock "xbsIndex_r4/Shared Memory"
10790	SourceType "Xilinx Shared Memory Random Access Memory Block"
10791	shared_memory_name "'TxBuff_Radio2'"
10792	depth "2^14"
10793	ownership "Locally Owned and Initialized"
10794	initVector "0"
10795	mutex "Unprotected"
10796	mode "Read and Write"
10797	write_mode "Read After Write"
10798	time_out "0"
10799	latency "1"
10800	explicit_data_type on
10801	arith_type "Unsigned"
10802	n_bits "32"
10803	bin_pt "0"
10804	xl_use_area off
10805	xl_area "[0,0,0,0,0,0,0]"
10806	implementation "Block RAM"
10807	use_rpm "off"
10808	has_advanced_control "0"
10809	sggui_pos "20,20,384,381"
10810	block_type "shmem"
10811	block_version "10.1.2"
10812	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
10813	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
10814	}
10815	Block {
10816	BlockType Outport
10817	Name "IQ_32b"
10818	Position [885, 318, 915, 332]
10819	IconDisplay "Port number"
10820	OutDataType "sfix(16)"
10821	OutScaling "2^0"
10822	}
10823	Line {
10824	SrcBlock "Logical"
10825	SrcPort 1
10826	DstBlock "Convert"
10827	DstPort 1
10828	}
10829	Line {
10830	SrcBlock "Convert"
10831	SrcPort 1
10832	Points [160, 0; 0, 95]
10833	DstBlock "Mux"
10834	DstPort 1
10835	}
10836	Line {
10837	SrcBlock "Rst"
10838	SrcPort 1
10839	DstBlock "Logical"
10840	DstPort 1
10841	}
10842	Line {
10843	SrcBlock "En"
10844	SrcPort 1
10845	DstBlock "Convert1"
10846	DstPort 1
10847	}
10848	Line {
10849	SrcBlock "Convert1"
10850	SrcPort 1
10851	DstBlock "Inverter"
10852	DstPort 1
10853	}
10854	Line {
10855	SrcBlock "Inverter"
10856	SrcPort 1
10857	DstBlock "Logical"
10858	DstPort 2
10859	}
10860	Line {
10861	SrcBlock "RdAddr_14b"
10862	SrcPort 1
10863	DstBlock "Shared Memory"
10864	DstPort 1
10865	}
10866	Line {
10867	SrcBlock "Constant"
10868	SrcPort 1
10869	DstBlock "Mux"
10870	DstPort 3
10871	}
10872	Line {
10873	SrcBlock "Shared Memory"
10874	SrcPort 1
10875	DstBlock "Mux"
10876	DstPort 2
10877	}
10878	Line {
10879	SrcBlock "Constant1"
10880	SrcPort 1
10881	DstBlock "Shared Memory"
10882	DstPort 3
10883	}
10884	Line {
10885	SrcBlock "Constant2"
10886	SrcPort 1
10887	DstBlock "Shared Memory"
10888	DstPort 2
10889	}
10890	Line {
10891	SrcBlock "Mux"
10892	SrcPort 1
10893	DstBlock "IQ_32b"
10894	DstPort 1
10895	}
10896	}
10897	}
10898	Block {
10899	BlockType SubSystem
10900	Name "Radio 2 Inputs"
10901	Ports [2, 2]
10902	Position [905, 178, 1085, 227]
10903	NamePlacement "alternate"
10904	MinAlgLoopOccurrences off
10905	PropExecContextOutsideSubsystem off
10906	RTWSystemCode "Auto"
10907	FunctionWithSeparateData off
10908	Opaque off
10909	RequestExecContextInheritance off
10910	MaskHideContents off
10911	System {
10912	Name "Radio 2 Inputs"
10913	Location [2, 74, 1014, 726]
10914	Open off
10915	ModelBrowserVisibility off
10916	ModelBrowserWidth 200
10917	ScreenColor "white"
10918	PaperOrientation "landscape"
10919	PaperPositionMode "auto"
10920	PaperType "usletter"
10921	PaperUnits "inches"
10922	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
10923	TiledPageScale 1
10924	ShowPageBoundaries off
10925	ZoomFactor "100"
10926	Block {
10927	BlockType Inport
10928	Name "DebugRxBuffers"
10929	Position [175, 243, 205, 257]
10930	IconDisplay "Port number"
10931	OutDataType "sfix(16)"
10932	OutScaling "2^0"
10933	}
10934	Block {
10935	BlockType Inport
10936	Name "MGCAGC_AGCDCO_SEL"
10937	Position [175, 333, 205, 347]
10938	Port "2"
10939	IconDisplay "Port number"
10940	OutDataType "sfix(16)"
10941	OutScaling "2^0"
10942	}
10943	Block {
10944	BlockType SubSystem
10945	Name "ADC I"
10946	Ports [2, 2]
10947	Position [440, 237, 595, 288]
10948	NamePlacement "alternate"
10949	MinAlgLoopOccurrences off
10950	PropExecContextOutsideSubsystem off
10951	RTWSystemCode "Auto"
10952	FunctionWithSeparateData off
10953	Opaque off
10954	RequestExecContextInheritance off
10955	MaskHideContents off
10956	System {
10957	Name "ADC I"
10958	Location [2, 74, 1014, 726]
10959	Open off
10960	ModelBrowserVisibility off
10961	ModelBrowserWidth 200
10962	ScreenColor "white"
10963	PaperOrientation "landscape"
10964	PaperPositionMode "auto"
10965	PaperType "usletter"
10966	PaperUnits "inches"
10967	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
10968	TiledPageScale 1
10969	ShowPageBoundaries off
10970	ZoomFactor "100"
10971	Block {
10972	BlockType Inport
10973	Name "Debug"
10974	Position [695, 53, 725, 67]
10975	IconDisplay "Port number"
10976	OutDataType "sfix(16)"
10977	OutScaling "2^0"
10978	}
10979	Block {
10980	BlockType Inport
10981	Name "MGCAGC_AGCDCO_SEL"
10982	Position [210, 243, 240, 257]
10983	Port "2"
10984	IconDisplay "Port number"
10985	OutDataType "sfix(16)"
10986	OutScaling "2^0"
10987	}
10988	Block {
10989	BlockType Constant
10990	Name "Constant1"
10991	Position [25, 320, 55, 350]
10992	ShowName off
10993	Value "0"
10994	OutDataType "sfix(16)"
10995	OutScaling "2^0"
10996	}
10997	Block {
10998	BlockType Reference
10999	Name "Counter"
11000	Ports [0, 1]
11001	Position [530, 340, 590, 400]
11002	SourceBlock "xbsIndex_r4/Counter"
11003	SourceType "Xilinx Counter Block"
11004	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
11005	cnt_type "Free Running"
11006	cnt_to "Inf"
11007	operation "Down"
11008	start_count "2^14-1"
11009	cnt_by_val "1"
11010	arith_type "Unsigned"
11011	n_bits "14"
11012	bin_pt "0"
11013	load_pin off
11014	rst off
11015	en off
11016	explicit_period "on"
11017	period "1"
11018	dbl_ovrd off
11019	use_behavioral_HDL off
11020	use_rpm off
11021	implementation "Fabric"
11022	xl_use_area off
11023	xl_area "[0,0,0,0,0,0,0]"
11024	has_advanced_control "0"
11025	sggui_pos "20,20,348,619"
11026	block_type "counter"
11027	block_version "10.1.3"
11028	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
11029	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
11030	}
11031	Block {
11032	BlockType Reference
11033	Name "FromAGC_Radio2_I"
11034	Ports [1, 1]
11035	Position [170, 425, 235, 445]
11036	SourceBlock "xbsIndex_r4/Gateway In"
11037	SourceType "Xilinx Gateway In Block"
11038	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
11039	arith_type "Signed (2's comp)"
11040	n_bits "14"
11041	bin_pt "13"
11042	quantization "Round (unbiased: +/- Inf)"
11043	overflow "Saturate"
11044	period "1"
11045	dbl_ovrd off
11046	timing_constraint "None"
11047	locs_specified off
11048	LOCs "{}"
11049	xl_use_area off
11050	xl_area "[0,0,0,0,0,0,0]"
11051	has_advanced_control "0"
11052	sggui_pos "20,20,348,406"
11053	block_type "gatewayin"
11054	block_version "10.1.3"
11055	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
11056	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
11057	}
11058	Block {
11059	BlockType Reference
11060	Name "Mux"
11061	Ports [3, 1]
11062	Position [830, 88, 875, 192]
11063	SourceBlock "xbsIndex_r4/Mux"
11064	SourceType "Xilinx Bus Multiplexer Block"
11065	inputs "2"
11066	en off
11067	latency "0"
11068	precision "Full"
11069	arith_type "Unsigned"
11070	n_bits "1"
11071	bin_pt "0"
11072	quantization "Truncate"
11073	overflow "Wrap"
11074	dbl_ovrd off
11075	xl_use_area off
11076	xl_area "[0,0,0,0,0,0,0]"
11077	has_advanced_control "0"
11078	sggui_pos "20,20,348,303"
11079	block_type "mux"
11080	block_version "10.1.3"
11081	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
11082	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
11083	}
11084	Block {
11085	BlockType Reference
11086	Name "Mux1"
11087	Ports [3, 1]
11088	Position [830, 283, 875, 387]
11089	SourceBlock "xbsIndex_r4/Mux"
11090	SourceType "Xilinx Bus Multiplexer Block"
11091	inputs "2"
11092	en off
11093	latency "0"
11094	precision "Full"
11095	arith_type "Unsigned"
11096	n_bits "1"
11097	bin_pt "0"
11098	quantization "Truncate"
11099	overflow "Wrap"
11100	dbl_ovrd off
11101	xl_use_area off
11102	xl_area "[0,0,0,0,0,0,0]"
11103	has_advanced_control "0"
11104	sggui_pos "20,20,348,303"
11105	block_type "mux"
11106	block_version "10.1.3"
11107	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
11108	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
11109	}
11110	Block {
11111	BlockType Reference
11112	Name "Mux2"
11113	Ports [3, 1]
11114	Position [355, 283, 400, 387]
11115	SourceBlock "xbsIndex_r4/Mux"
11116	SourceType "Xilinx Bus Multiplexer Block"
11117	inputs "2"
11118	en off
11119	latency "0"
11120	precision "Full"
11121	arith_type "Unsigned"
11122	n_bits "1"
11123	bin_pt "0"
11124	quantization "Truncate"
11125	overflow "Wrap"
11126	dbl_ovrd off
11127	xl_use_area off
11128	xl_area "[0,0,0,0,0,0,0]"
11129	has_advanced_control "0"
11130	sggui_pos "20,20,348,303"
11131	block_type "mux"
11132	block_version "10.1.3"
11133	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
11134	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
11135	}
11136	Block {
11137	BlockType Reference
11138	Name "Radio 2 ADC I"
11139	Ports [1, 1]
11140	Position [150, 314, 245, 356]
11141	LinkData {
11142	BlockName "radio2_adc_I"
11143	DialogParameters {
11144	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
11145	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
11146	}
11147	}
11148	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 2 ADC I"
11149	SourceType ""
11150	ShowPortLabels "FromPortIcon"
11151	SystemSampleTime "-1"
11152	FunctionWithSeparateData off
11153	RTWMemSecFuncInitTerm "Inherit from model"
11154	RTWMemSecFuncExecute "Inherit from model"
11155	RTWMemSecDataConstants "Inherit from model"
11156	RTWMemSecDataInternal "Inherit from model"
11157	RTWMemSecDataParameters "Inherit from model"
11158	samp_period "1"
11159	}
11160	Block {
11161	BlockType Reference
11162	Name "Register"
11163	Ports [1, 1]
11164	Position [460, 321, 495, 349]
11165	ShowName off
11166	SourceBlock "xbsIndex_r4/Register"
11167	SourceType "Xilinx Register Block"
11168	init "0"
11169	rst off
11170	en off
11171	dbl_ovrd off
11172	xl_use_area off
11173	xl_area "[0,0,0,0,0,0,0]"
11174	has_advanced_control "0"
11175	sggui_pos "-1,-1,-1,-1"
11176	block_type "register"
11177	block_version "8.2"
11178	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
11179	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
11180	}
11181	Block {
11182	BlockType Reference
11183	Name "Reinterpret"
11184	Ports [1, 1]
11185	Position [675, 354, 725, 386]
11186	SourceBlock "xbsIndex_r4/Reinterpret"
11187	SourceType "Xilinx Type Reinterpreter Block"
11188	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
11189	force_arith_type on
11190	arith_type "Signed (2's comp)"
11191	force_bin_pt on
11192	bin_pt "13"
11193	has_advanced_control "0"
11194	sggui_pos "20,20,336,312"
11195	block_type "reinterpret"
11196	block_version "10.1.3"
11197	sg_icon_stat "50,32,1,1,white,blue,0,8982c1db,right"
11198	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
11199	}
11200	Block {
11201	BlockType Reference
11202	Name "Slice"
11203	Ports [1, 1]
11204	Position [680, 160, 740, 190]
11205	SourceBlock "xbsIndex_r4/Slice"
11206	SourceType "Xilinx Bit Slice Extractor Block"
11207	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
11208	nbits "1"
11209	boolean_output off
11210	mode "Lower Bit Location + Width"
11211	bit1 "0"
11212	base1 "MSB of Input"
11213	bit0 "0"
11214	base0 "LSB of Input"
11215	dbl_ovrd off
11216	has_advanced_control "0"
11217	sggui_pos "20,20,449,376"
11218	block_type "slice"
11219	block_version "10.1.3"
11220	sg_icon_stat "60,30,1,1,white,blue,0,b1026674,right"
11221	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
11222	}
11223	Block {
11224	BlockType Reference
11225	Name "radio2_ADC_I_OTR"
11226	Ports [1, 1]
11227	Position [295, 134, 350, 146]
11228	NamePlacement "alternate"
11229	SourceBlock "xbsIndex_r4/Gateway In"
11230	SourceType "Xilinx Gateway In Block"
11231	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
11232	arith_type "Unsigned"
11233	n_bits "1"
11234	bin_pt "0"
11235	quantization "Round (unbiased: +/- Inf)"
11236	overflow "Saturate"
11237	period "1"
11238	dbl_ovrd off
11239	timing_constraint "None"
11240	locs_specified off
11241	LOCs "{}"
11242	xl_use_area off
11243	xl_area "[0,0,0,0,0,0,0]"
11244	has_advanced_control "0"
11245	sggui_pos "20,20,356,432"
11246	block_type "gatewayin"
11247	block_version "VER_STRING_GOES_HERE"
11248	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
11249	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
11250	}
11251	Block {
11252	BlockType Outport
11253	Name "OTR I"
11254	Position [935, 133, 965, 147]
11255	IconDisplay "Port number"
11256	OutDataType "sfix(16)"
11257	OutScaling "2^0"
11258	}
11259	Block {
11260	BlockType Outport
11261	Name "ADC I"
11262	Position [935, 328, 965, 342]
11263	Port "2"
11264	IconDisplay "Port number"
11265	OutDataType "sfix(16)"
11266	OutScaling "2^0"
11267	}
11268	Line {
11269	SrcBlock "Constant1"
11270	SrcPort 1
11271	Points [20, 0]
11272	Branch {
11273	Points [0, -195]
11274	DstBlock "radio2_ADC_I_OTR"
11275	DstPort 1
11276	}
11277	Branch {
11278	DstBlock "Radio 2 ADC I"
11279	DstPort 1
11280	}
11281	Branch {
11282	Points [0, 100]
11283	DstBlock "FromAGC_Radio2_I"
11284	DstPort 1
11285	}
11286	}
11287	Line {
11288	SrcBlock "Mux"
11289	SrcPort 1
11290	DstBlock "OTR I"
11291	DstPort 1
11292	}
11293	Line {
11294	SrcBlock "Debug"
11295	SrcPort 1
11296	Points [40, 0; 0, 45]
11297	Branch {
11298	DstBlock "Mux"
11299	DstPort 1
11300	}
11301	Branch {
11302	Points [0, 195]
11303	DstBlock "Mux1"
11304	DstPort 1
11305	}
11306	}
11307	Line {
11308	SrcBlock "radio2_ADC_I_OTR"
11309	SrcPort 1
11310	DstBlock "Mux"
11311	DstPort 2
11312	}
11313	Line {
11314	SrcBlock "Slice"
11315	SrcPort 1
11316	DstBlock "Mux"
11317	DstPort 3
11318	}
11319	Line {
11320	SrcBlock "Mux1"
11321	SrcPort 1
11322	DstBlock "ADC I"
11323	DstPort 1
11324	}
11325	Line {
11326	SrcBlock "Register"
11327	SrcPort 1
11328	DstBlock "Mux1"
11329	DstPort 2
11330	}
11331	Line {
11332	SrcBlock "Reinterpret"
11333	SrcPort 1
11334	DstBlock "Mux1"
11335	DstPort 3
11336	}
11337	Line {
11338	SrcBlock "Counter"
11339	SrcPort 1
11340	Points [25, 0]
11341	Branch {
11342	DstBlock "Reinterpret"
11343	DstPort 1
11344	}
11345	Branch {
11346	Points [0, -195]
11347	DstBlock "Slice"
11348	DstPort 1
11349	}
11350	}
11351	Line {
11352	SrcBlock "MGCAGC_AGCDCO_SEL"
11353	SrcPort 1
11354	Points [70, 0; 0, 50]
11355	DstBlock "Mux2"
11356	DstPort 1
11357	}
11358	Line {
11359	SrcBlock "FromAGC_Radio2_I"
11360	SrcPort 1
11361	Points [75, 0; 0, -65]
11362	DstBlock "Mux2"
11363	DstPort 3
11364	}
11365	Line {
11366	SrcBlock "Mux2"
11367	SrcPort 1
11368	DstBlock "Register"
11369	DstPort 1
11370	}
11371	Line {
11372	SrcBlock "Radio 2 ADC I"
11373	SrcPort 1
11374	DstBlock "Mux2"
11375	DstPort 2
11376	}
11377	}
11378	}
11379	Block {
11380	BlockType SubSystem
11381	Name "ADC Q"
11382	Ports [2, 2]
11383	Position [440, 304, 595, 351]
11384	MinAlgLoopOccurrences off
11385	PropExecContextOutsideSubsystem off
11386	RTWSystemCode "Auto"
11387	FunctionWithSeparateData off
11388	Opaque off
11389	RequestExecContextInheritance off
11390	MaskHideContents off
11391	System {
11392	Name "ADC Q"
11393	Location [66, 91, 1078, 743]
11394	Open off
11395	ModelBrowserVisibility off
11396	ModelBrowserWidth 200
11397	ScreenColor "white"
11398	PaperOrientation "landscape"
11399	PaperPositionMode "auto"
11400	PaperType "usletter"
11401	PaperUnits "inches"
11402	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
11403	TiledPageScale 1
11404	ShowPageBoundaries off
11405	ZoomFactor "100"
11406	Block {
11407	BlockType Inport
11408	Name "Debug"
11409	Position [670, 43, 700, 57]
11410	IconDisplay "Port number"
11411	OutDataType "sfix(16)"
11412	OutScaling "2^0"
11413	}
11414	Block {
11415	BlockType Inport
11416	Name "MGCAGC_AGCDCO_SEL"
11417	Position [135, 233, 165, 247]
11418	Port "2"
11419	IconDisplay "Port number"
11420	OutDataType "sfix(16)"
11421	OutScaling "2^0"
11422	}
11423	Block {
11424	BlockType Constant
11425	Name "Constant1"
11426	Position [15, 310, 45, 340]
11427	ShowName off
11428	Value "0"
11429	OutDataType "sfix(16)"
11430	OutScaling "2^0"
11431	}
11432	Block {
11433	BlockType Reference
11434	Name "Counter"
11435	Ports [0, 1]
11436	Position [500, 330, 560, 390]
11437	SourceBlock "xbsIndex_r4/Counter"
11438	SourceType "Xilinx Counter Block"
11439	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
11440	cnt_type "Free Running"
11441	cnt_to "Inf"
11442	operation "Up"
11443	start_count "0"
11444	cnt_by_val "1"
11445	arith_type "Unsigned"
11446	n_bits "14"
11447	bin_pt "0"
11448	load_pin off
11449	rst off
11450	en off
11451	explicit_period "on"
11452	period "1"
11453	dbl_ovrd off
11454	use_behavioral_HDL off
11455	use_rpm off
11456	implementation "Fabric"
11457	xl_use_area off
11458	xl_area "[0,0,0,0,0,0,0]"
11459	has_advanced_control "0"
11460	sggui_pos "20,20,348,619"
11461	block_type "counter"
11462	block_version "10.1.3"
11463	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
11464	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
11465	}
11466	Block {
11467	BlockType Reference
11468	Name "FromAGC_Radio2_Q"
11469	Ports [1, 1]
11470	Position [120, 415, 185, 435]
11471	SourceBlock "xbsIndex_r4/Gateway In"
11472	SourceType "Xilinx Gateway In Block"
11473	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
11474	arith_type "Signed (2's comp)"
11475	n_bits "14"
11476	bin_pt "13"
11477	quantization "Round (unbiased: +/- Inf)"
11478	overflow "Saturate"
11479	period "1"
11480	dbl_ovrd off
11481	timing_constraint "None"
11482	locs_specified off
11483	LOCs "{}"
11484	xl_use_area off
11485	xl_area "[0,0,0,0,0,0,0]"
11486	has_advanced_control "0"
11487	sggui_pos "20,20,348,406"
11488	block_type "gatewayin"
11489	block_version "10.1.3"
11490	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
11491	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
11492	}
11493	Block {
11494	BlockType Reference
11495	Name "Mux"
11496	Ports [3, 1]
11497	Position [805, 78, 850, 182]
11498	SourceBlock "xbsIndex_r4/Mux"
11499	SourceType "Xilinx Bus Multiplexer Block"
11500	inputs "2"
11501	en off
11502	latency "0"
11503	precision "Full"
11504	arith_type "Unsigned"
11505	n_bits "1"
11506	bin_pt "0"
11507	quantization "Truncate"
11508	overflow "Wrap"
11509	dbl_ovrd off
11510	xl_use_area off
11511	xl_area "[0,0,0,0,0,0,0]"
11512	has_advanced_control "0"
11513	sggui_pos "20,20,348,303"
11514	block_type "mux"
11515	block_version "10.1.3"
11516	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
11517	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
11518	}
11519	Block {
11520	BlockType Reference
11521	Name "Mux1"
11522	Ports [3, 1]
11523	Position [805, 273, 850, 377]
11524	SourceBlock "xbsIndex_r4/Mux"
11525	SourceType "Xilinx Bus Multiplexer Block"
11526	inputs "2"
11527	en off
11528	latency "0"
11529	precision "Full"
11530	arith_type "Unsigned"
11531	n_bits "1"
11532	bin_pt "0"
11533	quantization "Truncate"
11534	overflow "Wrap"
11535	dbl_ovrd off
11536	xl_use_area off
11537	xl_area "[0,0,0,0,0,0,0]"
11538	has_advanced_control "0"
11539	sggui_pos "20,20,348,303"
11540	block_type "mux"
11541	block_version "10.1.3"
11542	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
11543	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
11544	}
11545	Block {
11546	BlockType Reference
11547	Name "Mux2"
11548	Ports [3, 1]
11549	Position [280, 273, 325, 377]
11550	SourceBlock "xbsIndex_r4/Mux"
11551	SourceType "Xilinx Bus Multiplexer Block"
11552	inputs "2"
11553	en off
11554	latency "0"
11555	precision "Full"
11556	arith_type "Unsigned"
11557	n_bits "1"
11558	bin_pt "0"
11559	quantization "Truncate"
11560	overflow "Wrap"
11561	dbl_ovrd off
11562	xl_use_area off
11563	xl_area "[0,0,0,0,0,0,0]"
11564	has_advanced_control "0"
11565	sggui_pos "20,20,348,303"
11566	block_type "mux"
11567	block_version "10.1.3"
11568	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
11569	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
11570	}
11571	Block {
11572	BlockType Reference
11573	Name "Radio 2 ADC Q"
11574	Ports [1, 1]
11575	Position [100, 304, 195, 346]
11576	LinkData {
11577	BlockName "radio2_adc_Q"
11578	DialogParameters {
11579	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
11580	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
11581	}
11582	}
11583	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 2 ADC Q"
11584	SourceType ""
11585	ShowPortLabels "FromPortIcon"
11586	SystemSampleTime "-1"
11587	FunctionWithSeparateData off
11588	RTWMemSecFuncInitTerm "Inherit from model"
11589	RTWMemSecFuncExecute "Inherit from model"
11590	RTWMemSecDataConstants "Inherit from model"
11591	RTWMemSecDataInternal "Inherit from model"
11592	RTWMemSecDataParameters "Inherit from model"
11593	samp_period "1"
11594	}
11595	Block {
11596	BlockType Reference
11597	Name "Register"
11598	Ports [1, 1]
11599	Position [430, 311, 465, 339]
11600	ShowName off
11601	SourceBlock "xbsIndex_r4/Register"
11602	SourceType "Xilinx Register Block"
11603	init "0"
11604	rst off
11605	en off
11606	dbl_ovrd off
11607	xl_use_area off
11608	xl_area "[0,0,0,0,0,0,0]"
11609	has_advanced_control "0"
11610	sggui_pos "-1,-1,-1,-1"
11611	block_type "register"
11612	block_version "8.2"
11613	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
11614	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
11615	}
11616	Block {
11617	BlockType Reference
11618	Name "Reinterpret"
11619	Ports [1, 1]
11620	Position [650, 344, 700, 376]
11621	SourceBlock "xbsIndex_r4/Reinterpret"
11622	SourceType "Xilinx Type Reinterpreter Block"
11623	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
11624	force_arith_type on
11625	arith_type "Signed (2's comp)"
11626	force_bin_pt on
11627	bin_pt "13"
11628	has_advanced_control "0"
11629	sggui_pos "20,20,336,312"
11630	block_type "reinterpret"
11631	block_version "10.1.3"
11632	sg_icon_stat "50,32,1,1,white,blue,0,8982c1db,right"
11633	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
11634	}
11635	Block {
11636	BlockType Reference
11637	Name "Slice"
11638	Ports [1, 1]
11639	Position [655, 150, 715, 180]
11640	SourceBlock "xbsIndex_r4/Slice"
11641	SourceType "Xilinx Bit Slice Extractor Block"
11642	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
11643	nbits "1"
11644	boolean_output off
11645	mode "Lower Bit Location + Width"
11646	bit1 "0"
11647	base1 "MSB of Input"
11648	bit0 "0"
11649	base0 "LSB of Input"
11650	dbl_ovrd off
11651	has_advanced_control "0"
11652	sggui_pos "20,20,449,376"
11653	block_type "slice"
11654	block_version "10.1.3"
11655	sg_icon_stat "60,30,1,1,white,blue,0,b1026674,right"
11656	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
11657	}
11658	Block {
11659	BlockType Reference
11660	Name "radio2_ADC_Q_OTR"
11661	Ports [1, 1]
11662	Position [240, 124, 295, 136]
11663	SourceBlock "xbsIndex_r4/Gateway In"
11664	SourceType "Xilinx Gateway In Block"
11665	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
11666	arith_type "Unsigned"
11667	n_bits "1"
11668	bin_pt "0"
11669	quantization "Round (unbiased: +/- Inf)"
11670	overflow "Saturate"
11671	period "1"
11672	dbl_ovrd off
11673	timing_constraint "None"
11674	locs_specified off
11675	LOCs "{}"
11676	xl_use_area off
11677	xl_area "[0,0,0,0,0,0,0]"
11678	has_advanced_control "0"
11679	sggui_pos "20,20,356,432"
11680	block_type "gatewayin"
11681	block_version "VER_STRING_GOES_HERE"
11682	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
11683	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
11684	}
11685	Block {
11686	BlockType Outport
11687	Name "OTR Q"
11688	Position [945, 123, 975, 137]
11689	IconDisplay "Port number"
11690	OutDataType "sfix(16)"
11691	OutScaling "2^0"
11692	}
11693	Block {
11694	BlockType Outport
11695	Name "ADC Q"
11696	Position [945, 318, 975, 332]
11697	Port "2"
11698	IconDisplay "Port number"
11699	OutDataType "sfix(16)"
11700	OutScaling "2^0"
11701	}
11702	Line {
11703	SrcBlock "Constant1"
11704	SrcPort 1
11705	Points [10, 0]
11706	Branch {
11707	Points [0, 0]
11708	Branch {
11709	Points [0, 0; 0, -195]
11710	DstBlock "radio2_ADC_Q_OTR"
11711	DstPort 1
11712	}
11713	Branch {
11714	DstBlock "Radio 2 ADC Q"
11715	DstPort 1
11716	}
11717	}
11718	Branch {
11719	Points [0, 100]
11720	DstBlock "FromAGC_Radio2_Q"
11721	DstPort 1
11722	}
11723	}
11724	Line {
11725	SrcBlock "Mux"
11726	SrcPort 1
11727	DstBlock "OTR Q"
11728	DstPort 1
11729	}
11730	Line {
11731	SrcBlock "Debug"
11732	SrcPort 1
11733	Points [40, 0; 0, 45]
11734	Branch {
11735	DstBlock "Mux"
11736	DstPort 1
11737	}
11738	Branch {
11739	Points [0, 195]
11740	DstBlock "Mux1"
11741	DstPort 1
11742	}
11743	}
11744	Line {
11745	SrcBlock "radio2_ADC_Q_OTR"
11746	SrcPort 1
11747	DstBlock "Mux"
11748	DstPort 2
11749	}
11750	Line {
11751	SrcBlock "Slice"
11752	SrcPort 1
11753	DstBlock "Mux"
11754	DstPort 3
11755	}
11756	Line {
11757	SrcBlock "Mux1"
11758	SrcPort 1
11759	DstBlock "ADC Q"
11760	DstPort 1
11761	}
11762	Line {
11763	SrcBlock "Register"
11764	SrcPort 1
11765	DstBlock "Mux1"
11766	DstPort 2
11767	}
11768	Line {
11769	SrcBlock "Reinterpret"
11770	SrcPort 1
11771	DstBlock "Mux1"
11772	DstPort 3
11773	}
11774	Line {
11775	SrcBlock "Counter"
11776	SrcPort 1
11777	Points [30, 0]
11778	Branch {
11779	DstBlock "Reinterpret"
11780	DstPort 1
11781	}
11782	Branch {
11783	Points [0, -195]
11784	DstBlock "Slice"
11785	DstPort 1
11786	}
11787	}
11788	Line {
11789	SrcBlock "MGCAGC_AGCDCO_SEL"
11790	SrcPort 1
11791	Points [70, 0; 0, 50]
11792	DstBlock "Mux2"
11793	DstPort 1
11794	}
11795	Line {
11796	SrcBlock "FromAGC_Radio2_Q"
11797	SrcPort 1
11798	Points [50, 0; 0, -65]
11799	DstBlock "Mux2"
11800	DstPort 3
11801	}
11802	Line {
11803	SrcBlock "Radio 2 ADC Q"
11804	SrcPort 1
11805	DstBlock "Mux2"
11806	DstPort 2
11807	}
11808	Line {
11809	SrcBlock "Mux2"
11810	SrcPort 1
11811	DstBlock "Register"
11812	DstPort 1
11813	}
11814	}
11815	}
11816	Block {
11817	BlockType SubSystem
11818	Name "Concatenates_1"
11819	Ports [4, 1]
11820	Position [695, 218, 740, 372]
11821	NamePlacement "alternate"
11822	MinAlgLoopOccurrences off
11823	PropExecContextOutsideSubsystem off
11824	RTWSystemCode "Auto"
11825	FunctionWithSeparateData off
11826	Opaque off
11827	RequestExecContextInheritance off
11828	MaskHideContents off
11829	System {
11830	Name "Concatenates_1"
11831	Location [2, 74, 1270, 726]
11832	Open off
11833	ModelBrowserVisibility off
11834	ModelBrowserWidth 200
11835	ScreenColor "white"
11836	PaperOrientation "landscape"
11837	PaperPositionMode "auto"
11838	PaperType "usletter"
11839	PaperUnits "inches"
11840	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
11841	TiledPageScale 1
11842	ShowPageBoundaries off
11843	ZoomFactor "100"
11844	Block {
11845	BlockType Inport
11846	Name "OTR_I"
11847	Position [395, 43, 425, 57]
11848	IconDisplay "Port number"
11849	OutDataType "sfix(16)"
11850	OutScaling "2^0"
11851	}
11852	Block {
11853	BlockType Inport
11854	Name "ADC_I"
11855	Position [330, 93, 360, 107]
11856	Port "2"
11857	IconDisplay "Port number"
11858	OutDataType "sfix(16)"
11859	OutScaling "2^0"
11860	}
11861	Block {
11862	BlockType Inport
11863	Name "OTR_Q"
11864	Position [390, 163, 420, 177]
11865	Port "3"
11866	IconDisplay "Port number"
11867	OutDataType "sfix(16)"
11868	OutScaling "2^0"
11869	}
11870	Block {
11871	BlockType Inport
11872	Name "ADC_Q"
11873	Position [330, 213, 360, 227]
11874	Port "4"
11875	IconDisplay "Port number"
11876	OutDataType "sfix(16)"
11877	OutScaling "2^0"
11878	}
11879	Block {
11880	BlockType Reference
11881	Name "Concat1"
11882	Ports [2, 1]
11883	Position [490, 191, 520, 229]
11884	ShowName off
11885	SourceBlock "xbsIndex_r4/Concat"
11886	SourceType "Xilinx Bus Concatenator Block"
11887	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
11888	num_inputs "2"
11889	dbl_ovrd off
11890	has_advanced_control "0"
11891	sggui_pos "-1,-1,-1,-1"
11892	block_type "concat"
11893	block_version "8.2"
11894	sg_icon_stat "30,38,1,1,white,blue,0,df1e5aba,right"
11895	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
11896	}
11897	Block {
11898	BlockType Reference
11899	Name "Concat2"
11900	Ports [2, 1]
11901	Position [490, 71, 520, 109]
11902	ShowName off
11903	SourceBlock "xbsIndex_r4/Concat"
11904	SourceType "Xilinx Bus Concatenator Block"
11905	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
11906	num_inputs "2"
11907	dbl_ovrd off
11908	has_advanced_control "0"
11909	sggui_pos "-1,-1,-1,-1"
11910	block_type "concat"
11911	block_version "8.2"
11912	sg_icon_stat "30,38,1,1,white,blue,0,df1e5aba,right"
11913	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
11914	}
11915	Block {
11916	BlockType Reference
11917	Name "Concat3"
11918	Ports [2, 1]
11919	Position [550, 150, 575, 230]
11920	ShowName off
11921	SourceBlock "xbsIndex_r4/Concat"
11922	SourceType "Xilinx Bus Concatenator Block"
11923	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
11924	num_inputs "2"
11925	dbl_ovrd off
11926	has_advanced_control "0"
11927	sggui_pos "-1,-1,-1,-1"
11928	block_type "concat"
11929	block_version "8.2"
11930	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
11931	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
11932	}
11933	Block {
11934	BlockType Reference
11935	Name "Concat4"
11936	Ports [2, 1]
11937	Position [550, 30, 575, 110]
11938	ShowName off
11939	SourceBlock "xbsIndex_r4/Concat"
11940	SourceType "Xilinx Bus Concatenator Block"
11941	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
11942	num_inputs "2"
11943	dbl_ovrd off
11944	has_advanced_control "0"
11945	sggui_pos "-1,-1,-1,-1"
11946	block_type "concat"
11947	block_version "8.2"
11948	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
11949	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
11950	}
11951	Block {
11952	BlockType Reference
11953	Name "Concat5"
11954	Ports [2, 1]
11955	Position [635, 50, 660, 130]
11956	ShowName off
11957	SourceBlock "xbsIndex_r4/Concat"
11958	SourceType "Xilinx Bus Concatenator Block"
11959	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
11960	num_inputs "2"
11961	dbl_ovrd off
11962	has_advanced_control "0"
11963	sggui_pos "-1,-1,-1,-1"
11964	block_type "concat"
11965	block_version "8.2"
11966	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
11967	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
11968	}
11969	Block {
11970	BlockType Reference
11971	Name "Reinterpret"
11972	Ports [1, 1]
11973	Position [385, 90, 420, 110]
11974	ShowName off
11975	SourceBlock "xbsIndex_r4/Reinterpret"
11976	SourceType "Xilinx Type Reinterpreter Block"
11977	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
11978	force_arith_type on
11979	arith_type "Unsigned"
11980	force_bin_pt on
11981	bin_pt "0"
11982	has_advanced_control "0"
11983	sggui_pos "20,20,356,309"
11984	block_type "reinterpret"
11985	block_version "8.2"
11986	sg_icon_stat "35,20,1,1,white,blue,0,8982c1db,right"
11987	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
11988	}
11989	Block {
11990	BlockType Reference
11991	Name "Reinterpret1"
11992	Ports [1, 1]
11993	Position [390, 210, 425, 230]
11994	ShowName off
11995	SourceBlock "xbsIndex_r4/Reinterpret"
11996	SourceType "Xilinx Type Reinterpreter Block"
11997	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
11998	force_arith_type on
11999	arith_type "Unsigned"
12000	force_bin_pt on
12001	bin_pt "0"
12002	has_advanced_control "0"
12003	sggui_pos "20,20,356,309"
12004	block_type "reinterpret"
12005	block_version "8.2"
12006	sg_icon_stat "35,20,1,1,white,blue,0,8982c1db,right"
12007	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
12008	}
12009	Block {
12010	BlockType Reference
12011	Name "zero"
12012	Ports [0, 1]
12013	Position [440, 191, 460, 209]
12014	ShowName off
12015	SourceBlock "xbsIndex_r4/Constant"
12016	SourceType "Xilinx Constant Block Block"
12017	arith_type "Unsigned"
12018	const "0"
12019	n_bits "1"
12020	bin_pt "0"
12021	explicit_period off
12022	period "1"
12023	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
12024	equ "P=C"
12025	opselect "C"
12026	inp2 "PCIN>>17"
12027	opr "+"
12028	inp1 "P"
12029	carry "CIN"
12030	dbl_ovrd off
12031	has_advanced_control "0"
12032	sggui_pos "-1,-1,-1,-1"
12033	block_type "constant"
12034	block_version "VER_STRING_GOES_HERE"
12035	sg_icon_stat "20,18,1,1,white,blue,0,72d575a1,right"
12036	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
12037	}
12038	Block {
12039	BlockType Reference
12040	Name "zero1"
12041	Ports [0, 1]
12042	Position [440, 71, 460, 89]
12043	ShowName off
12044	SourceBlock "xbsIndex_r4/Constant"
12045	SourceType "Xilinx Constant Block Block"
12046	arith_type "Unsigned"
12047	const "0"
12048	n_bits "1"
12049	bin_pt "0"
12050	explicit_period off
12051	period "1"
12052	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
12053	equ "P=C"
12054	opselect "C"
12055	inp2 "PCIN>>17"
12056	opr "+"
12057	inp1 "P"
12058	carry "CIN"
12059	dbl_ovrd off
12060	has_advanced_control "0"
12061	sggui_pos "-1,-1,-1,-1"
12062	block_type "constant"
12063	block_version "VER_STRING_GOES_HERE"
12064	sg_icon_stat "20,18,1,1,white,blue,0,72d575a1,right"
12065	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
12066	}
12067	Block {
12068	BlockType Outport
12069	Name "32b"
12070	Position [685, 83, 715, 97]
12071	IconDisplay "Port number"
12072	OutDataType "sfix(16)"
12073	OutScaling "2^0"
12074	}
12075	Line {
12076	SrcBlock "Reinterpret1"
12077	SrcPort 1
12078	DstBlock "Concat1"
12079	DstPort 2
12080	}
12081	Line {
12082	SrcBlock "Reinterpret"
12083	SrcPort 1
12084	DstBlock "Concat2"
12085	DstPort 2
12086	}
12087	Line {
12088	SrcBlock "ADC_Q"
12089	SrcPort 1
12090	DstBlock "Reinterpret1"
12091	DstPort 1
12092	}
12093	Line {
12094	SrcBlock "OTR_Q"
12095	SrcPort 1
12096	DstBlock "Concat3"
12097	DstPort 1
12098	}
12099	Line {
12100	SrcBlock "ADC_I"
12101	SrcPort 1
12102	DstBlock "Reinterpret"
12103	DstPort 1
12104	}
12105	Line {
12106	SrcBlock "Concat5"
12107	SrcPort 1
12108	DstBlock "32b"
12109	DstPort 1
12110	}
12111	Line {
12112	SrcBlock "OTR_I"
12113	SrcPort 1
12114	DstBlock "Concat4"
12115	DstPort 1
12116	}
12117	Line {
12118	SrcBlock "Concat3"
12119	SrcPort 1
12120	Points [25, 0; 0, -80]
12121	DstBlock "Concat5"
12122	DstPort 2
12123	}
12124	Line {
12125	SrcBlock "Concat4"
12126	SrcPort 1
12127	DstBlock "Concat5"
12128	DstPort 1
12129	}
12130	Line {
12131	SrcBlock "Concat2"
12132	SrcPort 1
12133	Points [0, 0]
12134	DstBlock "Concat4"
12135	DstPort 2
12136	}
12137	Line {
12138	SrcBlock "zero1"
12139	SrcPort 1
12140	DstBlock "Concat2"
12141	DstPort 1
12142	}
12143	Line {
12144	SrcBlock "Concat1"
12145	SrcPort 1
12146	DstBlock "Concat3"
12147	DstPort 2
12148	}
12149	Line {
12150	SrcBlock "zero"
12151	SrcPort 1
12152	DstBlock "Concat1"
12153	DstPort 1
12154	}
12155	}
12156	}
12157	Block {
12158	BlockType Reference
12159	Name "Gateway Out1"
12160	Ports [1, 1]
12161	Position [710, 135, 740, 145]
12162	ShowName off
12163	SourceBlock "xbsIndex_r4/Gateway Out"
12164	SourceType "Xilinx Gateway Out Block"
12165	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
12166	hdl_port off
12167	timing_constraint "None"
12168	locs_specified off
12169	LOCs "{}"
12170	xl_use_area off
12171	xl_area "[0,0,0,0,0,0,0]"
12172	has_advanced_control "0"
12173	sggui_pos "20,20,336,386"
12174	block_type "gatewayout"
12175	block_version "10.1.2"
12176	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
12177	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
12178	}
12179	Block {
12180	BlockType Reference
12181	Name "Gateway Out4"
12182	Ports [1, 1]
12183	Position [710, 120, 740, 130]
12184	ShowName off
12185	SourceBlock "xbsIndex_r4/Gateway Out"
12186	SourceType "Xilinx Gateway Out Block"
12187	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
12188	hdl_port off
12189	timing_constraint "None"
12190	locs_specified off
12191	LOCs "{}"
12192	xl_use_area off
12193	xl_area "[0,0,0,0,0,0,0]"
12194	has_advanced_control "0"
12195	sggui_pos "20,20,336,386"
12196	block_type "gatewayout"
12197	block_version "10.1.2"
12198	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
12199	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
12200	}
12201	Block {
12202	BlockType SubSystem
12203	Name "RSSI"
12204	Ports [1, 1]
12205	Position [490, 392, 560, 428]
12206	MinAlgLoopOccurrences off
12207	PropExecContextOutsideSubsystem off
12208	RTWSystemCode "Auto"
12209	FunctionWithSeparateData off
12210	Opaque off
12211	RequestExecContextInheritance off
12212	MaskHideContents off
12213	System {
12214	Name "RSSI"
12215	Location [2, 74, 1184, 726]
12216	Open off
12217	ModelBrowserVisibility off
12218	ModelBrowserWidth 200
12219	ScreenColor "white"
12220	PaperOrientation "landscape"
12221	PaperPositionMode "auto"
12222	PaperType "usletter"
12223	PaperUnits "inches"
12224	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
12225	TiledPageScale 1
12226	ShowPageBoundaries off
12227	ZoomFactor "100"
12228	Block {
12229	BlockType Inport
12230	Name "Debug"
12231	Position [465, 28, 495, 42]
12232	IconDisplay "Port number"
12233	OutDataType "sfix(16)"
12234	OutScaling "2^0"
12235	}
12236	Block {
12237	BlockType Constant
12238	Name "Constant1"
12239	Position [160, 100, 190, 130]
12240	ShowName off
12241	Value "0"
12242	OutDataType "sfix(16)"
12243	OutScaling "2^0"
12244	}
12245	Block {
12246	BlockType Reference
12247	Name "Counter"
12248	Ports [0, 1]
12249	Position [380, 120, 440, 180]
12250	SourceBlock "xbsIndex_r4/Counter"
12251	SourceType "Xilinx Counter Block"
12252	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
12253	cnt_type "Free Running"
12254	cnt_to "Inf"
12255	operation "Up"
12256	start_count "0"
12257	cnt_by_val "1"
12258	arith_type "Unsigned"
12259	n_bits "10"
12260	bin_pt "0"
12261	load_pin off
12262	rst off
12263	en off
12264	explicit_period "on"
12265	period "1"
12266	dbl_ovrd off
12267	use_behavioral_HDL off
12268	use_rpm off
12269	implementation "Fabric"
12270	xl_use_area off
12271	xl_area "[0,0,0,0,0,0,0]"
12272	has_advanced_control "0"
12273	sggui_pos "20,20,348,619"
12274	block_type "counter"
12275	block_version "10.1.3"
12276	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
12277	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
12278	}
12279	Block {
12280	BlockType Reference
12281	Name "Mux"
12282	Ports [3, 1]
12283	Position [600, 63, 645, 167]
12284	SourceBlock "xbsIndex_r4/Mux"
12285	SourceType "Xilinx Bus Multiplexer Block"
12286	inputs "2"
12287	en off
12288	latency "0"
12289	precision "Full"
12290	arith_type "Unsigned"
12291	n_bits "1"
12292	bin_pt "0"
12293	quantization "Truncate"
12294	overflow "Wrap"
12295	dbl_ovrd off
12296	xl_use_area off
12297	xl_area "[0,0,0,0,0,0,0]"
12298	has_advanced_control "0"
12299	sggui_pos "20,20,348,303"
12300	block_type "mux"
12301	block_version "10.1.3"
12302	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
12303	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
12304	}
12305	Block {
12306	BlockType Reference
12307	Name "radio2_RSSI"
12308	Ports [1, 1]
12309	Position [280, 109, 335, 121]
12310	NamePlacement "alternate"
12311	SourceBlock "xbsIndex_r4/Gateway In"
12312	SourceType "Xilinx Gateway In Block"
12313	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
12314	arith_type "Unsigned"
12315	n_bits "10"
12316	bin_pt "0"
12317	quantization "Truncate"
12318	overflow "Wrap"
12319	period "1"
12320	dbl_ovrd off
12321	timing_constraint "None"
12322	locs_specified off
12323	LOCs "{}"
12324	xl_use_area off
12325	xl_area "[0,0,0,0,0,0,0]"
12326	has_advanced_control "0"
12327	sggui_pos "20,20,356,432"
12328	block_type "gatewayin"
12329	block_version "VER_STRING_GOES_HERE"
12330	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
12331	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
12332	}
12333	Block {
12334	BlockType Outport
12335	Name "RSSI"
12336	Position [740, 108, 770, 122]
12337	IconDisplay "Port number"
12338	OutDataType "sfix(16)"
12339	OutScaling "2^0"
12340	}
12341	Line {
12342	SrcBlock "Constant1"
12343	SrcPort 1
12344	DstBlock "radio2_RSSI"
12345	DstPort 1
12346	}
12347	Line {
12348	SrcBlock "Debug"
12349	SrcPort 1
12350	Points [40, 0; 0, 45]
12351	DstBlock "Mux"
12352	DstPort 1
12353	}
12354	Line {
12355	SrcBlock "radio2_RSSI"
12356	SrcPort 1
12357	DstBlock "Mux"
12358	DstPort 2
12359	}
12360	Line {
12361	SrcBlock "Counter"
12362	SrcPort 1
12363	DstBlock "Mux"
12364	DstPort 3
12365	}
12366	Line {
12367	SrcBlock "Mux"
12368	SrcPort 1
12369	DstBlock "RSSI"
12370	DstPort 1
12371	}
12372	}
12373	}
12374	Block {
12375	BlockType Scope
12376	Name "Scope"
12377	Ports [2]
12378	Position [800, 111, 830, 164]
12379	Floating off
12380	Location [5, 34, 1285, 912]
12381	Open off
12382	NumInputPorts "2"
12383	List {
12384	ListType AxesTitles
12385	axes1 "%<SignalLabel>"
12386	axes2 "%<SignalLabel>"
12387	}
12388	YMin "-5~-5"
12389	YMax "5~5"
12390	DataFormat "StructureWithTime"
12391	SampleTime "0"
12392	}
12393	Block {
12394	BlockType Outport
12395	Name "Radio 2 RSSI"
12396	Position [655, 403, 685, 417]
12397	IconDisplay "Port number"
12398	OutDataType "sfix(16)"
12399	OutScaling "2^0"
12400	}
12401	Block {
12402	BlockType Outport
12403	Name "Radio 2 I/Q"
12404	Position [865, 288, 895, 302]
12405	Port "2"
12406	IconDisplay "Port number"
12407	OutDataType "sfix(16)"
12408	OutScaling "2^0"
12409	}
12410	Line {
12411	SrcBlock "ADC Q"
12412	SrcPort 2
12413	Points [35, 0; 0, 20; 30, 0]
12414	Branch {
12415	DstBlock "Concatenates_1"
12416	DstPort 4
12417	}
12418	Branch {
12419	Points [0, -215]
12420	DstBlock "Gateway Out1"
12421	DstPort 1
12422	}
12423	}
12424	Line {
12425	SrcBlock "ADC Q"
12426	SrcPort 1
12427	DstBlock "Concatenates_1"
12428	DstPort 3
12429	}
12430	Line {
12431	Labels [0, 0]
12432	SrcBlock "ADC I"
12433	SrcPort 2
12434	Points [55, 0]
12435	Branch {
12436	DstBlock "Concatenates_1"
12437	DstPort 2
12438	}
12439	Branch {
12440	Points [0, -150]
12441	DstBlock "Gateway Out4"
12442	DstPort 1
12443	}
12444	}
12445	Line {
12446	SrcBlock "ADC I"
12447	SrcPort 1
12448	Points [15, 0; 0, -15]
12449	DstBlock "Concatenates_1"
12450	DstPort 1
12451	}
12452	Line {
12453	SrcBlock "Concatenates_1"
12454	SrcPort 1
12455	Points [0, 0]
12456	DstBlock "Radio 2 I/Q"
12457	DstPort 1
12458	}
12459	Line {
12460	SrcBlock "Gateway Out4"
12461	SrcPort 1
12462	DstBlock "Scope"
12463	DstPort 1
12464	}
12465	Line {
12466	SrcBlock "Gateway Out1"
12467	SrcPort 1
12468	Points [40, 0]
12469	DstBlock "Scope"
12470	DstPort 2
12471	}
12472	Line {
12473	SrcBlock "DebugRxBuffers"
12474	SrcPort 1
12475	Points [165, 0]
12476	Branch {
12477	DstBlock "ADC I"
12478	DstPort 1
12479	}
12480	Branch {
12481	Points [0, 65]
12482	Branch {
12483	DstBlock "ADC Q"
12484	DstPort 1
12485	}
12486	Branch {
12487	Points [0, 95]
12488	DstBlock "RSSI"
12489	DstPort 1
12490	}
12491	}
12492	}
12493	Line {
12494	SrcBlock "RSSI"
12495	SrcPort 1
12496	DstBlock "Radio 2 RSSI"
12497	DstPort 1
12498	}
12499	Line {
12500	SrcBlock "MGCAGC_AGCDCO_SEL"
12501	SrcPort 1
12502	Points [115, 0]
12503	Branch {
12504	Points [0, -65]
12505	DstBlock "ADC I"
12506	DstPort 2
12507	}
12508	Branch {
12509	DstBlock "ADC Q"
12510	DstPort 2
12511	}
12512	}
12513	}
12514	}
12515	Block {
12516	BlockType SubSystem
12517	Name "Radio 2 Outputs"
12518	Ports [1]
12519	Position [1180, 761, 1230, 809]
12520	NamePlacement "alternate"
12521	MinAlgLoopOccurrences off
12522	PropExecContextOutsideSubsystem off
12523	RTWSystemCode "Auto"
12524	FunctionWithSeparateData off
12525	Opaque off
12526	RequestExecContextInheritance off
12527	MaskHideContents off
12528	System {
12529	Name "Radio 2 Outputs"
12530	Location [2, 74, 1078, 531]
12531	Open off
12532	ModelBrowserVisibility off
12533	ModelBrowserWidth 200
12534	ScreenColor "white"
12535	PaperOrientation "landscape"
12536	PaperPositionMode "auto"
12537	PaperType "usletter"
12538	PaperUnits "inches"
12539	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
12540	TiledPageScale 1
12541	ShowPageBoundaries off
12542	ZoomFactor "100"
12543	Block {
12544	BlockType Inport
12545	Name "32b"
12546	Position [250, 93, 280, 107]
12547	IconDisplay "Port number"
12548	OutDataType "sfix(16)"
12549	OutScaling "2^0"
12550	}
12551	Block {
12552	BlockType Reference
12553	Name "16LSB"
12554	Ports [1, 1]
12555	Position [430, 92, 470, 108]
12556	SourceBlock "xbsIndex_r4/Slice"
12557	SourceType "Xilinx Bit Slice Extractor Block"
12558	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
12559	nbits "16"
12560	boolean_output off
12561	mode "Lower Bit Location + Width"
12562	bit1 "0"
12563	base1 "MSB of Input"
12564	bit0 "0"
12565	base0 "LSB of Input"
12566	dbl_ovrd off
12567	has_advanced_control "0"
12568	sggui_pos "20,20,442,407"
12569	block_type "slice"
12570	block_version "8.2"
12571	sg_icon_stat "40,16,1,1,white,blue,0,b1026674,right"
12572	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
12573	}
12574	Block {
12575	BlockType Reference
12576	Name "16MSB"
12577	Ports [1, 1]
12578	Position [430, 36, 470, 54]
12579	NamePlacement "alternate"
12580	SourceBlock "xbsIndex_r4/Slice"
12581	SourceType "Xilinx Bit Slice Extractor Block"
12582	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
12583	nbits "16"
12584	boolean_output off
12585	mode "Upper Bit Location + Width"
12586	bit1 "0"
12587	base1 "MSB of Input"
12588	bit0 "0"
12589	base0 "LSB of Input"
12590	dbl_ovrd off
12591	has_advanced_control "0"
12592	sggui_pos "20,20,442,407"
12593	block_type "slice"
12594	block_version "8.2"
12595	sg_icon_stat "40,18,1,1,white,blue,0,b1026674,right"
12596	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
12597	}
12598	Block {
12599	BlockType Reference
12600	Name "Radio 2 DAC I"
12601	Ports [1, 1]
12602	Position [680, 24, 775, 66]
12603	LinkData {
12604	BlockName "Convert"
12605	DialogParameters {
12606	sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right"
12607	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
12608	}
12609	BlockName "radio2_dac_I"
12610	DialogParameters {
12611	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
12612	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
12613	}
12614	}
12615	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 2 DAC I"
12616	SourceType ""
12617	ShowPortLabels "FromPortIcon"
12618	SystemSampleTime "-1"
12619	FunctionWithSeparateData off
12620	RTWMemSecFuncInitTerm "Inherit from model"
12621	RTWMemSecFuncExecute "Inherit from model"
12622	RTWMemSecDataConstants "Inherit from model"
12623	RTWMemSecDataInternal "Inherit from model"
12624	RTWMemSecDataParameters "Inherit from model"
12625	}
12626	Block {
12627	BlockType Reference
12628	Name "Radio 2 DAC Q"
12629	Ports [1, 1]
12630	Position [680, 79, 775, 121]
12631	LinkData {
12632	BlockName "Convert"
12633	DialogParameters {
12634	sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right"
12635	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
12636	}
12637	BlockName "radio2_dac_Q"
12638	DialogParameters {
12639	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
12640	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
12641	}
12642	}
12643	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 2 DAC Q"
12644	SourceType ""
12645	ShowPortLabels "FromPortIcon"
12646	SystemSampleTime "-1"
12647	FunctionWithSeparateData off
12648	RTWMemSecFuncInitTerm "Inherit from model"
12649	RTWMemSecFuncExecute "Inherit from model"
12650	RTWMemSecDataConstants "Inherit from model"
12651	RTWMemSecDataInternal "Inherit from model"
12652	RTWMemSecDataParameters "Inherit from model"
12653	}
12654	Block {
12655	BlockType Reference
12656	Name "Register"
12657	Ports [1, 1]
12658	Position [595, 31, 630, 59]
12659	ShowName off
12660	SourceBlock "xbsIndex_r4/Register"
12661	SourceType "Xilinx Register Block"
12662	init "0"
12663	rst off
12664	en off
12665	dbl_ovrd off
12666	xl_use_area off
12667	xl_area "[0,0,0,0,0,0,0]"
12668	has_advanced_control "0"
12669	sggui_pos "-1,-1,-1,-1"
12670	block_type "register"
12671	block_version "8.2"
12672	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
12673	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
12674	}
12675	Block {
12676	BlockType Reference
12677	Name "Register1"
12678	Ports [1, 1]
12679	Position [595, 86, 630, 114]
12680	ShowName off
12681	SourceBlock "xbsIndex_r4/Register"
12682	SourceType "Xilinx Register Block"
12683	init "0"
12684	rst off
12685	en off
12686	dbl_ovrd off
12687	xl_use_area off
12688	xl_area "[0,0,0,0,0,0,0]"
12689	has_advanced_control "0"
12690	sggui_pos "-1,-1,-1,-1"
12691	block_type "register"
12692	block_version "8.2"
12693	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
12694	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
12695	}
12696	Block {
12697	BlockType Reference
12698	Name "Reinterpret"
12699	Ports [1, 1]
12700	Position [530, 35, 575, 55]
12701	ShowName off
12702	SourceBlock "xbsIndex_r4/Reinterpret"
12703	SourceType "Xilinx Type Reinterpreter Block"
12704	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
12705	force_arith_type on
12706	arith_type "Signed (2's comp)"
12707	force_bin_pt on
12708	bin_pt "15"
12709	has_advanced_control "0"
12710	sggui_pos "20,20,356,309"
12711	block_type "reinterpret"
12712	block_version "8.2"
12713	sg_icon_stat "45,20,1,1,white,blue,0,8982c1db,right"
12714	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
12715	}
12716	Block {
12717	BlockType Reference
12718	Name "Reinterpret1"
12719	Ports [1, 1]
12720	Position [530, 90, 575, 110]
12721	ShowName off
12722	SourceBlock "xbsIndex_r4/Reinterpret"
12723	SourceType "Xilinx Type Reinterpreter Block"
12724	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
12725	force_arith_type on
12726	arith_type "Signed (2's comp)"
12727	force_bin_pt on
12728	bin_pt "15"
12729	has_advanced_control "0"
12730	sggui_pos "20,20,356,309"
12731	block_type "reinterpret"
12732	block_version "8.2"
12733	sg_icon_stat "45,20,1,1,white,blue,0,8982c1db,right"
12734	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
12735	}
12736	Block {
12737	BlockType Terminator
12738	Name "Terminator1"
12739	Position [840, 35, 860, 55]
12740	ShowName off
12741	}
12742	Block {
12743	BlockType Terminator
12744	Name "Terminator2"
12745	Position [840, 90, 860, 110]
12746	ShowName off
12747	}
12748	Line {
12749	SrcBlock "Radio 2 DAC Q"
12750	SrcPort 1
12751	DstBlock "Terminator2"
12752	DstPort 1
12753	}
12754	Line {
12755	SrcBlock "Radio 2 DAC I"
12756	SrcPort 1
12757	DstBlock "Terminator1"
12758	DstPort 1
12759	}
12760	Line {
12761	SrcBlock "Reinterpret1"
12762	SrcPort 1
12763	DstBlock "Register1"
12764	DstPort 1
12765	}
12766	Line {
12767	SrcBlock "Reinterpret"
12768	SrcPort 1
12769	DstBlock "Register"
12770	DstPort 1
12771	}
12772	Line {
12773	SrcBlock "16LSB"
12774	SrcPort 1
12775	DstBlock "Reinterpret1"
12776	DstPort 1
12777	}
12778	Line {
12779	SrcBlock "16MSB"
12780	SrcPort 1
12781	DstBlock "Reinterpret"
12782	DstPort 1
12783	}
12784	Line {
12785	SrcBlock "Register"
12786	SrcPort 1
12787	DstBlock "Radio 2 DAC I"
12788	DstPort 1
12789	}
12790	Line {
12791	SrcBlock "Register1"
12792	SrcPort 1
12793	DstBlock "Radio 2 DAC Q"
12794	DstPort 1
12795	}
12796	Line {
12797	SrcBlock "32b"
12798	SrcPort 1
12799	Points [65, 0]
12800	Branch {
12801	Points [0, -55]
12802	DstBlock "16MSB"
12803	DstPort 1
12804	}
12805	Branch {
12806	DstBlock "16LSB"
12807	DstPort 1
12808	}
12809	}
12810	}
12811	}
12812	Block {
12813	BlockType SubSystem
12814	Name "Radio 3\nRx Buffers"
12815	Ports [5]
12816	Position [1175, 323, 1240, 427]
12817	MinAlgLoopOccurrences off
12818	PropExecContextOutsideSubsystem off
12819	RTWSystemCode "Auto"
12820	FunctionWithSeparateData off
12821	Opaque off
12822	RequestExecContextInheritance off
12823	MaskHideContents off
12824	System {
12825	Name "Radio 3\nRx Buffers"
12826	Location [2, 74, 1014, 726]
12827	Open off
12828	ModelBrowserVisibility off
12829	ModelBrowserWidth 200
12830	ScreenColor "white"
12831	PaperOrientation "landscape"
12832	PaperPositionMode "auto"
12833	PaperType "usletter"
12834	PaperUnits "inches"
12835	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
12836	TiledPageScale 1
12837	ShowPageBoundaries off
12838	ZoomFactor "100"
12839	Block {
12840	BlockType Inport
12841	Name "RSSI"
12842	Position [450, 313, 480, 327]
12843	IconDisplay "Port number"
12844	OutDataType "sfix(16)"
12845	OutScaling "2^0"
12846	}
12847	Block {
12848	BlockType Inport
12849	Name "I/Q"
12850	Position [545, 163, 575, 177]
12851	Port "2"
12852	IconDisplay "Port number"
12853	OutDataType "sfix(16)"
12854	OutScaling "2^0"
12855	}
12856	Block {
12857	BlockType Inport
12858	Name "Addr"
12859	Position [325, 128, 355, 142]
12860	Port "3"
12861	IconDisplay "Port number"
12862	OutDataType "sfix(16)"
12863	OutScaling "2^0"
12864	}
12865	Block {
12866	BlockType Inport
12867	Name "WE"
12868	Position [110, 183, 140, 197]
12869	Port "4"
12870	IconDisplay "Port number"
12871	OutDataType "sfix(16)"
12872	OutScaling "2^0"
12873	}
12874	Block {
12875	BlockType Inport
12876	Name "EN"
12877	Position [110, 213, 140, 227]
12878	Port "5"
12879	IconDisplay "Port number"
12880	OutDataType "sfix(16)"
12881	OutScaling "2^0"
12882	}
12883	Block {
12884	BlockType Reference
12885	Name "Convert1"
12886	Ports [1, 1]
12887	Position [185, 212, 210, 228]
12888	ShowName off
12889	SourceBlock "xbsIndex_r4/Convert"
12890	SourceType "Xilinx Type Converter Block"
12891	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
12892	arith_type "Boolean"
12893	n_bits "16"
12894	bin_pt "14"
12895	quantization "Truncate"
12896	overflow "Wrap"
12897	latency "0"
12898	dbl_ovrd off
12899	pipeline off
12900	xl_use_area off
12901	xl_area "[0,0,0,0,0,0,0]"
12902	has_advanced_control "0"
12903	sggui_pos "20,20,461,375"
12904	block_type "convert"
12905	block_version "8.2"
12906	sg_icon_stat "25,16,1,1,white,blue,0,74901e60,right"
12907	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
12908	}
12909	Block {
12910	BlockType Reference
12911	Name "Gateway Out"
12912	Ports [1, 1]
12913	Position [500, 30, 530, 40]
12914	ShowName off
12915	SourceBlock "xbsIndex_r4/Gateway Out"
12916	SourceType "Xilinx Gateway Out Block"
12917	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
12918	hdl_port off
12919	timing_constraint "None"
12920	locs_specified off
12921	LOCs "{}"
12922	xl_use_area off
12923	xl_area "[0,0,0,0,0,0,0]"
12924	has_advanced_control "0"
12925	sggui_pos "20,20,336,386"
12926	block_type "gatewayout"
12927	block_version "10.1.2"
12928	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
12929	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
12930	}
12931	Block {
12932	BlockType Reference
12933	Name "Gateway Out1"
12934	Ports [1, 1]
12935	Position [500, 70, 530, 80]
12936	ShowName off
12937	SourceBlock "xbsIndex_r4/Gateway Out"
12938	SourceType "Xilinx Gateway Out Block"
12939	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
12940	hdl_port off
12941	timing_constraint "None"
12942	locs_specified off
12943	LOCs "{}"
12944	xl_use_area off
12945	xl_area "[0,0,0,0,0,0,0]"
12946	has_advanced_control "0"
12947	sggui_pos "20,20,336,386"
12948	block_type "gatewayout"
12949	block_version "10.1.2"
12950	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
12951	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
12952	}
12953	Block {
12954	BlockType Reference
12955	Name "Logical"
12956	Ports [2, 1]
12957	Position [255, 175, 310, 235]
12958	SourceBlock "xbsIndex_r4/Logical"
12959	SourceType "Xilinx Logical Block Block"
12960	logical_function "AND"
12961	inputs "2"
12962	en off
12963	latency "0"
12964	precision "Full"
12965	arith_type "Unsigned"
12966	n_bits "16"
12967	bin_pt "0"
12968	align_bp on
12969	dbl_ovrd off
12970	xl_use_area off
12971	xl_area "[0,0,0,0,0,0,0]"
12972	has_advanced_control "0"
12973	sggui_pos "-1,-1,-1,-1"
12974	block_type "logical"
12975	block_version "9.1.01"
12976	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
12977	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
12978	}
12979	Block {
12980	BlockType SubSystem
12981	Name "Radio 3\nRSSI Buffer"
12982	Ports [3]
12983	Position [650, 264, 705, 376]
12984	MinAlgLoopOccurrences off
12985	PropExecContextOutsideSubsystem off
12986	RTWSystemCode "Auto"
12987	FunctionWithSeparateData off
12988	Opaque off
12989	RequestExecContextInheritance off
12990	MaskHideContents off
12991	System {
12992	Name "Radio 3\nRSSI Buffer"
12993	Location [2, 70, 1918, 1150]
12994	Open off
12995	ModelBrowserVisibility off
12996	ModelBrowserWidth 200
12997	ScreenColor "white"
12998	PaperOrientation "landscape"
12999	PaperPositionMode "auto"
13000	PaperType "usletter"
13001	PaperUnits "inches"
13002	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
13003	TiledPageScale 1
13004	ShowPageBoundaries off
13005	ZoomFactor "100"
13006	Block {
13007	BlockType Inport
13008	Name "Addr_14b"
13009	Position [325, 348, 355, 362]
13010	NamePlacement "alternate"
13011	IconDisplay "Port number"
13012	OutDataType "sfix(16)"
13013	OutScaling "2^0"
13014	}
13015	Block {
13016	BlockType Inport
13017	Name "RSSI"
13018	Position [95, 383, 125, 397]
13019	Port "2"
13020	IconDisplay "Port number"
13021	OutDataType "sfix(16)"
13022	OutScaling "2^0"
13023	}
13024	Block {
13025	BlockType Inport
13026	Name "WE"
13027	Position [720, 478, 750, 492]
13028	Port "3"
13029	IconDisplay "Port number"
13030	OutDataType "sfix(16)"
13031	OutScaling "2^0"
13032	}
13033	Block {
13034	BlockType Reference
13035	Name "11MSB"
13036	Ports [1, 1]
13037	Position [430, 346, 470, 364]
13038	NamePlacement "alternate"
13039	SourceBlock "xbsIndex_r4/Slice"
13040	SourceType "Xilinx Bit Slice Extractor Block"
13041	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
13042	nbits "11"
13043	boolean_output off
13044	mode "Upper Bit Location + Width"
13045	bit1 "0"
13046	base1 "MSB of Input"
13047	bit0 "0"
13048	base0 "LSB of Input"
13049	dbl_ovrd off
13050	has_advanced_control "0"
13051	sggui_pos "20,20,449,407"
13052	block_type "slice"
13053	block_version "8.2"
13054	sg_icon_stat "40,18,1,1,white,blue,0,b1026674,right"
13055	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
13056	}
13057	Block {
13058	BlockType Reference
13059	Name "BIT[2]"
13060	Ports [1, 1]
13061	Position [430, 401, 470, 419]
13062	SourceBlock "xbsIndex_r4/Slice"
13063	SourceType "Xilinx Bit Slice Extractor Block"
13064	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
13065	nbits "1"
13066	boolean_output on
13067	mode "Lower Bit Location + Width"
13068	bit1 "0"
13069	base1 "MSB of Input"
13070	bit0 "2"
13071	base0 "LSB of Input"
13072	dbl_ovrd off
13073	has_advanced_control "0"
13074	sggui_pos "20,20,449,407"
13075	block_type "slice"
13076	block_version "8.2"
13077	sg_icon_stat "40,18,1,1,white,blue,0,b1026674,right"
13078	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
13079	}
13080	Block {
13081	BlockType Reference
13082	Name "Concat"
13083	Ports [2, 1]
13084	Position [685, 381, 725, 459]
13085	ShowName off
13086	SourceBlock "xbsIndex_r4/Concat"
13087	SourceType "Xilinx Bus Concatenator Block"
13088	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
13089	num_inputs "2"
13090	dbl_ovrd off
13091	has_advanced_control "0"
13092	sggui_pos "-1,-1,-1,-1"
13093	block_type "concat"
13094	block_version "10.1.2"
13095	sg_icon_stat "40,78,1,1,white,blue,0,df1e5aba,right"
13096	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
13097	}
13098	Block {
13099	BlockType Reference
13100	Name "Convert"
13101	Ports [1, 1]
13102	Position [285, 382, 320, 398]
13103	ShowName off
13104	SourceBlock "xbsIndex_r4/Convert"
13105	SourceType "Xilinx Type Converter Block"
13106	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
13107	arith_type "Unsigned"
13108	n_bits "16"
13109	bin_pt "0"
13110	quantization "Truncate"
13111	overflow "Wrap"
13112	latency "0"
13113	dbl_ovrd off
13114	pipeline off
13115	xl_use_area off
13116	xl_area "[0,0,0,0,0,0,0]"
13117	has_advanced_control "0"
13118	sggui_pos "20,20,461,375"
13119	block_type "convert"
13120	block_version "8.2"
13121	sg_icon_stat "35,16,1,1,white,blue,0,74901e60,right"
13122	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
13123	}
13124	Block {
13125	BlockType Reference
13126	Name "Inverter"
13127	Ports [1, 1]
13128	Position [510, 402, 540, 418]
13129	ShowName off
13130	SourceBlock "xbsIndex_r4/Inverter"
13131	SourceType "Xilinx Inverter Block"
13132	infoedit "Bitwise logical negation (one's complement) operator."
13133	en off
13134	latency "0"
13135	dbl_ovrd off
13136	xl_use_area off
13137	xl_area "[0,0,0,0,0,0,0]"
13138	has_advanced_control "0"
13139	sggui_pos "20,20,348,251"
13140	block_type "inv"
13141	block_version "10.1.2"
13142	sg_icon_stat "30,16,1,1,white,blue,0,1ab4a85f,right"
13143	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
13144	}
13145	Block {
13146	BlockType Reference
13147	Name "Register"
13148	Ports [2, 1]
13149	Position [580, 378, 625, 422]
13150	ShowName off
13151	SourceBlock "xbsIndex_r4/Register"
13152	SourceType "Xilinx Register Block"
13153	init "0"
13154	rst off
13155	en on
13156	dbl_ovrd off
13157	xl_use_area off
13158	xl_area "[0,0,0,0,0,0,0]"
13159	has_advanced_control "0"
13160	sggui_pos "20,20,348,193"
13161	block_type "register"
13162	block_version "10.1.2"
13163	sg_icon_stat "45,44,1,1,white,blue,0,cc3303a0,right"
13164	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
13165	}
13166	Block {
13167	BlockType Reference
13168	Name "Reinterpret1"
13169	Ports [1, 1]
13170	Position [180, 382, 215, 398]
13171	ShowName off
13172	SourceBlock "xbsIndex_r4/Reinterpret"
13173	SourceType "Xilinx Type Reinterpreter Block"
13174	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
13175	force_arith_type on
13176	arith_type "Unsigned"
13177	force_bin_pt on
13178	bin_pt "0"
13179	has_advanced_control "0"
13180	sggui_pos "436,54,356,312"
13181	block_type "reinterpret"
13182	block_version "9.1.01"
13183	sg_icon_stat "35,16,1,1,white,blue,0,8982c1db,right"
13184	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
13185	}
13186	Block {
13187	BlockType Reference
13188	Name "Shared Memory"
13189	Ports [3, 1]
13190	Position [800, 323, 880, 517]
13191	AttributesFormatString "<< %<shared_memory_name> >>"
13192	SourceBlock "xbsIndex_r4/Shared Memory"
13193	SourceType "Xilinx Shared Memory Random Access Memory Block"
13194	shared_memory_name "'RSSIBuff_Radio3'"
13195	depth "2^11"
13196	ownership "Locally Owned and Initialized"
13197	initVector "0"
13198	mutex "Unprotected"
13199	mode "Read and Write"
13200	write_mode "Read After Write"
13201	time_out "0"
13202	latency "1"
13203	explicit_data_type on
13204	arith_type "Unsigned"
13205	n_bits "32"
13206	bin_pt "0"
13207	xl_use_area off
13208	xl_area "[0,0,0,0,0,0,0]"
13209	implementation "Block RAM"
13210	use_rpm "off"
13211	has_advanced_control "0"
13212	sggui_pos "20,20,384,381"
13213	block_type "shmem"
13214	block_version "10.1.2"
13215	sg_icon_stat "80,194,1,1,white,blue,0,e2c38f9a,right"
13216	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
13217	}
13218	Block {
13219	BlockType Terminator
13220	Name "Terminator2"
13221	Position [945, 410, 965, 430]
13222	ShowName off
13223	}
13224	Line {
13225	SrcBlock "RSSI"
13226	SrcPort 1
13227	DstBlock "Reinterpret1"
13228	DstPort 1
13229	}
13230	Line {
13231	SrcBlock "Convert"
13232	SrcPort 1
13233	Points [35, 0]
13234	Branch {
13235	DstBlock "Register"
13236	DstPort 1
13237	}
13238	Branch {
13239	Points [0, 50]
13240	DstBlock "Concat"
13241	DstPort 2
13242	}
13243	}
13244	Line {
13245	SrcBlock "Addr_14b"
13246	SrcPort 1
13247	Points [40, 0]
13248	Branch {
13249	DstBlock "11MSB"
13250	DstPort 1
13251	}
13252	Branch {
13253	Points [0, 55]
13254	DstBlock "BIT[2]"
13255	DstPort 1
13256	}
13257	}
13258	Line {
13259	SrcBlock "WE"
13260	SrcPort 1
13261	DstBlock "Shared Memory"
13262	DstPort 3
13263	}
13264	Line {
13265	SrcBlock "Reinterpret1"
13266	SrcPort 1
13267	DstBlock "Convert"
13268	DstPort 1
13269	}
13270	Line {
13271	SrcBlock "Concat"
13272	SrcPort 1
13273	DstBlock "Shared Memory"
13274	DstPort 2
13275	}
13276	Line {
13277	SrcBlock "BIT[2]"
13278	SrcPort 1
13279	DstBlock "Inverter"
13280	DstPort 1
13281	}
13282	Line {
13283	SrcBlock "11MSB"
13284	SrcPort 1
13285	DstBlock "Shared Memory"
13286	DstPort 1
13287	}
13288	Line {
13289	SrcBlock "Shared Memory"
13290	SrcPort 1
13291	DstBlock "Terminator2"
13292	DstPort 1
13293	}
13294	Line {
13295	SrcBlock "Register"
13296	SrcPort 1
13297	DstBlock "Concat"
13298	DstPort 1
13299	}
13300	Line {
13301	SrcBlock "Inverter"
13302	SrcPort 1
13303	DstBlock "Register"
13304	DstPort 2
13305	}
13306	}
13307	}
13308	Block {
13309	BlockType SubSystem
13310	Name "Radio 3 I/Q\nBuffer"
13311	Ports [3]
13312	Position [650, 116, 705, 224]
13313	MinAlgLoopOccurrences off
13314	PropExecContextOutsideSubsystem off
13315	RTWSystemCode "Auto"
13316	FunctionWithSeparateData off
13317	Opaque off
13318	RequestExecContextInheritance off
13319	MaskHideContents off
13320	System {
13321	Name "Radio 3 I/Q\nBuffer"
13322	Location [2, 74, 1270, 726]
13323	Open off
13324	ModelBrowserVisibility off
13325	ModelBrowserWidth 200
13326	ScreenColor "white"
13327	PaperOrientation "landscape"
13328	PaperPositionMode "auto"
13329	PaperType "usletter"
13330	PaperUnits "inches"
13331	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
13332	TiledPageScale 1
13333	ShowPageBoundaries off
13334	ZoomFactor "100"
13335	Block {
13336	BlockType Inport
13337	Name "Addr_14b"
13338	Position [200, 68, 230, 82]
13339	IconDisplay "Port number"
13340	OutDataType "sfix(16)"
13341	OutScaling "2^0"
13342	}
13343	Block {
13344	BlockType Inport
13345	Name "I/Q_32b"
13346	Position [200, 98, 230, 112]
13347	Port "2"
13348	IconDisplay "Port number"
13349	OutDataType "sfix(16)"
13350	OutScaling "2^0"
13351	}
13352	Block {
13353	BlockType Inport
13354	Name "WE"
13355	Position [200, 128, 230, 142]
13356	Port "3"
13357	IconDisplay "Port number"
13358	OutDataType "sfix(16)"
13359	OutScaling "2^0"
13360	}
13361	Block {
13362	BlockType Reference
13363	Name "Shared Memory"
13364	Ports [3, 1]
13365	Position [320, 60, 400, 150]
13366	AttributesFormatString "<< %<shared_memory_name> >>"
13367	SourceBlock "xbsIndex_r4/Shared Memory"
13368	SourceType "Xilinx Shared Memory Random Access Memory Block"
13369	shared_memory_name "'RxBuff_Radio3'"
13370	depth "2^14"
13371	ownership "Locally Owned and Initialized"
13372	initVector "0"
13373	mutex "Unprotected"
13374	mode "Read and Write"
13375	write_mode "Read After Write"
13376	time_out "0"
13377	latency "1"
13378	explicit_data_type on
13379	arith_type "Unsigned"
13380	n_bits "32"
13381	bin_pt "0"
13382	xl_use_area off
13383	xl_area "[0,0,0,0,0,0,0]"
13384	implementation "Block RAM"
13385	use_rpm "off"
13386	has_advanced_control "0"
13387	sggui_pos "20,20,384,381"
13388	block_type "shmem"
13389	block_version "10.1.2"
13390	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
13391	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
13392	}
13393	Block {
13394	BlockType Terminator
13395	Name "Terminator"
13396	Position [450, 95, 470, 115]
13397	ShowName off
13398	}
13399	Line {
13400	SrcBlock "Shared Memory"
13401	SrcPort 1
13402	DstBlock "Terminator"
13403	DstPort 1
13404	}
13405	Line {
13406	SrcBlock "WE"
13407	SrcPort 1
13408	DstBlock "Shared Memory"
13409	DstPort 3
13410	}
13411	Line {
13412	SrcBlock "I/Q_32b"
13413	SrcPort 1
13414	DstBlock "Shared Memory"
13415	DstPort 2
13416	}
13417	Line {
13418	SrcBlock "Addr_14b"
13419	SrcPort 1
13420	DstBlock "Shared Memory"
13421	DstPort 1
13422	}
13423	}
13424	}
13425	Block {
13426	BlockType Scope
13427	Name "Scope"
13428	Ports [2]
13429	Position [585, 14, 625, 96]
13430	Floating off
13431	Location [5, 49, 1285, 757]
13432	Open off
13433	NumInputPorts "2"
13434	ZoomMode "yonly"
13435	List {
13436	ListType AxesTitles
13437	axes1 "%<SignalLabel>"
13438	axes2 "%<SignalLabel>"
13439	}
13440	YMin "-5~-5"
13441	YMax "5~5"
13442	SaveName "ScopeData2"
13443	DataFormat "StructureWithTime"
13444	MaxDataPoints "40000"
13445	SampleTime "0"
13446	}
13447	Line {
13448	SrcBlock "Gateway Out1"
13449	SrcPort 1
13450	DstBlock "Scope"
13451	DstPort 2
13452	}
13453	Line {
13454	SrcBlock "Gateway Out"
13455	SrcPort 1
13456	DstBlock "Scope"
13457	DstPort 1
13458	}
13459	Line {
13460	SrcBlock "I/Q"
13461	SrcPort 1
13462	DstBlock "Radio 3 I/Q\nBuffer"
13463	DstPort 2
13464	}
13465	Line {
13466	SrcBlock "Convert1"
13467	SrcPort 1
13468	DstBlock "Logical"
13469	DstPort 2
13470	}
13471	Line {
13472	SrcBlock "EN"
13473	SrcPort 1
13474	DstBlock "Convert1"
13475	DstPort 1
13476	}
13477	Line {
13478	SrcBlock "WE"
13479	SrcPort 1
13480	DstBlock "Logical"
13481	DstPort 1
13482	}
13483	Line {
13484	SrcBlock "Addr"
13485	SrcPort 1
13486	Points [75, 0]
13487	Branch {
13488	Points [0, -100]
13489	DstBlock "Gateway Out"
13490	DstPort 1
13491	}
13492	Branch {
13493	Labels [0, 0]
13494	DstBlock "Radio 3 I/Q\nBuffer"
13495	DstPort 1
13496	}
13497	Branch {
13498	Points [0, 150]
13499	DstBlock "Radio 3\nRSSI Buffer"
13500	DstPort 1
13501	}
13502	}
13503	Line {
13504	SrcBlock "Logical"
13505	SrcPort 1
13506	Points [65, 0]
13507	Branch {
13508	Points [85, 0]
13509	Branch {
13510	Points [0, -130]
13511	DstBlock "Gateway Out1"
13512	DstPort 1
13513	}
13514	Branch {
13515	Labels [0, 0]
13516	DstBlock "Radio 3 I/Q\nBuffer"
13517	DstPort 3
13518	}
13519	}
13520	Branch {
13521	Points [0, 150]
13522	DstBlock "Radio 3\nRSSI Buffer"
13523	DstPort 3
13524	}
13525	}
13526	Line {
13527	SrcBlock "RSSI"
13528	SrcPort 1
13529	DstBlock "Radio 3\nRSSI Buffer"
13530	DstPort 2
13531	}
13532	}
13533	}
13534	Block {
13535	BlockType SubSystem
13536	Name "Radio 3\nTx Buffer"
13537	Ports [3, 1]
13538	Position [1015, 852, 1095, 908]
13539	MinAlgLoopOccurrences off
13540	PropExecContextOutsideSubsystem off
13541	RTWSystemCode "Auto"
13542	FunctionWithSeparateData off
13543	Opaque off
13544	RequestExecContextInheritance off
13545	MaskHideContents off
13546	System {
13547	Name "Radio 3\nTx Buffer"
13548	Location [2, 74, 1270, 726]
13549	Open off
13550	ModelBrowserVisibility off
13551	ModelBrowserWidth 200
13552	ScreenColor "white"
13553	PaperOrientation "landscape"
13554	PaperPositionMode "auto"
13555	PaperType "usletter"
13556	PaperUnits "inches"
13557	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
13558	TiledPageScale 1
13559	ShowPageBoundaries off
13560	ZoomFactor "100"
13561	Block {
13562	BlockType Inport
13563	Name "RdAddr_14b"
13564	Position [350, 288, 380, 302]
13565	NamePlacement "alternate"
13566	IconDisplay "Port number"
13567	OutDataType "sfix(16)"
13568	OutScaling "2^0"
13569	}
13570	Block {
13571	BlockType Inport
13572	Name "Rst"
13573	Position [30, 173, 60, 187]
13574	Port "2"
13575	IconDisplay "Port number"
13576	OutDataType "sfix(16)"
13577	OutScaling "2^0"
13578	}
13579	Block {
13580	BlockType Inport
13581	Name "En"
13582	Position [30, 203, 60, 217]
13583	Port "3"
13584	IconDisplay "Port number"
13585	OutDataType "sfix(16)"
13586	OutScaling "2^0"
13587	}
13588	Block {
13589	BlockType Reference
13590	Name "Constant"
13591	Ports [0, 1]
13592	Position [630, 350, 655, 370]
13593	ShowName off
13594	SourceBlock "xbsIndex_r4/Constant"
13595	SourceType "Xilinx Constant Block Block"
13596	arith_type "Unsigned"
13597	const "0"
13598	n_bits "32"
13599	bin_pt "0"
13600	explicit_period off
13601	period "1"
13602	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
13603	equ "P=C"
13604	opselect "C"
13605	inp2 "PCIN>>17"
13606	opr "+"
13607	inp1 "P"
13608	carry "CIN"
13609	dbl_ovrd off
13610	has_advanced_control "0"
13611	sggui_pos "20,20,400,346"
13612	block_type "constant"
13613	block_version "10.1.2"
13614	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
13615	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
13616	}
13617	Block {
13618	BlockType Reference
13619	Name "Constant1"
13620	Ports [0, 1]
13621	Position [355, 345, 380, 365]
13622	ShowName off
13623	SourceBlock "xbsIndex_r4/Constant"
13624	SourceType "Xilinx Constant Block Block"
13625	arith_type "Boolean"
13626	const "0"
13627	n_bits "32"
13628	bin_pt "0"
13629	explicit_period off
13630	period "1"
13631	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
13632	equ "P=C"
13633	opselect "C"
13634	inp2 "PCIN>>17"
13635	opr "+"
13636	inp1 "P"
13637	carry "CIN"
13638	dbl_ovrd off
13639	has_advanced_control "0"
13640	sggui_pos "20,20,400,346"
13641	block_type "constant"
13642	block_version "10.1.2"
13643	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
13644	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
13645	}
13646	Block {
13647	BlockType Reference
13648	Name "Constant2"
13649	Ports [0, 1]
13650	Position [355, 315, 380, 335]
13651	ShowName off
13652	SourceBlock "xbsIndex_r4/Constant"
13653	SourceType "Xilinx Constant Block Block"
13654	arith_type "Unsigned"
13655	const "0"
13656	n_bits "32"
13657	bin_pt "0"
13658	explicit_period off
13659	period "1"
13660	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
13661	equ "P=C"
13662	opselect "C"
13663	inp2 "PCIN>>17"
13664	opr "+"
13665	inp1 "P"
13666	carry "CIN"
13667	dbl_ovrd off
13668	has_advanced_control "0"
13669	sggui_pos "20,20,400,346"
13670	block_type "constant"
13671	block_version "10.1.2"
13672	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
13673	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
13674	}
13675	Block {
13676	BlockType Reference
13677	Name "Convert"
13678	Ports [1, 1]
13679	Position [350, 188, 375, 202]
13680	ShowName off
13681	SourceBlock "xbsIndex_r4/Convert"
13682	SourceType "Xilinx Type Converter Block"
13683	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
13684	arith_type "Boolean"
13685	n_bits "16"
13686	bin_pt "14"
13687	quantization "Truncate"
13688	overflow "Wrap"
13689	latency "0"
13690	dbl_ovrd off
13691	pipeline off
13692	xl_use_area off
13693	xl_area "[0,0,0,0,0,0,0]"
13694	has_advanced_control "0"
13695	sggui_pos "20,20,374,375"
13696	block_type "convert"
13697	block_version "8.2"
13698	sg_icon_stat "25,14,1,1,white,blue,0,74901e60,right"
13699	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
13700	}
13701	Block {
13702	BlockType Reference
13703	Name "Convert1"
13704	Ports [1, 1]
13705	Position [100, 203, 120, 217]
13706	ShowName off
13707	SourceBlock "xbsIndex_r4/Convert"
13708	SourceType "Xilinx Type Converter Block"
13709	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
13710	arith_type "Boolean"
13711	n_bits "16"
13712	bin_pt "14"
13713	quantization "Truncate"
13714	overflow "Wrap"
13715	latency "0"
13716	dbl_ovrd off
13717	pipeline off
13718	xl_use_area off
13719	xl_area "[0,0,0,0,0,0,0]"
13720	has_advanced_control "0"
13721	sggui_pos "20,20,374,375"
13722	block_type "convert"
13723	block_version "8.2"
13724	sg_icon_stat "20,14,1,1,white,blue,0,74901e60,right"
13725	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
13726	}
13727	Block {
13728	BlockType Reference
13729	Name "Inverter"
13730	Ports [1, 1]
13731	Position [150, 201, 180, 219]
13732	SourceBlock "xbsIndex_r4/Inverter"
13733	SourceType "Xilinx Inverter Block"
13734	infoedit "Bitwise logical negation (one's complement) operator."
13735	en off
13736	latency "0"
13737	dbl_ovrd off
13738	xl_use_area off
13739	xl_area "[0,0,0,0,0,0,0]"
13740	has_advanced_control "0"
13741	sggui_pos "-1,-1,-1,-1"
13742	block_type "inv"
13743	block_version "9.1.01"
13744	sg_icon_stat "30,18,1,1,white,blue,0,1ab4a85f,right"
13745	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
13746	}
13747	Block {
13748	BlockType Reference
13749	Name "Logical"
13750	Ports [2, 1]
13751	Position [215, 165, 270, 225]
13752	SourceBlock "xbsIndex_r4/Logical"
13753	SourceType "Xilinx Logical Block Block"
13754	logical_function "OR"
13755	inputs "2"
13756	en off
13757	latency "0"
13758	precision "Full"
13759	arith_type "Unsigned"
13760	n_bits "16"
13761	bin_pt "0"
13762	align_bp on
13763	dbl_ovrd off
13764	xl_use_area off
13765	xl_area "[0,0,0,0,0,0,0]"
13766	has_advanced_control "0"
13767	sggui_pos "-1,-1,-1,-1"
13768	block_type "logical"
13769	block_version "9.1.01"
13770	sg_icon_stat "55,60,1,1,white,blue,0,f4a65842,right"
13771	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
13772	}
13773	Block {
13774	BlockType Reference
13775	Name "Mux"
13776	Ports [3, 1]
13777	Position [750, 273, 795, 377]
13778	SourceBlock "xbsIndex_r4/Mux"
13779	SourceType "Xilinx Bus Multiplexer Block"
13780	inputs "2"
13781	en off
13782	latency "0"
13783	precision "Full"
13784	arith_type "Unsigned"
13785	n_bits "16"
13786	bin_pt "14"
13787	quantization "Truncate"
13788	overflow "Wrap"
13789	dbl_ovrd off
13790	xl_use_area off
13791	xl_area "[0,0,0,0,0,0,0]"
13792	has_advanced_control "0"
13793	sggui_pos "20,20,348,303"
13794	block_type "mux"
13795	block_version "10.1.2"
13796	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
13797	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
13798	}
13799	Block {
13800	BlockType Reference
13801	Name "Shared Memory"
13802	Ports [3, 1]
13803	Position [445, 280, 525, 370]
13804	AttributesFormatString "<< %<shared_memory_name> >>"
13805	SourceBlock "xbsIndex_r4/Shared Memory"
13806	SourceType "Xilinx Shared Memory Random Access Memory Block"
13807	shared_memory_name "'TxBuff_Radio3'"
13808	depth "2^14"
13809	ownership "Locally Owned and Initialized"
13810	initVector "0"
13811	mutex "Unprotected"
13812	mode "Read and Write"
13813	write_mode "Read After Write"
13814	time_out "0"
13815	latency "1"
13816	explicit_data_type on
13817	arith_type "Unsigned"
13818	n_bits "32"
13819	bin_pt "0"
13820	xl_use_area off
13821	xl_area "[0,0,0,0,0,0,0]"
13822	implementation "Block RAM"
13823	use_rpm "off"
13824	has_advanced_control "0"
13825	sggui_pos "20,20,384,381"
13826	block_type "shmem"
13827	block_version "10.1.2"
13828	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
13829	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
13830	}
13831	Block {
13832	BlockType Outport
13833	Name "IQ_32b"
13834	Position [885, 318, 915, 332]
13835	IconDisplay "Port number"
13836	OutDataType "sfix(16)"
13837	OutScaling "2^0"
13838	}
13839	Line {
13840	SrcBlock "Mux"
13841	SrcPort 1
13842	DstBlock "IQ_32b"
13843	DstPort 1
13844	}
13845	Line {
13846	SrcBlock "Constant2"
13847	SrcPort 1
13848	DstBlock "Shared Memory"
13849	DstPort 2
13850	}
13851	Line {
13852	SrcBlock "Constant1"
13853	SrcPort 1
13854	DstBlock "Shared Memory"
13855	DstPort 3
13856	}
13857	Line {
13858	SrcBlock "Shared Memory"
13859	SrcPort 1
13860	DstBlock "Mux"
13861	DstPort 2
13862	}
13863	Line {
13864	SrcBlock "Constant"
13865	SrcPort 1
13866	DstBlock "Mux"
13867	DstPort 3
13868	}
13869	Line {
13870	SrcBlock "RdAddr_14b"
13871	SrcPort 1
13872	DstBlock "Shared Memory"
13873	DstPort 1
13874	}
13875	Line {
13876	SrcBlock "Inverter"
13877	SrcPort 1
13878	DstBlock "Logical"
13879	DstPort 2
13880	}
13881	Line {
13882	SrcBlock "Convert1"
13883	SrcPort 1
13884	DstBlock "Inverter"
13885	DstPort 1
13886	}
13887	Line {
13888	SrcBlock "En"
13889	SrcPort 1
13890	DstBlock "Convert1"
13891	DstPort 1
13892	}
13893	Line {
13894	SrcBlock "Rst"
13895	SrcPort 1
13896	DstBlock "Logical"
13897	DstPort 1
13898	}
13899	Line {
13900	SrcBlock "Convert"
13901	SrcPort 1
13902	Points [160, 0; 0, 95]
13903	DstBlock "Mux"
13904	DstPort 1
13905	}
13906	Line {
13907	SrcBlock "Logical"
13908	SrcPort 1
13909	DstBlock "Convert"
13910	DstPort 1
13911	}
13912	}
13913	}
13914	Block {
13915	BlockType SubSystem
13916	Name "Radio 3 Inputs"
13917	Ports [2, 2]
13918	Position [905, 310, 1080, 370]
13919	NamePlacement "alternate"
13920	MinAlgLoopOccurrences off
13921	PropExecContextOutsideSubsystem off
13922	RTWSystemCode "Auto"
13923	FunctionWithSeparateData off
13924	Opaque off
13925	RequestExecContextInheritance off
13926	MaskHideContents off
13927	System {
13928	Name "Radio 3 Inputs"
13929	Location [2, 74, 1014, 726]
13930	Open off
13931	ModelBrowserVisibility off
13932	ModelBrowserWidth 200
13933	ScreenColor "white"
13934	PaperOrientation "landscape"
13935	PaperPositionMode "auto"
13936	PaperType "usletter"
13937	PaperUnits "inches"
13938	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
13939	TiledPageScale 1
13940	ShowPageBoundaries off
13941	ZoomFactor "100"
13942	Block {
13943	BlockType Inport
13944	Name "DebugRxBuffers"
13945	Position [180, 248, 210, 262]
13946	IconDisplay "Port number"
13947	OutDataType "sfix(16)"
13948	OutScaling "2^0"
13949	}
13950	Block {
13951	BlockType Inport
13952	Name "MGCAGC_AGCDCO_SEL"
13953	Position [185, 328, 215, 342]
13954	Port "2"
13955	IconDisplay "Port number"
13956	OutDataType "sfix(16)"
13957	OutScaling "2^0"
13958	}
13959	Block {
13960	BlockType SubSystem
13961	Name "ADC I"
13962	Ports [2, 2]
13963	Position [410, 245, 565, 285]
13964	NamePlacement "alternate"
13965	MinAlgLoopOccurrences off
13966	PropExecContextOutsideSubsystem off
13967	RTWSystemCode "Auto"
13968	FunctionWithSeparateData off
13969	Opaque off
13970	RequestExecContextInheritance off
13971	MaskHideContents off
13972	System {
13973	Name "ADC I"
13974	Location [37, 74, 1049, 726]
13975	Open off
13976	ModelBrowserVisibility off
13977	ModelBrowserWidth 200
13978	ScreenColor "white"
13979	PaperOrientation "landscape"
13980	PaperPositionMode "auto"
13981	PaperType "usletter"
13982	PaperUnits "inches"
13983	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
13984	TiledPageScale 1
13985	ShowPageBoundaries off
13986	ZoomFactor "100"
13987	Block {
13988	BlockType Inport
13989	Name "Debug"
13990	Position [645, 13, 675, 27]
13991	IconDisplay "Port number"
13992	OutDataType "sfix(16)"
13993	OutScaling "2^0"
13994	}
13995	Block {
13996	BlockType Inport
13997	Name "MGCAGC_AGCDCO_SEL"
13998	Position [125, 203, 155, 217]
13999	Port "2"
14000	IconDisplay "Port number"
14001	OutDataType "sfix(16)"
14002	OutScaling "2^0"
14003	}
14004	Block {
14005	BlockType Constant
14006	Name "Constant1"
14007	Position [15, 280, 45, 310]
14008	ShowName off
14009	Value "0"
14010	OutDataType "sfix(16)"
14011	OutScaling "2^0"
14012	}
14013	Block {
14014	BlockType Reference
14015	Name "Counter"
14016	Ports [0, 1]
14017	Position [480, 300, 540, 360]
14018	SourceBlock "xbsIndex_r4/Counter"
14019	SourceType "Xilinx Counter Block"
14020	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
14021	cnt_type "Free Running"
14022	cnt_to "Inf"
14023	operation "Down"
14024	start_count "2^14-1"
14025	cnt_by_val "1"
14026	arith_type "Unsigned"
14027	n_bits "14"
14028	bin_pt "0"
14029	load_pin off
14030	rst off
14031	en off
14032	explicit_period "on"
14033	period "1"
14034	dbl_ovrd off
14035	use_behavioral_HDL off
14036	use_rpm off
14037	implementation "Fabric"
14038	xl_use_area off
14039	xl_area "[0,0,0,0,0,0,0]"
14040	has_advanced_control "0"
14041	sggui_pos "20,20,348,619"
14042	block_type "counter"
14043	block_version "10.1.3"
14044	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
14045	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
14046	}
14047	Block {
14048	BlockType Reference
14049	Name "FromAGC_Radio3_I"
14050	Ports [1, 1]
14051	Position [110, 385, 175, 405]
14052	SourceBlock "xbsIndex_r4/Gateway In"
14053	SourceType "Xilinx Gateway In Block"
14054	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
14055	arith_type "Signed (2's comp)"
14056	n_bits "14"
14057	bin_pt "13"
14058	quantization "Round (unbiased: +/- Inf)"
14059	overflow "Saturate"
14060	period "1"
14061	dbl_ovrd off
14062	timing_constraint "None"
14063	locs_specified off
14064	LOCs "{}"
14065	xl_use_area off
14066	xl_area "[0,0,0,0,0,0,0]"
14067	has_advanced_control "0"
14068	sggui_pos "20,20,348,406"
14069	block_type "gatewayin"
14070	block_version "10.1.3"
14071	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
14072	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
14073	}
14074	Block {
14075	BlockType Reference
14076	Name "Mux"
14077	Ports [3, 1]
14078	Position [780, 48, 825, 152]
14079	SourceBlock "xbsIndex_r4/Mux"
14080	SourceType "Xilinx Bus Multiplexer Block"
14081	inputs "2"
14082	en off
14083	latency "0"
14084	precision "Full"
14085	arith_type "Unsigned"
14086	n_bits "1"
14087	bin_pt "0"
14088	quantization "Truncate"
14089	overflow "Wrap"
14090	dbl_ovrd off
14091	xl_use_area off
14092	xl_area "[0,0,0,0,0,0,0]"
14093	has_advanced_control "0"
14094	sggui_pos "20,20,348,303"
14095	block_type "mux"
14096	block_version "10.1.3"
14097	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
14098	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
14099	}
14100	Block {
14101	BlockType Reference
14102	Name "Mux1"
14103	Ports [3, 1]
14104	Position [780, 243, 825, 347]
14105	SourceBlock "xbsIndex_r4/Mux"
14106	SourceType "Xilinx Bus Multiplexer Block"
14107	inputs "2"
14108	en off
14109	latency "0"
14110	precision "Full"
14111	arith_type "Unsigned"
14112	n_bits "1"
14113	bin_pt "0"
14114	quantization "Truncate"
14115	overflow "Wrap"
14116	dbl_ovrd off
14117	xl_use_area off
14118	xl_area "[0,0,0,0,0,0,0]"
14119	has_advanced_control "0"
14120	sggui_pos "20,20,348,303"
14121	block_type "mux"
14122	block_version "10.1.3"
14123	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
14124	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
14125	}
14126	Block {
14127	BlockType Reference
14128	Name "Mux2"
14129	Ports [3, 1]
14130	Position [270, 243, 315, 347]
14131	SourceBlock "xbsIndex_r4/Mux"
14132	SourceType "Xilinx Bus Multiplexer Block"
14133	inputs "2"
14134	en off
14135	latency "0"
14136	precision "Full"
14137	arith_type "Unsigned"
14138	n_bits "1"
14139	bin_pt "0"
14140	quantization "Truncate"
14141	overflow "Wrap"
14142	dbl_ovrd off
14143	xl_use_area off
14144	xl_area "[0,0,0,0,0,0,0]"
14145	has_advanced_control "0"
14146	sggui_pos "20,20,348,303"
14147	block_type "mux"
14148	block_version "10.1.3"
14149	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
14150	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
14151	}
14152	Block {
14153	BlockType Reference
14154	Name "Radio 3 ADC I"
14155	Ports [1, 1]
14156	Position [80, 274, 175, 316]
14157	LinkData {
14158	BlockName "radio3_adc_I"
14159	DialogParameters {
14160	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
14161	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
14162	}
14163	}
14164	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 3 ADC I"
14165	SourceType ""
14166	ShowPortLabels "FromPortIcon"
14167	SystemSampleTime "-1"
14168	FunctionWithSeparateData off
14169	RTWMemSecFuncInitTerm "Inherit from model"
14170	RTWMemSecFuncExecute "Inherit from model"
14171	RTWMemSecDataConstants "Inherit from model"
14172	RTWMemSecDataInternal "Inherit from model"
14173	RTWMemSecDataParameters "Inherit from model"
14174	samp_period "1"
14175	}
14176	Block {
14177	BlockType Reference
14178	Name "Register"
14179	Ports [1, 1]
14180	Position [405, 281, 440, 309]
14181	ShowName off
14182	SourceBlock "xbsIndex_r4/Register"
14183	SourceType "Xilinx Register Block"
14184	init "0"
14185	rst off
14186	en off
14187	dbl_ovrd off
14188	xl_use_area off
14189	xl_area "[0,0,0,0,0,0,0]"
14190	has_advanced_control "0"
14191	sggui_pos "-1,-1,-1,-1"
14192	block_type "register"
14193	block_version "8.2"
14194	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
14195	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
14196	}
14197	Block {
14198	BlockType Reference
14199	Name "Reinterpret"
14200	Ports [1, 1]
14201	Position [625, 314, 675, 346]
14202	SourceBlock "xbsIndex_r4/Reinterpret"
14203	SourceType "Xilinx Type Reinterpreter Block"
14204	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
14205	force_arith_type on
14206	arith_type "Signed (2's comp)"
14207	force_bin_pt on
14208	bin_pt "13"
14209	has_advanced_control "0"
14210	sggui_pos "20,20,336,312"
14211	block_type "reinterpret"
14212	block_version "10.1.3"
14213	sg_icon_stat "50,32,1,1,white,blue,0,8982c1db,right"
14214	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
14215	}
14216	Block {
14217	BlockType Reference
14218	Name "Slice"
14219	Ports [1, 1]
14220	Position [630, 120, 690, 150]
14221	SourceBlock "xbsIndex_r4/Slice"
14222	SourceType "Xilinx Bit Slice Extractor Block"
14223	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
14224	nbits "1"
14225	boolean_output off
14226	mode "Lower Bit Location + Width"
14227	bit1 "0"
14228	base1 "MSB of Input"
14229	bit0 "0"
14230	base0 "LSB of Input"
14231	dbl_ovrd off
14232	has_advanced_control "0"
14233	sggui_pos "20,20,449,376"
14234	block_type "slice"
14235	block_version "10.1.3"
14236	sg_icon_stat "60,30,1,1,white,blue,0,b1026674,right"
14237	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
14238	}
14239	Block {
14240	BlockType Reference
14241	Name "radio3_ADC_I_OTR"
14242	Ports [1, 1]
14243	Position [400, 94, 455, 106]
14244	NamePlacement "alternate"
14245	SourceBlock "xbsIndex_r4/Gateway In"
14246	SourceType "Xilinx Gateway In Block"
14247	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
14248	arith_type "Unsigned"
14249	n_bits "1"
14250	bin_pt "0"
14251	quantization "Round (unbiased: +/- Inf)"
14252	overflow "Saturate"
14253	period "1"
14254	dbl_ovrd off
14255	timing_constraint "None"
14256	locs_specified off
14257	LOCs "{}"
14258	xl_use_area off
14259	xl_area "[0,0,0,0,0,0,0]"
14260	has_advanced_control "0"
14261	sggui_pos "20,20,356,432"
14262	block_type "gatewayin"
14263	block_version "VER_STRING_GOES_HERE"
14264	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
14265	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
14266	}
14267	Block {
14268	BlockType Outport
14269	Name "OTR I"
14270	Position [885, 93, 915, 107]
14271	IconDisplay "Port number"
14272	OutDataType "sfix(16)"
14273	OutScaling "2^0"
14274	}
14275	Block {
14276	BlockType Outport
14277	Name "ADC I"
14278	Position [885, 288, 915, 302]
14279	Port "2"
14280	IconDisplay "Port number"
14281	OutDataType "sfix(16)"
14282	OutScaling "2^0"
14283	}
14284	Line {
14285	SrcBlock "Constant1"
14286	SrcPort 1
14287	Points [20, 0]
14288	Branch {
14289	DstBlock "Radio 3 ADC I"
14290	DstPort 1
14291	}
14292	Branch {
14293	Points [-10, 0]
14294	Branch {
14295	Points [0, -195]
14296	DstBlock "radio3_ADC_I_OTR"
14297	DstPort 1
14298	}
14299	Branch {
14300	Points [0, 100]
14301	DstBlock "FromAGC_Radio3_I"
14302	DstPort 1
14303	}
14304	}
14305	}
14306	Line {
14307	SrcBlock "Mux"
14308	SrcPort 1
14309	DstBlock "OTR I"
14310	DstPort 1
14311	}
14312	Line {
14313	SrcBlock "Debug"
14314	SrcPort 1
14315	Points [40, 0; 0, 45]
14316	Branch {
14317	DstBlock "Mux"
14318	DstPort 1
14319	}
14320	Branch {
14321	Points [0, 195]
14322	DstBlock "Mux1"
14323	DstPort 1
14324	}
14325	}
14326	Line {
14327	SrcBlock "radio3_ADC_I_OTR"
14328	SrcPort 1
14329	DstBlock "Mux"
14330	DstPort 2
14331	}
14332	Line {
14333	SrcBlock "Slice"
14334	SrcPort 1
14335	DstBlock "Mux"
14336	DstPort 3
14337	}
14338	Line {
14339	SrcBlock "Mux1"
14340	SrcPort 1
14341	DstBlock "ADC I"
14342	DstPort 1
14343	}
14344	Line {
14345	SrcBlock "Register"
14346	SrcPort 1
14347	DstBlock "Mux1"
14348	DstPort 2
14349	}
14350	Line {
14351	SrcBlock "Reinterpret"
14352	SrcPort 1
14353	DstBlock "Mux1"
14354	DstPort 3
14355	}
14356	Line {
14357	SrcBlock "Counter"
14358	SrcPort 1
14359	Points [25, 0]
14360	Branch {
14361	DstBlock "Reinterpret"
14362	DstPort 1
14363	}
14364	Branch {
14365	Points [0, -195]
14366	DstBlock "Slice"
14367	DstPort 1
14368	}
14369	}
14370	Line {
14371	SrcBlock "MGCAGC_AGCDCO_SEL"
14372	SrcPort 1
14373	Points [70, 0; 0, 50]
14374	DstBlock "Mux2"
14375	DstPort 1
14376	}
14377	Line {
14378	SrcBlock "FromAGC_Radio3_I"
14379	SrcPort 1
14380	Points [50, 0; 0, -65]
14381	DstBlock "Mux2"
14382	DstPort 3
14383	}
14384	Line {
14385	SrcBlock "Mux2"
14386	SrcPort 1
14387	DstBlock "Register"
14388	DstPort 1
14389	}
14390	Line {
14391	SrcBlock "Radio 3 ADC I"
14392	SrcPort 1
14393	DstBlock "Mux2"
14394	DstPort 2
14395	}
14396	}
14397	}
14398	Block {
14399	BlockType SubSystem
14400	Name "ADC Q"
14401	Ports [2, 2]
14402	Position [410, 305, 565, 345]
14403	MinAlgLoopOccurrences off
14404	PropExecContextOutsideSubsystem off
14405	RTWSystemCode "Auto"
14406	FunctionWithSeparateData off
14407	Opaque off
14408	RequestExecContextInheritance off
14409	MaskHideContents off
14410	System {
14411	Name "ADC Q"
14412	Location [2, 74, 1014, 726]
14413	Open off
14414	ModelBrowserVisibility off
14415	ModelBrowserWidth 200
14416	ScreenColor "white"
14417	PaperOrientation "landscape"
14418	PaperPositionMode "auto"
14419	PaperType "usletter"
14420	PaperUnits "inches"
14421	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
14422	TiledPageScale 1
14423	ShowPageBoundaries off
14424	ZoomFactor "100"
14425	Block {
14426	BlockType Inport
14427	Name "Debug"
14428	Position [695, 13, 725, 27]
14429	IconDisplay "Port number"
14430	OutDataType "sfix(16)"
14431	OutScaling "2^0"
14432	}
14433	Block {
14434	BlockType Inport
14435	Name "MGCAGC_AGCDCO_SEL"
14436	Position [165, 203, 195, 217]
14437	Port "2"
14438	IconDisplay "Port number"
14439	OutDataType "sfix(16)"
14440	OutScaling "2^0"
14441	}
14442	Block {
14443	BlockType Constant
14444	Name "Constant1"
14445	Position [15, 280, 45, 310]
14446	ShowName off
14447	Value "0"
14448	OutDataType "sfix(16)"
14449	OutScaling "2^0"
14450	}
14451	Block {
14452	BlockType Reference
14453	Name "Counter"
14454	Ports [0, 1]
14455	Position [525, 300, 585, 360]
14456	SourceBlock "xbsIndex_r4/Counter"
14457	SourceType "Xilinx Counter Block"
14458	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
14459	cnt_type "Free Running"
14460	cnt_to "Inf"
14461	operation "Up"
14462	start_count "0"
14463	cnt_by_val "1"
14464	arith_type "Unsigned"
14465	n_bits "14"
14466	bin_pt "0"
14467	load_pin off
14468	rst off
14469	en off
14470	explicit_period "on"
14471	period "1"
14472	dbl_ovrd off
14473	use_behavioral_HDL off
14474	use_rpm off
14475	implementation "Fabric"
14476	xl_use_area off
14477	xl_area "[0,0,0,0,0,0,0]"
14478	has_advanced_control "0"
14479	sggui_pos "20,20,348,619"
14480	block_type "counter"
14481	block_version "10.1.3"
14482	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
14483	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
14484	}
14485	Block {
14486	BlockType Reference
14487	Name "FromAGC_Radio3_Q"
14488	Ports [1, 1]
14489	Position [150, 385, 215, 405]
14490	SourceBlock "xbsIndex_r4/Gateway In"
14491	SourceType "Xilinx Gateway In Block"
14492	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
14493	arith_type "Signed (2's comp)"
14494	n_bits "14"
14495	bin_pt "13"
14496	quantization "Round (unbiased: +/- Inf)"
14497	overflow "Saturate"
14498	period "1"
14499	dbl_ovrd off
14500	timing_constraint "None"
14501	locs_specified off
14502	LOCs "{}"
14503	xl_use_area off
14504	xl_area "[0,0,0,0,0,0,0]"
14505	has_advanced_control "0"
14506	sggui_pos "20,20,348,406"
14507	block_type "gatewayin"
14508	block_version "10.1.3"
14509	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
14510	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
14511	}
14512	Block {
14513	BlockType Reference
14514	Name "Mux"
14515	Ports [3, 1]
14516	Position [830, 48, 875, 152]
14517	SourceBlock "xbsIndex_r4/Mux"
14518	SourceType "Xilinx Bus Multiplexer Block"
14519	inputs "2"
14520	en off
14521	latency "0"
14522	precision "Full"
14523	arith_type "Unsigned"
14524	n_bits "1"
14525	bin_pt "0"
14526	quantization "Truncate"
14527	overflow "Wrap"
14528	dbl_ovrd off
14529	xl_use_area off
14530	xl_area "[0,0,0,0,0,0,0]"
14531	has_advanced_control "0"
14532	sggui_pos "20,20,348,303"
14533	block_type "mux"
14534	block_version "10.1.3"
14535	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
14536	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
14537	}
14538	Block {
14539	BlockType Reference
14540	Name "Mux1"
14541	Ports [3, 1]
14542	Position [830, 243, 875, 347]
14543	SourceBlock "xbsIndex_r4/Mux"
14544	SourceType "Xilinx Bus Multiplexer Block"
14545	inputs "2"
14546	en off
14547	latency "0"
14548	precision "Full"
14549	arith_type "Unsigned"
14550	n_bits "1"
14551	bin_pt "0"
14552	quantization "Truncate"
14553	overflow "Wrap"
14554	dbl_ovrd off
14555	xl_use_area off
14556	xl_area "[0,0,0,0,0,0,0]"
14557	has_advanced_control "0"
14558	sggui_pos "20,20,348,303"
14559	block_type "mux"
14560	block_version "10.1.3"
14561	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
14562	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
14563	}
14564	Block {
14565	BlockType Reference
14566	Name "Mux2"
14567	Ports [3, 1]
14568	Position [310, 243, 355, 347]
14569	SourceBlock "xbsIndex_r4/Mux"
14570	SourceType "Xilinx Bus Multiplexer Block"
14571	inputs "2"
14572	en off
14573	latency "0"
14574	precision "Full"
14575	arith_type "Unsigned"
14576	n_bits "1"
14577	bin_pt "0"
14578	quantization "Truncate"
14579	overflow "Wrap"
14580	dbl_ovrd off
14581	xl_use_area off
14582	xl_area "[0,0,0,0,0,0,0]"
14583	has_advanced_control "0"
14584	sggui_pos "20,20,348,303"
14585	block_type "mux"
14586	block_version "10.1.3"
14587	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
14588	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
14589	}
14590	Block {
14591	BlockType Reference
14592	Name "Radio 3 ADC Q"
14593	Ports [1, 1]
14594	Position [85, 274, 180, 316]
14595	LinkData {
14596	BlockName "radio3_adc_Q"
14597	DialogParameters {
14598	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
14599	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
14600	}
14601	}
14602	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 3 ADC Q"
14603	SourceType ""
14604	ShowPortLabels "FromPortIcon"
14605	SystemSampleTime "-1"
14606	FunctionWithSeparateData off
14607	RTWMemSecFuncInitTerm "Inherit from model"
14608	RTWMemSecFuncExecute "Inherit from model"
14609	RTWMemSecDataConstants "Inherit from model"
14610	RTWMemSecDataInternal "Inherit from model"
14611	RTWMemSecDataParameters "Inherit from model"
14612	samp_period "1"
14613	}
14614	Block {
14615	BlockType Reference
14616	Name "Register"
14617	Ports [1, 1]
14618	Position [455, 281, 490, 309]
14619	ShowName off
14620	SourceBlock "xbsIndex_r4/Register"
14621	SourceType "Xilinx Register Block"
14622	init "0"
14623	rst off
14624	en off
14625	dbl_ovrd off
14626	xl_use_area off
14627	xl_area "[0,0,0,0,0,0,0]"
14628	has_advanced_control "0"
14629	sggui_pos "-1,-1,-1,-1"
14630	block_type "register"
14631	block_version "8.2"
14632	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
14633	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
14634	}
14635	Block {
14636	BlockType Reference
14637	Name "Reinterpret"
14638	Ports [1, 1]
14639	Position [675, 314, 725, 346]
14640	SourceBlock "xbsIndex_r4/Reinterpret"
14641	SourceType "Xilinx Type Reinterpreter Block"
14642	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
14643	force_arith_type on
14644	arith_type "Signed (2's comp)"
14645	force_bin_pt on
14646	bin_pt "13"
14647	has_advanced_control "0"
14648	sggui_pos "20,20,336,312"
14649	block_type "reinterpret"
14650	block_version "10.1.3"
14651	sg_icon_stat "50,32,1,1,white,blue,0,8982c1db,right"
14652	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
14653	}
14654	Block {
14655	BlockType Reference
14656	Name "Slice"
14657	Ports [1, 1]
14658	Position [680, 120, 740, 150]
14659	SourceBlock "xbsIndex_r4/Slice"
14660	SourceType "Xilinx Bit Slice Extractor Block"
14661	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
14662	nbits "1"
14663	boolean_output off
14664	mode "Lower Bit Location + Width"
14665	bit1 "0"
14666	base1 "MSB of Input"
14667	bit0 "0"
14668	base0 "LSB of Input"
14669	dbl_ovrd off
14670	has_advanced_control "0"
14671	sggui_pos "20,20,449,376"
14672	block_type "slice"
14673	block_version "10.1.3"
14674	sg_icon_stat "60,30,1,1,white,blue,0,b1026674,right"
14675	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
14676	}
14677	Block {
14678	BlockType Reference
14679	Name "radio3_ADC_Q_OTR"
14680	Ports [1, 1]
14681	Position [115, 94, 170, 106]
14682	SourceBlock "xbsIndex_r4/Gateway In"
14683	SourceType "Xilinx Gateway In Block"
14684	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
14685	arith_type "Unsigned"
14686	n_bits "1"
14687	bin_pt "0"
14688	quantization "Round (unbiased: +/- Inf)"
14689	overflow "Saturate"
14690	period "1"
14691	dbl_ovrd off
14692	timing_constraint "None"
14693	locs_specified off
14694	LOCs "{}"
14695	xl_use_area off
14696	xl_area "[0,0,0,0,0,0,0]"
14697	has_advanced_control "0"
14698	sggui_pos "20,20,356,432"
14699	block_type "gatewayin"
14700	block_version "VER_STRING_GOES_HERE"
14701	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
14702	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
14703	}
14704	Block {
14705	BlockType Outport
14706	Name "OTR Q"
14707	Position [975, 93, 1005, 107]
14708	IconDisplay "Port number"
14709	OutDataType "sfix(16)"
14710	OutScaling "2^0"
14711	}
14712	Block {
14713	BlockType Outport
14714	Name "ADC Q"
14715	Position [970, 288, 1000, 302]
14716	Port "2"
14717	IconDisplay "Port number"
14718	OutDataType "sfix(16)"
14719	OutScaling "2^0"
14720	}
14721	Line {
14722	SrcBlock "Constant1"
14723	SrcPort 1
14724	Points [10, 0]
14725	Branch {
14726	Points [0, -195]
14727	DstBlock "radio3_ADC_Q_OTR"
14728	DstPort 1
14729	}
14730	Branch {
14731	Points [0, 100]
14732	DstBlock "FromAGC_Radio3_Q"
14733	DstPort 1
14734	}
14735	Branch {
14736	DstBlock "Radio 3 ADC Q"
14737	DstPort 1
14738	}
14739	}
14740	Line {
14741	SrcBlock "Mux"
14742	SrcPort 1
14743	DstBlock "OTR Q"
14744	DstPort 1
14745	}
14746	Line {
14747	SrcBlock "Debug"
14748	SrcPort 1
14749	Points [40, 0; 0, 45]
14750	Branch {
14751	DstBlock "Mux"
14752	DstPort 1
14753	}
14754	Branch {
14755	Points [0, 195]
14756	DstBlock "Mux1"
14757	DstPort 1
14758	}
14759	}
14760	Line {
14761	SrcBlock "radio3_ADC_Q_OTR"
14762	SrcPort 1
14763	DstBlock "Mux"
14764	DstPort 2
14765	}
14766	Line {
14767	SrcBlock "Slice"
14768	SrcPort 1
14769	DstBlock "Mux"
14770	DstPort 3
14771	}
14772	Line {
14773	SrcBlock "Mux1"
14774	SrcPort 1
14775	DstBlock "ADC Q"
14776	DstPort 1
14777	}
14778	Line {
14779	SrcBlock "Register"
14780	SrcPort 1
14781	DstBlock "Mux1"
14782	DstPort 2
14783	}
14784	Line {
14785	SrcBlock "Reinterpret"
14786	SrcPort 1
14787	DstBlock "Mux1"
14788	DstPort 3
14789	}
14790	Line {
14791	SrcBlock "Counter"
14792	SrcPort 1
14793	Points [30, 0]
14794	Branch {
14795	DstBlock "Reinterpret"
14796	DstPort 1
14797	}
14798	Branch {
14799	Points [0, -195]
14800	DstBlock "Slice"
14801	DstPort 1
14802	}
14803	}
14804	Line {
14805	SrcBlock "MGCAGC_AGCDCO_SEL"
14806	SrcPort 1
14807	Points [70, 0; 0, 50]
14808	DstBlock "Mux2"
14809	DstPort 1
14810	}
14811	Line {
14812	SrcBlock "FromAGC_Radio3_Q"
14813	SrcPort 1
14814	Points [50, 0; 0, -65]
14815	DstBlock "Mux2"
14816	DstPort 3
14817	}
14818	Line {
14819	SrcBlock "Radio 3 ADC Q"
14820	SrcPort 1
14821	DstBlock "Mux2"
14822	DstPort 2
14823	}
14824	Line {
14825	SrcBlock "Mux2"
14826	SrcPort 1
14827	DstBlock "Register"
14828	DstPort 1
14829	}
14830	}
14831	}
14832	Block {
14833	BlockType SubSystem
14834	Name "Concatenates_1"
14835	Ports [4, 1]
14836	Position [695, 218, 740, 372]
14837	NamePlacement "alternate"
14838	MinAlgLoopOccurrences off
14839	PropExecContextOutsideSubsystem off
14840	RTWSystemCode "Auto"
14841	FunctionWithSeparateData off
14842	Opaque off
14843	RequestExecContextInheritance off
14844	MaskHideContents off
14845	System {
14846	Name "Concatenates_1"
14847	Location [2, 74, 1270, 726]
14848	Open off
14849	ModelBrowserVisibility off
14850	ModelBrowserWidth 200
14851	ScreenColor "white"
14852	PaperOrientation "landscape"
14853	PaperPositionMode "auto"
14854	PaperType "usletter"
14855	PaperUnits "inches"
14856	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
14857	TiledPageScale 1
14858	ShowPageBoundaries off
14859	ZoomFactor "100"
14860	Block {
14861	BlockType Inport
14862	Name "OTR_I"
14863	Position [395, 43, 425, 57]
14864	IconDisplay "Port number"
14865	OutDataType "sfix(16)"
14866	OutScaling "2^0"
14867	}
14868	Block {
14869	BlockType Inport
14870	Name "ADC_I"
14871	Position [330, 93, 360, 107]
14872	Port "2"
14873	IconDisplay "Port number"
14874	OutDataType "sfix(16)"
14875	OutScaling "2^0"
14876	}
14877	Block {
14878	BlockType Inport
14879	Name "OTR_Q"
14880	Position [390, 163, 420, 177]
14881	Port "3"
14882	IconDisplay "Port number"
14883	OutDataType "sfix(16)"
14884	OutScaling "2^0"
14885	}
14886	Block {
14887	BlockType Inport
14888	Name "ADC_Q"
14889	Position [330, 213, 360, 227]
14890	Port "4"
14891	IconDisplay "Port number"
14892	OutDataType "sfix(16)"
14893	OutScaling "2^0"
14894	}
14895	Block {
14896	BlockType Reference
14897	Name "Concat1"
14898	Ports [2, 1]
14899	Position [490, 191, 520, 229]
14900	ShowName off
14901	SourceBlock "xbsIndex_r4/Concat"
14902	SourceType "Xilinx Bus Concatenator Block"
14903	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
14904	num_inputs "2"
14905	dbl_ovrd off
14906	has_advanced_control "0"
14907	sggui_pos "-1,-1,-1,-1"
14908	block_type "concat"
14909	block_version "8.2"
14910	sg_icon_stat "30,38,1,1,white,blue,0,df1e5aba,right"
14911	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
14912	}
14913	Block {
14914	BlockType Reference
14915	Name "Concat2"
14916	Ports [2, 1]
14917	Position [490, 71, 520, 109]
14918	ShowName off
14919	SourceBlock "xbsIndex_r4/Concat"
14920	SourceType "Xilinx Bus Concatenator Block"
14921	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
14922	num_inputs "2"
14923	dbl_ovrd off
14924	has_advanced_control "0"
14925	sggui_pos "-1,-1,-1,-1"
14926	block_type "concat"
14927	block_version "8.2"
14928	sg_icon_stat "30,38,1,1,white,blue,0,df1e5aba,right"
14929	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
14930	}
14931	Block {
14932	BlockType Reference
14933	Name "Concat3"
14934	Ports [2, 1]
14935	Position [550, 150, 575, 230]
14936	ShowName off
14937	SourceBlock "xbsIndex_r4/Concat"
14938	SourceType "Xilinx Bus Concatenator Block"
14939	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
14940	num_inputs "2"
14941	dbl_ovrd off
14942	has_advanced_control "0"
14943	sggui_pos "-1,-1,-1,-1"
14944	block_type "concat"
14945	block_version "8.2"
14946	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
14947	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
14948	}
14949	Block {
14950	BlockType Reference
14951	Name "Concat4"
14952	Ports [2, 1]
14953	Position [550, 30, 575, 110]
14954	ShowName off
14955	SourceBlock "xbsIndex_r4/Concat"
14956	SourceType "Xilinx Bus Concatenator Block"
14957	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
14958	num_inputs "2"
14959	dbl_ovrd off
14960	has_advanced_control "0"
14961	sggui_pos "-1,-1,-1,-1"
14962	block_type "concat"
14963	block_version "8.2"
14964	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
14965	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
14966	}
14967	Block {
14968	BlockType Reference
14969	Name "Concat5"
14970	Ports [2, 1]
14971	Position [635, 50, 660, 130]
14972	ShowName off
14973	SourceBlock "xbsIndex_r4/Concat"
14974	SourceType "Xilinx Bus Concatenator Block"
14975	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
14976	num_inputs "2"
14977	dbl_ovrd off
14978	has_advanced_control "0"
14979	sggui_pos "-1,-1,-1,-1"
14980	block_type "concat"
14981	block_version "8.2"
14982	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
14983	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
14984	}
14985	Block {
14986	BlockType Reference
14987	Name "Reinterpret"
14988	Ports [1, 1]
14989	Position [385, 90, 420, 110]
14990	ShowName off
14991	SourceBlock "xbsIndex_r4/Reinterpret"
14992	SourceType "Xilinx Type Reinterpreter Block"
14993	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
14994	force_arith_type on
14995	arith_type "Unsigned"
14996	force_bin_pt on
14997	bin_pt "0"
14998	has_advanced_control "0"
14999	sggui_pos "20,20,356,309"
15000	block_type "reinterpret"
15001	block_version "8.2"
15002	sg_icon_stat "35,20,1,1,white,blue,0,8982c1db,right"
15003	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
15004	}
15005	Block {
15006	BlockType Reference
15007	Name "Reinterpret1"
15008	Ports [1, 1]
15009	Position [390, 210, 425, 230]
15010	ShowName off
15011	SourceBlock "xbsIndex_r4/Reinterpret"
15012	SourceType "Xilinx Type Reinterpreter Block"
15013	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
15014	force_arith_type on
15015	arith_type "Unsigned"
15016	force_bin_pt on
15017	bin_pt "0"
15018	has_advanced_control "0"
15019	sggui_pos "20,20,356,309"
15020	block_type "reinterpret"
15021	block_version "8.2"
15022	sg_icon_stat "35,20,1,1,white,blue,0,8982c1db,right"
15023	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
15024	}
15025	Block {
15026	BlockType Reference
15027	Name "zero"
15028	Ports [0, 1]
15029	Position [440, 191, 460, 209]
15030	ShowName off
15031	SourceBlock "xbsIndex_r4/Constant"
15032	SourceType "Xilinx Constant Block Block"
15033	arith_type "Unsigned"
15034	const "0"
15035	n_bits "1"
15036	bin_pt "0"
15037	explicit_period off
15038	period "1"
15039	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
15040	equ "P=C"
15041	opselect "C"
15042	inp2 "PCIN>>17"
15043	opr "+"
15044	inp1 "P"
15045	carry "CIN"
15046	dbl_ovrd off
15047	has_advanced_control "0"
15048	sggui_pos "-1,-1,-1,-1"
15049	block_type "constant"
15050	block_version "VER_STRING_GOES_HERE"
15051	sg_icon_stat "20,18,1,1,white,blue,0,72d575a1,right"
15052	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
15053	}
15054	Block {
15055	BlockType Reference
15056	Name "zero1"
15057	Ports [0, 1]
15058	Position [440, 71, 460, 89]
15059	ShowName off
15060	SourceBlock "xbsIndex_r4/Constant"
15061	SourceType "Xilinx Constant Block Block"
15062	arith_type "Unsigned"
15063	const "0"
15064	n_bits "1"
15065	bin_pt "0"
15066	explicit_period off
15067	period "1"
15068	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
15069	equ "P=C"
15070	opselect "C"
15071	inp2 "PCIN>>17"
15072	opr "+"
15073	inp1 "P"
15074	carry "CIN"
15075	dbl_ovrd off
15076	has_advanced_control "0"
15077	sggui_pos "-1,-1,-1,-1"
15078	block_type "constant"
15079	block_version "VER_STRING_GOES_HERE"
15080	sg_icon_stat "20,18,1,1,white,blue,0,72d575a1,right"
15081	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
15082	}
15083	Block {
15084	BlockType Outport
15085	Name "32b"
15086	Position [840, 83, 870, 97]
15087	IconDisplay "Port number"
15088	OutDataType "sfix(16)"
15089	OutScaling "2^0"
15090	}
15091	Line {
15092	SrcBlock "Reinterpret1"
15093	SrcPort 1
15094	DstBlock "Concat1"
15095	DstPort 2
15096	}
15097	Line {
15098	SrcBlock "Reinterpret"
15099	SrcPort 1
15100	DstBlock "Concat2"
15101	DstPort 2
15102	}
15103	Line {
15104	SrcBlock "ADC_Q"
15105	SrcPort 1
15106	DstBlock "Reinterpret1"
15107	DstPort 1
15108	}
15109	Line {
15110	SrcBlock "OTR_Q"
15111	SrcPort 1
15112	DstBlock "Concat3"
15113	DstPort 1
15114	}
15115	Line {
15116	SrcBlock "ADC_I"
15117	SrcPort 1
15118	DstBlock "Reinterpret"
15119	DstPort 1
15120	}
15121	Line {
15122	SrcBlock "Concat5"
15123	SrcPort 1
15124	DstBlock "32b"
15125	DstPort 1
15126	}
15127	Line {
15128	SrcBlock "OTR_I"
15129	SrcPort 1
15130	DstBlock "Concat4"
15131	DstPort 1
15132	}
15133	Line {
15134	SrcBlock "Concat3"
15135	SrcPort 1
15136	Points [25, 0; 0, -80]
15137	DstBlock "Concat5"
15138	DstPort 2
15139	}
15140	Line {
15141	SrcBlock "Concat4"
15142	SrcPort 1
15143	DstBlock "Concat5"
15144	DstPort 1
15145	}
15146	Line {
15147	SrcBlock "Concat2"
15148	SrcPort 1
15149	Points [0, 0]
15150	DstBlock "Concat4"
15151	DstPort 2
15152	}
15153	Line {
15154	SrcBlock "zero1"
15155	SrcPort 1
15156	DstBlock "Concat2"
15157	DstPort 1
15158	}
15159	Line {
15160	SrcBlock "Concat1"
15161	SrcPort 1
15162	DstBlock "Concat3"
15163	DstPort 2
15164	}
15165	Line {
15166	SrcBlock "zero"
15167	SrcPort 1
15168	DstBlock "Concat1"
15169	DstPort 1
15170	}
15171	}
15172	}
15173	Block {
15174	BlockType Reference
15175	Name "Gateway Out1"
15176	Ports [1, 1]
15177	Position [725, 135, 755, 145]
15178	ShowName off
15179	SourceBlock "xbsIndex_r4/Gateway Out"
15180	SourceType "Xilinx Gateway Out Block"
15181	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
15182	hdl_port off
15183	timing_constraint "None"
15184	locs_specified off
15185	LOCs "{}"
15186	xl_use_area off
15187	xl_area "[0,0,0,0,0,0,0]"
15188	has_advanced_control "0"
15189	sggui_pos "20,20,336,386"
15190	block_type "gatewayout"
15191	block_version "10.1.2"
15192	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
15193	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
15194	}
15195	Block {
15196	BlockType Reference
15197	Name "Gateway Out4"
15198	Ports [1, 1]
15199	Position [725, 120, 755, 130]
15200	ShowName off
15201	SourceBlock "xbsIndex_r4/Gateway Out"
15202	SourceType "Xilinx Gateway Out Block"
15203	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
15204	hdl_port off
15205	timing_constraint "None"
15206	locs_specified off
15207	LOCs "{}"
15208	xl_use_area off
15209	xl_area "[0,0,0,0,0,0,0]"
15210	has_advanced_control "0"
15211	sggui_pos "20,20,336,386"
15212	block_type "gatewayout"
15213	block_version "10.1.2"
15214	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
15215	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
15216	}
15217	Block {
15218	BlockType SubSystem
15219	Name "RSSI"
15220	Ports [1, 1]
15221	Position [495, 397, 565, 433]
15222	MinAlgLoopOccurrences off
15223	PropExecContextOutsideSubsystem off
15224	RTWSystemCode "Auto"
15225	FunctionWithSeparateData off
15226	Opaque off
15227	RequestExecContextInheritance off
15228	MaskHideContents off
15229	System {
15230	Name "RSSI"
15231	Location [2, 74, 1184, 726]
15232	Open off
15233	ModelBrowserVisibility off
15234	ModelBrowserWidth 200
15235	ScreenColor "white"
15236	PaperOrientation "landscape"
15237	PaperPositionMode "auto"
15238	PaperType "usletter"
15239	PaperUnits "inches"
15240	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
15241	TiledPageScale 1
15242	ShowPageBoundaries off
15243	ZoomFactor "100"
15244	Block {
15245	BlockType Inport
15246	Name "Debug"
15247	Position [465, 28, 495, 42]
15248	IconDisplay "Port number"
15249	OutDataType "sfix(16)"
15250	OutScaling "2^0"
15251	}
15252	Block {
15253	BlockType Constant
15254	Name "Constant1"
15255	Position [160, 100, 190, 130]
15256	ShowName off
15257	Value "0"
15258	OutDataType "sfix(16)"
15259	OutScaling "2^0"
15260	}
15261	Block {
15262	BlockType Reference
15263	Name "Counter"
15264	Ports [0, 1]
15265	Position [380, 120, 440, 180]
15266	SourceBlock "xbsIndex_r4/Counter"
15267	SourceType "Xilinx Counter Block"
15268	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
15269	cnt_type "Free Running"
15270	cnt_to "Inf"
15271	operation "Up"
15272	start_count "0"
15273	cnt_by_val "1"
15274	arith_type "Unsigned"
15275	n_bits "10"
15276	bin_pt "0"
15277	load_pin off
15278	rst off
15279	en off
15280	explicit_period "on"
15281	period "1"
15282	dbl_ovrd off
15283	use_behavioral_HDL off
15284	use_rpm off
15285	implementation "Fabric"
15286	xl_use_area off
15287	xl_area "[0,0,0,0,0,0,0]"
15288	has_advanced_control "0"
15289	sggui_pos "20,20,348,619"
15290	block_type "counter"
15291	block_version "10.1.3"
15292	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
15293	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
15294	}
15295	Block {
15296	BlockType Reference
15297	Name "Mux"
15298	Ports [3, 1]
15299	Position [600, 63, 645, 167]
15300	SourceBlock "xbsIndex_r4/Mux"
15301	SourceType "Xilinx Bus Multiplexer Block"
15302	inputs "2"
15303	en off
15304	latency "0"
15305	precision "Full"
15306	arith_type "Unsigned"
15307	n_bits "1"
15308	bin_pt "0"
15309	quantization "Truncate"
15310	overflow "Wrap"
15311	dbl_ovrd off
15312	xl_use_area off
15313	xl_area "[0,0,0,0,0,0,0]"
15314	has_advanced_control "0"
15315	sggui_pos "20,20,348,303"
15316	block_type "mux"
15317	block_version "10.1.3"
15318	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
15319	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
15320	}
15321	Block {
15322	BlockType Reference
15323	Name "radio3_RSSI"
15324	Ports [1, 1]
15325	Position [280, 109, 335, 121]
15326	NamePlacement "alternate"
15327	SourceBlock "xbsIndex_r4/Gateway In"
15328	SourceType "Xilinx Gateway In Block"
15329	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
15330	arith_type "Unsigned"
15331	n_bits "10"
15332	bin_pt "0"
15333	quantization "Truncate"
15334	overflow "Wrap"
15335	period "1"
15336	dbl_ovrd off
15337	timing_constraint "None"
15338	locs_specified off
15339	LOCs "{}"
15340	xl_use_area off
15341	xl_area "[0,0,0,0,0,0,0]"
15342	has_advanced_control "0"
15343	sggui_pos "20,20,356,432"
15344	block_type "gatewayin"
15345	block_version "VER_STRING_GOES_HERE"
15346	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
15347	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
15348	}
15349	Block {
15350	BlockType Outport
15351	Name "RSSI"
15352	Position [740, 108, 770, 122]
15353	IconDisplay "Port number"
15354	OutDataType "sfix(16)"
15355	OutScaling "2^0"
15356	}
15357	Line {
15358	SrcBlock "Constant1"
15359	SrcPort 1
15360	DstBlock "radio3_RSSI"
15361	DstPort 1
15362	}
15363	Line {
15364	SrcBlock "Debug"
15365	SrcPort 1
15366	Points [40, 0; 0, 45]
15367	DstBlock "Mux"
15368	DstPort 1
15369	}
15370	Line {
15371	SrcBlock "radio3_RSSI"
15372	SrcPort 1
15373	DstBlock "Mux"
15374	DstPort 2
15375	}
15376	Line {
15377	SrcBlock "Counter"
15378	SrcPort 1
15379	DstBlock "Mux"
15380	DstPort 3
15381	}
15382	Line {
15383	SrcBlock "Mux"
15384	SrcPort 1
15385	DstBlock "RSSI"
15386	DstPort 1
15387	}
15388	}
15389	}
15390	Block {
15391	BlockType Scope
15392	Name "Scope"
15393	Ports [2]
15394	Position [800, 111, 830, 164]
15395	Floating off
15396	Location [5, 34, 1285, 912]
15397	Open off
15398	NumInputPorts "2"
15399	List {
15400	ListType AxesTitles
15401	axes1 "%<SignalLabel>"
15402	axes2 "%<SignalLabel>"
15403	}
15404	YMin "-5~-5"
15405	YMax "5~5"
15406	DataFormat "StructureWithTime"
15407	SampleTime "0"
15408	}
15409	Block {
15410	BlockType Outport
15411	Name "Radio 3 RSSI"
15412	Position [645, 408, 675, 422]
15413	IconDisplay "Port number"
15414	OutDataType "sfix(16)"
15415	OutScaling "2^0"
15416	}
15417	Block {
15418	BlockType Outport
15419	Name "Radio 3 I/Q"
15420	Position [865, 288, 895, 302]
15421	Port "2"
15422	IconDisplay "Port number"
15423	OutDataType "sfix(16)"
15424	OutScaling "2^0"
15425	}
15426	Line {
15427	SrcBlock "ADC Q"
15428	SrcPort 2
15429	Points [65, 0; 0, 20; 30, 0]
15430	Branch {
15431	DstBlock "Concatenates_1"
15432	DstPort 4
15433	}
15434	Branch {
15435	Points [0, -215]
15436	DstBlock "Gateway Out1"
15437	DstPort 1
15438	}
15439	}
15440	Line {
15441	SrcBlock "ADC Q"
15442	SrcPort 1
15443	DstBlock "Concatenates_1"
15444	DstPort 3
15445	}
15446	Line {
15447	SrcBlock "ADC I"
15448	SrcPort 2
15449	Points [85, 0]
15450	Branch {
15451	DstBlock "Concatenates_1"
15452	DstPort 2
15453	}
15454	Branch {
15455	Points [0, -150]
15456	DstBlock "Gateway Out4"
15457	DstPort 1
15458	}
15459	}
15460	Line {
15461	SrcBlock "ADC I"
15462	SrcPort 1
15463	Points [0, -20]
15464	DstBlock "Concatenates_1"
15465	DstPort 1
15466	}
15467	Line {
15468	SrcBlock "Concatenates_1"
15469	SrcPort 1
15470	Points [0, 0]
15471	DstBlock "Radio 3 I/Q"
15472	DstPort 1
15473	}
15474	Line {
15475	SrcBlock "Gateway Out4"
15476	SrcPort 1
15477	DstBlock "Scope"
15478	DstPort 1
15479	}
15480	Line {
15481	SrcBlock "Gateway Out1"
15482	SrcPort 1
15483	Points [25, 0]
15484	DstBlock "Scope"
15485	DstPort 2
15486	}
15487	Line {
15488	SrcBlock "DebugRxBuffers"
15489	SrcPort 1
15490	Points [145, 0]
15491	Branch {
15492	DstBlock "ADC I"
15493	DstPort 1
15494	}
15495	Branch {
15496	Points [0, 60]
15497	Branch {
15498	DstBlock "ADC Q"
15499	DstPort 1
15500	}
15501	Branch {
15502	Points [0, 100]
15503	DstBlock "RSSI"
15504	DstPort 1
15505	}
15506	}
15507	}
15508	Line {
15509	SrcBlock "RSSI"
15510	SrcPort 1
15511	DstBlock "Radio 3 RSSI"
15512	DstPort 1
15513	}
15514	Line {
15515	SrcBlock "MGCAGC_AGCDCO_SEL"
15516	SrcPort 1
15517	Points [95, 0]
15518	Branch {
15519	DstBlock "ADC Q"
15520	DstPort 2
15521	}
15522	Branch {
15523	Points [0, -60]
15524	DstBlock "ADC I"
15525	DstPort 2
15526	}
15527	}
15528	Annotation {
15529	Position [518, 257]
15530	}
15531	}
15532	}
15533	Block {
15534	BlockType SubSystem
15535	Name "Radio 3 Outputs"
15536	Ports [1]
15537	Position [1180, 858, 1225, 902]
15538	NamePlacement "alternate"
15539	MinAlgLoopOccurrences off
15540	PropExecContextOutsideSubsystem off
15541	RTWSystemCode "Auto"
15542	FunctionWithSeparateData off
15543	Opaque off
15544	RequestExecContextInheritance off
15545	MaskHideContents off
15546	System {
15547	Name "Radio 3 Outputs"
15548	Location [60, 247, 880, 529]
15549	Open off
15550	ModelBrowserVisibility off
15551	ModelBrowserWidth 200
15552	ScreenColor "white"
15553	PaperOrientation "landscape"
15554	PaperPositionMode "auto"
15555	PaperType "usletter"
15556	PaperUnits "inches"
15557	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
15558	TiledPageScale 1
15559	ShowPageBoundaries off
15560	ZoomFactor "100"
15561	Block {
15562	BlockType Inport
15563	Name "32b"
15564	Position [145, 148, 175, 162]
15565	IconDisplay "Port number"
15566	OutDataType "sfix(16)"
15567	OutScaling "2^0"
15568	}
15569	Block {
15570	BlockType Reference
15571	Name "16LSB"
15572	Ports [1, 1]
15573	Position [305, 147, 340, 163]
15574	SourceBlock "xbsIndex_r4/Slice"
15575	SourceType "Xilinx Bit Slice Extractor Block"
15576	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
15577	nbits "16"
15578	boolean_output off
15579	mode "Lower Bit Location + Width"
15580	bit1 "0"
15581	base1 "MSB of Input"
15582	bit0 "0"
15583	base0 "LSB of Input"
15584	dbl_ovrd off
15585	has_advanced_control "0"
15586	sggui_pos "593,46,442,407"
15587	block_type "slice"
15588	block_version "9.1.01"
15589	sg_icon_stat "35,16,1,1,white,blue,0,b1026674,right"
15590	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
15591	}
15592	Block {
15593	BlockType Reference
15594	Name "16MSB"
15595	Ports [1, 1]
15596	Position [305, 82, 345, 98]
15597	SourceBlock "xbsIndex_r4/Slice"
15598	SourceType "Xilinx Bit Slice Extractor Block"
15599	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
15600	nbits "16"
15601	boolean_output off
15602	mode "Upper Bit Location + Width"
15603	bit1 "0"
15604	base1 "MSB of Input"
15605	bit0 "0"
15606	base0 "LSB of Input"
15607	dbl_ovrd off
15608	has_advanced_control "0"
15609	sggui_pos "593,46,442,407"
15610	block_type "slice"
15611	block_version "9.1.01"
15612	sg_icon_stat "40,16,1,1,white,blue,0,b1026674,right"
15613	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
15614	}
15615	Block {
15616	BlockType Reference
15617	Name "Radio 3 DAC I"
15618	Ports [1, 1]
15619	Position [560, 69, 655, 111]
15620	LinkData {
15621	BlockName "Convert"
15622	DialogParameters {
15623	sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right"
15624	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
15625	}
15626	BlockName "radio3_dac_I"
15627	DialogParameters {
15628	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
15629	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
15630	}
15631	}
15632	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 3 DAC I"
15633	SourceType ""
15634	ShowPortLabels "FromPortIcon"
15635	SystemSampleTime "-1"
15636	FunctionWithSeparateData off
15637	RTWMemSecFuncInitTerm "Inherit from model"
15638	RTWMemSecFuncExecute "Inherit from model"
15639	RTWMemSecDataConstants "Inherit from model"
15640	RTWMemSecDataInternal "Inherit from model"
15641	RTWMemSecDataParameters "Inherit from model"
15642	}
15643	Block {
15644	BlockType Reference
15645	Name "Radio 3 DAC Q"
15646	Ports [1, 1]
15647	Position [560, 134, 655, 176]
15648	LinkData {
15649	BlockName "Convert"
15650	DialogParameters {
15651	sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right"
15652	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
15653	}
15654	BlockName "radio3_dac_Q"
15655	DialogParameters {
15656	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
15657	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
15658	}
15659	}
15660	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 3 DAC Q"
15661	SourceType ""
15662	ShowPortLabels "FromPortIcon"
15663	SystemSampleTime "-1"
15664	FunctionWithSeparateData off
15665	RTWMemSecFuncInitTerm "Inherit from model"
15666	RTWMemSecFuncExecute "Inherit from model"
15667	RTWMemSecDataConstants "Inherit from model"
15668	RTWMemSecDataInternal "Inherit from model"
15669	RTWMemSecDataParameters "Inherit from model"
15670	}
15671	Block {
15672	BlockType Reference
15673	Name "Register"
15674	Ports [1, 1]
15675	Position [475, 79, 520, 101]
15676	ShowName off
15677	SourceBlock "xbsIndex_r4/Register"
15678	SourceType "Xilinx Register Block"
15679	init "0"
15680	rst off
15681	en off
15682	dbl_ovrd off
15683	xl_use_area off
15684	xl_area "[0,0,0,0,0,0,0]"
15685	has_advanced_control "0"
15686	sggui_pos "568,185,356,193"
15687	block_type "register"
15688	block_version "9.1.01"
15689	sg_icon_stat "45,22,1,1,white,blue,0,ac6b57db,right"
15690	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
15691	}
15692	Block {
15693	BlockType Reference
15694	Name "Register1"
15695	Ports [1, 1]
15696	Position [475, 144, 520, 166]
15697	ShowName off
15698	SourceBlock "xbsIndex_r4/Register"
15699	SourceType "Xilinx Register Block"
15700	init "0"
15701	rst off
15702	en off
15703	dbl_ovrd off
15704	xl_use_area off
15705	xl_area "[0,0,0,0,0,0,0]"
15706	has_advanced_control "0"
15707	sggui_pos "568,185,356,193"
15708	block_type "register"
15709	block_version "9.1.01"
15710	sg_icon_stat "45,22,1,1,white,blue,0,ac6b57db,right"
15711	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
15712	}
15713	Block {
15714	BlockType Reference
15715	Name "Reinterpret"
15716	Ports [1, 1]
15717	Position [380, 81, 440, 99]
15718	ShowName off
15719	SourceBlock "xbsIndex_r4/Reinterpret"
15720	SourceType "Xilinx Type Reinterpreter Block"
15721	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
15722	force_arith_type on
15723	arith_type "Signed (2's comp)"
15724	force_bin_pt on
15725	bin_pt "15"
15726	has_advanced_control "0"
15727	sggui_pos "436,54,356,309"
15728	block_type "reinterpret"
15729	block_version "9.1.01"
15730	sg_icon_stat "60,18,1,1,white,blue,0,8982c1db,right"
15731	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
15732	}
15733	Block {
15734	BlockType Reference
15735	Name "Reinterpret1"
15736	Ports [1, 1]
15737	Position [380, 146, 440, 164]
15738	ShowName off
15739	SourceBlock "xbsIndex_r4/Reinterpret"
15740	SourceType "Xilinx Type Reinterpreter Block"
15741	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
15742	force_arith_type on
15743	arith_type "Signed (2's comp)"
15744	force_bin_pt on
15745	bin_pt "15"
15746	has_advanced_control "0"
15747	sggui_pos "436,54,356,309"
15748	block_type "reinterpret"
15749	block_version "9.1.01"
15750	sg_icon_stat "60,18,1,1,white,blue,0,8982c1db,right"
15751	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
15752	}
15753	Block {
15754	BlockType Terminator
15755	Name "Terminator"
15756	Position [680, 80, 700, 100]
15757	ShowName off
15758	}
15759	Block {
15760	BlockType Terminator
15761	Name "Terminator1"
15762	Position [685, 145, 705, 165]
15763	ShowName off
15764	}
15765	Line {
15766	SrcBlock "32b"
15767	SrcPort 1
15768	Points [85, 0]
15769	Branch {
15770	DstBlock "16LSB"
15771	DstPort 1
15772	}
15773	Branch {
15774	Points [0, -65]
15775	DstBlock "16MSB"
15776	DstPort 1
15777	}
15778	}
15779	Line {
15780	SrcBlock "16MSB"
15781	SrcPort 1
15782	DstBlock "Reinterpret"
15783	DstPort 1
15784	}
15785	Line {
15786	SrcBlock "16LSB"
15787	SrcPort 1
15788	DstBlock "Reinterpret1"
15789	DstPort 1
15790	}
15791	Line {
15792	SrcBlock "Reinterpret"
15793	SrcPort 1
15794	DstBlock "Register"
15795	DstPort 1
15796	}
15797	Line {
15798	SrcBlock "Reinterpret1"
15799	SrcPort 1
15800	DstBlock "Register1"
15801	DstPort 1
15802	}
15803	Line {
15804	SrcBlock "Register"
15805	SrcPort 1
15806	DstBlock "Radio 3 DAC I"
15807	DstPort 1
15808	}
15809	Line {
15810	SrcBlock "Register1"
15811	SrcPort 1
15812	DstBlock "Radio 3 DAC Q"
15813	DstPort 1
15814	}
15815	Line {
15816	SrcBlock "Radio 3 DAC I"
15817	SrcPort 1
15818	DstBlock "Terminator"
15819	DstPort 1
15820	}
15821	Line {
15822	SrcBlock "Radio 3 DAC Q"
15823	SrcPort 1
15824	DstBlock "Terminator1"
15825	DstPort 1
15826	}
15827	}
15828	}
15829	Block {
15830	BlockType SubSystem
15831	Name "Radio 4\nRx Buffers"
15832	Ports [5]
15833	Position [1175, 465, 1240, 565]
15834	MinAlgLoopOccurrences off
15835	PropExecContextOutsideSubsystem off
15836	RTWSystemCode "Auto"
15837	FunctionWithSeparateData off
15838	Opaque off
15839	RequestExecContextInheritance off
15840	MaskHideContents off
15841	System {
15842	Name "Radio 4\nRx Buffers"
15843	Location [2, 74, 1270, 726]
15844	Open off
15845	ModelBrowserVisibility off
15846	ModelBrowserWidth 200
15847	ScreenColor "white"
15848	PaperOrientation "landscape"
15849	PaperPositionMode "auto"
15850	PaperType "usletter"
15851	PaperUnits "inches"
15852	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
15853	TiledPageScale 1
15854	ShowPageBoundaries off
15855	ZoomFactor "100"
15856	Block {
15857	BlockType Inport
15858	Name "RSSI"
15859	Position [450, 313, 480, 327]
15860	IconDisplay "Port number"
15861	OutDataType "sfix(16)"
15862	OutScaling "2^0"
15863	}
15864	Block {
15865	BlockType Inport
15866	Name "I/Q"
15867	Position [545, 163, 575, 177]
15868	Port "2"
15869	IconDisplay "Port number"
15870	OutDataType "sfix(16)"
15871	OutScaling "2^0"
15872	}
15873	Block {
15874	BlockType Inport
15875	Name "Addr"
15876	Position [325, 128, 355, 142]
15877	Port "3"
15878	IconDisplay "Port number"
15879	OutDataType "sfix(16)"
15880	OutScaling "2^0"
15881	}
15882	Block {
15883	BlockType Inport
15884	Name "WE"
15885	Position [110, 183, 140, 197]
15886	Port "4"
15887	IconDisplay "Port number"
15888	OutDataType "sfix(16)"
15889	OutScaling "2^0"
15890	}
15891	Block {
15892	BlockType Inport
15893	Name "EN"
15894	Position [110, 213, 140, 227]
15895	Port "5"
15896	IconDisplay "Port number"
15897	OutDataType "sfix(16)"
15898	OutScaling "2^0"
15899	}
15900	Block {
15901	BlockType Reference
15902	Name "Convert1"
15903	Ports [1, 1]
15904	Position [185, 212, 210, 228]
15905	ShowName off
15906	SourceBlock "xbsIndex_r4/Convert"
15907	SourceType "Xilinx Type Converter Block"
15908	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
15909	arith_type "Boolean"
15910	n_bits "16"
15911	bin_pt "14"
15912	quantization "Truncate"
15913	overflow "Wrap"
15914	latency "0"
15915	dbl_ovrd off
15916	pipeline off
15917	xl_use_area off
15918	xl_area "[0,0,0,0,0,0,0]"
15919	has_advanced_control "0"
15920	sggui_pos "20,20,374,375"
15921	block_type "convert"
15922	block_version "8.2"
15923	sg_icon_stat "25,16,1,1,white,blue,0,74901e60,right"
15924	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
15925	}
15926	Block {
15927	BlockType Reference
15928	Name "Gateway Out"
15929	Ports [1, 1]
15930	Position [500, 30, 530, 40]
15931	ShowName off
15932	SourceBlock "xbsIndex_r4/Gateway Out"
15933	SourceType "Xilinx Gateway Out Block"
15934	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
15935	hdl_port off
15936	timing_constraint "None"
15937	locs_specified off
15938	LOCs "{}"
15939	xl_use_area off
15940	xl_area "[0,0,0,0,0,0,0]"
15941	has_advanced_control "0"
15942	sggui_pos "20,20,336,386"
15943	block_type "gatewayout"
15944	block_version "10.1.2"
15945	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
15946	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
15947	}
15948	Block {
15949	BlockType Reference
15950	Name "Gateway Out1"
15951	Ports [1, 1]
15952	Position [500, 70, 530, 80]
15953	ShowName off
15954	SourceBlock "xbsIndex_r4/Gateway Out"
15955	SourceType "Xilinx Gateway Out Block"
15956	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
15957	hdl_port off
15958	timing_constraint "None"
15959	locs_specified off
15960	LOCs "{}"
15961	xl_use_area off
15962	xl_area "[0,0,0,0,0,0,0]"
15963	has_advanced_control "0"
15964	sggui_pos "20,20,336,386"
15965	block_type "gatewayout"
15966	block_version "10.1.2"
15967	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
15968	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
15969	}
15970	Block {
15971	BlockType Reference
15972	Name "Logical"
15973	Ports [2, 1]
15974	Position [255, 175, 310, 235]
15975	SourceBlock "xbsIndex_r4/Logical"
15976	SourceType "Xilinx Logical Block Block"
15977	logical_function "AND"
15978	inputs "2"
15979	en off
15980	latency "0"
15981	precision "Full"
15982	arith_type "Unsigned"
15983	n_bits "16"
15984	bin_pt "0"
15985	align_bp on
15986	dbl_ovrd off
15987	xl_use_area off
15988	xl_area "[0,0,0,0,0,0,0]"
15989	has_advanced_control "0"
15990	sggui_pos "-1,-1,-1,-1"
15991	block_type "logical"
15992	block_version "9.1.01"
15993	sg_icon_stat "55,60,1,1,white,blue,0,087b5522,right"
15994	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
15995	}
15996	Block {
15997	BlockType SubSystem
15998	Name "Radio 4\nRSSI Buffer"
15999	Ports [3]
16000	Position [650, 264, 705, 376]
16001	MinAlgLoopOccurrences off
16002	PropExecContextOutsideSubsystem off
16003	RTWSystemCode "Auto"
16004	FunctionWithSeparateData off
16005	Opaque off
16006	RequestExecContextInheritance off
16007	MaskHideContents off
16008	System {
16009	Name "Radio 4\nRSSI Buffer"
16010	Location [2, 70, 1918, 1150]
16011	Open off
16012	ModelBrowserVisibility off
16013	ModelBrowserWidth 200
16014	ScreenColor "white"
16015	PaperOrientation "landscape"
16016	PaperPositionMode "auto"
16017	PaperType "usletter"
16018	PaperUnits "inches"
16019	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
16020	TiledPageScale 1
16021	ShowPageBoundaries off
16022	ZoomFactor "100"
16023	Block {
16024	BlockType Inport
16025	Name "Addr_14b"
16026	Position [325, 348, 355, 362]
16027	NamePlacement "alternate"
16028	IconDisplay "Port number"
16029	OutDataType "sfix(16)"
16030	OutScaling "2^0"
16031	}
16032	Block {
16033	BlockType Inport
16034	Name "RSSI"
16035	Position [95, 383, 125, 397]
16036	Port "2"
16037	IconDisplay "Port number"
16038	OutDataType "sfix(16)"
16039	OutScaling "2^0"
16040	}
16041	Block {
16042	BlockType Inport
16043	Name "WE"
16044	Position [720, 478, 750, 492]
16045	Port "3"
16046	IconDisplay "Port number"
16047	OutDataType "sfix(16)"
16048	OutScaling "2^0"
16049	}
16050	Block {
16051	BlockType Reference
16052	Name "11MSB"
16053	Ports [1, 1]
16054	Position [430, 346, 470, 364]
16055	NamePlacement "alternate"
16056	SourceBlock "xbsIndex_r4/Slice"
16057	SourceType "Xilinx Bit Slice Extractor Block"
16058	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
16059	nbits "11"
16060	boolean_output off
16061	mode "Upper Bit Location + Width"
16062	bit1 "0"
16063	base1 "MSB of Input"
16064	bit0 "0"
16065	base0 "LSB of Input"
16066	dbl_ovrd off
16067	has_advanced_control "0"
16068	sggui_pos "20,20,449,407"
16069	block_type "slice"
16070	block_version "8.2"
16071	sg_icon_stat "40,18,1,1,white,blue,0,b1026674,right"
16072	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
16073	}
16074	Block {
16075	BlockType Reference
16076	Name "BIT[2]"
16077	Ports [1, 1]
16078	Position [430, 401, 470, 419]
16079	SourceBlock "xbsIndex_r4/Slice"
16080	SourceType "Xilinx Bit Slice Extractor Block"
16081	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
16082	nbits "1"
16083	boolean_output on
16084	mode "Lower Bit Location + Width"
16085	bit1 "0"
16086	base1 "MSB of Input"
16087	bit0 "2"
16088	base0 "LSB of Input"
16089	dbl_ovrd off
16090	has_advanced_control "0"
16091	sggui_pos "20,20,449,407"
16092	block_type "slice"
16093	block_version "8.2"
16094	sg_icon_stat "40,18,1,1,white,blue,0,b1026674,right"
16095	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
16096	}
16097	Block {
16098	BlockType Reference
16099	Name "Concat"
16100	Ports [2, 1]
16101	Position [685, 381, 725, 459]
16102	ShowName off
16103	SourceBlock "xbsIndex_r4/Concat"
16104	SourceType "Xilinx Bus Concatenator Block"
16105	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
16106	num_inputs "2"
16107	dbl_ovrd off
16108	has_advanced_control "0"
16109	sggui_pos "-1,-1,-1,-1"
16110	block_type "concat"
16111	block_version "10.1.2"
16112	sg_icon_stat "40,78,1,1,white,blue,0,df1e5aba,right"
16113	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
16114	}
16115	Block {
16116	BlockType Reference
16117	Name "Convert"
16118	Ports [1, 1]
16119	Position [285, 382, 320, 398]
16120	ShowName off
16121	SourceBlock "xbsIndex_r4/Convert"
16122	SourceType "Xilinx Type Converter Block"
16123	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
16124	arith_type "Unsigned"
16125	n_bits "16"
16126	bin_pt "0"
16127	quantization "Truncate"
16128	overflow "Wrap"
16129	latency "0"
16130	dbl_ovrd off
16131	pipeline off
16132	xl_use_area off
16133	xl_area "[0,0,0,0,0,0,0]"
16134	has_advanced_control "0"
16135	sggui_pos "20,20,461,375"
16136	block_type "convert"
16137	block_version "8.2"
16138	sg_icon_stat "35,16,1,1,white,blue,0,74901e60,right"
16139	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
16140	}
16141	Block {
16142	BlockType Reference
16143	Name "Inverter"
16144	Ports [1, 1]
16145	Position [510, 402, 540, 418]
16146	ShowName off
16147	SourceBlock "xbsIndex_r4/Inverter"
16148	SourceType "Xilinx Inverter Block"
16149	infoedit "Bitwise logical negation (one's complement) operator."
16150	en off
16151	latency "0"
16152	dbl_ovrd off
16153	xl_use_area off
16154	xl_area "[0,0,0,0,0,0,0]"
16155	has_advanced_control "0"
16156	sggui_pos "20,20,348,251"
16157	block_type "inv"
16158	block_version "10.1.2"
16159	sg_icon_stat "30,16,1,1,white,blue,0,1ab4a85f,right"
16160	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
16161	}
16162	Block {
16163	BlockType Reference
16164	Name "Register"
16165	Ports [2, 1]
16166	Position [580, 378, 625, 422]
16167	ShowName off
16168	SourceBlock "xbsIndex_r4/Register"
16169	SourceType "Xilinx Register Block"
16170	init "0"
16171	rst off
16172	en on
16173	dbl_ovrd off
16174	xl_use_area off
16175	xl_area "[0,0,0,0,0,0,0]"
16176	has_advanced_control "0"
16177	sggui_pos "20,20,348,193"
16178	block_type "register"
16179	block_version "10.1.2"
16180	sg_icon_stat "45,44,1,1,white,blue,0,cc3303a0,right"
16181	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
16182	}
16183	Block {
16184	BlockType Reference
16185	Name "Reinterpret1"
16186	Ports [1, 1]
16187	Position [180, 382, 215, 398]
16188	ShowName off
16189	SourceBlock "xbsIndex_r4/Reinterpret"
16190	SourceType "Xilinx Type Reinterpreter Block"
16191	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
16192	force_arith_type on
16193	arith_type "Unsigned"
16194	force_bin_pt on
16195	bin_pt "0"
16196	has_advanced_control "0"
16197	sggui_pos "436,54,356,312"
16198	block_type "reinterpret"
16199	block_version "9.1.01"
16200	sg_icon_stat "35,16,1,1,white,blue,0,8982c1db,right"
16201	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
16202	}
16203	Block {
16204	BlockType Reference
16205	Name "Shared Memory"
16206	Ports [3, 1]
16207	Position [800, 323, 880, 517]
16208	AttributesFormatString "<< %<shared_memory_name> >>"
16209	SourceBlock "xbsIndex_r4/Shared Memory"
16210	SourceType "Xilinx Shared Memory Random Access Memory Block"
16211	shared_memory_name "'RSSIBuff_Radio4'"
16212	depth "2^11"
16213	ownership "Locally Owned and Initialized"
16214	initVector "0"
16215	mutex "Unprotected"
16216	mode "Read and Write"
16217	write_mode "Read After Write"
16218	time_out "0"
16219	latency "1"
16220	explicit_data_type on
16221	arith_type "Unsigned"
16222	n_bits "32"
16223	bin_pt "0"
16224	xl_use_area off
16225	xl_area "[0,0,0,0,0,0,0]"
16226	implementation "Block RAM"
16227	use_rpm "off"
16228	has_advanced_control "0"
16229	sggui_pos "20,20,384,381"
16230	block_type "shmem"
16231	block_version "10.1.2"
16232	sg_icon_stat "80,194,1,1,white,blue,0,e2c38f9a,right"
16233	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
16234	}
16235	Block {
16236	BlockType Terminator
16237	Name "Terminator2"
16238	Position [945, 410, 965, 430]
16239	ShowName off
16240	}
16241	Line {
16242	SrcBlock "RSSI"
16243	SrcPort 1
16244	DstBlock "Reinterpret1"
16245	DstPort 1
16246	}
16247	Line {
16248	SrcBlock "Convert"
16249	SrcPort 1
16250	Points [35, 0]
16251	Branch {
16252	DstBlock "Register"
16253	DstPort 1
16254	}
16255	Branch {
16256	Points [0, 50]
16257	DstBlock "Concat"
16258	DstPort 2
16259	}
16260	}
16261	Line {
16262	SrcBlock "Addr_14b"
16263	SrcPort 1
16264	Points [40, 0]
16265	Branch {
16266	DstBlock "11MSB"
16267	DstPort 1
16268	}
16269	Branch {
16270	Points [0, 55]
16271	DstBlock "BIT[2]"
16272	DstPort 1
16273	}
16274	}
16275	Line {
16276	SrcBlock "WE"
16277	SrcPort 1
16278	DstBlock "Shared Memory"
16279	DstPort 3
16280	}
16281	Line {
16282	SrcBlock "Reinterpret1"
16283	SrcPort 1
16284	DstBlock "Convert"
16285	DstPort 1
16286	}
16287	Line {
16288	SrcBlock "Concat"
16289	SrcPort 1
16290	DstBlock "Shared Memory"
16291	DstPort 2
16292	}
16293	Line {
16294	SrcBlock "BIT[2]"
16295	SrcPort 1
16296	DstBlock "Inverter"
16297	DstPort 1
16298	}
16299	Line {
16300	SrcBlock "11MSB"
16301	SrcPort 1
16302	DstBlock "Shared Memory"
16303	DstPort 1
16304	}
16305	Line {
16306	SrcBlock "Shared Memory"
16307	SrcPort 1
16308	DstBlock "Terminator2"
16309	DstPort 1
16310	}
16311	Line {
16312	SrcBlock "Register"
16313	SrcPort 1
16314	DstBlock "Concat"
16315	DstPort 1
16316	}
16317	Line {
16318	SrcBlock "Inverter"
16319	SrcPort 1
16320	DstBlock "Register"
16321	DstPort 2
16322	}
16323	}
16324	}
16325	Block {
16326	BlockType SubSystem
16327	Name "Radio 4 I/Q\nBuffer"
16328	Ports [3]
16329	Position [650, 116, 705, 224]
16330	MinAlgLoopOccurrences off
16331	PropExecContextOutsideSubsystem off
16332	RTWSystemCode "Auto"
16333	FunctionWithSeparateData off
16334	Opaque off
16335	RequestExecContextInheritance off
16336	MaskHideContents off
16337	System {
16338	Name "Radio 4 I/Q\nBuffer"
16339	Location [2, 74, 1270, 726]
16340	Open off
16341	ModelBrowserVisibility off
16342	ModelBrowserWidth 200
16343	ScreenColor "white"
16344	PaperOrientation "landscape"
16345	PaperPositionMode "auto"
16346	PaperType "usletter"
16347	PaperUnits "inches"
16348	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
16349	TiledPageScale 1
16350	ShowPageBoundaries off
16351	ZoomFactor "100"
16352	Block {
16353	BlockType Inport
16354	Name "Addr_14b"
16355	Position [205, 68, 235, 82]
16356	IconDisplay "Port number"
16357	OutDataType "sfix(16)"
16358	OutScaling "2^0"
16359	}
16360	Block {
16361	BlockType Inport
16362	Name "I/Q_32b"
16363	Position [205, 98, 235, 112]
16364	Port "2"
16365	IconDisplay "Port number"
16366	OutDataType "sfix(16)"
16367	OutScaling "2^0"
16368	}
16369	Block {
16370	BlockType Inport
16371	Name "WE"
16372	Position [205, 128, 235, 142]
16373	Port "3"
16374	IconDisplay "Port number"
16375	OutDataType "sfix(16)"
16376	OutScaling "2^0"
16377	}
16378	Block {
16379	BlockType Reference
16380	Name "Shared Memory"
16381	Ports [3, 1]
16382	Position [320, 60, 400, 150]
16383	AttributesFormatString "<< %<shared_memory_name> >>"
16384	SourceBlock "xbsIndex_r4/Shared Memory"
16385	SourceType "Xilinx Shared Memory Random Access Memory Block"
16386	shared_memory_name "'RxBuff_Radio4'"
16387	depth "2^14"
16388	ownership "Locally Owned and Initialized"
16389	initVector "0"
16390	mutex "Unprotected"
16391	mode "Read and Write"
16392	write_mode "Read After Write"
16393	time_out "0"
16394	latency "1"
16395	explicit_data_type on
16396	arith_type "Unsigned"
16397	n_bits "32"
16398	bin_pt "0"
16399	xl_use_area off
16400	xl_area "[0,0,0,0,0,0,0]"
16401	implementation "Block RAM"
16402	use_rpm "off"
16403	has_advanced_control "0"
16404	sggui_pos "20,20,384,381"
16405	block_type "shmem"
16406	block_version "10.1.2"
16407	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
16408	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
16409	}
16410	Block {
16411	BlockType Terminator
16412	Name "Terminator"
16413	Position [450, 95, 470, 115]
16414	ShowName off
16415	}
16416	Line {
16417	SrcBlock "Shared Memory"
16418	SrcPort 1
16419	DstBlock "Terminator"
16420	DstPort 1
16421	}
16422	Line {
16423	SrcBlock "WE"
16424	SrcPort 1
16425	DstBlock "Shared Memory"
16426	DstPort 3
16427	}
16428	Line {
16429	SrcBlock "I/Q_32b"
16430	SrcPort 1
16431	DstBlock "Shared Memory"
16432	DstPort 2
16433	}
16434	Line {
16435	SrcBlock "Addr_14b"
16436	SrcPort 1
16437	DstBlock "Shared Memory"
16438	DstPort 1
16439	}
16440	}
16441	}
16442	Block {
16443	BlockType Scope
16444	Name "Scope"
16445	Ports [2]
16446	Position [585, 14, 625, 96]
16447	Floating off
16448	Location [5, 49, 1285, 757]
16449	Open off
16450	NumInputPorts "2"
16451	ZoomMode "yonly"
16452	List {
16453	ListType AxesTitles
16454	axes1 "%<SignalLabel>"
16455	axes2 "%<SignalLabel>"
16456	}
16457	YMin "-5~-5"
16458	YMax "5~5"
16459	SaveName "ScopeData2"
16460	DataFormat "StructureWithTime"
16461	MaxDataPoints "40000"
16462	SampleTime "0"
16463	}
16464	Line {
16465	SrcBlock "Gateway Out1"
16466	SrcPort 1
16467	DstBlock "Scope"
16468	DstPort 2
16469	}
16470	Line {
16471	SrcBlock "Gateway Out"
16472	SrcPort 1
16473	DstBlock "Scope"
16474	DstPort 1
16475	}
16476	Line {
16477	SrcBlock "I/Q"
16478	SrcPort 1
16479	DstBlock "Radio 4 I/Q\nBuffer"
16480	DstPort 2
16481	}
16482	Line {
16483	SrcBlock "Convert1"
16484	SrcPort 1
16485	DstBlock "Logical"
16486	DstPort 2
16487	}
16488	Line {
16489	SrcBlock "EN"
16490	SrcPort 1
16491	DstBlock "Convert1"
16492	DstPort 1
16493	}
16494	Line {
16495	SrcBlock "WE"
16496	SrcPort 1
16497	DstBlock "Logical"
16498	DstPort 1
16499	}
16500	Line {
16501	SrcBlock "Addr"
16502	SrcPort 1
16503	Points [75, 0]
16504	Branch {
16505	Points [0, -100]
16506	DstBlock "Gateway Out"
16507	DstPort 1
16508	}
16509	Branch {
16510	Labels [0, 0]
16511	DstBlock "Radio 4 I/Q\nBuffer"
16512	DstPort 1
16513	}
16514	Branch {
16515	Points [0, 150]
16516	DstBlock "Radio 4\nRSSI Buffer"
16517	DstPort 1
16518	}
16519	}
16520	Line {
16521	SrcBlock "Logical"
16522	SrcPort 1
16523	Points [65, 0]
16524	Branch {
16525	Points [85, 0]
16526	Branch {
16527	Points [0, -130]
16528	DstBlock "Gateway Out1"
16529	DstPort 1
16530	}
16531	Branch {
16532	Labels [0, 0]
16533	DstBlock "Radio 4 I/Q\nBuffer"
16534	DstPort 3
16535	}
16536	}
16537	Branch {
16538	Points [0, 150]
16539	DstBlock "Radio 4\nRSSI Buffer"
16540	DstPort 3
16541	}
16542	}
16543	Line {
16544	SrcBlock "RSSI"
16545	SrcPort 1
16546	DstBlock "Radio 4\nRSSI Buffer"
16547	DstPort 2
16548	}
16549	}
16550	}
16551	Block {
16552	BlockType SubSystem
16553	Name "Radio 4\nTx Buffer"
16554	Ports [3, 1]
16555	Position [1015, 952, 1095, 1008]
16556	MinAlgLoopOccurrences off
16557	PropExecContextOutsideSubsystem off
16558	RTWSystemCode "Auto"
16559	FunctionWithSeparateData off
16560	Opaque off
16561	RequestExecContextInheritance off
16562	MaskHideContents off
16563	System {
16564	Name "Radio 4\nTx Buffer"
16565	Location [2, 74, 1270, 726]
16566	Open off
16567	ModelBrowserVisibility off
16568	ModelBrowserWidth 200
16569	ScreenColor "white"
16570	PaperOrientation "landscape"
16571	PaperPositionMode "auto"
16572	PaperType "usletter"
16573	PaperUnits "inches"
16574	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
16575	TiledPageScale 1
16576	ShowPageBoundaries off
16577	ZoomFactor "100"
16578	Block {
16579	BlockType Inport
16580	Name "RdAddr_14b"
16581	Position [350, 288, 380, 302]
16582	NamePlacement "alternate"
16583	IconDisplay "Port number"
16584	OutDataType "sfix(16)"
16585	OutScaling "2^0"
16586	}
16587	Block {
16588	BlockType Inport
16589	Name "Rst"
16590	Position [30, 173, 60, 187]
16591	Port "2"
16592	IconDisplay "Port number"
16593	OutDataType "sfix(16)"
16594	OutScaling "2^0"
16595	}
16596	Block {
16597	BlockType Inport
16598	Name "En"
16599	Position [30, 203, 60, 217]
16600	Port "3"
16601	IconDisplay "Port number"
16602	OutDataType "sfix(16)"
16603	OutScaling "2^0"
16604	}
16605	Block {
16606	BlockType Reference
16607	Name "Constant"
16608	Ports [0, 1]
16609	Position [630, 350, 655, 370]
16610	ShowName off
16611	SourceBlock "xbsIndex_r4/Constant"
16612	SourceType "Xilinx Constant Block Block"
16613	arith_type "Unsigned"
16614	const "0"
16615	n_bits "32"
16616	bin_pt "0"
16617	explicit_period off
16618	period "1"
16619	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
16620	equ "P=C"
16621	opselect "C"
16622	inp2 "PCIN>>17"
16623	opr "+"
16624	inp1 "P"
16625	carry "CIN"
16626	dbl_ovrd off
16627	has_advanced_control "0"
16628	sggui_pos "20,20,400,346"
16629	block_type "constant"
16630	block_version "10.1.2"
16631	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
16632	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
16633	}
16634	Block {
16635	BlockType Reference
16636	Name "Constant1"
16637	Ports [0, 1]
16638	Position [355, 345, 380, 365]
16639	ShowName off
16640	SourceBlock "xbsIndex_r4/Constant"
16641	SourceType "Xilinx Constant Block Block"
16642	arith_type "Boolean"
16643	const "0"
16644	n_bits "32"
16645	bin_pt "0"
16646	explicit_period off
16647	period "1"
16648	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
16649	equ "P=C"
16650	opselect "C"
16651	inp2 "PCIN>>17"
16652	opr "+"
16653	inp1 "P"
16654	carry "CIN"
16655	dbl_ovrd off
16656	has_advanced_control "0"
16657	sggui_pos "20,20,400,346"
16658	block_type "constant"
16659	block_version "10.1.2"
16660	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
16661	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
16662	}
16663	Block {
16664	BlockType Reference
16665	Name "Constant2"
16666	Ports [0, 1]
16667	Position [355, 315, 380, 335]
16668	ShowName off
16669	SourceBlock "xbsIndex_r4/Constant"
16670	SourceType "Xilinx Constant Block Block"
16671	arith_type "Unsigned"
16672	const "0"
16673	n_bits "32"
16674	bin_pt "0"
16675	explicit_period off
16676	period "1"
16677	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
16678	equ "P=C"
16679	opselect "C"
16680	inp2 "PCIN>>17"
16681	opr "+"
16682	inp1 "P"
16683	carry "CIN"
16684	dbl_ovrd off
16685	has_advanced_control "0"
16686	sggui_pos "20,20,400,346"
16687	block_type "constant"
16688	block_version "10.1.2"
16689	sg_icon_stat "25,20,1,1,white,blue,0,72d575a1,right"
16690	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
16691	}
16692	Block {
16693	BlockType Reference
16694	Name "Convert"
16695	Ports [1, 1]
16696	Position [350, 188, 375, 202]
16697	ShowName off
16698	SourceBlock "xbsIndex_r4/Convert"
16699	SourceType "Xilinx Type Converter Block"
16700	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
16701	arith_type "Boolean"
16702	n_bits "16"
16703	bin_pt "14"
16704	quantization "Truncate"
16705	overflow "Wrap"
16706	latency "0"
16707	dbl_ovrd off
16708	pipeline off
16709	xl_use_area off
16710	xl_area "[0,0,0,0,0,0,0]"
16711	has_advanced_control "0"
16712	sggui_pos "20,20,374,375"
16713	block_type "convert"
16714	block_version "8.2"
16715	sg_icon_stat "25,14,1,1,white,blue,0,74901e60,right"
16716	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
16717	}
16718	Block {
16719	BlockType Reference
16720	Name "Convert1"
16721	Ports [1, 1]
16722	Position [100, 203, 120, 217]
16723	ShowName off
16724	SourceBlock "xbsIndex_r4/Convert"
16725	SourceType "Xilinx Type Converter Block"
16726	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
16727	arith_type "Boolean"
16728	n_bits "16"
16729	bin_pt "14"
16730	quantization "Truncate"
16731	overflow "Wrap"
16732	latency "0"
16733	dbl_ovrd off
16734	pipeline off
16735	xl_use_area off
16736	xl_area "[0,0,0,0,0,0,0]"
16737	has_advanced_control "0"
16738	sggui_pos "20,20,374,375"
16739	block_type "convert"
16740	block_version "8.2"
16741	sg_icon_stat "20,14,1,1,white,blue,0,74901e60,right"
16742	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
16743	}
16744	Block {
16745	BlockType Reference
16746	Name "Inverter"
16747	Ports [1, 1]
16748	Position [150, 201, 180, 219]
16749	SourceBlock "xbsIndex_r4/Inverter"
16750	SourceType "Xilinx Inverter Block"
16751	infoedit "Bitwise logical negation (one's complement) operator."
16752	en off
16753	latency "0"
16754	dbl_ovrd off
16755	xl_use_area off
16756	xl_area "[0,0,0,0,0,0,0]"
16757	has_advanced_control "0"
16758	sggui_pos "-1,-1,-1,-1"
16759	block_type "inv"
16760	block_version "9.1.01"
16761	sg_icon_stat "30,18,1,1,white,blue,0,1ab4a85f,right"
16762	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
16763	}
16764	Block {
16765	BlockType Reference
16766	Name "Logical"
16767	Ports [2, 1]
16768	Position [215, 165, 270, 225]
16769	SourceBlock "xbsIndex_r4/Logical"
16770	SourceType "Xilinx Logical Block Block"
16771	logical_function "OR"
16772	inputs "2"
16773	en off
16774	latency "0"
16775	precision "Full"
16776	arith_type "Unsigned"
16777	n_bits "16"
16778	bin_pt "0"
16779	align_bp on
16780	dbl_ovrd off
16781	xl_use_area off
16782	xl_area "[0,0,0,0,0,0,0]"
16783	has_advanced_control "0"
16784	sggui_pos "-1,-1,-1,-1"
16785	block_type "logical"
16786	block_version "9.1.01"
16787	sg_icon_stat "55,60,1,1,white,blue,0,f4a65842,right"
16788	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
16789	}
16790	Block {
16791	BlockType Reference
16792	Name "Mux"
16793	Ports [3, 1]
16794	Position [750, 273, 795, 377]
16795	SourceBlock "xbsIndex_r4/Mux"
16796	SourceType "Xilinx Bus Multiplexer Block"
16797	inputs "2"
16798	en off
16799	latency "0"
16800	precision "Full"
16801	arith_type "Unsigned"
16802	n_bits "16"
16803	bin_pt "14"
16804	quantization "Truncate"
16805	overflow "Wrap"
16806	dbl_ovrd off
16807	xl_use_area off
16808	xl_area "[0,0,0,0,0,0,0]"
16809	has_advanced_control "0"
16810	sggui_pos "20,20,348,303"
16811	block_type "mux"
16812	block_version "10.1.2"
16813	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
16814	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
16815	}
16816	Block {
16817	BlockType Reference
16818	Name "Shared Memory"
16819	Ports [3, 1]
16820	Position [445, 280, 525, 370]
16821	AttributesFormatString "<< %<shared_memory_name> >>"
16822	SourceBlock "xbsIndex_r4/Shared Memory"
16823	SourceType "Xilinx Shared Memory Random Access Memory Block"
16824	shared_memory_name "'TxBuff_Radio4'"
16825	depth "2^14"
16826	ownership "Locally Owned and Initialized"
16827	initVector "0"
16828	mutex "Unprotected"
16829	mode "Read and Write"
16830	write_mode "Read After Write"
16831	time_out "0"
16832	latency "1"
16833	explicit_data_type on
16834	arith_type "Unsigned"
16835	n_bits "32"
16836	bin_pt "0"
16837	xl_use_area off
16838	xl_area "[0,0,0,0,0,0,0]"
16839	implementation "Block RAM"
16840	use_rpm "off"
16841	has_advanced_control "0"
16842	sggui_pos "20,20,384,381"
16843	block_type "shmem"
16844	block_version "10.1.2"
16845	sg_icon_stat "80,90,1,1,white,blue,0,e2c38f9a,right"
16846	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 ],[0 0 90 90 ],[0.77 0.82 0.91]);\npatch([18 5 24 5 18 39 45 51 74 56 39 27 46 27 39 56 74 51 45 39 18 ],[14 27 46 65 78 78 72 78 78 60 77 65 46 27 15 32 14 14 20 14 14 ],[0.98 0.96 0.92]);\nplot([0 80 80 0 0 ],[0 0 90 90 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('input',3,'we');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
16847	}
16848	Block {
16849	BlockType Outport
16850	Name "IQ_32b"
16851	Position [885, 318, 915, 332]
16852	IconDisplay "Port number"
16853	OutDataType "sfix(16)"
16854	OutScaling "2^0"
16855	}
16856	Line {
16857	SrcBlock "Mux"
16858	SrcPort 1
16859	DstBlock "IQ_32b"
16860	DstPort 1
16861	}
16862	Line {
16863	SrcBlock "Constant2"
16864	SrcPort 1
16865	DstBlock "Shared Memory"
16866	DstPort 2
16867	}
16868	Line {
16869	SrcBlock "Constant1"
16870	SrcPort 1
16871	DstBlock "Shared Memory"
16872	DstPort 3
16873	}
16874	Line {
16875	SrcBlock "Shared Memory"
16876	SrcPort 1
16877	DstBlock "Mux"
16878	DstPort 2
16879	}
16880	Line {
16881	SrcBlock "Constant"
16882	SrcPort 1
16883	DstBlock "Mux"
16884	DstPort 3
16885	}
16886	Line {
16887	SrcBlock "RdAddr_14b"
16888	SrcPort 1
16889	DstBlock "Shared Memory"
16890	DstPort 1
16891	}
16892	Line {
16893	SrcBlock "Inverter"
16894	SrcPort 1
16895	DstBlock "Logical"
16896	DstPort 2
16897	}
16898	Line {
16899	SrcBlock "Convert1"
16900	SrcPort 1
16901	DstBlock "Inverter"
16902	DstPort 1
16903	}
16904	Line {
16905	SrcBlock "En"
16906	SrcPort 1
16907	DstBlock "Convert1"
16908	DstPort 1
16909	}
16910	Line {
16911	SrcBlock "Rst"
16912	SrcPort 1
16913	DstBlock "Logical"
16914	DstPort 1
16915	}
16916	Line {
16917	SrcBlock "Convert"
16918	SrcPort 1
16919	Points [160, 0; 0, 95]
16920	DstBlock "Mux"
16921	DstPort 1
16922	}
16923	Line {
16924	SrcBlock "Logical"
16925	SrcPort 1
16926	DstBlock "Convert"
16927	DstPort 1
16928	}
16929	}
16930	}
16931	Block {
16932	BlockType SubSystem
16933	Name "Radio 4 Inputs"
16934	Ports [2, 2]
16935	Position [910, 450, 1080, 510]
16936	NamePlacement "alternate"
16937	MinAlgLoopOccurrences off
16938	PropExecContextOutsideSubsystem off
16939	RTWSystemCode "Auto"
16940	FunctionWithSeparateData off
16941	Opaque off
16942	RequestExecContextInheritance off
16943	MaskHideContents off
16944	System {
16945	Name "Radio 4 Inputs"
16946	Location [2, 74, 1014, 726]
16947	Open off
16948	ModelBrowserVisibility off
16949	ModelBrowserWidth 200
16950	ScreenColor "white"
16951	PaperOrientation "landscape"
16952	PaperPositionMode "auto"
16953	PaperType "usletter"
16954	PaperUnits "inches"
16955	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
16956	TiledPageScale 1
16957	ShowPageBoundaries off
16958	ZoomFactor "100"
16959	Block {
16960	BlockType Inport
16961	Name "DebugRxBuffers"
16962	Position [180, 228, 210, 242]
16963	IconDisplay "Port number"
16964	OutDataType "sfix(16)"
16965	OutScaling "2^0"
16966	}
16967	Block {
16968	BlockType Inport
16969	Name "MGCAGC_AGCDCO_SEL"
16970	Position [180, 323, 210, 337]
16971	Port "2"
16972	IconDisplay "Port number"
16973	OutDataType "sfix(16)"
16974	OutScaling "2^0"
16975	}
16976	Block {
16977	BlockType SubSystem
16978	Name "ADC I"
16979	Ports [2, 2]
16980	Position [430, 223, 580, 267]
16981	NamePlacement "alternate"
16982	MinAlgLoopOccurrences off
16983	PropExecContextOutsideSubsystem off
16984	RTWSystemCode "Auto"
16985	FunctionWithSeparateData off
16986	Opaque off
16987	RequestExecContextInheritance off
16988	MaskHideContents off
16989	System {
16990	Name "ADC I"
16991	Location [37, 74, 1049, 726]
16992	Open off
16993	ModelBrowserVisibility off
16994	ModelBrowserWidth 200
16995	ScreenColor "white"
16996	PaperOrientation "landscape"
16997	PaperPositionMode "auto"
16998	PaperType "usletter"
16999	PaperUnits "inches"
17000	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
17001	TiledPageScale 1
17002	ShowPageBoundaries off
17003	ZoomFactor "100"
17004	Block {
17005	BlockType Inport
17006	Name "Debug"
17007	Position [685, 13, 715, 27]
17008	IconDisplay "Port number"
17009	OutDataType "sfix(16)"
17010	OutScaling "2^0"
17011	}
17012	Block {
17013	BlockType Inport
17014	Name "MGCAGC_AGCDCO_SEL"
17015	Position [135, 203, 165, 217]
17016	Port "2"
17017	IconDisplay "Port number"
17018	OutDataType "sfix(16)"
17019	OutScaling "2^0"
17020	}
17021	Block {
17022	BlockType Constant
17023	Name "Constant1"
17024	Position [15, 280, 45, 310]
17025	ShowName off
17026	Value "0"
17027	OutDataType "sfix(16)"
17028	OutScaling "2^0"
17029	}
17030	Block {
17031	BlockType Reference
17032	Name "Counter"
17033	Ports [0, 1]
17034	Position [520, 300, 580, 360]
17035	SourceBlock "xbsIndex_r4/Counter"
17036	SourceType "Xilinx Counter Block"
17037	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
17038	cnt_type "Free Running"
17039	cnt_to "Inf"
17040	operation "Down"
17041	start_count "2^14-1"
17042	cnt_by_val "1"
17043	arith_type "Unsigned"
17044	n_bits "14"
17045	bin_pt "0"
17046	load_pin off
17047	rst off
17048	en off
17049	explicit_period "on"
17050	period "1"
17051	dbl_ovrd off
17052	use_behavioral_HDL off
17053	use_rpm off
17054	implementation "Fabric"
17055	xl_use_area off
17056	xl_area "[0,0,0,0,0,0,0]"
17057	has_advanced_control "0"
17058	sggui_pos "20,20,348,619"
17059	block_type "counter"
17060	block_version "10.1.3"
17061	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
17062	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
17063	}
17064	Block {
17065	BlockType Reference
17066	Name "FromAGC_Radio4_I"
17067	Ports [1, 1]
17068	Position [120, 385, 185, 405]
17069	SourceBlock "xbsIndex_r4/Gateway In"
17070	SourceType "Xilinx Gateway In Block"
17071	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
17072	arith_type "Signed (2's comp)"
17073	n_bits "14"
17074	bin_pt "13"
17075	quantization "Round (unbiased: +/- Inf)"
17076	overflow "Saturate"
17077	period "1"
17078	dbl_ovrd off
17079	timing_constraint "None"
17080	locs_specified off
17081	LOCs "{}"
17082	xl_use_area off
17083	xl_area "[0,0,0,0,0,0,0]"
17084	has_advanced_control "0"
17085	sggui_pos "20,20,348,406"
17086	block_type "gatewayin"
17087	block_version "10.1.3"
17088	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
17089	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
17090	}
17091	Block {
17092	BlockType Reference
17093	Name "Mux"
17094	Ports [3, 1]
17095	Position [820, 48, 865, 152]
17096	SourceBlock "xbsIndex_r4/Mux"
17097	SourceType "Xilinx Bus Multiplexer Block"
17098	inputs "2"
17099	en off
17100	latency "0"
17101	precision "Full"
17102	arith_type "Unsigned"
17103	n_bits "1"
17104	bin_pt "0"
17105	quantization "Truncate"
17106	overflow "Wrap"
17107	dbl_ovrd off
17108	xl_use_area off
17109	xl_area "[0,0,0,0,0,0,0]"
17110	has_advanced_control "0"
17111	sggui_pos "20,20,348,303"
17112	block_type "mux"
17113	block_version "10.1.3"
17114	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
17115	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
17116	}
17117	Block {
17118	BlockType Reference
17119	Name "Mux1"
17120	Ports [3, 1]
17121	Position [820, 243, 865, 347]
17122	SourceBlock "xbsIndex_r4/Mux"
17123	SourceType "Xilinx Bus Multiplexer Block"
17124	inputs "2"
17125	en off
17126	latency "0"
17127	precision "Full"
17128	arith_type "Unsigned"
17129	n_bits "1"
17130	bin_pt "0"
17131	quantization "Truncate"
17132	overflow "Wrap"
17133	dbl_ovrd off
17134	xl_use_area off
17135	xl_area "[0,0,0,0,0,0,0]"
17136	has_advanced_control "0"
17137	sggui_pos "20,20,348,303"
17138	block_type "mux"
17139	block_version "10.1.3"
17140	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
17141	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
17142	}
17143	Block {
17144	BlockType Reference
17145	Name "Mux2"
17146	Ports [3, 1]
17147	Position [280, 243, 325, 347]
17148	SourceBlock "xbsIndex_r4/Mux"
17149	SourceType "Xilinx Bus Multiplexer Block"
17150	inputs "2"
17151	en off
17152	latency "0"
17153	precision "Full"
17154	arith_type "Unsigned"
17155	n_bits "1"
17156	bin_pt "0"
17157	quantization "Truncate"
17158	overflow "Wrap"
17159	dbl_ovrd off
17160	xl_use_area off
17161	xl_area "[0,0,0,0,0,0,0]"
17162	has_advanced_control "0"
17163	sggui_pos "20,20,348,303"
17164	block_type "mux"
17165	block_version "10.1.3"
17166	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
17167	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
17168	}
17169	Block {
17170	BlockType Reference
17171	Name "Radio 4 ADC I"
17172	Ports [1, 1]
17173	Position [85, 274, 180, 316]
17174	LinkData {
17175	BlockName "radio4_adc_I"
17176	DialogParameters {
17177	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
17178	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
17179	}
17180	}
17181	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 4 ADC I"
17182	SourceType ""
17183	ShowPortLabels "FromPortIcon"
17184	SystemSampleTime "-1"
17185	FunctionWithSeparateData off
17186	RTWMemSecFuncInitTerm "Inherit from model"
17187	RTWMemSecFuncExecute "Inherit from model"
17188	RTWMemSecDataConstants "Inherit from model"
17189	RTWMemSecDataInternal "Inherit from model"
17190	RTWMemSecDataParameters "Inherit from model"
17191	samp_period "1"
17192	}
17193	Block {
17194	BlockType Reference
17195	Name "Register"
17196	Ports [1, 1]
17197	Position [445, 281, 480, 309]
17198	ShowName off
17199	SourceBlock "xbsIndex_r4/Register"
17200	SourceType "Xilinx Register Block"
17201	init "0"
17202	rst off
17203	en off
17204	dbl_ovrd off
17205	xl_use_area off
17206	xl_area "[0,0,0,0,0,0,0]"
17207	has_advanced_control "0"
17208	sggui_pos "-1,-1,-1,-1"
17209	block_type "register"
17210	block_version "8.2"
17211	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
17212	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
17213	}
17214	Block {
17215	BlockType Reference
17216	Name "Reinterpret"
17217	Ports [1, 1]
17218	Position [665, 314, 715, 346]
17219	SourceBlock "xbsIndex_r4/Reinterpret"
17220	SourceType "Xilinx Type Reinterpreter Block"
17221	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
17222	force_arith_type on
17223	arith_type "Signed (2's comp)"
17224	force_bin_pt on
17225	bin_pt "13"
17226	has_advanced_control "0"
17227	sggui_pos "20,20,336,312"
17228	block_type "reinterpret"
17229	block_version "10.1.3"
17230	sg_icon_stat "50,32,1,1,white,blue,0,8982c1db,right"
17231	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
17232	}
17233	Block {
17234	BlockType Reference
17235	Name "Slice"
17236	Ports [1, 1]
17237	Position [670, 120, 730, 150]
17238	SourceBlock "xbsIndex_r4/Slice"
17239	SourceType "Xilinx Bit Slice Extractor Block"
17240	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
17241	nbits "1"
17242	boolean_output off
17243	mode "Lower Bit Location + Width"
17244	bit1 "0"
17245	base1 "MSB of Input"
17246	bit0 "0"
17247	base0 "LSB of Input"
17248	dbl_ovrd off
17249	has_advanced_control "0"
17250	sggui_pos "20,20,449,376"
17251	block_type "slice"
17252	block_version "10.1.3"
17253	sg_icon_stat "60,30,1,1,white,blue,0,b1026674,right"
17254	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
17255	}
17256	Block {
17257	BlockType Reference
17258	Name "radio4_ADC_I_OTR"
17259	Ports [1, 1]
17260	Position [440, 94, 495, 106]
17261	NamePlacement "alternate"
17262	SourceBlock "xbsIndex_r4/Gateway In"
17263	SourceType "Xilinx Gateway In Block"
17264	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
17265	arith_type "Unsigned"
17266	n_bits "1"
17267	bin_pt "0"
17268	quantization "Round (unbiased: +/- Inf)"
17269	overflow "Saturate"
17270	period "1"
17271	dbl_ovrd off
17272	timing_constraint "None"
17273	locs_specified off
17274	LOCs "{}"
17275	xl_use_area off
17276	xl_area "[0,0,0,0,0,0,0]"
17277	has_advanced_control "0"
17278	sggui_pos "20,20,356,432"
17279	block_type "gatewayin"
17280	block_version "VER_STRING_GOES_HERE"
17281	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
17282	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
17283	}
17284	Block {
17285	BlockType Outport
17286	Name "OTR I"
17287	Position [925, 93, 955, 107]
17288	IconDisplay "Port number"
17289	OutDataType "sfix(16)"
17290	OutScaling "2^0"
17291	}
17292	Block {
17293	BlockType Outport
17294	Name "ADC I"
17295	Position [925, 288, 955, 302]
17296	Port "2"
17297	IconDisplay "Port number"
17298	OutDataType "sfix(16)"
17299	OutScaling "2^0"
17300	}
17301	Line {
17302	SrcBlock "Constant1"
17303	SrcPort 1
17304	Points [10, 0]
17305	Branch {
17306	Points [0, -195]
17307	DstBlock "radio4_ADC_I_OTR"
17308	DstPort 1
17309	}
17310	Branch {
17311	DstBlock "Radio 4 ADC I"
17312	DstPort 1
17313	}
17314	Branch {
17315	Points [0, 100]
17316	DstBlock "FromAGC_Radio4_I"
17317	DstPort 1
17318	}
17319	}
17320	Line {
17321	SrcBlock "Mux"
17322	SrcPort 1
17323	DstBlock "OTR I"
17324	DstPort 1
17325	}
17326	Line {
17327	SrcBlock "Debug"
17328	SrcPort 1
17329	Points [40, 0; 0, 45]
17330	Branch {
17331	DstBlock "Mux"
17332	DstPort 1
17333	}
17334	Branch {
17335	Points [0, 195]
17336	DstBlock "Mux1"
17337	DstPort 1
17338	}
17339	}
17340	Line {
17341	SrcBlock "radio4_ADC_I_OTR"
17342	SrcPort 1
17343	DstBlock "Mux"
17344	DstPort 2
17345	}
17346	Line {
17347	SrcBlock "Slice"
17348	SrcPort 1
17349	DstBlock "Mux"
17350	DstPort 3
17351	}
17352	Line {
17353	SrcBlock "Mux1"
17354	SrcPort 1
17355	DstBlock "ADC I"
17356	DstPort 1
17357	}
17358	Line {
17359	SrcBlock "Register"
17360	SrcPort 1
17361	DstBlock "Mux1"
17362	DstPort 2
17363	}
17364	Line {
17365	SrcBlock "Reinterpret"
17366	SrcPort 1
17367	DstBlock "Mux1"
17368	DstPort 3
17369	}
17370	Line {
17371	SrcBlock "Counter"
17372	SrcPort 1
17373	Points [25, 0]
17374	Branch {
17375	DstBlock "Reinterpret"
17376	DstPort 1
17377	}
17378	Branch {
17379	Points [0, -195]
17380	DstBlock "Slice"
17381	DstPort 1
17382	}
17383	}
17384	Line {
17385	SrcBlock "MGCAGC_AGCDCO_SEL"
17386	SrcPort 1
17387	Points [70, 0; 0, 50]
17388	DstBlock "Mux2"
17389	DstPort 1
17390	}
17391	Line {
17392	SrcBlock "FromAGC_Radio4_I"
17393	SrcPort 1
17394	Points [50, 0; 0, -65]
17395	DstBlock "Mux2"
17396	DstPort 3
17397	}
17398	Line {
17399	SrcBlock "Radio 4 ADC I"
17400	SrcPort 1
17401	DstBlock "Mux2"
17402	DstPort 2
17403	}
17404	Line {
17405	SrcBlock "Mux2"
17406	SrcPort 1
17407	DstBlock "Register"
17408	DstPort 1
17409	}
17410	}
17411	}
17412	Block {
17413	BlockType SubSystem
17414	Name "ADC Q"
17415	Ports [2, 2]
17416	Position [430, 298, 580, 342]
17417	MinAlgLoopOccurrences off
17418	PropExecContextOutsideSubsystem off
17419	RTWSystemCode "Auto"
17420	FunctionWithSeparateData off
17421	Opaque off
17422	RequestExecContextInheritance off
17423	MaskHideContents off
17424	System {
17425	Name "ADC Q"
17426	Location [22, 84, 1034, 736]
17427	Open off
17428	ModelBrowserVisibility off
17429	ModelBrowserWidth 200
17430	ScreenColor "white"
17431	PaperOrientation "landscape"
17432	PaperPositionMode "auto"
17433	PaperType "usletter"
17434	PaperUnits "inches"
17435	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
17436	TiledPageScale 1
17437	ShowPageBoundaries off
17438	ZoomFactor "100"
17439	Block {
17440	BlockType Inport
17441	Name "Debug"
17442	Position [675, 13, 705, 27]
17443	IconDisplay "Port number"
17444	OutDataType "sfix(16)"
17445	OutScaling "2^0"
17446	}
17447	Block {
17448	BlockType Inport
17449	Name "MGCAGC_AGCDCO_SEL"
17450	Position [120, 203, 150, 217]
17451	Port "2"
17452	IconDisplay "Port number"
17453	OutDataType "sfix(16)"
17454	OutScaling "2^0"
17455	}
17456	Block {
17457	BlockType Constant
17458	Name "Constant1"
17459	Position [15, 280, 45, 310]
17460	ShowName off
17461	Value "0"
17462	OutDataType "sfix(16)"
17463	OutScaling "2^0"
17464	}
17465	Block {
17466	BlockType Reference
17467	Name "Counter"
17468	Ports [0, 1]
17469	Position [505, 300, 565, 360]
17470	SourceBlock "xbsIndex_r4/Counter"
17471	SourceType "Xilinx Counter Block"
17472	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
17473	cnt_type "Free Running"
17474	cnt_to "Inf"
17475	operation "Up"
17476	start_count "0"
17477	cnt_by_val "1"
17478	arith_type "Unsigned"
17479	n_bits "14"
17480	bin_pt "0"
17481	load_pin off
17482	rst off
17483	en off
17484	explicit_period "on"
17485	period "1"
17486	dbl_ovrd off
17487	use_behavioral_HDL off
17488	use_rpm off
17489	implementation "Fabric"
17490	xl_use_area off
17491	xl_area "[0,0,0,0,0,0,0]"
17492	has_advanced_control "0"
17493	sggui_pos "20,20,348,619"
17494	block_type "counter"
17495	block_version "10.1.3"
17496	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
17497	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
17498	}
17499	Block {
17500	BlockType Reference
17501	Name "FromAGC_Radio4_Q"
17502	Ports [1, 1]
17503	Position [105, 385, 170, 405]
17504	SourceBlock "xbsIndex_r4/Gateway In"
17505	SourceType "Xilinx Gateway In Block"
17506	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
17507	arith_type "Signed (2's comp)"
17508	n_bits "14"
17509	bin_pt "13"
17510	quantization "Round (unbiased: +/- Inf)"
17511	overflow "Saturate"
17512	period "1"
17513	dbl_ovrd off
17514	timing_constraint "None"
17515	locs_specified off
17516	LOCs "{}"
17517	xl_use_area off
17518	xl_area "[0,0,0,0,0,0,0]"
17519	has_advanced_control "0"
17520	sggui_pos "20,20,348,406"
17521	block_type "gatewayin"
17522	block_version "10.1.3"
17523	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
17524	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
17525	}
17526	Block {
17527	BlockType Reference
17528	Name "Mux"
17529	Ports [3, 1]
17530	Position [810, 48, 855, 152]
17531	SourceBlock "xbsIndex_r4/Mux"
17532	SourceType "Xilinx Bus Multiplexer Block"
17533	inputs "2"
17534	en off
17535	latency "0"
17536	precision "Full"
17537	arith_type "Unsigned"
17538	n_bits "1"
17539	bin_pt "0"
17540	quantization "Truncate"
17541	overflow "Wrap"
17542	dbl_ovrd off
17543	xl_use_area off
17544	xl_area "[0,0,0,0,0,0,0]"
17545	has_advanced_control "0"
17546	sggui_pos "20,20,348,303"
17547	block_type "mux"
17548	block_version "10.1.3"
17549	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
17550	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
17551	}
17552	Block {
17553	BlockType Reference
17554	Name "Mux1"
17555	Ports [3, 1]
17556	Position [810, 243, 855, 347]
17557	SourceBlock "xbsIndex_r4/Mux"
17558	SourceType "Xilinx Bus Multiplexer Block"
17559	inputs "2"
17560	en off
17561	latency "0"
17562	precision "Full"
17563	arith_type "Unsigned"
17564	n_bits "1"
17565	bin_pt "0"
17566	quantization "Truncate"
17567	overflow "Wrap"
17568	dbl_ovrd off
17569	xl_use_area off
17570	xl_area "[0,0,0,0,0,0,0]"
17571	has_advanced_control "0"
17572	sggui_pos "20,20,348,303"
17573	block_type "mux"
17574	block_version "10.1.3"
17575	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
17576	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
17577	}
17578	Block {
17579	BlockType Reference
17580	Name "Mux2"
17581	Ports [3, 1]
17582	Position [265, 243, 310, 347]
17583	SourceBlock "xbsIndex_r4/Mux"
17584	SourceType "Xilinx Bus Multiplexer Block"
17585	inputs "2"
17586	en off
17587	latency "0"
17588	precision "Full"
17589	arith_type "Unsigned"
17590	n_bits "1"
17591	bin_pt "0"
17592	quantization "Truncate"
17593	overflow "Wrap"
17594	dbl_ovrd off
17595	xl_use_area off
17596	xl_area "[0,0,0,0,0,0,0]"
17597	has_advanced_control "0"
17598	sggui_pos "20,20,348,303"
17599	block_type "mux"
17600	block_version "10.1.3"
17601	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
17602	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
17603	}
17604	Block {
17605	BlockType Reference
17606	Name "Radio 4 ADC Q"
17607	Ports [1, 1]
17608	Position [85, 274, 180, 316]
17609	LinkData {
17610	BlockName "radio4_adc_Q"
17611	DialogParameters {
17612	sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right"
17613	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
17614	}
17615	}
17616	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 4 ADC Q"
17617	SourceType ""
17618	ShowPortLabels "FromPortIcon"
17619	SystemSampleTime "-1"
17620	FunctionWithSeparateData off
17621	RTWMemSecFuncInitTerm "Inherit from model"
17622	RTWMemSecFuncExecute "Inherit from model"
17623	RTWMemSecDataConstants "Inherit from model"
17624	RTWMemSecDataInternal "Inherit from model"
17625	RTWMemSecDataParameters "Inherit from model"
17626	samp_period "1"
17627	}
17628	Block {
17629	BlockType Reference
17630	Name "Register"
17631	Ports [1, 1]
17632	Position [385, 281, 420, 309]
17633	ShowName off
17634	SourceBlock "xbsIndex_r4/Register"
17635	SourceType "Xilinx Register Block"
17636	init "0"
17637	rst off
17638	en off
17639	dbl_ovrd off
17640	xl_use_area off
17641	xl_area "[0,0,0,0,0,0,0]"
17642	has_advanced_control "0"
17643	sggui_pos "-1,-1,-1,-1"
17644	block_type "register"
17645	block_version "8.2"
17646	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
17647	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
17648	}
17649	Block {
17650	BlockType Reference
17651	Name "Reinterpret"
17652	Ports [1, 1]
17653	Position [655, 314, 705, 346]
17654	SourceBlock "xbsIndex_r4/Reinterpret"
17655	SourceType "Xilinx Type Reinterpreter Block"
17656	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
17657	force_arith_type on
17658	arith_type "Signed (2's comp)"
17659	force_bin_pt on
17660	bin_pt "13"
17661	has_advanced_control "0"
17662	sggui_pos "20,20,336,312"
17663	block_type "reinterpret"
17664	block_version "10.1.3"
17665	sg_icon_stat "50,32,1,1,white,blue,0,8982c1db,right"
17666	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
17667	}
17668	Block {
17669	BlockType Reference
17670	Name "Slice"
17671	Ports [1, 1]
17672	Position [660, 120, 720, 150]
17673	SourceBlock "xbsIndex_r4/Slice"
17674	SourceType "Xilinx Bit Slice Extractor Block"
17675	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
17676	nbits "1"
17677	boolean_output off
17678	mode "Lower Bit Location + Width"
17679	bit1 "0"
17680	base1 "MSB of Input"
17681	bit0 "0"
17682	base0 "LSB of Input"
17683	dbl_ovrd off
17684	has_advanced_control "0"
17685	sggui_pos "20,20,449,376"
17686	block_type "slice"
17687	block_version "10.1.3"
17688	sg_icon_stat "60,30,1,1,white,blue,0,b1026674,right"
17689	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
17690	}
17691	Block {
17692	BlockType Reference
17693	Name "radio4_ADC_Q_OTR"
17694	Ports [1, 1]
17695	Position [115, 94, 170, 106]
17696	SourceBlock "xbsIndex_r4/Gateway In"
17697	SourceType "Xilinx Gateway In Block"
17698	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
17699	arith_type "Unsigned"
17700	n_bits "1"
17701	bin_pt "0"
17702	quantization "Round (unbiased: +/- Inf)"
17703	overflow "Saturate"
17704	period "1"
17705	dbl_ovrd off
17706	timing_constraint "None"
17707	locs_specified off
17708	LOCs "{}"
17709	xl_use_area off
17710	xl_area "[0,0,0,0,0,0,0]"
17711	has_advanced_control "0"
17712	sggui_pos "20,20,356,432"
17713	block_type "gatewayin"
17714	block_version "VER_STRING_GOES_HERE"
17715	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
17716	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
17717	}
17718	Block {
17719	BlockType Outport
17720	Name "OTR Q"
17721	Position [955, 93, 985, 107]
17722	IconDisplay "Port number"
17723	OutDataType "sfix(16)"
17724	OutScaling "2^0"
17725	}
17726	Block {
17727	BlockType Outport
17728	Name "ADC Q"
17729	Position [950, 288, 980, 302]
17730	Port "2"
17731	IconDisplay "Port number"
17732	OutDataType "sfix(16)"
17733	OutScaling "2^0"
17734	}
17735	Line {
17736	SrcBlock "Constant1"
17737	SrcPort 1
17738	Points [10, 0]
17739	Branch {
17740	Points [0, -195]
17741	DstBlock "radio4_ADC_Q_OTR"
17742	DstPort 1
17743	}
17744	Branch {
17745	DstBlock "Radio 4 ADC Q"
17746	DstPort 1
17747	}
17748	Branch {
17749	Points [0, 100]
17750	DstBlock "FromAGC_Radio4_Q"
17751	DstPort 1
17752	}
17753	}
17754	Line {
17755	SrcBlock "Mux"
17756	SrcPort 1
17757	DstBlock "OTR Q"
17758	DstPort 1
17759	}
17760	Line {
17761	SrcBlock "Debug"
17762	SrcPort 1
17763	Points [40, 0; 0, 45]
17764	Branch {
17765	DstBlock "Mux"
17766	DstPort 1
17767	}
17768	Branch {
17769	Points [0, 195]
17770	DstBlock "Mux1"
17771	DstPort 1
17772	}
17773	}
17774	Line {
17775	SrcBlock "radio4_ADC_Q_OTR"
17776	SrcPort 1
17777	DstBlock "Mux"
17778	DstPort 2
17779	}
17780	Line {
17781	SrcBlock "Slice"
17782	SrcPort 1
17783	DstBlock "Mux"
17784	DstPort 3
17785	}
17786	Line {
17787	SrcBlock "Mux1"
17788	SrcPort 1
17789	DstBlock "ADC Q"
17790	DstPort 1
17791	}
17792	Line {
17793	SrcBlock "Register"
17794	SrcPort 1
17795	DstBlock "Mux1"
17796	DstPort 2
17797	}
17798	Line {
17799	SrcBlock "Reinterpret"
17800	SrcPort 1
17801	DstBlock "Mux1"
17802	DstPort 3
17803	}
17804	Line {
17805	SrcBlock "Counter"
17806	SrcPort 1
17807	Points [30, 0]
17808	Branch {
17809	DstBlock "Reinterpret"
17810	DstPort 1
17811	}
17812	Branch {
17813	Points [0, -195]
17814	DstBlock "Slice"
17815	DstPort 1
17816	}
17817	}
17818	Line {
17819	SrcBlock "MGCAGC_AGCDCO_SEL"
17820	SrcPort 1
17821	Points [70, 0; 0, 50]
17822	DstBlock "Mux2"
17823	DstPort 1
17824	}
17825	Line {
17826	SrcBlock "FromAGC_Radio4_Q"
17827	SrcPort 1
17828	Points [50, 0; 0, -65]
17829	DstBlock "Mux2"
17830	DstPort 3
17831	}
17832	Line {
17833	SrcBlock "Radio 4 ADC Q"
17834	SrcPort 1
17835	DstBlock "Mux2"
17836	DstPort 2
17837	}
17838	Line {
17839	SrcBlock "Mux2"
17840	SrcPort 1
17841	DstBlock "Register"
17842	DstPort 1
17843	}
17844	}
17845	}
17846	Block {
17847	BlockType SubSystem
17848	Name "Concatenates_1"
17849	Ports [4, 1]
17850	Position [695, 218, 740, 372]
17851	NamePlacement "alternate"
17852	MinAlgLoopOccurrences off
17853	PropExecContextOutsideSubsystem off
17854	RTWSystemCode "Auto"
17855	FunctionWithSeparateData off
17856	Opaque off
17857	RequestExecContextInheritance off
17858	MaskHideContents off
17859	System {
17860	Name "Concatenates_1"
17861	Location [2, 74, 1270, 726]
17862	Open off
17863	ModelBrowserVisibility off
17864	ModelBrowserWidth 200
17865	ScreenColor "white"
17866	PaperOrientation "landscape"
17867	PaperPositionMode "auto"
17868	PaperType "usletter"
17869	PaperUnits "inches"
17870	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
17871	TiledPageScale 1
17872	ShowPageBoundaries off
17873	ZoomFactor "100"
17874	Block {
17875	BlockType Inport
17876	Name "OTR_I"
17877	Position [395, 43, 425, 57]
17878	IconDisplay "Port number"
17879	OutDataType "sfix(16)"
17880	OutScaling "2^0"
17881	}
17882	Block {
17883	BlockType Inport
17884	Name "ADC_I"
17885	Position [330, 93, 360, 107]
17886	Port "2"
17887	IconDisplay "Port number"
17888	OutDataType "sfix(16)"
17889	OutScaling "2^0"
17890	}
17891	Block {
17892	BlockType Inport
17893	Name "OTR_Q"
17894	Position [390, 163, 420, 177]
17895	Port "3"
17896	IconDisplay "Port number"
17897	OutDataType "sfix(16)"
17898	OutScaling "2^0"
17899	}
17900	Block {
17901	BlockType Inport
17902	Name "ADC_Q"
17903	Position [330, 213, 360, 227]
17904	Port "4"
17905	IconDisplay "Port number"
17906	OutDataType "sfix(16)"
17907	OutScaling "2^0"
17908	}
17909	Block {
17910	BlockType Reference
17911	Name "Concat1"
17912	Ports [2, 1]
17913	Position [490, 191, 520, 229]
17914	ShowName off
17915	SourceBlock "xbsIndex_r4/Concat"
17916	SourceType "Xilinx Bus Concatenator Block"
17917	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
17918	num_inputs "2"
17919	dbl_ovrd off
17920	has_advanced_control "0"
17921	sggui_pos "-1,-1,-1,-1"
17922	block_type "concat"
17923	block_version "8.2"
17924	sg_icon_stat "30,38,1,1,white,blue,0,df1e5aba,right"
17925	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
17926	}
17927	Block {
17928	BlockType Reference
17929	Name "Concat2"
17930	Ports [2, 1]
17931	Position [490, 71, 520, 109]
17932	ShowName off
17933	SourceBlock "xbsIndex_r4/Concat"
17934	SourceType "Xilinx Bus Concatenator Block"
17935	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
17936	num_inputs "2"
17937	dbl_ovrd off
17938	has_advanced_control "0"
17939	sggui_pos "-1,-1,-1,-1"
17940	block_type "concat"
17941	block_version "8.2"
17942	sg_icon_stat "30,38,1,1,white,blue,0,df1e5aba,right"
17943	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
17944	}
17945	Block {
17946	BlockType Reference
17947	Name "Concat3"
17948	Ports [2, 1]
17949	Position [550, 150, 575, 230]
17950	ShowName off
17951	SourceBlock "xbsIndex_r4/Concat"
17952	SourceType "Xilinx Bus Concatenator Block"
17953	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
17954	num_inputs "2"
17955	dbl_ovrd off
17956	has_advanced_control "0"
17957	sggui_pos "-1,-1,-1,-1"
17958	block_type "concat"
17959	block_version "8.2"
17960	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
17961	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
17962	}
17963	Block {
17964	BlockType Reference
17965	Name "Concat4"
17966	Ports [2, 1]
17967	Position [550, 30, 575, 110]
17968	ShowName off
17969	SourceBlock "xbsIndex_r4/Concat"
17970	SourceType "Xilinx Bus Concatenator Block"
17971	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
17972	num_inputs "2"
17973	dbl_ovrd off
17974	has_advanced_control "0"
17975	sggui_pos "-1,-1,-1,-1"
17976	block_type "concat"
17977	block_version "8.2"
17978	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
17979	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
17980	}
17981	Block {
17982	BlockType Reference
17983	Name "Concat5"
17984	Ports [2, 1]
17985	Position [635, 50, 660, 130]
17986	ShowName off
17987	SourceBlock "xbsIndex_r4/Concat"
17988	SourceType "Xilinx Bus Concatenator Block"
17989	infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at zero."
17990	num_inputs "2"
17991	dbl_ovrd off
17992	has_advanced_control "0"
17993	sggui_pos "-1,-1,-1,-1"
17994	block_type "concat"
17995	block_version "8.2"
17996	sg_icon_stat "25,80,1,1,white,blue,0,df1e5aba,right"
17997	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n"
17998	}
17999	Block {
18000	BlockType Reference
18001	Name "Reinterpret"
18002	Ports [1, 1]
18003	Position [385, 90, 420, 110]
18004	ShowName off
18005	SourceBlock "xbsIndex_r4/Reinterpret"
18006	SourceType "Xilinx Type Reinterpreter Block"
18007	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
18008	force_arith_type on
18009	arith_type "Unsigned"
18010	force_bin_pt on
18011	bin_pt "0"
18012	has_advanced_control "0"
18013	sggui_pos "20,20,356,309"
18014	block_type "reinterpret"
18015	block_version "8.2"
18016	sg_icon_stat "35,20,1,1,white,blue,0,8982c1db,right"
18017	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
18018	}
18019	Block {
18020	BlockType Reference
18021	Name "Reinterpret1"
18022	Ports [1, 1]
18023	Position [390, 210, 425, 230]
18024	ShowName off
18025	SourceBlock "xbsIndex_r4/Reinterpret"
18026	SourceType "Xilinx Type Reinterpreter Block"
18027	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
18028	force_arith_type on
18029	arith_type "Unsigned"
18030	force_bin_pt on
18031	bin_pt "0"
18032	has_advanced_control "0"
18033	sggui_pos "20,20,356,309"
18034	block_type "reinterpret"
18035	block_version "8.2"
18036	sg_icon_stat "35,20,1,1,white,blue,0,8982c1db,right"
18037	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
18038	}
18039	Block {
18040	BlockType Reference
18041	Name "zero"
18042	Ports [0, 1]
18043	Position [440, 191, 460, 209]
18044	ShowName off
18045	SourceBlock "xbsIndex_r4/Constant"
18046	SourceType "Xilinx Constant Block Block"
18047	arith_type "Unsigned"
18048	const "0"
18049	n_bits "1"
18050	bin_pt "0"
18051	explicit_period off
18052	period "1"
18053	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
18054	equ "P=C"
18055	opselect "C"
18056	inp2 "PCIN>>17"
18057	opr "+"
18058	inp1 "P"
18059	carry "CIN"
18060	dbl_ovrd off
18061	has_advanced_control "0"
18062	sggui_pos "-1,-1,-1,-1"
18063	block_type "constant"
18064	block_version "VER_STRING_GOES_HERE"
18065	sg_icon_stat "20,18,1,1,white,blue,0,72d575a1,right"
18066	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
18067	}
18068	Block {
18069	BlockType Reference
18070	Name "zero1"
18071	Ports [0, 1]
18072	Position [440, 71, 460, 89]
18073	ShowName off
18074	SourceBlock "xbsIndex_r4/Constant"
18075	SourceType "Xilinx Constant Block Block"
18076	arith_type "Unsigned"
18077	const "0"
18078	n_bits "1"
18079	bin_pt "0"
18080	explicit_period off
18081	period "1"
18082	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
18083	equ "P=C"
18084	opselect "C"
18085	inp2 "PCIN>>17"
18086	opr "+"
18087	inp1 "P"
18088	carry "CIN"
18089	dbl_ovrd off
18090	has_advanced_control "0"
18091	sggui_pos "-1,-1,-1,-1"
18092	block_type "constant"
18093	block_version "VER_STRING_GOES_HERE"
18094	sg_icon_stat "20,18,1,1,white,blue,0,72d575a1,right"
18095	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n"
18096	}
18097	Block {
18098	BlockType Outport
18099	Name "32b"
18100	Position [840, 83, 870, 97]
18101	IconDisplay "Port number"
18102	OutDataType "sfix(16)"
18103	OutScaling "2^0"
18104	}
18105	Line {
18106	SrcBlock "Reinterpret1"
18107	SrcPort 1
18108	DstBlock "Concat1"
18109	DstPort 2
18110	}
18111	Line {
18112	SrcBlock "Reinterpret"
18113	SrcPort 1
18114	DstBlock "Concat2"
18115	DstPort 2
18116	}
18117	Line {
18118	SrcBlock "ADC_Q"
18119	SrcPort 1
18120	DstBlock "Reinterpret1"
18121	DstPort 1
18122	}
18123	Line {
18124	SrcBlock "OTR_Q"
18125	SrcPort 1
18126	DstBlock "Concat3"
18127	DstPort 1
18128	}
18129	Line {
18130	SrcBlock "ADC_I"
18131	SrcPort 1
18132	DstBlock "Reinterpret"
18133	DstPort 1
18134	}
18135	Line {
18136	SrcBlock "Concat5"
18137	SrcPort 1
18138	DstBlock "32b"
18139	DstPort 1
18140	}
18141	Line {
18142	SrcBlock "OTR_I"
18143	SrcPort 1
18144	DstBlock "Concat4"
18145	DstPort 1
18146	}
18147	Line {
18148	SrcBlock "Concat3"
18149	SrcPort 1
18150	Points [25, 0; 0, -80]
18151	DstBlock "Concat5"
18152	DstPort 2
18153	}
18154	Line {
18155	SrcBlock "Concat4"
18156	SrcPort 1
18157	DstBlock "Concat5"
18158	DstPort 1
18159	}
18160	Line {
18161	SrcBlock "Concat2"
18162	SrcPort 1
18163	Points [0, 0]
18164	DstBlock "Concat4"
18165	DstPort 2
18166	}
18167	Line {
18168	SrcBlock "zero1"
18169	SrcPort 1
18170	DstBlock "Concat2"
18171	DstPort 1
18172	}
18173	Line {
18174	SrcBlock "Concat1"
18175	SrcPort 1
18176	DstBlock "Concat3"
18177	DstPort 2
18178	}
18179	Line {
18180	SrcBlock "zero"
18181	SrcPort 1
18182	DstBlock "Concat1"
18183	DstPort 1
18184	}
18185	}
18186	}
18187	Block {
18188	BlockType Reference
18189	Name "Gateway Out1"
18190	Ports [1, 1]
18191	Position [725, 135, 755, 145]
18192	ShowName off
18193	SourceBlock "xbsIndex_r4/Gateway Out"
18194	SourceType "Xilinx Gateway Out Block"
18195	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
18196	hdl_port off
18197	timing_constraint "None"
18198	locs_specified off
18199	LOCs "{}"
18200	xl_use_area off
18201	xl_area "[0,0,0,0,0,0,0]"
18202	has_advanced_control "0"
18203	sggui_pos "20,20,336,386"
18204	block_type "gatewayout"
18205	block_version "10.1.2"
18206	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
18207	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
18208	}
18209	Block {
18210	BlockType Reference
18211	Name "Gateway Out4"
18212	Ports [1, 1]
18213	Position [725, 120, 755, 130]
18214	ShowName off
18215	SourceBlock "xbsIndex_r4/Gateway Out"
18216	SourceType "Xilinx Gateway Out Block"
18217	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
18218	hdl_port off
18219	timing_constraint "None"
18220	locs_specified off
18221	LOCs "{}"
18222	xl_use_area off
18223	xl_area "[0,0,0,0,0,0,0]"
18224	has_advanced_control "0"
18225	sggui_pos "20,20,336,386"
18226	block_type "gatewayout"
18227	block_version "10.1.2"
18228	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
18229	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
18230	}
18231	Block {
18232	BlockType SubSystem
18233	Name "RSSI"
18234	Ports [1, 1]
18235	Position [500, 407, 570, 443]
18236	MinAlgLoopOccurrences off
18237	PropExecContextOutsideSubsystem off
18238	RTWSystemCode "Auto"
18239	FunctionWithSeparateData off
18240	Opaque off
18241	RequestExecContextInheritance off
18242	MaskHideContents off
18243	System {
18244	Name "RSSI"
18245	Location [2, 74, 1184, 726]
18246	Open off
18247	ModelBrowserVisibility off
18248	ModelBrowserWidth 200
18249	ScreenColor "white"
18250	PaperOrientation "landscape"
18251	PaperPositionMode "auto"
18252	PaperType "usletter"
18253	PaperUnits "inches"
18254	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
18255	TiledPageScale 1
18256	ShowPageBoundaries off
18257	ZoomFactor "100"
18258	Block {
18259	BlockType Inport
18260	Name "Debug"
18261	Position [465, 28, 495, 42]
18262	IconDisplay "Port number"
18263	OutDataType "sfix(16)"
18264	OutScaling "2^0"
18265	}
18266	Block {
18267	BlockType Constant
18268	Name "Constant1"
18269	Position [160, 100, 190, 130]
18270	ShowName off
18271	Value "0"
18272	OutDataType "sfix(16)"
18273	OutScaling "2^0"
18274	}
18275	Block {
18276	BlockType Reference
18277	Name "Counter"
18278	Ports [0, 1]
18279	Position [380, 120, 440, 180]
18280	SourceBlock "xbsIndex_r4/Counter"
18281	SourceType "Xilinx Counter Block"
18282	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
18283	cnt_type "Free Running"
18284	cnt_to "Inf"
18285	operation "Up"
18286	start_count "0"
18287	cnt_by_val "1"
18288	arith_type "Unsigned"
18289	n_bits "10"
18290	bin_pt "0"
18291	load_pin off
18292	rst off
18293	en off
18294	explicit_period "on"
18295	period "1"
18296	dbl_ovrd off
18297	use_behavioral_HDL off
18298	use_rpm off
18299	implementation "Fabric"
18300	xl_use_area off
18301	xl_area "[0,0,0,0,0,0,0]"
18302	has_advanced_control "0"
18303	sggui_pos "20,20,348,619"
18304	block_type "counter"
18305	block_version "10.1.3"
18306	sg_icon_stat "60,60,1,1,white,blue,0,a170c862,right"
18307	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
18308	}
18309	Block {
18310	BlockType Reference
18311	Name "Mux"
18312	Ports [3, 1]
18313	Position [600, 63, 645, 167]
18314	SourceBlock "xbsIndex_r4/Mux"
18315	SourceType "Xilinx Bus Multiplexer Block"
18316	inputs "2"
18317	en off
18318	latency "0"
18319	precision "Full"
18320	arith_type "Unsigned"
18321	n_bits "1"
18322	bin_pt "0"
18323	quantization "Truncate"
18324	overflow "Wrap"
18325	dbl_ovrd off
18326	xl_use_area off
18327	xl_area "[0,0,0,0,0,0,0]"
18328	has_advanced_control "0"
18329	sggui_pos "20,20,348,303"
18330	block_type "mux"
18331	block_version "10.1.3"
18332	sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right"
18333	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
18334	}
18335	Block {
18336	BlockType Reference
18337	Name "radio4_RSSI"
18338	Ports [1, 1]
18339	Position [280, 109, 335, 121]
18340	NamePlacement "alternate"
18341	SourceBlock "xbsIndex_r4/Gateway In"
18342	SourceType "Xilinx Gateway In Block"
18343	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
18344	arith_type "Unsigned"
18345	n_bits "10"
18346	bin_pt "0"
18347	quantization "Truncate"
18348	overflow "Wrap"
18349	period "1"
18350	dbl_ovrd off
18351	timing_constraint "None"
18352	locs_specified off
18353	LOCs "{}"
18354	xl_use_area off
18355	xl_area "[0,0,0,0,0,0,0]"
18356	has_advanced_control "0"
18357	sggui_pos "20,20,356,432"
18358	block_type "gatewayin"
18359	block_version "VER_STRING_GOES_HERE"
18360	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
18361	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
18362	}
18363	Block {
18364	BlockType Outport
18365	Name "RSSI"
18366	Position [740, 108, 770, 122]
18367	IconDisplay "Port number"
18368	OutDataType "sfix(16)"
18369	OutScaling "2^0"
18370	}
18371	Line {
18372	SrcBlock "Constant1"
18373	SrcPort 1
18374	DstBlock "radio4_RSSI"
18375	DstPort 1
18376	}
18377	Line {
18378	SrcBlock "Debug"
18379	SrcPort 1
18380	Points [40, 0; 0, 45]
18381	DstBlock "Mux"
18382	DstPort 1
18383	}
18384	Line {
18385	SrcBlock "radio4_RSSI"
18386	SrcPort 1
18387	DstBlock "Mux"
18388	DstPort 2
18389	}
18390	Line {
18391	SrcBlock "Counter"
18392	SrcPort 1
18393	DstBlock "Mux"
18394	DstPort 3
18395	}
18396	Line {
18397	SrcBlock "Mux"
18398	SrcPort 1
18399	DstBlock "RSSI"
18400	DstPort 1
18401	}
18402	}
18403	}
18404	Block {
18405	BlockType Scope
18406	Name "Scope"
18407	Ports [2]
18408	Position [800, 111, 830, 164]
18409	Floating off
18410	Location [5, 34, 1285, 912]
18411	Open off
18412	NumInputPorts "2"
18413	List {
18414	ListType AxesTitles
18415	axes1 "%<SignalLabel>"
18416	axes2 "%<SignalLabel>"
18417	}
18418	YMin "-5~-5"
18419	YMax "5~5"
18420	DataFormat "StructureWithTime"
18421	SampleTime "0"
18422	}
18423	Block {
18424	BlockType Outport
18425	Name "Radio 4 RSSI"
18426	Position [650, 418, 680, 432]
18427	IconDisplay "Port number"
18428	OutDataType "sfix(16)"
18429	OutScaling "2^0"
18430	}
18431	Block {
18432	BlockType Outport
18433	Name "Radio 4 I/Q"
18434	Position [865, 288, 895, 302]
18435	Port "2"
18436	IconDisplay "Port number"
18437	OutDataType "sfix(16)"
18438	OutScaling "2^0"
18439	}
18440	Line {
18441	SrcBlock "ADC Q"
18442	SrcPort 2
18443	Points [50, 0; 0, 25; 30, 0]
18444	Branch {
18445	DstBlock "Concatenates_1"
18446	DstPort 4
18447	}
18448	Branch {
18449	Points [0, -215]
18450	DstBlock "Gateway Out1"
18451	DstPort 1
18452	}
18453	}
18454	Line {
18455	SrcBlock "ADC Q"
18456	SrcPort 1
18457	Points [0, 5]
18458	DstBlock "Concatenates_1"
18459	DstPort 3
18460	}
18461	Line {
18462	SrcBlock "ADC I"
18463	SrcPort 2
18464	Points [0, 20; 70, 0]
18465	Branch {
18466	DstBlock "Concatenates_1"
18467	DstPort 2
18468	}
18469	Branch {
18470	Points [0, -150]
18471	DstBlock "Gateway Out4"
18472	DstPort 1
18473	}
18474	}
18475	Line {
18476	SrcBlock "ADC I"
18477	SrcPort 1
18478	DstBlock "Concatenates_1"
18479	DstPort 1
18480	}
18481	Line {
18482	SrcBlock "Concatenates_1"
18483	SrcPort 1
18484	Points [0, 0]
18485	DstBlock "Radio 4 I/Q"
18486	DstPort 1
18487	}
18488	Line {
18489	SrcBlock "Gateway Out4"
18490	SrcPort 1
18491	DstBlock "Scope"
18492	DstPort 1
18493	}
18494	Line {
18495	SrcBlock "Gateway Out1"
18496	SrcPort 1
18497	Points [25, 0]
18498	DstBlock "Scope"
18499	DstPort 2
18500	}
18501	Line {
18502	SrcBlock "DebugRxBuffers"
18503	SrcPort 1
18504	Points [150, 0]
18505	Branch {
18506	DstBlock "ADC I"
18507	DstPort 1
18508	}
18509	Branch {
18510	Points [0, 75]
18511	Branch {
18512	DstBlock "ADC Q"
18513	DstPort 1
18514	}
18515	Branch {
18516	Points [0, 115]
18517	DstBlock "RSSI"
18518	DstPort 1
18519	}
18520	}
18521	}
18522	Line {
18523	SrcBlock "RSSI"
18524	SrcPort 1
18525	DstBlock "Radio 4 RSSI"
18526	DstPort 1
18527	}
18528	Line {
18529	SrcBlock "MGCAGC_AGCDCO_SEL"
18530	SrcPort 1
18531	Points [115, 0]
18532	Branch {
18533	DstBlock "ADC Q"
18534	DstPort 2
18535	}
18536	Branch {
18537	Points [0, -75]
18538	DstBlock "ADC I"
18539	DstPort 2
18540	}
18541	}
18542	Annotation {
18543	Position [518, 257]
18544	}
18545	}
18546	}
18547	Block {
18548	BlockType SubSystem
18549	Name "Radio 4 Outputs"
18550	Ports [1]
18551	Position [1180, 958, 1225, 1002]
18552	NamePlacement "alternate"
18553	MinAlgLoopOccurrences off
18554	PropExecContextOutsideSubsystem off
18555	RTWSystemCode "Auto"
18556	FunctionWithSeparateData off
18557	Opaque off
18558	RequestExecContextInheritance off
18559	MaskHideContents off
18560	System {
18561	Name "Radio 4 Outputs"
18562	Location [60, 247, 880, 529]
18563	Open off
18564	ModelBrowserVisibility off
18565	ModelBrowserWidth 200
18566	ScreenColor "white"
18567	PaperOrientation "landscape"
18568	PaperPositionMode "auto"
18569	PaperType "usletter"
18570	PaperUnits "inches"
18571	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
18572	TiledPageScale 1
18573	ShowPageBoundaries off
18574	ZoomFactor "100"
18575	Block {
18576	BlockType Inport
18577	Name "32b"
18578	Position [145, 148, 175, 162]
18579	IconDisplay "Port number"
18580	OutDataType "sfix(16)"
18581	OutScaling "2^0"
18582	}
18583	Block {
18584	BlockType Reference
18585	Name "16LSB"
18586	Ports [1, 1]
18587	Position [305, 147, 340, 163]
18588	SourceBlock "xbsIndex_r4/Slice"
18589	SourceType "Xilinx Bit Slice Extractor Block"
18590	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
18591	nbits "16"
18592	boolean_output off
18593	mode "Lower Bit Location + Width"
18594	bit1 "0"
18595	base1 "MSB of Input"
18596	bit0 "0"
18597	base0 "LSB of Input"
18598	dbl_ovrd off
18599	has_advanced_control "0"
18600	sggui_pos "593,46,442,407"
18601	block_type "slice"
18602	block_version "9.1.01"
18603	sg_icon_stat "35,16,1,1,white,blue,0,b1026674,right"
18604	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
18605	}
18606	Block {
18607	BlockType Reference
18608	Name "16MSB"
18609	Ports [1, 1]
18610	Position [305, 82, 345, 98]
18611	SourceBlock "xbsIndex_r4/Slice"
18612	SourceType "Xilinx Bit Slice Extractor Block"
18613	infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.<P><P>Hardware notes: In hardware this block costs nothing."
18614	nbits "16"
18615	boolean_output off
18616	mode "Upper Bit Location + Width"
18617	bit1 "0"
18618	base1 "MSB of Input"
18619	bit0 "0"
18620	base0 "LSB of Input"
18621	dbl_ovrd off
18622	has_advanced_control "0"
18623	sggui_pos "593,46,442,407"
18624	block_type "slice"
18625	block_version "9.1.01"
18626	sg_icon_stat "40,16,1,1,white,blue,0,b1026674,right"
18627	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n"
18628	}
18629	Block {
18630	BlockType Reference
18631	Name "Radio 4 DAC I"
18632	Ports [1, 1]
18633	Position [560, 69, 655, 111]
18634	LinkData {
18635	BlockName "Convert"
18636	DialogParameters {
18637	sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right"
18638	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
18639	}
18640	BlockName "radio4_dac_I"
18641	DialogParameters {
18642	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
18643	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
18644	}
18645	}
18646	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 4 DAC I"
18647	SourceType ""
18648	ShowPortLabels "FromPortIcon"
18649	SystemSampleTime "-1"
18650	FunctionWithSeparateData off
18651	RTWMemSecFuncInitTerm "Inherit from model"
18652	RTWMemSecFuncExecute "Inherit from model"
18653	RTWMemSecDataConstants "Inherit from model"
18654	RTWMemSecDataInternal "Inherit from model"
18655	RTWMemSecDataParameters "Inherit from model"
18656	}
18657	Block {
18658	BlockType Reference
18659	Name "Radio 4 DAC Q"
18660	Ports [1, 1]
18661	Position [560, 134, 655, 176]
18662	LinkData {
18663	BlockName "Convert"
18664	DialogParameters {
18665	sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right"
18666	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
18667	}
18668	BlockName "radio4_dac_Q"
18669	DialogParameters {
18670	sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right"
18671	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
18672	}
18673	}
18674	SourceBlock "WARP_Blockset/WARP Radio Board ADC//DACs/Radio 4 DAC Q"
18675	SourceType ""
18676	ShowPortLabels "FromPortIcon"
18677	SystemSampleTime "-1"
18678	FunctionWithSeparateData off
18679	RTWMemSecFuncInitTerm "Inherit from model"
18680	RTWMemSecFuncExecute "Inherit from model"
18681	RTWMemSecDataConstants "Inherit from model"
18682	RTWMemSecDataInternal "Inherit from model"
18683	RTWMemSecDataParameters "Inherit from model"
18684	}
18685	Block {
18686	BlockType Reference
18687	Name "Register"
18688	Ports [1, 1]
18689	Position [475, 79, 520, 101]
18690	ShowName off
18691	SourceBlock "xbsIndex_r4/Register"
18692	SourceType "Xilinx Register Block"
18693	init "0"
18694	rst off
18695	en off
18696	dbl_ovrd off
18697	xl_use_area off
18698	xl_area "[0,0,0,0,0,0,0]"
18699	has_advanced_control "0"
18700	sggui_pos "568,185,356,193"
18701	block_type "register"
18702	block_version "9.1.01"
18703	sg_icon_stat "45,22,1,1,white,blue,0,ac6b57db,right"
18704	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
18705	}
18706	Block {
18707	BlockType Reference
18708	Name "Register1"
18709	Ports [1, 1]
18710	Position [475, 144, 520, 166]
18711	ShowName off
18712	SourceBlock "xbsIndex_r4/Register"
18713	SourceType "Xilinx Register Block"
18714	init "0"
18715	rst off
18716	en off
18717	dbl_ovrd off
18718	xl_use_area off
18719	xl_area "[0,0,0,0,0,0,0]"
18720	has_advanced_control "0"
18721	sggui_pos "568,185,356,193"
18722	block_type "register"
18723	block_version "9.1.01"
18724	sg_icon_stat "45,22,1,1,white,blue,0,ac6b57db,right"
18725	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
18726	}
18727	Block {
18728	BlockType Reference
18729	Name "Reinterpret"
18730	Ports [1, 1]
18731	Position [380, 81, 440, 99]
18732	ShowName off
18733	SourceBlock "xbsIndex_r4/Reinterpret"
18734	SourceType "Xilinx Type Reinterpreter Block"
18735	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
18736	force_arith_type on
18737	arith_type "Signed (2's comp)"
18738	force_bin_pt on
18739	bin_pt "15"
18740	has_advanced_control "0"
18741	sggui_pos "436,54,356,309"
18742	block_type "reinterpret"
18743	block_version "9.1.01"
18744	sg_icon_stat "60,18,1,1,white,blue,0,8982c1db,right"
18745	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
18746	}
18747	Block {
18748	BlockType Reference
18749	Name "Reinterpret1"
18750	Ports [1, 1]
18751	Position [380, 146, 440, 164]
18752	ShowName off
18753	SourceBlock "xbsIndex_r4/Reinterpret"
18754	SourceType "Xilinx Type Reinterpreter Block"
18755	infoedit "Changes signal type without altering the binary representation. You can changed the signal between signed and unsigned, and relocate the binary point.<P><P>Hardware notes: In hardware this block costs nothing.<P><P>Example: Suppose the input is 6 bits wide, signed, with 2 fractional bits, and the output is forced to unsigned with 0 fractional bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an output of 56 (111000 in binary)."
18756	force_arith_type on
18757	arith_type "Signed (2's comp)"
18758	force_bin_pt on
18759	bin_pt "15"
18760	has_advanced_control "0"
18761	sggui_pos "436,54,356,309"
18762	block_type "reinterpret"
18763	block_version "9.1.01"
18764	sg_icon_stat "60,18,1,1,white,blue,0,8982c1db,right"
18765	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: end icon text');\n"
18766	}
18767	Block {
18768	BlockType Terminator
18769	Name "Terminator"
18770	Position [680, 80, 700, 100]
18771	ShowName off
18772	}
18773	Block {
18774	BlockType Terminator
18775	Name "Terminator1"
18776	Position [685, 145, 705, 165]
18777	ShowName off
18778	}
18779	Line {
18780	SrcBlock "32b"
18781	SrcPort 1
18782	Points [85, 0]
18783	Branch {
18784	DstBlock "16LSB"
18785	DstPort 1
18786	}
18787	Branch {
18788	Points [0, -65]
18789	DstBlock "16MSB"
18790	DstPort 1
18791	}
18792	}
18793	Line {
18794	SrcBlock "16MSB"
18795	SrcPort 1
18796	DstBlock "Reinterpret"
18797	DstPort 1
18798	}
18799	Line {
18800	SrcBlock "16LSB"
18801	SrcPort 1
18802	DstBlock "Reinterpret1"
18803	DstPort 1
18804	}
18805	Line {
18806	SrcBlock "Reinterpret"
18807	SrcPort 1
18808	DstBlock "Register"
18809	DstPort 1
18810	}
18811	Line {
18812	SrcBlock "Reinterpret1"
18813	SrcPort 1
18814	DstBlock "Register1"
18815	DstPort 1
18816	}
18817	Line {
18818	SrcBlock "Register"
18819	SrcPort 1
18820	DstBlock "Radio 4 DAC I"
18821	DstPort 1
18822	}
18823	Line {
18824	SrcBlock "Register1"
18825	SrcPort 1
18826	DstBlock "Radio 4 DAC Q"
18827	DstPort 1
18828	}
18829	Line {
18830	SrcBlock "Radio 4 DAC I"
18831	SrcPort 1
18832	DstBlock "Terminator"
18833	DstPort 1
18834	}
18835	Line {
18836	SrcBlock "Radio 4 DAC Q"
18837	SrcPort 1
18838	DstBlock "Terminator1"
18839	DstPort 1
18840	}
18841	}
18842	}
18843	Block {
18844	BlockType Reference
18845	Name "Register"
18846	Ports [1, 1]
18847	Position [250, 1006, 285, 1034]
18848	ShowName off
18849	SourceBlock "xbsIndex_r4/Register"
18850	SourceType "Xilinx Register Block"
18851	init "0"
18852	rst off
18853	en off
18854	dbl_ovrd off
18855	xl_use_area off
18856	xl_area "[0,0,0,0,0,0,0]"
18857	has_advanced_control "0"
18858	sggui_pos "-1,-1,-1,-1"
18859	block_type "register"
18860	block_version "8.2"
18861	sg_icon_stat "35,28,1,1,white,blue,0,ac6b57db,right"
18862	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
18863	}
18864	Block {
18865	BlockType SubSystem
18866	Name "Rx Control"
18867	Ports [1, 2]
18868	Position [415, 224, 510, 266]
18869	MinAlgLoopOccurrences off
18870	PropExecContextOutsideSubsystem off
18871	RTWSystemCode "Auto"
18872	FunctionWithSeparateData off
18873	Opaque off
18874	RequestExecContextInheritance off
18875	MaskHideContents off
18876	System {
18877	Name "Rx Control"
18878	Location [2, 74, 1270, 710]
18879	Open off
18880	ModelBrowserVisibility off
18881	ModelBrowserWidth 200
18882	ScreenColor "white"
18883	PaperOrientation "landscape"
18884	PaperPositionMode "auto"
18885	PaperType "usletter"
18886	PaperUnits "inches"
18887	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
18888	TiledPageScale 1
18889	ShowPageBoundaries off
18890	ZoomFactor "159"
18891	Block {
18892	BlockType Inport
18893	Name "Start"
18894	Position [15, 298, 45, 312]
18895	IconDisplay "Port number"
18896	OutDataType "sfix(16)"
18897	OutScaling "2^0"
18898	}
18899	Block {
18900	BlockType Reference
18901	Name "Convert"
18902	Ports [1, 1]
18903	Position [635, 162, 665, 178]
18904	ShowName off
18905	SourceBlock "xbsIndex_r4/Convert"
18906	SourceType "Xilinx Type Converter Block"
18907	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
18908	arith_type "Unsigned"
18909	n_bits "1"
18910	bin_pt "0"
18911	quantization "Truncate"
18912	overflow "Wrap"
18913	latency "0"
18914	dbl_ovrd off
18915	pipeline off
18916	xl_use_area off
18917	xl_area "[0,0,0,0,0,0,0]"
18918	has_advanced_control "0"
18919	sggui_pos "20,20,461,334"
18920	block_type "convert"
18921	block_version "10.1.2"
18922	sg_icon_stat "30,16,1,1,white,blue,0,74901e60,right"
18923	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
18924	}
18925	Block {
18926	BlockType Reference
18927	Name "Gateway Out1"
18928	Ports [1, 1]
18929	Position [585, 25, 615, 35]
18930	ShowName off
18931	SourceBlock "xbsIndex_r4/Gateway Out"
18932	SourceType "Xilinx Gateway Out Block"
18933	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
18934	hdl_port off
18935	timing_constraint "None"
18936	locs_specified off
18937	LOCs "{}"
18938	xl_use_area off
18939	xl_area "[0,0,0,0,0,0,0]"
18940	has_advanced_control "0"
18941	sggui_pos "20,20,336,386"
18942	block_type "gatewayout"
18943	block_version "10.1.2"
18944	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
18945	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
18946	}
18947	Block {
18948	BlockType Reference
18949	Name "Gateway Out2"
18950	Ports [1, 1]
18951	Position [585, 40, 615, 50]
18952	ShowName off
18953	SourceBlock "xbsIndex_r4/Gateway Out"
18954	SourceType "Xilinx Gateway Out Block"
18955	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
18956	hdl_port off
18957	timing_constraint "None"
18958	locs_specified off
18959	LOCs "{}"
18960	xl_use_area off
18961	xl_area "[0,0,0,0,0,0,0]"
18962	has_advanced_control "0"
18963	sggui_pos "20,20,336,386"
18964	block_type "gatewayout"
18965	block_version "10.1.2"
18966	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
18967	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
18968	}
18969	Block {
18970	BlockType Reference
18971	Name "Gateway Out3"
18972	Ports [1, 1]
18973	Position [585, 55, 615, 65]
18974	ShowName off
18975	SourceBlock "xbsIndex_r4/Gateway Out"
18976	SourceType "Xilinx Gateway Out Block"
18977	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
18978	hdl_port off
18979	timing_constraint "None"
18980	locs_specified off
18981	LOCs "{}"
18982	xl_use_area off
18983	xl_area "[0,0,0,0,0,0,0]"
18984	has_advanced_control "0"
18985	sggui_pos "20,20,336,386"
18986	block_type "gatewayout"
18987	block_version "10.1.2"
18988	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
18989	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
18990	}
18991	Block {
18992	BlockType Reference
18993	Name "Gateway Out4"
18994	Ports [1, 1]
18995	Position [585, 70, 615, 80]
18996	ShowName off
18997	SourceBlock "xbsIndex_r4/Gateway Out"
18998	SourceType "Xilinx Gateway Out Block"
18999	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
19000	hdl_port off
19001	timing_constraint "None"
19002	locs_specified off
19003	LOCs "{}"
19004	xl_use_area off
19005	xl_area "[0,0,0,0,0,0,0]"
19006	has_advanced_control "0"
19007	sggui_pos "20,20,336,386"
19008	block_type "gatewayout"
19009	block_version "10.1.2"
19010	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
19011	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19012	}
19013	Block {
19014	BlockType Reference
19015	Name "Gateway Out5"
19016	Ports [1, 1]
19017	Position [585, 85, 615, 95]
19018	ShowName off
19019	SourceBlock "xbsIndex_r4/Gateway Out"
19020	SourceType "Xilinx Gateway Out Block"
19021	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
19022	hdl_port off
19023	timing_constraint "None"
19024	locs_specified off
19025	LOCs "{}"
19026	xl_use_area off
19027	xl_area "[0,0,0,0,0,0,0]"
19028	has_advanced_control "0"
19029	sggui_pos "20,20,336,386"
19030	block_type "gatewayout"
19031	block_version "10.1.2"
19032	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
19033	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19034	}
19035	Block {
19036	BlockType Goto
19037	Name "Goto2"
19038	Position [695, 160, 825, 180]
19039	ShowName off
19040	GotoTag "CAPTURE_IS_DONE"
19041	TagVisibility "global"
19042	}
19043	Block {
19044	BlockType Reference
19045	Name "Inverter1"
19046	Ports [1, 1]
19047	Position [360, 281, 385, 299]
19048	ShowName off
19049	SourceBlock "xbsIndex_r4/Inverter"
19050	SourceType "Xilinx Inverter Block"
19051	infoedit "Bitwise logical negation (one's complement) operator."
19052	en off
19053	latency "0"
19054	dbl_ovrd off
19055	xl_use_area off
19056	xl_area "[0,0,0,0,0,0,0]"
19057	has_advanced_control "0"
19058	sggui_pos "-1,-1,-1,-1"
19059	block_type "inv"
19060	block_version "8.2"
19061	sg_icon_stat "25,18,1,1,white,blue,0,1ab4a85f,right"
19062	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
19063	}
19064	Block {
19065	BlockType Reference
19066	Name "Inverter2"
19067	Ports [1, 1]
19068	Position [570, 161, 595, 179]
19069	ShowName off
19070	SourceBlock "xbsIndex_r4/Inverter"
19071	SourceType "Xilinx Inverter Block"
19072	infoedit "Bitwise logical negation (one's complement) operator."
19073	en off
19074	latency "0"
19075	dbl_ovrd off
19076	xl_use_area off
19077	xl_area "[0,0,0,0,0,0,0]"
19078	has_advanced_control "0"
19079	sggui_pos "-1,-1,-1,-1"
19080	block_type "inv"
19081	block_version "8.2"
19082	sg_icon_stat "25,18,1,1,white,blue,0,1ab4a85f,right"
19083	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
19084	}
19085	Block {
19086	BlockType Reference
19087	Name "Relational1"
19088	Ports [2, 1]
19089	Position [425, 354, 470, 401]
19090	Orientation "left"
19091	NamePlacement "alternate"
19092	ShowName off
19093	SourceBlock "xbsIndex_r4/Relational"
19094	SourceType "Xilinx Arithmetic Relational Operator Block"
19095	mode "a>=b"
19096	en off
19097	latency "0"
19098	dbl_ovrd off
19099	xl_use_area off
19100	xl_area "[0,0,0,0,0,0,0]"
19101	has_advanced_control "0"
19102	sggui_pos "20,20,348,193"
19103	block_type "relational"
19104	block_version "8.2"
19105	sg_icon_stat "45,47,1,1,white,blue,0,6d6ac162,left"
19106	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a>=b}\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19107	}
19108	Block {
19109	BlockType Reference
19110	Name "Rx Addr Counter1"
19111	Ports [2, 1]
19112	Position [425, 276, 465, 329]
19113	NamePlacement "alternate"
19114	SourceBlock "xbsIndex_r4/Counter"
19115	SourceType "Xilinx Counter Block"
19116	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
19117	cnt_type "Free Running"
19118	cnt_to "Inf"
19119	operation "Up"
19120	start_count "0"
19121	cnt_by_val "1"
19122	arith_type "Unsigned"
19123	n_bits "14"
19124	bin_pt "0"
19125	load_pin off
19126	rst on
19127	en on
19128	explicit_period "off"
19129	period "1"
19130	dbl_ovrd off
19131	use_behavioral_HDL off
19132	use_rpm off
19133	implementation "Fabric"
19134	xl_use_area off
19135	xl_area "[0,0,0,0,0,0,0]"
19136	has_advanced_control "0"
19137	sggui_pos "20,20,356,630"
19138	block_type "counter"
19139	block_version "8.2"
19140	sg_icon_stat "40,53,1,1,white,blue,0,46c73e85,right"
19141	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 ],[0 0 53 53 ],[0.77 0.82 0.91]);\npatch([10 3 12 3 10 21 24 27 38 29 20 14 24 14 20 29 38 27 24 21 10 ],[11 18 27 36 43 43 40 43 43 34 43 37 27 17 11 20 11 11 14 11 11 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 53 53 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
19142	}
19143	Block {
19144	BlockType Scope
19145	Name "Rx Control"
19146	Ports [5]
19147	Position [665, 22, 695, 98]
19148	Floating off
19149	Location [5, 34, 1285, 742]
19150	Open off
19151	NumInputPorts "5"
19152	ZoomMode "yonly"
19153	List {
19154	ListType AxesTitles
19155	axes1 "%<SignalLabel>"
19156	axes2 "%<SignalLabel>"
19157	axes3 "%<SignalLabel>"
19158	axes4 "%<SignalLabel>"
19159	axes5 "%<SignalLabel>"
19160	}
19161	TimeRange "70000"
19162	YMin "0~0~0~0~0"
19163	YMax "1~1~1~1~20000"
19164	SaveName "ScopeData1"
19165	DataFormat "StructureWithTime"
19166	LimitDataPoints off
19167	SampleTime "0"
19168	}
19169	Block {
19170	BlockType SubSystem
19171	Name "S-R Latch1"
19172	Ports [2, 1]
19173	Position [225, 297, 265, 333]
19174	MinAlgLoopOccurrences off
19175	PropExecContextOutsideSubsystem off
19176	RTWSystemCode "Auto"
19177	FunctionWithSeparateData off
19178	Opaque off
19179	RequestExecContextInheritance off
19180	MaskHideContents off
19181	System {
19182	Name "S-R Latch1"
19183	Location [2, 74, 1184, 1000]
19184	Open off
19185	ModelBrowserVisibility off
19186	ModelBrowserWidth 200
19187	ScreenColor "white"
19188	PaperOrientation "landscape"
19189	PaperPositionMode "auto"
19190	PaperType "usletter"
19191	PaperUnits "inches"
19192	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
19193	TiledPageScale 1
19194	ShowPageBoundaries off
19195	ZoomFactor "100"
19196	Block {
19197	BlockType Inport
19198	Name "S"
19199	Position [125, 198, 155, 212]
19200	IconDisplay "Port number"
19201	OutDataType "sfix(16)"
19202	OutScaling "2^0"
19203	}
19204	Block {
19205	BlockType Inport
19206	Name "R"
19207	Position [125, 178, 155, 192]
19208	NamePlacement "alternate"
19209	Port "2"
19210	IconDisplay "Port number"
19211	OutDataType "sfix(16)"
19212	OutScaling "2^0"
19213	}
19214	Block {
19215	BlockType Reference
19216	Name "Convert"
19217	Ports [1, 1]
19218	Position [200, 178, 230, 192]
19219	ShowName off
19220	SourceBlock "xbsIndex_r4/Convert"
19221	SourceType "Xilinx Type Converter Block"
19222	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
19223	arith_type "Boolean"
19224	n_bits "16"
19225	bin_pt "14"
19226	quantization "Truncate"
19227	overflow "Wrap"
19228	latency "0"
19229	dbl_ovrd off
19230	pipeline off
19231	xl_use_area off
19232	xl_area "[0,0,0,0,0,0,0]"
19233	has_advanced_control "0"
19234	sggui_pos "20,20,374,375"
19235	block_type "convert"
19236	block_version "8.2"
19237	sg_icon_stat "30,14,1,1,white,blue,0,74901e60,right"
19238	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
19239	}
19240	Block {
19241	BlockType Reference
19242	Name "Convert1"
19243	Ports [1, 1]
19244	Position [200, 198, 230, 212]
19245	ShowName off
19246	SourceBlock "xbsIndex_r4/Convert"
19247	SourceType "Xilinx Type Converter Block"
19248	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
19249	arith_type "Boolean"
19250	n_bits "16"
19251	bin_pt "14"
19252	quantization "Truncate"
19253	overflow "Wrap"
19254	latency "0"
19255	dbl_ovrd off
19256	pipeline off
19257	xl_use_area off
19258	xl_area "[0,0,0,0,0,0,0]"
19259	has_advanced_control "0"
19260	sggui_pos "20,20,374,375"
19261	block_type "convert"
19262	block_version "8.2"
19263	sg_icon_stat "30,14,1,1,white,blue,0,74901e60,right"
19264	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
19265	}
19266	Block {
19267	BlockType Reference
19268	Name "Register"
19269	Ports [3, 1]
19270	Position [280, 153, 330, 217]
19271	NamePlacement "alternate"
19272	ShowName off
19273	SourceBlock "xbsIndex_r4/Register"
19274	SourceType "Xilinx Register Block"
19275	init "0"
19276	rst on
19277	en on
19278	dbl_ovrd off
19279	xl_use_area off
19280	xl_area "[0,0,0,0,0,0,0]"
19281	has_advanced_control "0"
19282	sggui_pos "-1,-1,-1,-1"
19283	block_type "register"
19284	block_version "8.2"
19285	sg_icon_stat "50,64,1,1,white,blue,0,923c1847,right"
19286	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19287	}
19288	Block {
19289	BlockType Reference
19290	Name "zero3"
19291	Ports [0, 1]
19292	Position [215, 156, 235, 174]
19293	ShowName off
19294	SourceBlock "xbsIndex_r4/Constant"
19295	SourceType "Xilinx Constant Block Block"
19296	arith_type "Boolean"
19297	const "1"
19298	n_bits "1"
19299	bin_pt "0"
19300	explicit_period off
19301	period "1"
19302	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
19303	equ "P=C"
19304	opselect "C"
19305	inp2 "PCIN>>17"
19306	opr "+"
19307	inp1 "P"
19308	carry "CIN"
19309	dbl_ovrd off
19310	has_advanced_control "0"
19311	sggui_pos "-1,-1,-1,-1"
19312	block_type "constant"
19313	block_version "VER_STRING_GOES_HERE"
19314	sg_icon_stat "20,18,1,1,white,blue,0,06094819,right"
19315	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: end icon text');\n"
19316	}
19317	Block {
19318	BlockType Outport
19319	Name "Q"
19320	Position [395, 178, 425, 192]
19321	IconDisplay "Port number"
19322	OutDataType "sfix(16)"
19323	OutScaling "2^0"
19324	}
19325	Line {
19326	SrcBlock "Convert1"
19327	SrcPort 1
19328	DstBlock "Register"
19329	DstPort 3
19330	}
19331	Line {
19332	SrcBlock "Convert"
19333	SrcPort 1
19334	DstBlock "Register"
19335	DstPort 2
19336	}
19337	Line {
19338	SrcBlock "Register"
19339	SrcPort 1
19340	DstBlock "Q"
19341	DstPort 1
19342	}
19343	Line {
19344	SrcBlock "S"
19345	SrcPort 1
19346	DstBlock "Convert1"
19347	DstPort 1
19348	}
19349	Line {
19350	SrcBlock "R"
19351	SrcPort 1
19352	DstBlock "Convert"
19353	DstPort 1
19354	}
19355	Line {
19356	SrcBlock "zero3"
19357	SrcPort 1
19358	DstBlock "Register"
19359	DstPort 1
19360	}
19361	}
19362	}
19363	Block {
19364	BlockType Reference
19365	Name "zero3"
19366	Ports [0, 1]
19367	Position [510, 380, 565, 400]
19368	Orientation "left"
19369	NamePlacement "alternate"
19370	ShowName off
19371	SourceBlock "xbsIndex_r4/Constant"
19372	SourceType "Xilinx Constant Block Block"
19373	arith_type "Unsigned"
19374	const "2^14-1"
19375	n_bits "14"
19376	bin_pt "0"
19377	explicit_period off
19378	period "1"
19379	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
19380	equ "P=C"
19381	opselect "C"
19382	inp2 "PCIN>>17"
19383	opr "+"
19384	inp1 "P"
19385	carry "CIN"
19386	dbl_ovrd off
19387	has_advanced_control "0"
19388	sggui_pos "20,20,400,346"
19389	block_type "constant"
19390	block_version "VER_STRING_GOES_HERE"
19391	sg_icon_stat "55,20,1,1,white,blue,0,63905735,left"
19392	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'16383');\nfprintf('','COMMENT: end icon text');\n"
19393	}
19394	Block {
19395	BlockType Outport
19396	Name "WrAddr"
19397	Position [730, 298, 760, 312]
19398	IconDisplay "Port number"
19399	OutDataType "sfix(16)"
19400	OutScaling "2^0"
19401	}
19402	Block {
19403	BlockType Outport
19404	Name "WrEn"
19405	Position [730, 233, 760, 247]
19406	Port "2"
19407	IconDisplay "Port number"
19408	OutDataType "sfix(16)"
19409	OutScaling "2^0"
19410	}
19411	Line {
19412	SrcBlock "Start"
19413	SrcPort 1
19414	Points [145, 0]
19415	Branch {
19416	DstBlock "S-R Latch1"
19417	DstPort 1
19418	}
19419	Branch {
19420	Points [0, -275]
19421	DstBlock "Gateway Out1"
19422	DstPort 1
19423	}
19424	}
19425	Line {
19426	SrcBlock "S-R Latch1"
19427	SrcPort 1
19428	Points [60, 0]
19429	Branch {
19430	DstBlock "Rx Addr Counter1"
19431	DstPort 2
19432	}
19433	Branch {
19434	Points [0, -25]
19435	Branch {
19436	DstBlock "Inverter1"
19437	DstPort 1
19438	}
19439	Branch {
19440	Points [0, -50]
19441	Branch {
19442	Points [200, 0]
19443	Branch {
19444	DstBlock "WrEn"
19445	DstPort 1
19446	}
19447	Branch {
19448	Points [0, -70]
19449	DstBlock "Inverter2"
19450	DstPort 1
19451	}
19452	}
19453	Branch {
19454	Points [0, -180]
19455	DstBlock "Gateway Out3"
19456	DstPort 1
19457	}
19458	}
19459	}
19460	}
19461	Line {
19462	SrcBlock "Inverter1"
19463	SrcPort 1
19464	Points [15, 0]
19465	Branch {
19466	DstBlock "Rx Addr Counter1"
19467	DstPort 1
19468	}
19469	Branch {
19470	Points [0, -215]
19471	DstBlock "Gateway Out4"
19472	DstPort 1
19473	}
19474	}
19475	Line {
19476	SrcBlock "Rx Addr Counter1"
19477	SrcPort 1
19478	Points [45, 0]
19479	Branch {
19480	Points [0, 60]
19481	DstBlock "Relational1"
19482	DstPort 1
19483	}
19484	Branch {
19485	DstBlock "WrAddr"
19486	DstPort 1
19487	}
19488	Branch {
19489	Points [0, -215]
19490	DstBlock "Gateway Out5"
19491	DstPort 1
19492	}
19493	}
19494	Line {
19495	SrcBlock "Gateway Out5"
19496	SrcPort 1
19497	DstBlock "Rx Control"
19498	DstPort 5
19499	}
19500	Line {
19501	SrcBlock "Gateway Out4"
19502	SrcPort 1
19503	DstBlock "Rx Control"
19504	DstPort 4
19505	}
19506	Line {
19507	SrcBlock "Gateway Out3"
19508	SrcPort 1
19509	DstBlock "Rx Control"
19510	DstPort 3
19511	}
19512	Line {
19513	SrcBlock "Gateway Out2"
19514	SrcPort 1
19515	DstBlock "Rx Control"
19516	DstPort 2
19517	}
19518	Line {
19519	SrcBlock "Gateway Out1"
19520	SrcPort 1
19521	DstBlock "Rx Control"
19522	DstPort 1
19523	}
19524	Line {
19525	SrcBlock "zero3"
19526	SrcPort 1
19527	DstBlock "Relational1"
19528	DstPort 2
19529	}
19530	Line {
19531	SrcBlock "Relational1"
19532	SrcPort 1
19533	Points [-220, 0; 0, -55]
19534	Branch {
19535	DstBlock "S-R Latch1"
19536	DstPort 2
19537	}
19538	Branch {
19539	Points [0, -280]
19540	DstBlock "Gateway Out2"
19541	DstPort 1
19542	}
19543	}
19544	Line {
19545	SrcBlock "Inverter2"
19546	SrcPort 1
19547	DstBlock "Convert"
19548	DstPort 1
19549	}
19550	Line {
19551	SrcBlock "Convert"
19552	SrcPort 1
19553	DstBlock "Goto2"
19554	DstPort 1
19555	}
19556	}
19557	}
19558	Block {
19559	BlockType Reference
19560	Name "StartCapture"
19561	Ports [1, 1]
19562	Position [120, 214, 175, 226]
19563	NamePlacement "alternate"
19564	SourceBlock "xbsIndex_r4/Gateway In"
19565	SourceType "Xilinx Gateway In Block"
19566	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
19567	arith_type "Unsigned"
19568	n_bits "1"
19569	bin_pt "0"
19570	quantization "Round (unbiased: +/- Inf)"
19571	overflow "Saturate"
19572	period "1"
19573	dbl_ovrd off
19574	timing_constraint "None"
19575	locs_specified off
19576	LOCs "{}"
19577	xl_use_area off
19578	xl_area "[0,0,0,0,0,0,0]"
19579	has_advanced_control "0"
19580	sggui_pos "20,20,356,432"
19581	block_type "gatewayin"
19582	block_version "VER_STRING_GOES_HERE"
19583	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
19584	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
19585	}
19586	Block {
19587	BlockType Reference
19588	Name "StartTx"
19589	Ports [1, 1]
19590	Position [160, 654, 215, 666]
19591	NamePlacement "alternate"
19592	SourceBlock "xbsIndex_r4/Gateway In"
19593	SourceType "Xilinx Gateway In Block"
19594	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
19595	arith_type "Unsigned"
19596	n_bits "1"
19597	bin_pt "0"
19598	quantization "Round (unbiased: +/- Inf)"
19599	overflow "Saturate"
19600	period "1"
19601	dbl_ovrd off
19602	timing_constraint "None"
19603	locs_specified off
19604	LOCs "{}"
19605	xl_use_area off
19606	xl_area "[0,0,0,0,0,0,0]"
19607	has_advanced_control "0"
19608	sggui_pos "20,20,356,432"
19609	block_type "gatewayin"
19610	block_version "VER_STRING_GOES_HERE"
19611	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
19612	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
19613	}
19614	Block {
19615	BlockType Reference
19616	Name "StopTx"
19617	Ports [1, 1]
19618	Position [160, 739, 215, 751]
19619	NamePlacement "alternate"
19620	SourceBlock "xbsIndex_r4/Gateway In"
19621	SourceType "Xilinx Gateway In Block"
19622	infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.<P><P>Hardware notes: In hardware these blocks become top level input ports."
19623	arith_type "Unsigned"
19624	n_bits "1"
19625	bin_pt "0"
19626	quantization "Round (unbiased: +/- Inf)"
19627	overflow "Saturate"
19628	period "1"
19629	dbl_ovrd off
19630	timing_constraint "None"
19631	locs_specified off
19632	LOCs "{}"
19633	xl_use_area off
19634	xl_area "[0,0,0,0,0,0,0]"
19635	has_advanced_control "0"
19636	sggui_pos "20,20,356,432"
19637	block_type "gatewayin"
19638	block_version "VER_STRING_GOES_HERE"
19639	sg_icon_stat "55,12,1,1,white,yellow,0,bc55d28f,right"
19640	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n"
19641	}
19642	Block {
19643	BlockType Terminator
19644	Name "Terminator"
19645	Position [260, 945, 280, 965]
19646	ShowName off
19647	}
19648	Block {
19649	BlockType SubSystem
19650	Name "Tx Control"
19651	Ports [4, 2]
19652	Position [570, 650, 680, 715]
19653	MinAlgLoopOccurrences off
19654	PropExecContextOutsideSubsystem off
19655	RTWSystemCode "Auto"
19656	FunctionWithSeparateData off
19657	Opaque off
19658	RequestExecContextInheritance off
19659	MaskHideContents off
19660	System {
19661	Name "Tx Control"
19662	Location [2, 74, 1254, 710]
19663	Open off
19664	ModelBrowserVisibility off
19665	ModelBrowserWidth 200
19666	ScreenColor "white"
19667	PaperOrientation "landscape"
19668	PaperPositionMode "auto"
19669	PaperType "usletter"
19670	PaperUnits "inches"
19671	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
19672	TiledPageScale 1
19673	ShowPageBoundaries off
19674	ZoomFactor "100"
19675	Block {
19676	BlockType Inport
19677	Name "StartTx"
19678	Position [390, 368, 420, 382]
19679	NamePlacement "alternate"
19680	IconDisplay "Port number"
19681	OutDataType "sfix(16)"
19682	OutScaling "2^0"
19683	}
19684	Block {
19685	BlockType Inport
19686	Name "StopTx"
19687	Position [145, 423, 175, 437]
19688	Port "2"
19689	IconDisplay "Port number"
19690	OutDataType "sfix(16)"
19691	OutScaling "2^0"
19692	}
19693	Block {
19694	BlockType Inport
19695	Name "ContinuousTx"
19696	Position [150, 353, 180, 367]
19697	Port "3"
19698	IconDisplay "Port number"
19699	OutDataType "sfix(16)"
19700	OutScaling "2^0"
19701	}
19702	Block {
19703	BlockType Inport
19704	Name "TxDelay"
19705	Position [750, 413, 780, 427]
19706	Port "4"
19707	IconDisplay "Port number"
19708	OutDataType "sfix(16)"
19709	OutScaling "2^0"
19710	}
19711	Block {
19712	BlockType Reference
19713	Name "Convert1"
19714	Ports [1, 1]
19715	Position [470, 366, 500, 384]
19716	NamePlacement "alternate"
19717	SourceBlock "xbsIndex_r4/Convert"
19718	SourceType "Xilinx Type Converter Block"
19719	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
19720	arith_type "Boolean"
19721	n_bits "1"
19722	bin_pt "0"
19723	quantization "Truncate"
19724	overflow "Wrap"
19725	latency "0"
19726	dbl_ovrd off
19727	pipeline off
19728	xl_use_area off
19729	xl_area "[0,0,0,0,0,0,0]"
19730	has_advanced_control "0"
19731	sggui_pos "20,20,461,375"
19732	block_type "convert"
19733	block_version "9.1.01"
19734	sg_icon_stat "30,18,1,1,white,blue,0,74901e60,right"
19735	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
19736	}
19737	Block {
19738	BlockType Reference
19739	Name "Convert2"
19740	Ports [1, 1]
19741	Position [230, 421, 260, 439]
19742	SourceBlock "xbsIndex_r4/Convert"
19743	SourceType "Xilinx Type Converter Block"
19744	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
19745	arith_type "Boolean"
19746	n_bits "1"
19747	bin_pt "0"
19748	quantization "Truncate"
19749	overflow "Wrap"
19750	latency "0"
19751	dbl_ovrd off
19752	pipeline off
19753	xl_use_area off
19754	xl_area "[0,0,0,0,0,0,0]"
19755	has_advanced_control "0"
19756	sggui_pos "20,20,461,375"
19757	block_type "convert"
19758	block_version "9.1.01"
19759	sg_icon_stat "30,18,1,1,white,blue,0,74901e60,right"
19760	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
19761	}
19762	Block {
19763	BlockType Reference
19764	Name "From Register4"
19765	Ports [0, 1]
19766	Position [1230, 220, 1275, 250]
19767	Orientation "left"
19768	NamePlacement "alternate"
19769	ShowName off
19770	AttributesFormatString "TxLength\\n<< %<shared_memory_name> >>"
19771	SourceBlock "xbsIndex_r4/From Register"
19772	SourceType "Xilinx Shared Memory Based From Register Block"
19773	infoedit "Register block that reads data to a shared memory register. Delay of one sample period."
19774	shared_memory_name "'TxLength'"
19775	init "2^14-1"
19776	period "1"
19777	ownership "Locally owned and initialized"
19778	arith_type "Unsigned"
19779	n_bits "14"
19780	bin_pt "0"
19781	dbl_ovrd off
19782	xl_use_area off
19783	xl_area "[0,0,0,0,0,0,0]"
19784	has_advanced_control "0"
19785	sggui_pos "20,20,381,246"
19786	block_type "fromreg"
19787	block_version "8.2"
19788	sg_icon_stat "45,30,1,1,white,blue,0,4b212927,left"
19789	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n"
19790	}
19791	Block {
19792	BlockType Reference
19793	Name "Gateway Out1"
19794	Ports [1, 1]
19795	Position [1295, 620, 1325, 630]
19796	ShowName off
19797	SourceBlock "xbsIndex_r4/Gateway Out"
19798	SourceType "Xilinx Gateway Out Block"
19799	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
19800	hdl_port off
19801	timing_constraint "None"
19802	locs_specified off
19803	LOCs "{}"
19804	xl_use_area off
19805	xl_area "[0,0,0,0,0,0,0]"
19806	has_advanced_control "0"
19807	sggui_pos "20,20,336,386"
19808	block_type "gatewayout"
19809	block_version "10.1.2"
19810	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
19811	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19812	}
19813	Block {
19814	BlockType Reference
19815	Name "Gateway Out2"
19816	Ports [1, 1]
19817	Position [1295, 635, 1325, 645]
19818	ShowName off
19819	SourceBlock "xbsIndex_r4/Gateway Out"
19820	SourceType "Xilinx Gateway Out Block"
19821	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
19822	hdl_port off
19823	timing_constraint "None"
19824	locs_specified off
19825	LOCs "{}"
19826	xl_use_area off
19827	xl_area "[0,0,0,0,0,0,0]"
19828	has_advanced_control "0"
19829	sggui_pos "20,20,336,386"
19830	block_type "gatewayout"
19831	block_version "10.1.2"
19832	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
19833	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19834	}
19835	Block {
19836	BlockType Reference
19837	Name "Gateway Out3"
19838	Ports [1, 1]
19839	Position [1295, 650, 1325, 660]
19840	ShowName off
19841	SourceBlock "xbsIndex_r4/Gateway Out"
19842	SourceType "Xilinx Gateway Out Block"
19843	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
19844	hdl_port off
19845	timing_constraint "None"
19846	locs_specified off
19847	LOCs "{}"
19848	xl_use_area off
19849	xl_area "[0,0,0,0,0,0,0]"
19850	has_advanced_control "0"
19851	sggui_pos "20,20,336,386"
19852	block_type "gatewayout"
19853	block_version "10.1.2"
19854	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
19855	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19856	}
19857	Block {
19858	BlockType Reference
19859	Name "Gateway Out4"
19860	Ports [1, 1]
19861	Position [1295, 665, 1325, 675]
19862	ShowName off
19863	SourceBlock "xbsIndex_r4/Gateway Out"
19864	SourceType "Xilinx Gateway Out Block"
19865	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
19866	hdl_port off
19867	timing_constraint "None"
19868	locs_specified off
19869	LOCs "{}"
19870	xl_use_area off
19871	xl_area "[0,0,0,0,0,0,0]"
19872	has_advanced_control "0"
19873	sggui_pos "20,20,336,386"
19874	block_type "gatewayout"
19875	block_version "10.1.2"
19876	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
19877	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19878	}
19879	Block {
19880	BlockType Reference
19881	Name "Gateway Out5"
19882	Ports [1, 1]
19883	Position [1295, 680, 1325, 690]
19884	ShowName off
19885	SourceBlock "xbsIndex_r4/Gateway Out"
19886	SourceType "Xilinx Gateway Out Block"
19887	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
19888	hdl_port off
19889	timing_constraint "None"
19890	locs_specified off
19891	LOCs "{}"
19892	xl_use_area off
19893	xl_area "[0,0,0,0,0,0,0]"
19894	has_advanced_control "0"
19895	sggui_pos "20,20,336,386"
19896	block_type "gatewayout"
19897	block_version "10.1.2"
19898	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
19899	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19900	}
19901	Block {
19902	BlockType Reference
19903	Name "Gateway Out6"
19904	Ports [1, 1]
19905	Position [1295, 695, 1325, 705]
19906	ShowName off
19907	SourceBlock "xbsIndex_r4/Gateway Out"
19908	SourceType "Xilinx Gateway Out Block"
19909	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
19910	hdl_port off
19911	timing_constraint "None"
19912	locs_specified off
19913	LOCs "{}"
19914	xl_use_area off
19915	xl_area "[0,0,0,0,0,0,0]"
19916	has_advanced_control "0"
19917	sggui_pos "20,20,336,386"
19918	block_type "gatewayout"
19919	block_version "10.1.2"
19920	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
19921	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19922	}
19923	Block {
19924	BlockType Reference
19925	Name "Gateway Out7"
19926	Ports [1, 1]
19927	Position [1295, 710, 1325, 720]
19928	ShowName off
19929	SourceBlock "xbsIndex_r4/Gateway Out"
19930	SourceType "Xilinx Gateway Out Block"
19931	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
19932	hdl_port off
19933	timing_constraint "None"
19934	locs_specified off
19935	LOCs "{}"
19936	xl_use_area off
19937	xl_area "[0,0,0,0,0,0,0]"
19938	has_advanced_control "0"
19939	sggui_pos "20,20,336,386"
19940	block_type "gatewayout"
19941	block_version "10.1.2"
19942	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
19943	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19944	}
19945	Block {
19946	BlockType Reference
19947	Name "Gateway Out8"
19948	Ports [1, 1]
19949	Position [1295, 725, 1325, 735]
19950	ShowName off
19951	SourceBlock "xbsIndex_r4/Gateway Out"
19952	SourceType "Xilinx Gateway Out Block"
19953	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
19954	hdl_port off
19955	timing_constraint "None"
19956	locs_specified off
19957	LOCs "{}"
19958	xl_use_area off
19959	xl_area "[0,0,0,0,0,0,0]"
19960	has_advanced_control "0"
19961	sggui_pos "20,20,336,386"
19962	block_type "gatewayout"
19963	block_version "10.1.2"
19964	sg_icon_stat "30,10,1,1,white,grey,0,b3a044a9,right"
19965	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([13 11 13 11 13 16 17 18 21 19 17 15 17 15 17 19 21 18 17 16 13 ],[1 3 5 7 9 9 8 9 9 7 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 10 10 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
19966	}
19967	Block {
19968	BlockType Reference
19969	Name "Inverter"
19970	Ports [1, 1]
19971	Position [765, 476, 790, 494]
19972	Orientation "left"
19973	NamePlacement "alternate"
19974	ShowName off
19975	SourceBlock "xbsIndex_r4/Inverter"
19976	SourceType "Xilinx Inverter Block"
19977	infoedit "Bitwise logical negation (one's complement) operator."
19978	en off
19979	latency "0"
19980	dbl_ovrd off
19981	xl_use_area off
19982	xl_area "[0,0,0,0,0,0,0]"
19983	has_advanced_control "0"
19984	sggui_pos "-1,-1,-1,-1"
19985	block_type "inv"
19986	block_version "8.2"
19987	sg_icon_stat "25,18,1,1,white,blue,0,1ab4a85f,left"
19988	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
19989	}
19990	Block {
19991	BlockType Reference
19992	Name "Logical"
19993	Ports [2, 1]
19994	Position [665, 376, 700, 409]
19995	ShowName off
19996	SourceBlock "xbsIndex_r4/Logical"
19997	SourceType "Xilinx Logical Block Block"
19998	logical_function "AND"
19999	inputs "2"
20000	en off
20001	latency "0"
20002	precision "Full"
20003	arith_type "Unsigned"
20004	n_bits "16"
20005	bin_pt "0"
20006	align_bp on
20007	dbl_ovrd off
20008	xl_use_area off
20009	xl_area "[0,0,0,0,0,0,0]"
20010	has_advanced_control "0"
20011	sggui_pos "20,20,348,261"
20012	block_type "logical"
20013	block_version "8.2"
20014	sg_icon_stat "35,33,1,1,white,blue,0,087b5522,right"
20015	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20016	}
20017	Block {
20018	BlockType Reference
20019	Name "Logical1"
20020	Ports [2, 1]
20021	Position [970, 326, 1005, 359]
20022	ShowName off
20023	SourceBlock "xbsIndex_r4/Logical"
20024	SourceType "Xilinx Logical Block Block"
20025	logical_function "AND"
20026	inputs "2"
20027	en off
20028	latency "0"
20029	precision "Full"
20030	arith_type "Unsigned"
20031	n_bits "16"
20032	bin_pt "0"
20033	align_bp on
20034	dbl_ovrd off
20035	xl_use_area off
20036	xl_area "[0,0,0,0,0,0,0]"
20037	has_advanced_control "0"
20038	sggui_pos "20,20,348,261"
20039	block_type "logical"
20040	block_version "8.2"
20041	sg_icon_stat "35,33,1,1,white,blue,0,087b5522,right"
20042	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20043	}
20044	Block {
20045	BlockType Reference
20046	Name "Logical2"
20047	Ports [2, 1]
20048	Position [645, 216, 680, 249]
20049	ShowName off
20050	SourceBlock "xbsIndex_r4/Logical"
20051	SourceType "Xilinx Logical Block Block"
20052	logical_function "OR"
20053	inputs "2"
20054	en off
20055	latency "0"
20056	precision "Full"
20057	arith_type "Unsigned"
20058	n_bits "16"
20059	bin_pt "0"
20060	align_bp on
20061	dbl_ovrd off
20062	xl_use_area off
20063	xl_area "[0,0,0,0,0,0,0]"
20064	has_advanced_control "0"
20065	sggui_pos "20,20,348,261"
20066	block_type "logical"
20067	block_version "8.2"
20068	sg_icon_stat "35,33,1,1,white,blue,0,f4a65842,right"
20069	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20070	}
20071	Block {
20072	BlockType SubSystem
20073	Name "Posedge2"
20074	Ports [1, 1]
20075	Position [570, 233, 605, 247]
20076	MinAlgLoopOccurrences off
20077	PropExecContextOutsideSubsystem off
20078	RTWSystemCode "Auto"
20079	FunctionWithSeparateData off
20080	Opaque off
20081	RequestExecContextInheritance off
20082	MaskHideContents off
20083	System {
20084	Name "Posedge2"
20085	Location [132, 719, 452, 817]
20086	Open off
20087	ModelBrowserVisibility off
20088	ModelBrowserWidth 200
20089	ScreenColor "white"
20090	PaperOrientation "landscape"
20091	PaperPositionMode "auto"
20092	PaperType "usletter"
20093	PaperUnits "inches"
20094	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
20095	TiledPageScale 1
20096	ShowPageBoundaries off
20097	ZoomFactor "100"
20098	Block {
20099	BlockType Inport
20100	Name "D"
20101	Position [25, 33, 55, 47]
20102	IconDisplay "Port number"
20103	OutDataType "sfix(16)"
20104	OutScaling "2^0"
20105	}
20106	Block {
20107	BlockType Reference
20108	Name "Delay"
20109	Ports [1, 1]
20110	Position [145, 45, 175, 75]
20111	ShowName off
20112	SourceBlock "xbsIndex_r4/Delay"
20113	SourceType "Xilinx Delay Block"
20114	infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If register retiming is enabled, the delay line is a chain of flip-flops."
20115	en off
20116	latency "1"
20117	dbl_ovrd off
20118	reg_retiming off
20119	xl_use_area off
20120	xl_area "[0,0,0,0,0,0,0]"
20121	has_advanced_control "0"
20122	sggui_pos "-1,-1,-1,-1"
20123	block_type "delay"
20124	block_version "8.2"
20125	sg_icon_stat "30,30,1,1,white,blue,0,fc531c0e,right"
20126	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20127	}
20128	Block {
20129	BlockType Reference
20130	Name "Inverter"
20131	Ports [1, 1]
20132	Position [90, 47, 120, 73]
20133	ShowName off
20134	SourceBlock "xbsIndex_r4/Inverter"
20135	SourceType "Xilinx Inverter Block"
20136	infoedit "Bitwise logical negation (one's complement) operator."
20137	en off
20138	latency "0"
20139	dbl_ovrd off
20140	xl_use_area off
20141	xl_area "[0,0,0,0,0,0,0]"
20142	has_advanced_control "0"
20143	sggui_pos "20,20,348,251"
20144	block_type "inv"
20145	block_version "8.2"
20146	sg_icon_stat "30,26,1,1,white,blue,0,1ab4a85f,right"
20147	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon text');\n"
20148	}
20149	Block {
20150	BlockType Reference
20151	Name "Logical"
20152	Ports [2, 1]
20153	Position [205, 29, 240, 71]
20154	ShowName off
20155	SourceBlock "xbsIndex_r4/Logical"
20156	SourceType "Xilinx Logical Block Block"
20157	logical_function "AND"
20158	inputs "2"
20159	en off
20160	latency "0"
20161	precision "Full"
20162	arith_type "Unsigned"
20163	n_bits "16"
20164	bin_pt "0"
20165	align_bp on
20166	dbl_ovrd off
20167	xl_use_area off
20168	xl_area "[0,0,0,0,0,0,0]"
20169	has_advanced_control "0"
20170	sggui_pos "20,20,348,261"
20171	block_type "logical"
20172	block_version "8.2"
20173	sg_icon_stat "35,42,1,1,white,blue,0,087b5522,right"
20174	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20175	}
20176	Block {
20177	BlockType Outport
20178	Name "Q"
20179	Position [265, 43, 295, 57]
20180	IconDisplay "Port number"
20181	OutDataType "sfix(16)"
20182	OutScaling "2^0"
20183	}
20184	Line {
20185	SrcBlock "Logical"
20186	SrcPort 1
20187	Points [0, 0]
20188	DstBlock "Q"
20189	DstPort 1
20190	}
20191	Line {
20192	SrcBlock "Delay"
20193	SrcPort 1
20194	Points [0, 0]
20195	DstBlock "Logical"
20196	DstPort 2
20197	}
20198	Line {
20199	SrcBlock "Inverter"
20200	SrcPort 1
20201	DstBlock "Delay"
20202	DstPort 1
20203	}
20204	Line {
20205	SrcBlock "D"
20206	SrcPort 1
20207	Points [0, 0; 15, 0]
20208	Branch {
20209	DstBlock "Logical"
20210	DstPort 1
20211	}
20212	Branch {
20213	DstBlock "Inverter"
20214	DstPort 1
20215	}
20216	}
20217	}
20218	}
20219	Block {
20220	BlockType Reference
20221	Name "Relational"
20222	Ports [2, 1]
20223	Position [1085, 223, 1130, 272]
20224	Orientation "left"
20225	ShowName off
20226	SourceBlock "xbsIndex_r4/Relational"
20227	SourceType "Xilinx Arithmetic Relational Operator Block"
20228	mode "a<=b"
20229	en off
20230	latency "0"
20231	dbl_ovrd off
20232	xl_use_area off
20233	xl_area "[0,0,0,0,0,0,0]"
20234	has_advanced_control "0"
20235	sggui_pos "20,20,348,193"
20236	block_type "relational"
20237	block_version "8.2"
20238	sg_icon_stat "45,49,1,1,white,blue,0,07808d72,left"
20239	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a<=b}\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20240	}
20241	Block {
20242	BlockType Reference
20243	Name "Relational1"
20244	Ports [2, 1]
20245	Position [845, 367, 890, 438]
20246	ShowName off
20247	SourceBlock "xbsIndex_r4/Relational"
20248	SourceType "Xilinx Arithmetic Relational Operator Block"
20249	mode "a>=b"
20250	en off
20251	latency "0"
20252	dbl_ovrd off
20253	xl_use_area off
20254	xl_area "[0,0,0,0,0,0,0]"
20255	has_advanced_control "0"
20256	sggui_pos "20,20,348,193"
20257	block_type "relational"
20258	block_version "8.2"
20259	sg_icon_stat "45,71,1,1,white,blue,0,6d6ac162,right"
20260	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a>=b}\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20261	}
20262	Block {
20263	BlockType SubSystem
20264	Name "S-R Latch"
20265	Ports [2, 1]
20266	Position [555, 367, 595, 403]
20267	MinAlgLoopOccurrences off
20268	PropExecContextOutsideSubsystem off
20269	RTWSystemCode "Auto"
20270	FunctionWithSeparateData off
20271	Opaque off
20272	RequestExecContextInheritance off
20273	MaskHideContents off
20274	System {
20275	Name "S-R Latch"
20276	Location [2, 74, 1184, 726]
20277	Open off
20278	ModelBrowserVisibility off
20279	ModelBrowserWidth 200
20280	ScreenColor "white"
20281	PaperOrientation "landscape"
20282	PaperPositionMode "auto"
20283	PaperType "usletter"
20284	PaperUnits "inches"
20285	TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
20286	TiledPageScale 1
20287	ShowPageBoundaries off
20288	ZoomFactor "100"
20289	Block {
20290	BlockType Inport
20291	Name "S"
20292	Position [125, 198, 155, 212]
20293	IconDisplay "Port number"
20294	OutDataType "sfix(16)"
20295	OutScaling "2^0"
20296	}
20297	Block {
20298	BlockType Inport
20299	Name "R"
20300	Position [125, 178, 155, 192]
20301	NamePlacement "alternate"
20302	Port "2"
20303	IconDisplay "Port number"
20304	OutDataType "sfix(16)"
20305	OutScaling "2^0"
20306	}
20307	Block {
20308	BlockType Reference
20309	Name "Convert"
20310	Ports [1, 1]
20311	Position [200, 178, 230, 192]
20312	ShowName off
20313	SourceBlock "xbsIndex_r4/Convert"
20314	SourceType "Xilinx Type Converter Block"
20315	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
20316	arith_type "Boolean"
20317	n_bits "16"
20318	bin_pt "14"
20319	quantization "Truncate"
20320	overflow "Wrap"
20321	latency "0"
20322	dbl_ovrd off
20323	pipeline off
20324	xl_use_area off
20325	xl_area "[0,0,0,0,0,0,0]"
20326	has_advanced_control "0"
20327	sggui_pos "20,20,374,375"
20328	block_type "convert"
20329	block_version "8.2"
20330	sg_icon_stat "30,14,1,1,white,blue,0,74901e60,right"
20331	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
20332	}
20333	Block {
20334	BlockType Reference
20335	Name "Convert1"
20336	Ports [1, 1]
20337	Position [200, 198, 230, 212]
20338	ShowName off
20339	SourceBlock "xbsIndex_r4/Convert"
20340	SourceType "Xilinx Type Converter Block"
20341	infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not."
20342	arith_type "Boolean"
20343	n_bits "16"
20344	bin_pt "14"
20345	quantization "Truncate"
20346	overflow "Wrap"
20347	latency "0"
20348	dbl_ovrd off
20349	pipeline off
20350	xl_use_area off
20351	xl_area "[0,0,0,0,0,0,0]"
20352	has_advanced_control "0"
20353	sggui_pos "20,20,374,375"
20354	block_type "convert"
20355	block_version "8.2"
20356	sg_icon_stat "30,14,1,1,white,blue,0,74901e60,right"
20357	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n"
20358	}
20359	Block {
20360	BlockType Reference
20361	Name "Register"
20362	Ports [3, 1]
20363	Position [280, 153, 330, 217]
20364	NamePlacement "alternate"
20365	ShowName off
20366	SourceBlock "xbsIndex_r4/Register"
20367	SourceType "Xilinx Register Block"
20368	init "0"
20369	rst on
20370	en on
20371	dbl_ovrd off
20372	xl_use_area off
20373	xl_area "[0,0,0,0,0,0,0]"
20374	has_advanced_control "0"
20375	sggui_pos "-1,-1,-1,-1"
20376	block_type "register"
20377	block_version "8.2"
20378	sg_icon_stat "50,64,1,1,white,blue,0,923c1847,right"
20379	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20380	}
20381	Block {
20382	BlockType Reference
20383	Name "zero3"
20384	Ports [0, 1]
20385	Position [215, 156, 235, 174]
20386	ShowName off
20387	SourceBlock "xbsIndex_r4/Constant"
20388	SourceType "Xilinx Constant Block Block"
20389	arith_type "Boolean"
20390	const "1"
20391	n_bits "1"
20392	bin_pt "0"
20393	explicit_period off
20394	period "1"
20395	dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block."
20396	equ "P=C"
20397	opselect "C"
20398	inp2 "PCIN>>17"
20399	opr "+"
20400	inp1 "P"
20401	carry "CIN"
20402	dbl_ovrd off
20403	has_advanced_control "0"
20404	sggui_pos "-1,-1,-1,-1"
20405	block_type "constant"
20406	block_version "VER_STRING_GOES_HERE"
20407	sg_icon_stat "20,18,1,1,white,blue,0,06094819,right"
20408	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: end icon text');\n"
20409	}
20410	Block {
20411	BlockType Outport
20412	Name "Q"
20413	Position [395, 178, 425, 192]
20414	IconDisplay "Port number"
20415	OutDataType "sfix(16)"
20416	OutScaling "2^0"
20417	}
20418	Line {
20419	SrcBlock "Convert1"
20420	SrcPort 1
20421	DstBlock "Register"
20422	DstPort 3
20423	}
20424	Line {
20425	SrcBlock "Convert"
20426	SrcPort 1
20427	DstBlock "Register"
20428	DstPort 2
20429	}
20430	Line {
20431	SrcBlock "Register"
20432	SrcPort 1
20433	DstBlock "Q"
20434	DstPort 1
20435	}
20436	Line {
20437	SrcBlock "S"
20438	SrcPort 1
20439	DstBlock "Convert1"
20440	DstPort 1
20441	}
20442	Line {
20443	SrcBlock "R"
20444	SrcPort 1
20445	DstBlock "Convert"
20446	DstPort 1
20447	}
20448	Line {
20449	SrcBlock "zero3"
20450	SrcPort 1
20451	DstBlock "Register"
20452	DstPort 1
20453	}
20454	}
20455	}
20456	Block {
20457	BlockType Reference
20458	Name "Transmisson\nMode Selector"
20459	Ports [3, 1]
20460	Position [315, 343, 350, 447]
20461	SourceBlock "xbsIndex_r4/Mux"
20462	SourceType "Xilinx Bus Multiplexer Block"
20463	inputs "2"
20464	en off
20465	latency "0"
20466	precision "Full"
20467	arith_type "Unsigned"
20468	n_bits "16"
20469	bin_pt "14"
20470	quantization "Truncate"
20471	overflow "Wrap"
20472	dbl_ovrd off
20473	xl_use_area off
20474	xl_area "[0,0,0,0,0,0,0]"
20475	has_advanced_control "0"
20476	sggui_pos "-1,-1,-1,-1"
20477	block_type "mux"
20478	block_version "9.1.01"
20479	sg_icon_stat "35,104,1,1,white,blue,3,613f58e1,right"
20480	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20481	}
20482	Block {
20483	BlockType Reference
20484	Name "Tx Addr Counter"
20485	Ports [2, 1]
20486	Position [1085, 308, 1130, 357]
20487	NamePlacement "alternate"
20488	SourceBlock "xbsIndex_r4/Counter"
20489	SourceType "Xilinx Counter Block"
20490	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
20491	cnt_type "Free Running"
20492	cnt_to "Inf"
20493	operation "Up"
20494	start_count "0"
20495	cnt_by_val "1"
20496	arith_type "Unsigned"
20497	n_bits "14"
20498	bin_pt "0"
20499	load_pin off
20500	rst on
20501	en on
20502	explicit_period "off"
20503	period "1"
20504	dbl_ovrd off
20505	use_behavioral_HDL off
20506	use_rpm off
20507	implementation "Fabric"
20508	xl_use_area off
20509	xl_area "[0,0,0,0,0,0,0]"
20510	has_advanced_control "0"
20511	sggui_pos "20,20,356,630"
20512	block_type "counter"
20513	block_version "8.2"
20514	sg_icon_stat "45,49,1,1,white,blue,0,46c73e85,right"
20515	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 49 49 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 43 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
20516	}
20517	Block {
20518	BlockType Scope
20519	Name "Tx Control"
20520	Ports [8]
20521	Position [1375, 624, 1405, 731]
20522	Floating off
20523	Location [1, 45, 1281, 719]
20524	Open off
20525	NumInputPorts "8"
20526	ZoomMode "yonly"
20527	List {
20528	ListType AxesTitles
20529	axes1 "%<SignalLabel>"
20530	axes2 "%<SignalLabel>"
20531	axes3 "%<SignalLabel>"
20532	axes4 "%<SignalLabel>"
20533	axes5 "%<SignalLabel>"
20534	axes6 "%<SignalLabel>"
20535	axes7 "%<SignalLabel>"
20536	axes8 "%<SignalLabel>"
20537	}
20538	TimeRange "70000"
20539	YMin "0~0~0~0~0~0~0~0"
20540	YMax "2~1~1~1~1~100~1~20000"
20541	SaveName "ScopeData3"
20542	DataFormat "StructureWithTime"
20543	LimitDataPoints off
20544	SampleTime "0"
20545	}
20546	Block {
20547	BlockType Reference
20548	Name "Tx Delay Counter"
20549	Ports [2, 1]
20550	Position [745, 356, 785, 409]
20551	NamePlacement "alternate"
20552	SourceBlock "xbsIndex_r4/Counter"
20553	SourceType "Xilinx Counter Block"
20554	infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator."
20555	cnt_type "Free Running"
20556	cnt_to "Inf"
20557	operation "Up"
20558	start_count "0"
20559	cnt_by_val "1"
20560	arith_type "Unsigned"
20561	n_bits "14"
20562	bin_pt "0"
20563	load_pin off
20564	rst on
20565	en on
20566	explicit_period "off"
20567	period "1"
20568	dbl_ovrd off
20569	use_behavioral_HDL off
20570	use_rpm off
20571	implementation "Fabric"
20572	xl_use_area off
20573	xl_area "[0,0,0,0,0,0,0]"
20574	has_advanced_control "0"
20575	sggui_pos "20,20,356,630"
20576	block_type "counter"
20577	block_version "8.2"
20578	sg_icon_stat "40,53,1,1,white,blue,0,46c73e85,right"
20579	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 ],[0 0 53 53 ],[0.77 0.82 0.91]);\npatch([10 3 12 3 10 21 24 27 38 29 20 14 24 14 20 29 38 27 24 21 10 ],[11 18 27 36 43 43 40 43 43 34 43 37 27 17 11 20 11 11 14 11 11 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 53 53 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n"
20580	}
20581	Block {
20582	BlockType Outport
20583	Name "Addr"
20584	Position [1315, 328, 1345, 342]
20585	IconDisplay "Port number"
20586	OutDataType "sfix(16)"
20587	OutScaling "2^0"
20588	}
20589	Block {
20590	BlockType Outport
20591	Name "Vout"
20592	Position [1160, 418, 1190, 432]
20593	Port "2"
20594	IconDisplay "Port number"
20595	OutDataType "sfix(16)"
20596	OutScaling "2^0"
20597	}
20598	Line {
20599	SrcBlock "Transmisson\nMode Selector"
20600	SrcPort 1
20601	Points [20, 0]
20602	Branch {
20603	DstBlock "S-R Latch"
20604	DstPort 2
20605	}
20606	Branch {
20607	Points [0, -170]
20608	DstBlock "Logical2"
20609	DstPort 1
20610	}
20611	}
20612	Line {
20613	SrcBlock "Tx Delay Counter"
20614	SrcPort 1
20615	Points [25, 0]
20616	Branch {
20617	DstBlock "Relational1"
20618	DstPort 1
20619	}
20620	Branch {
20621	Points [0, 315]
20622	DstBlock "Gateway Out6"
20623	DstPort 1
20624	}
20625	}
20626	Line {
20627	SrcBlock "TxDelay"
20628	SrcPort 1
20629	DstBlock "Relational1"
20630	DstPort 2
20631	}
20632	Line {
20633	SrcBlock "ContinuousTx"
20634	SrcPort 1
20635	Points [105, 0]
20636	Branch {
20637	DstBlock "Transmisson\nMode Selector"
20638	DstPort 1
20639	}
20640	Branch {
20641	Points [0, 265]
20642	DstBlock "Gateway Out1"
20643	DstPort 1
20644	}
20645	}
20646	Line {
20647	SrcBlock "StartTx"
20648	SrcPort 1
20649	DstBlock "Convert1"
20650	DstPort 1
20651	}
20652	Line {
20653	SrcBlock "StopTx"
20654	SrcPort 1
20655	DstBlock "Convert2"
20656	DstPort 1
20657	}
20658	Line {
20659	SrcBlock "Logical"
20660	SrcPort 1
20661	DstBlock "Tx Delay Counter"
20662	DstPort 2
20663	}
20664	Line {
20665	SrcBlock "S-R Latch"
20666	SrcPort 1
20667	Points [20, 0]
20668	Branch {
20669	Points [0, 0]
20670	Branch {
20671	DstBlock "Logical"
20672	DstPort 1
20673	}
20674	Branch {
20675	Points [0, 0; 0, -50]
20676	DstBlock "Logical1"
20677	DstPort 1
20678	}
20679	}
20680	Branch {
20681	Points [0, 300]
20682	DstBlock "Gateway Out5"
20683	DstPort 1
20684	}
20685	}
20686	Line {
20687	SrcBlock "Relational1"
20688	SrcPort 1
20689	Points [50, 0]
20690	Branch {
20691	Points [0, 80]
20692	DstBlock "Inverter"
20693	DstPort 1
20694	}
20695	Branch {
20696	Points [0, -55]
20697	DstBlock "Logical1"
20698	DstPort 2
20699	}
20700	}
20701	Line {
20702	SrcBlock "Inverter"
20703	SrcPort 1
20704	Points [-130, 0; 0, -85]
20705	DstBlock "Logical"
20706	DstPort 2
20707	}
20708	Line {
20709	SrcBlock "Logical1"
20710	SrcPort 1
20711	Points [30, 0]
20712	Branch {
20713	DstBlock "Tx Addr Counter"
20714	DstPort 2
20715	}
20716	Branch {
20717	Points [0, 80]
20718	Branch {
20719	DstBlock "Vout"
20720	DstPort 1
20721	}
20722	Branch {
20723	Points [0, 290]
20724	DstBlock "Gateway Out7"
20725	DstPort 1
20726	}
20727	}
20728	}
20729	Line {
20730	SrcBlock "Tx Addr Counter"
20731	SrcPort 1
20732	Points [65, 0]
20733	Branch {
20734	DstBlock "Addr"
20735	DstPort 1
20736	}
20737	Branch {
20738	Points [0, -75]
20739	DstBlock "Relational"
20740	DstPort 2
20741	}
20742	Branch {
20743	Points [0, 395]
20744	DstBlock "Gateway Out8"
20745	DstPort 1
20746	}
20747	}
20748	Line {
20749	SrcBlock "From Register4"
20750	SrcPort 1
20751	DstBlock "Relational"
20752	DstPort 1
20753	}
20754	Line {
20755	SrcBlock "Posedge2"
20756	SrcPort 1
20757	DstBlock "Logical2"
20758	DstPort 2
20759	}
20760	Line {
20761	SrcBlock "Relational"
20762	SrcPort 1
20763	Points [-90, 0; 0, -60; -710, 0; 0, 205]
20764	Branch {
20765	DstBlock "Transmisson\nMode Selector"
20766	DstPort 2
20767	}
20768	Branch {
20769	Points [0, 245]
20770	DstBlock "Gateway Out2"
20771	DstPort 1
20772	}
20773	}
20774	Line {
20775	SrcBlock "Logical2"
20776	SrcPort 1
20777	Points [20, 0]
20778	Branch {
20779	Points [240, 0; 0, 85]
20780	DstBlock "Tx Addr Counter"
20781	DstPort 1
20782	}
20783	Branch {
20784	Points [0, 135]
20785	DstBlock "Tx Delay Counter"
20786	DstPort 1
20787	}
20788	}
20789	Line {
20790	SrcBlock "Convert1"
20791	SrcPort 1
20792	Points [25, 0]
20793	Branch {
20794	DstBlock "S-R Latch"
20795	DstPort 1
20796	}
20797	Branch {
20798	Points [0, -135]
20799	DstBlock "Posedge2"
20800	DstPort 1
20801	}
20802	Branch {
20803	Points [0, 295]
20804	DstBlock "Gateway Out4"
20805	DstPort 1
20806	}
20807	}
20808	Line {
20809	SrcBlock "Convert2"
20810	SrcPort 1
20811	Points [5, 0]
20812	Branch {
20813	DstBlock "Transmisson\nMode Selector"
20814	DstPort 3
20815	}
20816	Branch {
20817	Points [0, 225]
20818	DstBlock "Gateway Out3"
20819	DstPort 1
20820	}
20821	}
20822	Line {
20823	SrcBlock "Gateway Out5"
20824	SrcPort 1
20825	DstBlock "Tx Control"
20826	DstPort 5
20827	}
20828	Line {
20829	SrcBlock "Gateway Out4"
20830	SrcPort 1
20831	DstBlock "Tx Control"
20832	DstPort 4
20833	}
20834	Line {
20835	SrcBlock "Gateway Out3"
20836	SrcPort 1
20837	DstBlock "Tx Control"
20838	DstPort 3
20839	}
20840	Line {
20841	SrcBlock "Gateway Out2"
20842	SrcPort 1
20843	DstBlock "Tx Control"
20844	DstPort 2
20845	}
20846	Line {
20847	SrcBlock "Gateway Out1"
20848	SrcPort 1
20849	DstBlock "Tx Control"
20850	DstPort 1
20851	}
20852	Line {
20853	SrcBlock "Gateway Out6"
20854	SrcPort 1
20855	DstBlock "Tx Control"
20856	DstPort 6
20857	}
20858	Line {
20859	SrcBlock "Gateway Out7"
20860	SrcPort 1
20861	DstBlock "Tx Control"
20862	DstPort 7
20863	}
20864	Line {
20865	SrcBlock "Gateway Out8"
20866	SrcPort 1
20867	DstBlock "Tx Control"
20868	DstPort 8
20869	}
20870	}
20871	}
20872	Block {
20873	BlockType Reference
20874	Name "debug_AGC_Done"
20875	Ports [1, 1]
20876	Position [270, 1088, 310, 1102]
20877	SourceBlock "xbsIndex_r4/Gateway Out"
20878	SourceType "Xilinx Gateway Out Block"
20879	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
20880	hdl_port on
20881	timing_constraint "None"
20882	locs_specified off
20883	LOCs "{}"
20884	xl_use_area off
20885	xl_area "[0,0,0,0,0,0,0]"
20886	has_advanced_control "0"
20887	sggui_pos "-1,-1,-1,-1"
20888	block_type "gatewayout"
20889	block_version "8.2"
20890	sg_icon_stat "40,14,1,1,white,yellow,0,38220381,right"
20891	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([16 14 17 14 16 20 21 22 26 23 20 18 21 18 20 23 26 22 21 20 16 ],[2 4 7 10 12 12 11 12 12 9 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20892	}
20893	Block {
20894	BlockType Reference
20895	Name "debug_Capturing"
20896	Ports [1, 1]
20897	Position [580, 528, 620, 542]
20898	Orientation "left"
20899	NamePlacement "alternate"
20900	SourceBlock "xbsIndex_r4/Gateway Out"
20901	SourceType "Xilinx Gateway Out Block"
20902	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
20903	hdl_port on
20904	timing_constraint "None"
20905	locs_specified off
20906	LOCs "{}"
20907	xl_use_area off
20908	xl_area "[0,0,0,0,0,0,0]"
20909	has_advanced_control "0"
20910	sggui_pos "-1,-1,-1,-1"
20911	block_type "gatewayout"
20912	block_version "8.2"
20913	sg_icon_stat "40,14,1,1,white,yellow,0,38220381,left"
20914	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([16 14 17 14 16 20 21 22 26 23 20 18 21 18 20 23 26 22 21 20 16 ],[2 4 7 10 12 12 11 12 12 9 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20915	}
20916	Block {
20917	BlockType Reference
20918	Name "debug_Transmitting"
20919	Ports [1, 1]
20920	Position [755, 763, 795, 777]
20921	SourceBlock "xbsIndex_r4/Gateway Out"
20922	SourceType "Xilinx Gateway Out Block"
20923	infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.<P><P>Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured."
20924	hdl_port on
20925	timing_constraint "None"
20926	locs_specified off
20927	LOCs "{}"
20928	xl_use_area off
20929	xl_area "[0,0,0,0,0,0,0]"
20930	has_advanced_control "0"
20931	sggui_pos "-1,-1,-1,-1"
20932	block_type "gatewayout"
20933	block_version "8.2"
20934	sg_icon_stat "40,14,1,1,white,yellow,0,38220381,right"
20935	sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 ],[0 0 14 14 ],[0.95 0.93 0.65]);\npatch([16 14 17 14 16 20 21 22 26 23 20 18 21 18 20 23 26 22 21 20 16 ],[2 4 7 10 12 12 11 12 12 9 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
20936	}
20937	Line {
20938	SrcBlock "Pulse\nGenerator"
20939	SrcPort 1
20940	DstBlock "StartCapture"
20941	DstPort 1
20942	}
20943	Line {
20944	SrcBlock "From9"
20945	SrcPort 1
20946	DstBlock "Logical"
20947	DstPort 2
20948	}
20949	Line {
20950	SrcBlock "Logical"
20951	SrcPort 1
20952	DstBlock "Posedge"
20953	DstPort 1
20954	}
20955	Line {
20956	SrcBlock "StartCapture"
20957	SrcPort 1
20958	DstBlock "Logical"
20959	DstPort 1
20960	}
20961	Line {
20962	SrcBlock "Radio 3 Inputs"
20963	SrcPort 2
20964	DstBlock "Radio 3\nRx Buffers"
20965	DstPort 2
20966	}
20967	Line {
20968	SrcBlock "From12"
20969	SrcPort 1
20970	DstBlock "Radio 3\nRx Buffers"
20971	DstPort 5
20972	}
20973	Line {
20974	SrcBlock "Radio 2 Inputs"
20975	SrcPort 2
20976	DstBlock "Radio 2\nRx Buffers"
20977	DstPort 2
20978	}
20979	Line {
20980	SrcBlock "From11"
20981	SrcPort 1
20982	DstBlock "Radio 2\nRx Buffers"
20983	DstPort 5
20984	}
20985	Line {
20986	SrcBlock "Posedge"
20987	SrcPort 1
20988	DstBlock "Rx Control"
20989	DstPort 1
20990	}
20991	Line {
20992	SrcBlock "From15"
20993	SrcPort 1
20994	DstBlock "Radio 2 Inputs"
20995	DstPort 1
20996	}
20997	Line {
20998	SrcBlock "From16"
20999	SrcPort 1
21000	DstBlock "Radio 3 Inputs"
21001	DstPort 1
21002	}
21003	Line {
21004	SrcBlock "Radio 1 Inputs"
21005	SrcPort 2
21006	DstBlock "Radio 1\nRx Buffers"
21007	DstPort 2
21008	}
21009	Line {
21010	SrcBlock "From10"
21011	SrcPort 1
21012	DstBlock "Radio 1\nRx Buffers"
21013	DstPort 5
21014	}
21015	Line {
21016	SrcBlock "From14"
21017	SrcPort 1
21018	DstBlock "Radio 1 Inputs"
21019	DstPort 1
21020	}
21021	Line {
21022	SrcBlock "Radio 4 Inputs"
21023	SrcPort 2
21024	DstBlock "Radio 4\nRx Buffers"
21025	DstPort 2
21026	}
21027	Line {
21028	SrcBlock "From13"
21029	SrcPort 1
21030	DstBlock "Radio 4\nRx Buffers"
21031	DstPort 5
21032	}
21033	Line {
21034	SrcBlock "From17"
21035	SrcPort 1
21036	DstBlock "Radio 4 Inputs"
21037	DstPort 1
21038	}
21039	Line {
21040	SrcBlock "Rx Control"
21041	SrcPort 1
21042	Points [25, 0]
21043	Branch {
21044	Points [130, 0]
21045	Branch {
21046	DstBlock "Radio 2\nRx Buffers"
21047	DstPort 3
21048	}
21049	Branch {
21050	Points [0, -145]
21051	DstBlock "Radio 1\nRx Buffers"
21052	DstPort 3
21053	}
21054	Branch {
21055	Points [0, 140]
21056	Branch {
21057	DstBlock "Radio 3\nRx Buffers"
21058	DstPort 3
21059	}
21060	Branch {
21061	Points [0, 140]
21062	DstBlock "Radio 4\nRx Buffers"
21063	DstPort 3
21064	}
21065	}
21066	}
21067	Branch {
21068	DstBlock "Goto1"
21069	DstPort 1
21070	}
21071	}
21072	Line {
21073	SrcBlock "Rx Control"
21074	SrcPort 2
21075	Points [180, 0]
21076	Branch {
21077	Labels [1, 0]
21078	DstBlock "Radio 2\nRx Buffers"
21079	DstPort 4
21080	}
21081	Branch {
21082	Points [0, 140]
21083	Branch {
21084	DstBlock "Radio 3\nRx Buffers"
21085	DstPort 4
21086	}
21087	Branch {
21088	Points [0, 140]
21089	Branch {
21090	DstBlock "Radio 4\nRx Buffers"
21091	DstPort 4
21092	}
21093	Branch {
21094	DstBlock "debug_Capturing"
21095	DstPort 1
21096	}
21097	}
21098	}
21099	Branch {
21100	Points [0, -145]
21101	DstBlock "Radio 1\nRx Buffers"
21102	DstPort 4
21103	}
21104	}
21105	Line {
21106	SrcBlock "Radio 2\nTx Buffer"
21107	SrcPort 1
21108	DstBlock "Radio 2 Outputs"
21109	DstPort 1
21110	}
21111	Line {
21112	SrcBlock "Posedge1"
21113	SrcPort 1
21114	DstBlock "Tx Control"
21115	DstPort 1
21116	}
21117	Line {
21118	SrcBlock "From2"
21119	SrcPort 1
21120	Points [75, 0; 0, -140]
21121	DstBlock "Tx Control"
21122	DstPort 3
21123	}
21124	Line {
21125	SrcBlock "Posedge2"
21126	SrcPort 1
21127	Points [60, 0; 0, -85]
21128	DstBlock "Tx Control"
21129	DstPort 2
21130	}
21131	Line {
21132	SrcBlock " 1"
21133	SrcPort 1
21134	DstBlock "Posedge2"
21135	DstPort 1
21136	}
21137	Line {
21138	SrcBlock "StopTx"
21139	SrcPort 1
21140	DstBlock " 1"
21141	DstPort 1
21142	}
21143	Line {
21144	SrcBlock "Pulse\nGenerator2"
21145	SrcPort 1
21146	DstBlock "StopTx"
21147	DstPort 1
21148	}
21149	Line {
21150	SrcBlock " "
21151	SrcPort 1
21152	DstBlock "Posedge1"
21153	DstPort 1
21154	}
21155	Line {
21156	SrcBlock "Pulse\nGenerator1"
21157	SrcPort 1
21158	DstBlock "StartTx"
21159	DstPort 1
21160	}
21161	Line {
21162	SrcBlock "From6"
21163	SrcPort 1
21164	DstBlock "Radio 2\nTx Buffer"
21165	DstPort 3
21166	}
21167	Line {
21168	SrcBlock "From4"
21169	SrcPort 1
21170	Points [105, 0; 0, -200]
21171	DstBlock "Tx Control"
21172	DstPort 4
21173	}
21174	Line {
21175	SrcBlock "Tx Control"
21176	SrcPort 2
21177	Points [25, 0]
21178	Branch {
21179	Points [0, 70]
21180	DstBlock "debug_Transmitting"
21181	DstPort 1
21182	}
21183	Branch {
21184	DstBlock "Inverter"
21185	DstPort 1
21186	}
21187	}
21188	Line {
21189	SrcBlock "Radio 3\nTx Buffer"
21190	SrcPort 1
21191	DstBlock "Radio 3 Outputs"
21192	DstPort 1
21193	}
21194	Line {
21195	SrcBlock "From7"
21196	SrcPort 1
21197	DstBlock "Radio 3\nTx Buffer"
21198	DstPort 3
21199	}
21200	Line {
21201	SrcBlock "Radio 1\nTx Buffer"
21202	SrcPort 1
21203	DstBlock "Radio 1 Outputs"
21204	DstPort 1
21205	}
21206	Line {
21207	SrcBlock "From5"
21208	SrcPort 1
21209	DstBlock "Radio 1\nTx Buffer"
21210	DstPort 3
21211	}
21212	Line {
21213	SrcBlock "Radio 4\nTx Buffer"
21214	SrcPort 1
21215	DstBlock "Radio 4 Outputs"
21216	DstPort 1
21217	}
21218	Line {
21219	SrcBlock "From8"
21220	SrcPort 1
21221	DstBlock "Radio 4\nTx Buffer"
21222	DstPort 3
21223	}
21224	Line {
21225	SrcBlock "Tx Control"
21226	SrcPort 1
21227	Points [155, 0]
21228	Branch {
21229	DstBlock "Radio 1\nTx Buffer"
21230	DstPort 1
21231	}
21232	Branch {
21233	Points [0, 95]
21234	Branch {
21235	DstBlock "Radio 2\nTx Buffer"
21236	DstPort 1
21237	}
21238	Branch {
21239	Points [0, 95]
21240	Branch {
21241	DstBlock "Radio 3\nTx Buffer"
21242	DstPort 1
21243	}
21244	Branch {
21245	Points [0, 100]
21246	DstBlock "Radio 4\nTx Buffer"
21247	DstPort 1
21248	}
21249	}
21250	}
21251	}
21252	Line {
21253	SrcBlock "Inverter"
21254	SrcPort 1
21255	Points [55, 0]
21256	Branch {
21257	Points [0, -10]
21258	DstBlock "Radio 1\nTx Buffer"
21259	DstPort 2
21260	}
21261	Branch {
21262	Points [0, 85]
21263	Branch {
21264	DstBlock "Radio 2\nTx Buffer"
21265	DstPort 2
21266	}
21267	Branch {
21268	Points [0, 95]
21269	Branch {
21270	DstBlock "Radio 3\nTx Buffer"
21271	DstPort 2
21272	}
21273	Branch {
21274	Points [0, 100]
21275	DstBlock "Radio 4\nTx Buffer"
21276	DstPort 2
21277	}
21278	}
21279	}
21280	}
21281	Line {
21282	SrcBlock "From1"
21283	SrcPort 1
21284	DstBlock " 1"
21285	DstPort 2
21286	}
21287	Line {
21288	SrcBlock "Radio 1 Inputs"
21289	SrcPort 1
21290	Points [15, 0]
21291	Branch {
21292	Points [0, -15]
21293	DstBlock "Goto2"
21294	DstPort 1
21295	}
21296	Branch {
21297	Points [0, 5]
21298	DstBlock "Radio 1\nRx Buffers"
21299	DstPort 1
21300	}
21301	}
21302	Line {
21303	SrcBlock "Radio 2 Inputs"
21304	SrcPort 1
21305	Points [25, 0]
21306	Branch {
21307	Points [0, -15]
21308	DstBlock "Goto4"
21309	DstPort 1
21310	}
21311	Branch {
21312	Points [0, 5]
21313	DstBlock "Radio 2\nRx Buffers"
21314	DstPort 1
21315	}
21316	}
21317	Line {
21318	SrcBlock "Radio 3 Inputs"
21319	SrcPort 1
21320	Points [35, 0]
21321	Branch {
21322	Points [0, -15]
21323	DstBlock "Goto5"
21324	DstPort 1
21325	}
21326	Branch {
21327	Points [0, 10]
21328	DstBlock "Radio 3\nRx Buffers"
21329	DstPort 1
21330	}
21331	}
21332	Line {
21333	SrcBlock "Radio 4 Inputs"
21334	SrcPort 1
21335	Points [15, 0]
21336	Branch {
21337	Points [0, -15]
21338	DstBlock "Goto6"
21339	DstPort 1
21340	}
21341	Branch {
21342	Points [0, 10]
21343	DstBlock "Radio 4\nRx Buffers"
21344	DstPort 1
21345	}
21346	}
21347	Line {
21348	SrcBlock "From18"
21349	SrcPort 1
21350	Points [15, 0; 0, -65]
21351	Branch {
21352	DstBlock "Radio 4 Inputs"
21353	DstPort 2
21354	}
21355	Branch {
21356	Points [0, -140]
21357	Branch {
21358	DstBlock "Radio 3 Inputs"
21359	DstPort 2
21360	}
21361	Branch {
21362	Points [0, -140]
21363	Branch {
21364	DstBlock "Radio 2 Inputs"
21365	DstPort 2
21366	}
21367	Branch {
21368	Points [0, -145]
21369	DstBlock "Radio 1 Inputs"
21370	DstPort 2
21371	}
21372	}
21373	}
21374	}
21375	Line {
21376	SrcBlock "From19"
21377	SrcPort 1
21378	Points [15, 0]
21379	Branch {
21380	Points [0, 165]
21381	DstBlock " "
21382	DstPort 1
21383	}
21384	Branch {
21385	Points [0, -205]
21386	DstBlock "Logical"
21387	DstPort 3
21388	}
21389	}
21390	Line {
21391	SrcBlock "StartTx"
21392	SrcPort 1
21393	DstBlock " "
21394	DstPort 2
21395	}
21396	Line {
21397	SrcBlock "From3"
21398	SrcPort 1
21399	DstBlock " "
21400	DstPort 3
21401	}
21402	Line {
21403	SrcBlock "RSSI Clock\nGenerator"
21404	SrcPort 1
21405	DstBlock "RSSI_ADC_CLK"
21406	DstPort 1
21407	}
21408	Line {
21409	SrcBlock "RSSI_ADC_CLK"
21410	SrcPort 1
21411	DstBlock "Terminator"
21412	DstPort 1
21413	}
21414	Line {
21415	SrcBlock "AGC_Done"
21416	SrcPort 1
21417	Points [15, 0]
21418	Branch {
21419	Points [0, 75]
21420	DstBlock "debug_AGC_Done"
21421	DstPort 1
21422	}
21423	Branch {
21424	DstBlock "Register"
21425	DstPort 1
21426	}
21427	}
21428	Line {
21429	SrcBlock "Pulse\nGenerator3"
21430	SrcPort 1
21431	DstBlock "AGC_Done"
21432	DstPort 1
21433	}
21434	Line {
21435	SrcBlock "Register"
21436	SrcPort 1
21437	DstBlock "Posedge3"
21438	DstPort 1
21439	}
21440	Line {
21441	SrcBlock "Posedge3"
21442	SrcPort 1
21443	DstBlock "Convert2"
21444	DstPort 1
21445	}
21446	Line {
21447	SrcBlock "Convert2"
21448	SrcPort 1
21449	DstBlock "Goto3"
21450	DstPort 1
21451	}
21452	Annotation {
21453	Position [348, 1029]
21454	}
21455	}
21456	}
21457	MatData {
21458	NumRecords 1
21459	DataRecord {
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21462	}
21463	}

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