[1748] | 1 | //////////////////////////////////////////////////////////////////////////////// |
---|
| 2 | // |
---|
[1852] | 3 | // File : warplab.c v6.3 |
---|
| 4 | // Date : 2012, November 16 |
---|
[1748] | 5 | // Author : P. Murphy, S. Gupta, M. Duarte, C. Hunter |
---|
| 6 | // |
---|
| 7 | // Changelog: |
---|
[1852] | 8 | // v6.3 |
---|
| 9 | // - No changes to C-code other than the print that says what version it is |
---|
| 10 | // - Small bugfixes to UCF for WARP v2 and WARP v3 |
---|
| 11 | // v6.2 |
---|
[1832] | 12 | // - Fixed bug in handling of sync packets that causes jitter |
---|
| 13 | // - Added diagnosis commands |
---|
[1748] | 14 | // - Added support for WARPxilnet_v3_00 that adds support for the hard TEMACs |
---|
| 15 | // inside the Virtex4 |
---|
| 16 | // - v2 WARP hardware will use gigabit speeds by default. The Ethernet PHY |
---|
| 17 | // advertises its speed as gigabit, so there is no longer a need to |
---|
| 18 | // explicitly tell your computer to send at 100Mbit. |
---|
| 19 | // - Uses an XPS_Timer core to inact a timeout of WAITDURATION_SEC seconds |
---|
| 20 | // to wait for a sync packet. Previously, this timeout was handled by |
---|
| 21 | // waiting a set number of packets (e.g. 10 received packets). |
---|
| 22 | // - Moved the sync IP address up to a proper broadcast address of X.X.X.255. |
---|
| 23 | // This should obviate the need for explicit ARP table entries to handle |
---|
| 24 | // sync packets. The v06 WARPLAB M-Code Reference has correspondingly been |
---|
| 25 | // updated. |
---|
[1832] | 26 | // - This source file will compile for either v1 or v2 WARP hardware |
---|
[1748] | 27 | // |
---|
| 28 | //////////////////////////////////////////////////////////////////////////////// |
---|
| 29 | |
---|
[1385] | 30 | #include "xparameters.h" |
---|
[1741] | 31 | #include <xilnet_config.h> |
---|
[1747] | 32 | #include <xilnet_xilsock.h> |
---|
| 33 | #include <xilnet_mac.h> |
---|
[1385] | 34 | #include "xstatus.h" |
---|
| 35 | #include <stdlib.h> |
---|
| 36 | #include <string.h> |
---|
| 37 | #include "math.h" |
---|
| 38 | #include "radio_controller_basic.h" |
---|
| 39 | #include "radio_controller_ext.h" |
---|
| 40 | #include "radio_controller_adv.h" |
---|
[1741] | 41 | #include "radio_controller_5ghz.h" |
---|
[1385] | 42 | #include "warplab_defines.h" |
---|
[1741] | 43 | #include "EEPROM.h" |
---|
[1418] | 44 | #include "warplab_regmacros.h" |
---|
[1747] | 45 | #include "stdio.h" |
---|
[1738] | 46 | #include "xtmrctr.h" |
---|
[1832] | 47 | #include "warp_hw_ver.h" |
---|
[1385] | 48 | |
---|
[1832] | 49 | #define WARPLAB_MAJOR_VER 6 |
---|
[1852] | 50 | #define WARPLAB_MINOR_VER 3 |
---|
[1389] | 51 | |
---|
[1852] | 52 | #define WARPLAB_CONFIG_2RF 1 // Comment in if board in 2x2 configuration |
---|
| 53 | //#define WARPLAB_CONFIG_4RF 1 // Comment in if board in 4x4 configuration |
---|
[1832] | 54 | |
---|
[1385] | 55 | //Includes for specific FPGA board versions |
---|
[1832] | 56 | #ifdef WARP_HW_VER_v1 |
---|
[1747] | 57 | #include "warp_userio.h" |
---|
[1742] | 58 | #include "xemaclite.h" |
---|
[1747] | 59 | #include "xemaclite_l.h" |
---|
[1742] | 60 | #include "xgpio.h" |
---|
[1747] | 61 | static XGpio GPIO_UserIO; //Instantiates the general-purpose input-output peripheral driver |
---|
[1742] | 62 | static XEmacLite EmacLiteInstance; /* Instance of the EmacLite */ |
---|
[1747] | 63 | static XEmacLite_Config *EmacLiteConfigPtr; |
---|
[1748] | 64 | #define XPAR_XPS_TIMER_0_CLOCK_FREQ_HZ 80000000 //The 10.1 tools don't automatically generate this |
---|
[1832] | 65 | #endif |
---|
| 66 | |
---|
| 67 | #ifdef WARP_HW_VER_v2 |
---|
[1738] | 68 | #define USERIO_BASEADDR XPAR_USERIO_BASEADDR |
---|
[1747] | 69 | #include "warp_v4_userio.h" |
---|
[1742] | 70 | #include "xlltemac.h" |
---|
| 71 | #include "xllfifo.h" |
---|
| 72 | #include "xdmacentral.h" |
---|
[1747] | 73 | #include "xdmacentral_l.h" |
---|
[1742] | 74 | static XDmaCentral DmaCentralInst; |
---|
| 75 | static XDmaCentral_Config *DMAConfigPtr; |
---|
| 76 | XLlTemac TemacInstance; |
---|
| 77 | XLlTemac_Config *MacCfgPtr; |
---|
| 78 | XLlFifo FifoInstance; |
---|
[1385] | 79 | #endif |
---|
| 80 | |
---|
[1832] | 81 | #define WARPLAB_TXBUFF_RADIO1 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_TXBUFF_RADIO1 |
---|
| 82 | #define WARPLAB_TXBUFF_RADIO2 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_TXBUFF_RADIO2 |
---|
| 83 | #define WARPLAB_TXBUFF_RADIO3 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_TXBUFF_RADIO3 |
---|
| 84 | #define WARPLAB_TXBUFF_RADIO4 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_TXBUFF_RADIO4 |
---|
| 85 | #define WARPLAB_RXBUFF_RADIO1 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_RXBUFF_RADIO1 |
---|
| 86 | #define WARPLAB_RXBUFF_RADIO2 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_RXBUFF_RADIO2 |
---|
| 87 | #define WARPLAB_RXBUFF_RADIO3 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_RXBUFF_RADIO3 |
---|
| 88 | #define WARPLAB_RXBUFF_RADIO4 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_RXBUFF_RADIO4 |
---|
| 89 | #define WARPLAB_RSSIBUFF_RADIO1 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_RSSIBUFF_RADIO1 |
---|
| 90 | #define WARPLAB_RSSIBUFF_RADIO2 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_RSSIBUFF_RADIO2 |
---|
| 91 | #define WARPLAB_RSSIBUFF_RADIO3 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_RSSIBUFF_RADIO3 |
---|
| 92 | #define WARPLAB_RSSIBUFF_RADIO4 XPAR_WARPLAB_BUFFERS_PLBW_0_MEMMAP_RSSIBUFF_RADIO4 |
---|
[1385] | 93 | |
---|
[1738] | 94 | #define TEMAC_DEVICE_ID XPAR_LLTEMAC_0_DEVICE_ID |
---|
| 95 | #define FIFO_DEVICE_ID XPAR_LLFIFO_0_DEVICE_ID |
---|
| 96 | |
---|
| 97 | #define TMRCTR_DEVICE_ID XPAR_TMRCTR_0_DEVICE_ID |
---|
| 98 | #define TIMER_COUNTER_0 0 |
---|
[1741] | 99 | |
---|
| 100 | |
---|
[1832] | 101 | #ifdef WARP_HW_VER_v1 |
---|
[1741] | 102 | |
---|
| 103 | #define ENET_LINK_SPEED 100 |
---|
[1832] | 104 | #endif |
---|
[1741] | 105 | |
---|
[1832] | 106 | #ifdef WARP_HW_VER_v2 |
---|
[1741] | 107 | |
---|
| 108 | #include "warp_v4_userio.h" |
---|
[1742] | 109 | static XDmaCentral DmaCentralInst; |
---|
| 110 | static XDmaCentral_Config *DMAConfigPtr; |
---|
| 111 | XLlTemac TemacInstance; |
---|
| 112 | XLlTemac_Config *MacCfgPtr; |
---|
| 113 | XLlFifo FifoInstance; |
---|
[1741] | 114 | #define USERIO_BASEADDR XPAR_USERIO_BASEADDR |
---|
[1738] | 115 | #define ENET_LINK_SPEED 1000 |
---|
[1741] | 116 | |
---|
| 117 | #endif |
---|
| 118 | |
---|
| 119 | |
---|
[1385] | 120 | #define BUFSIZE 2000 |
---|
[1748] | 121 | #define DEBUG_LVL 2 |
---|
[1385] | 122 | |
---|
[1748] | 123 | #define WAITDURATION_SEC 2 |
---|
[1385] | 124 | |
---|
| 125 | unsigned int sendPtr32[(BUFSIZE+3)/4]; |
---|
| 126 | unsigned char * const sendBuffer = (unsigned char *) sendPtr32; |
---|
| 127 | unsigned int receivePtr32[(BUFSIZE+3)/4]; |
---|
| 128 | unsigned char * const receiveBuffer = (unsigned char *) receivePtr32; |
---|
| 129 | unsigned int myPort; |
---|
| 130 | |
---|
[1832] | 131 | u8 numSync; |
---|
| 132 | u8 hw_generation; |
---|
| 133 | u8 numRadios; |
---|
| 134 | |
---|
[1738] | 135 | XTmrCtr TmrCtrInstance; |
---|
| 136 | |
---|
[1385] | 137 | int sock; // UDP socket |
---|
| 138 | struct sockaddr_in addr; |
---|
[1738] | 139 | unsigned int alen = 0; |
---|
[1385] | 140 | char node; |
---|
| 141 | |
---|
| 142 | unsigned int ReadWrite; |
---|
| 143 | unsigned char Radios_WirelessChan; |
---|
| 144 | unsigned char Radios_Tx_LPF_Corn_Freq; |
---|
| 145 | unsigned char Radios_Rx_LPF_Corn_Freq; |
---|
| 146 | unsigned char Radio1_TxGain_BB, Radio1_TxGain_RF, Radio1_RxGain_BB, Radio1_RxGain_RF; |
---|
| 147 | unsigned char Radio2_TxGain_BB, Radio2_TxGain_RF, Radio2_RxGain_BB, Radio2_RxGain_RF; |
---|
[1741] | 148 | unsigned char Radio3_TxGain_BB, Radio3_TxGain_RF, Radio3_RxGain_BB, Radio3_RxGain_RF; |
---|
| 149 | unsigned char Radio4_TxGain_BB, Radio4_TxGain_RF, Radio4_RxGain_BB, Radio4_RxGain_RF; |
---|
[1385] | 150 | |
---|
[1832] | 151 | #ifdef WARPLAB_CONFIG_2RF |
---|
[1741] | 152 | unsigned int radios = RADIO2_ADDR | RADIO3_ADDR; |
---|
[1832] | 153 | #elif defined WARPLAB_CONFIG_4RF |
---|
[1741] | 154 | unsigned int radios = RADIO1_ADDR | RADIO2_ADDR | RADIO3_ADDR | RADIO4_ADDR; |
---|
| 155 | #endif |
---|
[1385] | 156 | unsigned int radio1 = RADIO1_ADDR; |
---|
| 157 | unsigned int radio2 = RADIO2_ADDR; |
---|
[1741] | 158 | unsigned int radio3 = RADIO3_ADDR; |
---|
| 159 | unsigned int radio4 = RADIO4_ADDR; |
---|
[1385] | 160 | |
---|
| 161 | unsigned int AgcIsDoneAddr; |
---|
| 162 | unsigned int MGC_AGC_Sel_Variable = 0; // By default MGC is selected |
---|
| 163 | |
---|
| 164 | //---------------------------------- |
---|
| 165 | // Functions |
---|
| 166 | void sendACK(unsigned int packetNo, unsigned int commandToACK); |
---|
| 167 | unsigned char sevenSegmentMap(unsigned char x); |
---|
[1741] | 168 | int warpphy_applyTxDCOCorrection(unsigned int radioSelection); |
---|
| 169 | void warplab_AGC_Reset(); |
---|
| 170 | void warplab_AGC_MasterReset(); |
---|
| 171 | void warplab_AGC_Start(); |
---|
| 172 | void warplab_AGC_Initialize(int noise_estimate); |
---|
| 173 | void warplab_AGC_setNoiseEstimate(int noise_estimate); |
---|
| 174 | unsigned int warplab_AGC_GetGains(void); |
---|
| 175 | void warplab_AGC_SetTarget(unsigned int target); |
---|
| 176 | void warplab_AGC_SetDCO(unsigned int AGCstate); |
---|
[1738] | 177 | int warpphy_applyTxDCOCalibration(unsigned int radioSelection); |
---|
[1741] | 178 | // In WARPLab there is no decimation filter in the AGC, there is a downsampling only, so in WARPLab a function equivalent to |
---|
| 179 | // ofdm_AGC_FiltSel is not needed |
---|
[1385] | 180 | |
---|
| 181 | void init_net() { |
---|
[1832] | 182 | XStatus Status; |
---|
[1748] | 183 | xil_printf("Configuring network\n\r"); |
---|
[1385] | 184 | |
---|
[1748] | 185 | mb_hw_addr[0] = 0x00; |
---|
| 186 | mb_hw_addr[1] = 0x50; |
---|
| 187 | mb_hw_addr[2] = 0xc2; |
---|
| 188 | mb_hw_addr[3] = 0x63; |
---|
| 189 | mb_hw_addr[4] = 0x36; |
---|
[1757] | 190 | mb_hw_addr[5] = node+0x63; |
---|
[1385] | 191 | |
---|
| 192 | mb_ip_addr[0] = 10; |
---|
| 193 | mb_ip_addr[1] = 0; |
---|
| 194 | mb_ip_addr[2] = 0; |
---|
| 195 | mb_ip_addr[3] = node+1; |
---|
| 196 | |
---|
[1748] | 197 | //Define the last octet of the IP address used for SYNC packets. The first three will be the mb_ip_addr. |
---|
| 198 | sync_IP_octet = 255; |
---|
[1385] | 199 | |
---|
| 200 | myPort = 9000 + node; |
---|
| 201 | |
---|
| 202 | xilnet_eth_init_hw_addr_tbl(); |
---|
| 203 | |
---|
[1832] | 204 | #ifdef WARP_HW_VER_v1 |
---|
[1742] | 205 | // Initialize the MAC OPB base address (MAC driver in net/mac.c) |
---|
| 206 | xilnet_mac_init(XPAR_ETHERNET_MAC_BASEADDR); |
---|
| 207 | // xemac_l.h |
---|
[1385] | 208 | |
---|
[1742] | 209 | /*************************Ethernet***************************/ |
---|
[1748] | 210 | if(DEBUG_LVL > 1) xil_printf("... initializing Ethernet"); |
---|
[1742] | 211 | //Initialize the EMAC config struct |
---|
| 212 | EmacLiteConfigPtr = XEmacLite_LookupConfig(XPAR_EMACLITE_0_DEVICE_ID); |
---|
| 213 | if (EmacLiteConfigPtr == NULL){ |
---|
[1832] | 214 | xil_printf("... ... EMAClite LookupConfig failed!\n"); |
---|
[1742] | 215 | return; |
---|
| 216 | } |
---|
| 217 | |
---|
| 218 | Status = XEmacLite_CfgInitialize(&EmacLiteInstance, EmacLiteConfigPtr, EmacLiteConfigPtr->BaseAddress); |
---|
| 219 | if (Status != XST_SUCCESS){ |
---|
[1832] | 220 | xil_printf("... ... EMAClite CfgInitialize failed!\n"); |
---|
[1742] | 221 | return; |
---|
| 222 | } |
---|
| 223 | |
---|
| 224 | XEmacLite_SetMacAddress(&EmacLiteInstance, mb_hw_addr); |
---|
| 225 | |
---|
| 226 | XEmacLite_FlushReceive(&EmacLiteInstance); |
---|
[1832] | 227 | if(DEBUG_LVL > 1) xil_printf("... ... complete!\n"); |
---|
[1747] | 228 | /************************************************************/ |
---|
[1832] | 229 | #endif |
---|
| 230 | #ifdef WARP_HW_VER_v2 |
---|
| 231 | if(DEBUG_LVL > 1) xil_printf("... initializing DMA\n"); |
---|
[1742] | 232 | /**************************DMA*******************************/ |
---|
[1738] | 233 | //Lookup the DMA configuration information |
---|
| 234 | DMAConfigPtr = XDmaCentral_LookupConfig(XPAR_XPS_CENTRAL_DMA_0_DEVICE_ID); |
---|
[1385] | 235 | |
---|
[1738] | 236 | //Initialize the config struct |
---|
| 237 | Status = XDmaCentral_CfgInitialize(&DmaCentralInst, DMAConfigPtr, DMAConfigPtr->BaseAddress); |
---|
| 238 | if (Status != XST_SUCCESS){ |
---|
[1832] | 239 | xil_printf("... ... DMA CfgInitialize failed!\n"); |
---|
[1738] | 240 | return; |
---|
| 241 | } |
---|
[1385] | 242 | |
---|
[1738] | 243 | //Disable Interrupts |
---|
| 244 | XDmaCentral_InterruptEnableSet(&DmaCentralInst, 0); |
---|
[1832] | 245 | if(DEBUG_LVL > 1) xil_printf("... ... complete!\n"); |
---|
[1738] | 246 | /************************************************************/ |
---|
[1385] | 247 | |
---|
[1748] | 248 | /*******************Ethernet**********************************/ |
---|
[1832] | 249 | if(DEBUG_LVL > 1) xil_printf("... initializing Ethernet\n"); |
---|
[1738] | 250 | MacCfgPtr = XLlTemac_LookupConfig(TEMAC_DEVICE_ID); |
---|
| 251 | Status = XLlTemac_CfgInitialize(&TemacInstance, MacCfgPtr, MacCfgPtr->BaseAddress); |
---|
| 252 | XLlFifo_Initialize(&FifoInstance, XLlTemac_LlDevBaseAddress(&TemacInstance)); |
---|
| 253 | if (Status != XST_SUCCESS) |
---|
[1832] | 254 | xil_printf("... ... EMAC init error\n"); |
---|
[1385] | 255 | |
---|
[1738] | 256 | if (!XLlTemac_IsFifo(&TemacInstance)) |
---|
[1832] | 257 | xil_printf("... ... EMAC hw config incorrect\n"); |
---|
[1738] | 258 | |
---|
| 259 | |
---|
| 260 | |
---|
| 261 | Status = XLlTemac_ClearOptions(&TemacInstance, XTE_LENTYPE_ERR_OPTION | XTE_FLOW_CONTROL_OPTION | XTE_FCS_STRIP_OPTION);// | XTE_MULTICAST_OPTION); |
---|
| 262 | Status |= XLlTemac_SetOptions(&TemacInstance, XTE_PROMISC_OPTION | XTE_MULTICAST_OPTION | XTE_BROADCAST_OPTION | XTE_RECEIVER_ENABLE_OPTION | XTE_TRANSMITTER_ENABLE_OPTION); //| XTE_JUMBO_OPTION |
---|
| 263 | if (Status != XST_SUCCESS) |
---|
[1832] | 264 | xil_printf("... ... Error setting EMAC options\n, code %d", Status); |
---|
[1738] | 265 | |
---|
| 266 | // Make sure the TEMAC is ready |
---|
| 267 | Status = XLlTemac_ReadReg(TemacInstance.Config.BaseAddress, XTE_RDY_OFFSET); |
---|
| 268 | while ((Status & XTE_RDY_HARD_ACS_RDY_MASK) == 0) |
---|
| 269 | { |
---|
| 270 | Status = XLlTemac_ReadReg(TemacInstance.Config.BaseAddress, XTE_RDY_OFFSET); |
---|
| 271 | } |
---|
| 272 | |
---|
| 273 | XLlTemac_SetOperatingSpeed(&TemacInstance, ENET_LINK_SPEED); |
---|
| 274 | usleep(1 * 10000); |
---|
| 275 | |
---|
| 276 | XLlTemac_Start(&TemacInstance); |
---|
[1832] | 277 | if(DEBUG_LVL > 1) xil_printf("... ... complete!\n"); |
---|
[1738] | 278 | /************************************************************/ |
---|
| 279 | |
---|
| 280 | // Initialize the MAC OPB base address (MAC driver in net/mac.c) |
---|
[1741] | 281 | xilnet_mac_init((void *)&FifoInstance,(void *)&DmaCentralInst); |
---|
[1742] | 282 | #endif |
---|
| 283 | |
---|
[1832] | 284 | if(DEBUG_LVL > 1) xil_printf("... complete!\n"); |
---|
[1385] | 285 | // Print IP address |
---|
| 286 | if(DEBUG_LVL > 0) xil_printf("IP Address: %d.%d.%d.%d \n\r", mb_ip_addr[0], mb_ip_addr[1],mb_ip_addr[2],mb_ip_addr[3]); |
---|
| 287 | } |
---|
| 288 | |
---|
| 289 | |
---|
| 290 | void init_socket() { |
---|
| 291 | |
---|
| 292 | sock = xilsock_socket(AF_INET, SOCK_DGRAM, 0); // Create UDP socket with domain Internet and UDP connection. |
---|
| 293 | if (sock == -1) { |
---|
[1832] | 294 | if(DEBUG_LVL > 0) xil_printf("Error in creating socket\n"); |
---|
[1385] | 295 | exit(-1); |
---|
| 296 | } |
---|
| 297 | |
---|
| 298 | addr.sin_family = AF_INET; |
---|
| 299 | addr.sin_port = myPort; |
---|
| 300 | addr.sin_addr.s_addr = INADDR_ANY; // Create the input socket with any incoming address. (0x00000000) |
---|
| 301 | |
---|
| 302 | XStatus bind = xilsock_bind(sock, (struct sockaddr *)&addr, sizeof(struct sockaddr)); |
---|
| 303 | if (bind == -1) { |
---|
[1832] | 304 | if(DEBUG_LVL > 0) xil_printf("Unable to bind socket\n"); |
---|
[1385] | 305 | exit(-1); |
---|
| 306 | } |
---|
| 307 | alen = sizeof(struct sockaddr); |
---|
[1832] | 308 | if(DEBUG_LVL > 0) xil_printf("Listening on UDP port %d.\n", myPort); |
---|
[1385] | 309 | } |
---|
| 310 | |
---|
| 311 | void shut_socket() { |
---|
| 312 | xilsock_close(sock); |
---|
| 313 | } |
---|
| 314 | |
---|
| 315 | int waitForSync() |
---|
| 316 | { |
---|
[1738] | 317 | unsigned int n; |
---|
[1385] | 318 | |
---|
[1738] | 319 | XTmrCtr_Start(&TmrCtrInstance, TMRCTR_DEVICE_ID); |
---|
| 320 | |
---|
[1832] | 321 | while(XTmrCtr_GetValue(&TmrCtrInstance, TMRCTR_DEVICE_ID) < (WAITDURATION_SEC*XPAR_XPS_TIMER_0_CLOCK_FREQ_HZ)){ |
---|
[1385] | 322 | n = xilnet_eth_recv_frame(receiveBuffer, BUFSIZE); |
---|
| 323 | if(n==9999) |
---|
[1748] | 324 | { |
---|
[1832] | 325 | numSync++; |
---|
[1738] | 326 | return 0; |
---|
[1385] | 327 | } |
---|
| 328 | } |
---|
[1738] | 329 | |
---|
| 330 | XTmrCtr_Stop(&TmrCtrInstance, TMRCTR_DEVICE_ID); |
---|
| 331 | |
---|
[1832] | 332 | xil_printf("NoSync\n"); |
---|
[1385] | 333 | return 1; |
---|
| 334 | } |
---|
| 335 | |
---|
| 336 | int main() { |
---|
| 337 | |
---|
| 338 | int bytesReceived; |
---|
| 339 | int bytesSend; |
---|
| 340 | int command; |
---|
| 341 | int packetNo; |
---|
| 342 | unsigned int rxArg0; |
---|
| 343 | char done = 0; |
---|
| 344 | unsigned char sevenSeg1 = 0x1; |
---|
| 345 | int agctarget = -14; |
---|
| 346 | int agcnoiseEst = -95; |
---|
| 347 | unsigned int agc_dco_state; |
---|
| 348 | |
---|
[1418] | 349 | |
---|
[1832] | 350 | #ifdef WARP_HW_VER_v1 |
---|
[1741] | 351 | unsigned int LEDHEX_Outputs = 0; |
---|
[1738] | 352 | //Initialize the driver instance for the GPIO core attached to the FPGA board's user I/O (switches, LEDs, etc) |
---|
[1385] | 353 | XGpio_Initialize(&GPIO_UserIO, XPAR_USER_IO_DEVICE_ID); |
---|
| 354 | |
---|
| 355 | //We use both channels in the GPIO core- one for inputs, one for outputs |
---|
| 356 | //A '1' in a bit position in the third argument marks the bit as an input |
---|
| 357 | XGpio_SetDataDirection(&GPIO_UserIO, USERIO_CHAN_INPUTS, USERIO_MASK_INPUTS); |
---|
| 358 | XGpio_SetDataDirection(&GPIO_UserIO, USERIO_CHAN_OUTPUTS, 0); |
---|
| 359 | |
---|
| 360 | //Make sure the LEDs are all off by default |
---|
| 361 | XGpio_DiscreteClear(&GPIO_UserIO, USERIO_CHAN_OUTPUTS, USERIO_MASK_OUTPUTS); |
---|
| 362 | |
---|
| 363 | //Read the 4-bit DIP switch, and use its value as this node's ID |
---|
| 364 | node = USERIO_MAP_DIPSW(XGpio_DiscreteRead(&GPIO_UserIO, USERIO_CHAN_INPUTS) & USERIO_MASK_INPUTS); |
---|
| 365 | |
---|
| 366 | //Display the node's ID + 1 (to match the IP address) on the right hex display |
---|
| 367 | LEDHEX_Outputs = ( |
---|
| 368 | USERIO_MAP_LEDS(0) | |
---|
| 369 | USERIO_MAP_DISPR(sevenSegmentMap(node+1)) | |
---|
| 370 | USERIO_MAP_DISPL(sevenSeg1) |
---|
| 371 | ); |
---|
| 372 | XGpio_DiscreteSet(&GPIO_UserIO, USERIO_CHAN_OUTPUTS, LEDHEX_Outputs); |
---|
| 373 | |
---|
[1832] | 374 | #endif |
---|
| 375 | #ifdef WARP_HW_VER_v2 |
---|
[1385] | 376 | //Set the modes for the three hex displays |
---|
| 377 | WarpV4_UserIO_NumberMode_LeftHex(USERIO_BASEADDR); |
---|
| 378 | WarpV4_UserIO_NumberMode_MiddleHex(USERIO_BASEADDR); |
---|
| 379 | WarpV4_UserIO_RawMode_RightHex(USERIO_BASEADDR); |
---|
| 380 | |
---|
| 381 | //Read the 4-bit DIP switch and use its value as this node's ID |
---|
| 382 | node = WarpV4_UserIO_DipSw(USERIO_BASEADDR); |
---|
| 383 | |
---|
| 384 | //Write the 2-digit node ID to the left and middle hex displays |
---|
| 385 | WarpV4_UserIO_WriteNumber_LeftHex(USERIO_BASEADDR, (node+1)/10, 0); |
---|
| 386 | WarpV4_UserIO_WriteNumber_MiddleHex(USERIO_BASEADDR, (node+1)%10, 0); |
---|
| 387 | #endif |
---|
| 388 | |
---|
| 389 | //Initialize the xilnet stack & default sockets |
---|
| 390 | init_net(); |
---|
| 391 | init_socket(); |
---|
| 392 | |
---|
[1832] | 393 | #ifdef WARP_HW_VER_v3 |
---|
| 394 | hw_generation = 3; |
---|
| 395 | #elif defined WARP_HW_VER_v2 |
---|
| 396 | hw_generation = 2; |
---|
| 397 | #elif defined WARP_HW_VER_v1 |
---|
| 398 | hw_generation = 1; |
---|
| 399 | #endif |
---|
| 400 | |
---|
| 401 | #ifdef WARPLAB_CONFIG_2RF |
---|
| 402 | numRadios = 2; |
---|
| 403 | #elif defined WARPLAB_CONFIG_4RF |
---|
| 404 | numRadios = 4; |
---|
| 405 | #endif |
---|
| 406 | |
---|
[1385] | 407 | //Initialize the radio transceivers |
---|
| 408 | WarpRadio_v1_Reset((unsigned int*)XPAR_RADIO_CONTROLLER_0_BASEADDR, 2); |
---|
| 409 | WarpRadio_v1_SetCenterFreq2GHz(11, radios); |
---|
| 410 | WarpRadio_v1_SoftwareTxGainControl(1, radios); |
---|
| 411 | //By default, MGC (Manual Gain Control) is enabled. AGC is not enabled by default |
---|
| 412 | WarpRadio_v1_SoftwareRxGainControl(1, radios); |
---|
| 413 | WarpRadio_v1_RxHpSoftControlEnable(radios); |
---|
| 414 | //Set Rx bandwidth to nominal mode |
---|
| 415 | Radios_Tx_LPF_Corn_Freq = 1; |
---|
| 416 | WarpRadio_v1_RxLpfCornFreqCoarseAdj(Radios_Tx_LPF_Corn_Freq, radios); |
---|
| 417 | //Set Tx bandwidth to nominal mode |
---|
| 418 | Radios_Rx_LPF_Corn_Freq = 1; |
---|
| 419 | WarpRadio_v1_TxLpfCornFreqCoarseAdj(Radios_Rx_LPF_Corn_Freq, radios); |
---|
| 420 | |
---|
| 421 | //Apply the stored TX DC offset correction values for each radio |
---|
| 422 | warpphy_applyTxDCOCalibration(RADIO2_ADDR); |
---|
| 423 | warpphy_applyTxDCOCalibration(RADIO3_ADDR); |
---|
[1832] | 424 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1385] | 425 | warpphy_applyTxDCOCalibration(RADIO1_ADDR); |
---|
| 426 | warpphy_applyTxDCOCalibration(RADIO4_ADDR); |
---|
| 427 | #endif |
---|
| 428 | |
---|
[1738] | 429 | ///Timer Setup/// |
---|
| 430 | XTmrCtr_Initialize(&TmrCtrInstance, TMRCTR_DEVICE_ID); |
---|
| 431 | XTmrCtr_SetResetValue(&TmrCtrInstance,TMRCTR_DEVICE_ID,0); //Sets it so issuing a "start" command begins at counter=0 |
---|
| 432 | ///////////////// |
---|
| 433 | |
---|
| 434 | |
---|
[1832] | 435 | #ifdef WARPLAB_CONFIG_2RF |
---|
[1852] | 436 | xil_printf("WARPLabv06_3 2RF Started - Waiting for connection from MATLAB\n"); |
---|
[1832] | 437 | #elif defined WARPLAB_CONFIG_4RF |
---|
[1852] | 438 | xil_printf("WARPLabv06_3 4RF Started - Waiting for connection from MATLAB\n"); |
---|
[1747] | 439 | #endif |
---|
| 440 | |
---|
[1832] | 441 | #ifdef WARP_HW_VER_v2 |
---|
[1747] | 442 | XLlFifo_Reset(&FifoInstance); |
---|
| 443 | #endif |
---|
[1742] | 444 | |
---|
[1385] | 445 | while(done == 0) { |
---|
| 446 | |
---|
[1738] | 447 | if(DEBUG_LVL > 3) xil_printf("|"); |
---|
[1385] | 448 | |
---|
| 449 | bytesReceived = xilsock_recvfrom(sock, receiveBuffer, BUFSIZE, (struct sockaddr *)&addr, &alen); // Wait to receive data |
---|
| 450 | |
---|
| 451 | if (bytesReceived > 0) { // Check for valid packet |
---|
| 452 | |
---|
| 453 | packetNo = receivePtr32[0]; |
---|
| 454 | command = receivePtr32[1]; |
---|
| 455 | rxArg0 = receivePtr32[2]; |
---|
| 456 | |
---|
| 457 | //Rotate the single active bit |
---|
| 458 | sevenSeg1 = ( ((sevenSeg1<<1)&0x7E) | ((sevenSeg1>>5)&0x7E) ); |
---|
| 459 | |
---|
[1832] | 460 | #ifdef WARP_HW_VER_v1 |
---|
[1385] | 461 | //Update the hex displays to show the new values |
---|
| 462 | LEDHEX_Outputs = ( |
---|
| 463 | USERIO_MAP_LEDS(0) | |
---|
| 464 | USERIO_MAP_DISPR(sevenSegmentMap(node+1)) | |
---|
| 465 | USERIO_MAP_DISPL(sevenSeg1) |
---|
| 466 | ); |
---|
| 467 | XGpio_DiscreteSet(&GPIO_UserIO, USERIO_CHAN_OUTPUTS, LEDHEX_Outputs); |
---|
[1832] | 468 | #endif |
---|
| 469 | #ifdef WARP_HW_VER_v2 |
---|
[1418] | 470 | WarpV4_UserIO_WriteRaw_RightHex(USERIO_BASEADDR, sevenSeg1<<1); |
---|
[1385] | 471 | #endif |
---|
[1832] | 472 | if(DEBUG_LVL > 2) xil_printf("=============\nPacket Received\n Length: %d\n Packet No.: %d\n Command No: %d\n", bytesReceived, packetNo, command); |
---|
[1385] | 473 | |
---|
| 474 | switch(command) { // Decode on incoming command |
---|
| 475 | |
---|
| 476 | case INITIALIZE: |
---|
| 477 | //if(DEBUG_LVL > 1) xil_printf("Initializing Node..."); |
---|
[1832] | 478 | warplab_buffers_WriteReg_TxDelay(0); |
---|
| 479 | warplab_buffers_WriteReg_StartCapture(0); |
---|
| 480 | warplab_buffers_WriteReg_TxLength((unsigned int)16383); |
---|
| 481 | warplab_buffers_WriteReg_TransMode(0); |
---|
| 482 | warplab_buffers_WriteReg_RADIO2TXBUFF_TXEN(0); |
---|
| 483 | warplab_buffers_WriteReg_RADIO3TXBUFF_TXEN(0); |
---|
| 484 | warplab_buffers_WriteReg_RADIO2RXBUFF_RXEN(0); |
---|
| 485 | warplab_buffers_WriteReg_RADIO3RXBUFF_RXEN(0); |
---|
[1741] | 486 | warplab_AGC_WriteReg_RADIO1_AGC_EN(0); // No radio on slot 1 |
---|
| 487 | warplab_AGC_WriteReg_RADIO2_AGC_EN(0); |
---|
| 488 | warplab_AGC_WriteReg_RADIO3_AGC_EN(0); |
---|
| 489 | warplab_AGC_WriteReg_RADIO4_AGC_EN(0); // No radio on slot 4 |
---|
| 490 | warplab_AGC_WriteReg_AGC_TRIGGER_DELAY((unsigned int)50); |
---|
[1832] | 491 | warplab_buffers_WriteReg_MGC_AGC_SEL(0);// Select MGC by default |
---|
[1741] | 492 | warplab_AGC_WriteReg_AGC_EN(0); |
---|
[1385] | 493 | MGC_AGC_Sel_Variable = 0; |
---|
[1832] | 494 | #ifdef WARPLAB_CONFIG_4RF |
---|
| 495 | warplab_buffers_WriteReg_RADIO1TXBUFF_TXEN(0); |
---|
| 496 | warplab_buffers_WriteReg_RADIO4TXBUFF_TXEN(0); |
---|
| 497 | warplab_buffers_WriteReg_RADIO1RXBUFF_RXEN(0); |
---|
| 498 | warplab_buffers_WriteReg_RADIO4RXBUFF_RXEN(0); |
---|
[1385] | 499 | #endif |
---|
| 500 | |
---|
| 501 | sendACK(packetNo, command); |
---|
| 502 | break; |
---|
| 503 | |
---|
[1832] | 504 | case NETWORKCHECK: |
---|
| 505 | sendPtr32[0] = packetNo + 1; |
---|
| 506 | sendPtr32[1] = ACK; |
---|
| 507 | sendPtr32[2] = command; |
---|
| 508 | sendPtr32[3] = numSync; |
---|
| 509 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 510 | numSync = 0; |
---|
| 511 | waitForSync(); |
---|
| 512 | break; |
---|
| 513 | |
---|
| 514 | case BOARDINFO: |
---|
| 515 | sendPtr32[0] = packetNo + 1; |
---|
| 516 | sendPtr32[1] = ACK; |
---|
| 517 | sendPtr32[2] = command; |
---|
| 518 | sendPtr32[3] = 99999; |
---|
| 519 | sendPtr32[4] = 99999; |
---|
| 520 | sendPtr32[5] = 99999; |
---|
| 521 | sendPtr32[6] = (hw_generation<<24)|(numRadios<<16)|(WARPLAB_MAJOR_VER<<8)|(WARPLAB_MINOR_VER); |
---|
| 522 | xilsock_sendto(sock, sendBuffer, 28, (struct sockaddr *)&addr, alen); |
---|
| 523 | break; |
---|
| 524 | |
---|
[1385] | 525 | case TX_DELAY: |
---|
[1418] | 526 | |
---|
[1385] | 527 | ReadWrite = (unsigned int)receivePtr32[2]; |
---|
| 528 | if(0 == ReadWrite) |
---|
| 529 | { |
---|
| 530 | sendPtr32[0] = packetNo + 1; |
---|
| 531 | sendPtr32[1] = ACK; |
---|
| 532 | sendPtr32[2] = command; |
---|
| 533 | |
---|
[1832] | 534 | sendPtr32[3] = warplab_buffers_ReadReg_TxDelay(WARPLAB_BASEADDR); |
---|
[1385] | 535 | |
---|
[1832] | 536 | if(DEBUG_LVL > 2) xil_printf("Read capt offset of %d\n", (unsigned int)receivePtr32[3]); |
---|
[1385] | 537 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 538 | } |
---|
| 539 | if(1 == ReadWrite) |
---|
| 540 | { |
---|
| 541 | //If the user requests a TX_DELAY that's too big, write the maximum instead |
---|
[1832] | 542 | warplab_buffers_WriteReg_TxDelay((unsigned int)receivePtr32[3] > 16383 ? 16383 : (unsigned int)receivePtr32[3]); |
---|
| 543 | if(DEBUG_LVL > 2) xil_printf("Set capt offset to %d\n", (unsigned int)receivePtr32[3]); |
---|
[1385] | 544 | sendACK(packetNo, command); |
---|
| 545 | } |
---|
[1418] | 546 | |
---|
[1385] | 547 | break; |
---|
| 548 | |
---|
| 549 | case TX_LENGTH: |
---|
| 550 | ReadWrite = (unsigned int)receivePtr32[2]; |
---|
| 551 | if(0 == ReadWrite) |
---|
| 552 | { |
---|
| 553 | sendPtr32[0] = packetNo + 1; |
---|
| 554 | sendPtr32[1] = ACK; |
---|
| 555 | sendPtr32[2] = command; |
---|
| 556 | |
---|
[1832] | 557 | sendPtr32[3] = warplab_buffers_ReadReg_TxLength(WARPLAB_BASEADDR); |
---|
[1385] | 558 | |
---|
[1832] | 559 | if(DEBUG_LVL > 2) xil_printf("Read TxLength of %d\n", (unsigned int)receivePtr32[3]); |
---|
[1385] | 560 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 561 | } |
---|
| 562 | if(1 == ReadWrite) |
---|
| 563 | { |
---|
| 564 | //If the user requests a TX_LENGTH that's too big, write the maximum instead |
---|
[1832] | 565 | warplab_buffers_WriteReg_TxLength((unsigned int)receivePtr32[3] > 16383 ? 16383 : (unsigned int)receivePtr32[3]); |
---|
| 566 | if(DEBUG_LVL > 2) xil_printf("Set TxLength to %d\n", (unsigned int)receivePtr32[3]); |
---|
[1385] | 567 | sendACK(packetNo, command); |
---|
| 568 | } |
---|
| 569 | break; |
---|
| 570 | |
---|
| 571 | case TX_MODE: |
---|
| 572 | ReadWrite = (unsigned int)receivePtr32[2]; |
---|
| 573 | if(0 == ReadWrite) |
---|
| 574 | { |
---|
| 575 | sendPtr32[0] = packetNo + 1; |
---|
| 576 | sendPtr32[1] = ACK; |
---|
| 577 | sendPtr32[2] = command; |
---|
| 578 | |
---|
[1832] | 579 | sendPtr32[3] = warplab_buffers_ReadReg_TransMode(WARPLAB_BASEADDR); |
---|
[1385] | 580 | |
---|
| 581 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 582 | } |
---|
| 583 | if(1 == ReadWrite) |
---|
| 584 | { |
---|
[1832] | 585 | warplab_buffers_WriteReg_TransMode((unsigned int)receivePtr32[3]); |
---|
[1385] | 586 | sendACK(packetNo, command); |
---|
| 587 | } |
---|
| 588 | break; |
---|
| 589 | |
---|
| 590 | case MGC_AGC_SEL: |
---|
| 591 | //ReadWrite = (unsigned int)receivePtr32[2]; |
---|
| 592 | MGC_AGC_Sel_Variable = (unsigned int)receivePtr32[2]; |
---|
| 593 | //if(0 == ReadWrite) |
---|
| 594 | //{ |
---|
| 595 | // sendPtr32[0] = packetNo + 1; |
---|
| 596 | // sendPtr32[1] = ACK; |
---|
| 597 | // sendPtr32[2] = command; |
---|
| 598 | |
---|
[1832] | 599 | // sendPtr32[3] = warplab_buffers_4x4_ReadReg_MGC_AGC_SEL(XPAR_WARPLAB_BUFFERS_PLBW_OPBW_0_BASEADDR); |
---|
[1385] | 600 | |
---|
| 601 | // xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 602 | //} |
---|
| 603 | //if(1 == ReadWrite) |
---|
| 604 | //{ |
---|
[1832] | 605 | warplab_buffers_WriteReg_MGC_AGC_SEL(MGC_AGC_Sel_Variable); |
---|
[1385] | 606 | |
---|
| 607 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 608 | { |
---|
[1741] | 609 | warplab_AGC_WriteReg_AGC_EN(0); |
---|
[1385] | 610 | //Set Radios for Manual Gain Control (MGC) |
---|
| 611 | WarpRadio_v1_SoftwareRxGainControl(1, radios); |
---|
| 612 | WarpRadio_v1_RxHpSoftControlEnable(radios); |
---|
| 613 | } |
---|
| 614 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 615 | { |
---|
| 616 | //Set Radios for Automatic Gain Control (AGC) |
---|
| 617 | WarpRadio_v1_SoftwareRxGainControl(0, radios); // RxGains will be controlled by the AGC (AGC Change) |
---|
| 618 | WarpRadio_v1_RxHpSoftControlDisable(radios); // RxHp will be controlled by the AGC (AGC Change) |
---|
| 619 | WarpRadio_v1_RxHighPassCornerFreq(0, radios); // Will set the corner frequency when RxHp is 0? (AGC Change) |
---|
[1832] | 620 | //xil_printf("agctargetINIT = %d\n",agctarget); |
---|
[1385] | 621 | //Set Rx bandwidth; 19MHz |
---|
| 622 | WarpRadio_v1_RxLpfCornFreqCoarseAdj(1, radios); // (AGC Change) |
---|
| 623 | |
---|
| 624 | // Initialize the AGC |
---|
[1741] | 625 | warplab_AGC_Initialize(agcnoiseEst); |
---|
| 626 | warplab_AGC_setNoiseEstimate(agcnoiseEst); |
---|
[1385] | 627 | // ofdm_AGC_FiltSel(0); No decimation option in WARPLab AGC |
---|
[1741] | 628 | warplab_AGC_SetDCO(0); |
---|
| 629 | warplab_AGC_SetTarget(agctarget); |
---|
| 630 | warplab_AGC_Reset(); |
---|
[1385] | 631 | } |
---|
| 632 | |
---|
| 633 | sendACK(packetNo, command); |
---|
| 634 | //} |
---|
| 635 | break; |
---|
| 636 | |
---|
| 637 | case CARRIER_CHANNEL: |
---|
| 638 | Radios_WirelessChan = ((unsigned int)receivePtr32[2]); |
---|
| 639 | |
---|
| 640 | //Channels in [1...37] are valid |
---|
| 641 | // Values in [1...14] select 2.4GHz channels [1...14] |
---|
| 642 | // Values in [15...37] select a 5GHz channels [1...23] |
---|
| 643 | if(Radios_WirelessChan <= (14+23)) |
---|
| 644 | { |
---|
| 645 | if(Radios_WirelessChan <= 14) |
---|
| 646 | WarpRadio_v1_SetCenterFreq2GHz(Radios_WirelessChan, radios); |
---|
| 647 | else |
---|
| 648 | WarpRadio_v1_SetCenterFreq5GHz((Radios_WirelessChan-14), radios); |
---|
| 649 | } |
---|
| 650 | |
---|
| 651 | sendACK(packetNo, command); |
---|
| 652 | break; |
---|
| 653 | |
---|
| 654 | case TX_LPF_CORN_FREQ: |
---|
| 655 | Radios_Tx_LPF_Corn_Freq = ((unsigned int)receivePtr32[2]); |
---|
[1832] | 656 | //xil_printf("Radios_Tx_LPF_Corn_Freq = %d\n",Radios_Tx_LPF_Corn_Freq); |
---|
[1385] | 657 | WarpRadio_v1_TxLpfCornFreqCoarseAdj(Radios_Tx_LPF_Corn_Freq, radios); |
---|
| 658 | sendACK(packetNo, command); |
---|
| 659 | break; |
---|
| 660 | |
---|
| 661 | case RX_LPF_CORN_FREQ: |
---|
| 662 | Radios_Rx_LPF_Corn_Freq = ((unsigned int)receivePtr32[2]); |
---|
[1832] | 663 | //xil_printf("Radios_Rx_LPF_Corn_Freq = %d\n",Radios_Rx_LPF_Corn_Freq); |
---|
[1385] | 664 | WarpRadio_v1_RxLpfCornFreqCoarseAdj(Radios_Rx_LPF_Corn_Freq, radios); |
---|
| 665 | sendACK(packetNo, command); |
---|
| 666 | break; |
---|
| 667 | |
---|
[1832] | 668 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1385] | 669 | case RADIO1_TXGAINS: |
---|
| 670 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 671 | Radio1_TxGain_BB = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 672 | Radio1_TxGain_RF = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 673 | WarpRadio_v1_BaseBandTxGain(Radio1_TxGain_BB, radio1); |
---|
| 674 | WarpRadio_v1_TxVGAGainControl(Radio1_TxGain_RF, radio1); |
---|
| 675 | sendACK(packetNo, command); |
---|
| 676 | break; |
---|
| 677 | |
---|
| 678 | case RADIO1_RXGAINS: |
---|
| 679 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 680 | Radio1_RxGain_RF = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 681 | Radio1_RxGain_BB = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 682 | WarpRadio_v1_RxLNAGainControl(Radio1_RxGain_RF, radio1); |
---|
| 683 | WarpRadio_v1_RxVGAGainControl(Radio1_RxGain_BB, radio1); |
---|
| 684 | sendACK(packetNo, command); |
---|
| 685 | break; |
---|
[1741] | 686 | #endif |
---|
[1385] | 687 | |
---|
| 688 | case RADIO2_TXGAINS: |
---|
| 689 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 690 | Radio2_TxGain_BB = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 691 | Radio2_TxGain_RF = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 692 | WarpRadio_v1_BaseBandTxGain(Radio2_TxGain_BB, radio2); |
---|
| 693 | WarpRadio_v1_TxVGAGainControl(Radio2_TxGain_RF, radio2); |
---|
| 694 | sendACK(packetNo, command); |
---|
| 695 | break; |
---|
| 696 | |
---|
| 697 | case RADIO2_RXGAINS: |
---|
| 698 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 699 | Radio2_RxGain_RF = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 700 | Radio2_RxGain_BB = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 701 | WarpRadio_v1_RxLNAGainControl(Radio2_RxGain_RF, radio2); |
---|
| 702 | WarpRadio_v1_RxVGAGainControl(Radio2_RxGain_BB, radio2); |
---|
| 703 | sendACK(packetNo, command); |
---|
| 704 | break; |
---|
| 705 | |
---|
[1741] | 706 | case RADIO3_TXGAINS: |
---|
| 707 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 708 | Radio3_TxGain_BB = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 709 | Radio3_TxGain_RF = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 710 | WarpRadio_v1_BaseBandTxGain(Radio3_TxGain_BB, radio3); |
---|
| 711 | WarpRadio_v1_TxVGAGainControl(Radio3_TxGain_RF, radio3); |
---|
| 712 | sendACK(packetNo, command); |
---|
| 713 | break; |
---|
[1385] | 714 | |
---|
[1741] | 715 | case RADIO3_RXGAINS: |
---|
| 716 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 717 | Radio3_RxGain_RF = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 718 | Radio3_RxGain_BB = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 719 | WarpRadio_v1_RxLNAGainControl(Radio3_RxGain_RF, radio3); |
---|
| 720 | WarpRadio_v1_RxVGAGainControl(Radio3_RxGain_BB, radio3); |
---|
| 721 | sendACK(packetNo, command); |
---|
| 722 | break; |
---|
| 723 | |
---|
[1832] | 724 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 725 | case RADIO4_TXGAINS: |
---|
| 726 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 727 | Radio4_TxGain_BB = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 728 | Radio4_TxGain_RF = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 729 | WarpRadio_v1_BaseBandTxGain(Radio4_TxGain_BB, radio4); |
---|
| 730 | WarpRadio_v1_TxVGAGainControl(Radio4_TxGain_RF, radio4); |
---|
| 731 | sendACK(packetNo, command); |
---|
| 732 | break; |
---|
| 733 | |
---|
| 734 | case RADIO4_RXGAINS: |
---|
| 735 | //Extract the radio gain config options from the received Ethernet packet |
---|
| 736 | Radio4_RxGain_RF = (((unsigned int)receivePtr32[2])>>16)&0x3; |
---|
| 737 | Radio4_RxGain_BB = ((unsigned int)receivePtr32[2])&0x3F; |
---|
| 738 | WarpRadio_v1_RxLNAGainControl(Radio4_RxGain_RF, radio4); |
---|
| 739 | WarpRadio_v1_RxVGAGainControl(Radio4_RxGain_BB, radio4); |
---|
| 740 | sendACK(packetNo, command); |
---|
| 741 | break; |
---|
| 742 | #endif |
---|
| 743 | |
---|
[1832] | 744 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1385] | 745 | case RADIO1_TXEN: |
---|
| 746 | /***************** Setup the radio board ************/ |
---|
| 747 | |
---|
| 748 | WarpRadio_v1_BaseBandTxGain(Radio1_TxGain_BB, radio1); |
---|
| 749 | WarpRadio_v1_TxVGAGainControl(Radio1_TxGain_RF, radio1); |
---|
| 750 | |
---|
| 751 | //Enable the transmitter |
---|
| 752 | WarpRadio_v1_TxEnable(radio1); |
---|
| 753 | /***************** END Setup the radio board ************/ |
---|
| 754 | |
---|
[1832] | 755 | if(DEBUG_LVL > 1) xil_printf("Radio 1 Tx Enabled\n"); |
---|
[1385] | 756 | sendACK(packetNo, command); |
---|
| 757 | break; |
---|
[1741] | 758 | #endif |
---|
[1385] | 759 | |
---|
| 760 | case RADIO2_TXEN: |
---|
| 761 | /***************** Setup the radio board ************/ |
---|
| 762 | |
---|
| 763 | WarpRadio_v1_BaseBandTxGain(Radio2_TxGain_BB, radio2); |
---|
| 764 | WarpRadio_v1_TxVGAGainControl(Radio2_TxGain_RF, radio2); |
---|
| 765 | |
---|
| 766 | //Enable the transmitter |
---|
| 767 | WarpRadio_v1_TxEnable(radio2); |
---|
| 768 | /***************** END Setup the radio board ************/ |
---|
| 769 | |
---|
[1832] | 770 | if(DEBUG_LVL > 1) xil_printf("Radio 2 Tx Enabled\n"); |
---|
[1385] | 771 | sendACK(packetNo, command); |
---|
| 772 | break; |
---|
| 773 | |
---|
[1741] | 774 | case RADIO3_TXEN: |
---|
| 775 | /***************** Setup the radio board ************/ |
---|
| 776 | |
---|
| 777 | WarpRadio_v1_BaseBandTxGain(Radio3_TxGain_BB, radio3); |
---|
| 778 | WarpRadio_v1_TxVGAGainControl(Radio3_TxGain_RF, radio3); |
---|
| 779 | |
---|
| 780 | //Enable the transmitter |
---|
| 781 | WarpRadio_v1_TxEnable(radio3); |
---|
| 782 | /***************** END Setup the radio board ************/ |
---|
| 783 | |
---|
[1832] | 784 | if(DEBUG_LVL > 1) xil_printf("Radio 3 Tx Enabled\n"); |
---|
[1741] | 785 | sendACK(packetNo, command); |
---|
| 786 | break; |
---|
| 787 | |
---|
[1832] | 788 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 789 | case RADIO4_TXEN: |
---|
| 790 | /***************** Setup the radio board ************/ |
---|
| 791 | |
---|
| 792 | WarpRadio_v1_BaseBandTxGain(Radio4_TxGain_BB, radio4); |
---|
| 793 | WarpRadio_v1_TxVGAGainControl(Radio4_TxGain_RF, radio4); |
---|
| 794 | |
---|
| 795 | //Enable the transmitter |
---|
| 796 | WarpRadio_v1_TxEnable(radio4); |
---|
| 797 | /***************** END Setup the radio board ************/ |
---|
| 798 | |
---|
[1832] | 799 | if(DEBUG_LVL > 1) xil_printf("Radio 4 Tx Enabled\n"); |
---|
[1741] | 800 | sendACK(packetNo, command); |
---|
| 801 | break; |
---|
| 802 | #endif |
---|
| 803 | |
---|
[1832] | 804 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1385] | 805 | case RADIO1_TXDIS: |
---|
| 806 | WarpRadio_v1_TxRxDisable(radio1); |
---|
[1832] | 807 | //if(DEBUG_LVL > 1) xil_printf("Radio 1 Tx Disabled\n"); |
---|
| 808 | if(DEBUG_LVL > 1) xil_printf("Radio 1 Tx Disabled\n"); |
---|
[1385] | 809 | sendACK(packetNo, command); |
---|
| 810 | break; |
---|
[1741] | 811 | #endif |
---|
[1385] | 812 | |
---|
| 813 | case RADIO2_TXDIS: |
---|
| 814 | WarpRadio_v1_TxRxDisable(radio2); |
---|
[1832] | 815 | //if(DEBUG_LVL > 1) xil_printf("Radio 2 Tx Disabled\n"); |
---|
| 816 | if(DEBUG_LVL > 1) xil_printf("Radio 2 Tx Disabled\n"); |
---|
[1385] | 817 | sendACK(packetNo, command); |
---|
| 818 | break; |
---|
| 819 | |
---|
[1741] | 820 | case RADIO3_TXDIS: |
---|
| 821 | WarpRadio_v1_TxRxDisable(radio3); |
---|
[1832] | 822 | //if(DEBUG_LVL > 1) xil_printf("Radio 3 Tx Disabled\n"); |
---|
| 823 | if(DEBUG_LVL > 1) xil_printf("Radio 3 Tx Disabled\n"); |
---|
[1741] | 824 | sendACK(packetNo, command); |
---|
| 825 | break; |
---|
| 826 | |
---|
[1832] | 827 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 828 | case RADIO4_TXDIS: |
---|
| 829 | WarpRadio_v1_TxRxDisable(radio4); |
---|
[1832] | 830 | //if(DEBUG_LVL > 1) xil_printf("Radio 4 Tx Disabled\n"); |
---|
| 831 | if(DEBUG_LVL > 1) xil_printf("Radio 4 Tx Disabled\n"); |
---|
[1741] | 832 | sendACK(packetNo, command); |
---|
| 833 | break; |
---|
| 834 | #endif |
---|
| 835 | |
---|
[1832] | 836 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1385] | 837 | case RADIO1_RXEN: |
---|
| 838 | /***************** Setup the radio board ************/ |
---|
| 839 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 840 | { |
---|
| 841 | // Disable the Rx HP filter |
---|
| 842 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 843 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 844 | // is controlled by the AGC core |
---|
| 845 | WarpRadio_v1_RxHpDisable(radio1); |
---|
| 846 | } |
---|
| 847 | |
---|
| 848 | usleep(10); |
---|
| 849 | |
---|
| 850 | //Enable the receiver |
---|
| 851 | WarpRadio_v1_RxEnable(radio1); |
---|
| 852 | |
---|
| 853 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 854 | { |
---|
| 855 | //Enable this radio's AGC if user has set AGC Mode |
---|
[1741] | 856 | warplab_AGC_WriteReg_RADIO1_AGC_EN(1); |
---|
[1385] | 857 | } |
---|
| 858 | |
---|
| 859 | /***************** END Setup the radio board ************/ |
---|
| 860 | |
---|
[1832] | 861 | //if(DEBUG_LVL > 1) xil_printf("Radio 1 Rx Enabled\n"); |
---|
| 862 | if(DEBUG_LVL > 1) xil_printf("Radio 1 Rx Enabled\n"); |
---|
[1385] | 863 | sendACK(packetNo, command); |
---|
| 864 | break; |
---|
[1741] | 865 | #endif |
---|
[1385] | 866 | |
---|
| 867 | case RADIO2_RXEN: |
---|
| 868 | |
---|
| 869 | /***************** Setup the radio board ************/ |
---|
| 870 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 871 | { |
---|
| 872 | // Disable the Rx HP filter |
---|
| 873 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 874 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 875 | // is controlled by the AGC core |
---|
| 876 | WarpRadio_v1_RxHpDisable(radio2); |
---|
| 877 | } |
---|
| 878 | |
---|
| 879 | usleep(10); |
---|
| 880 | |
---|
| 881 | //Enable the receiver |
---|
| 882 | WarpRadio_v1_RxEnable(radio2); |
---|
| 883 | |
---|
| 884 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 885 | { |
---|
| 886 | //Enable this radio's AGC if user has set AGC Mode |
---|
[1741] | 887 | warplab_AGC_WriteReg_RADIO2_AGC_EN(1); |
---|
[1385] | 888 | } |
---|
| 889 | |
---|
| 890 | /***************** END Setup the radio board ************/ |
---|
| 891 | |
---|
[1832] | 892 | //if(DEBUG_LVL > 1) xil_printf("Radio 2 Rx Enabled\n"); |
---|
| 893 | if(DEBUG_LVL > 1) xil_printf("Radio 2 Rx Enabled\n"); |
---|
[1385] | 894 | sendACK(packetNo, command); |
---|
| 895 | break; |
---|
| 896 | |
---|
[1741] | 897 | case RADIO3_RXEN: |
---|
| 898 | |
---|
| 899 | /***************** Setup the radio board ************/ |
---|
| 900 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 901 | { |
---|
| 902 | // Disable the Rx HP filter |
---|
| 903 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 904 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 905 | // is controlled by the AGC core |
---|
| 906 | WarpRadio_v1_RxHpDisable(radio3); |
---|
| 907 | } |
---|
| 908 | |
---|
| 909 | usleep(10); |
---|
| 910 | |
---|
| 911 | //Enable the receiver |
---|
| 912 | WarpRadio_v1_RxEnable(radio3); |
---|
| 913 | |
---|
| 914 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 915 | { |
---|
| 916 | //Enable this radio's AGC if user has set AGC Mode |
---|
| 917 | warplab_AGC_WriteReg_RADIO3_AGC_EN(1); |
---|
| 918 | } |
---|
| 919 | |
---|
| 920 | /***************** END Setup the radio board ************/ |
---|
| 921 | |
---|
[1832] | 922 | //if(DEBUG_LVL > 1) xil_printf("Radio 3 Rx Enabled\n"); |
---|
| 923 | if(DEBUG_LVL > 1) xil_printf("Radio 3 Rx Enabled\n"); |
---|
[1741] | 924 | sendACK(packetNo, command); |
---|
| 925 | break; |
---|
| 926 | |
---|
[1832] | 927 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 928 | case RADIO4_RXEN: |
---|
| 929 | /***************** Setup the radio board ************/ |
---|
| 930 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 931 | { |
---|
| 932 | // Disable the Rx HP filter |
---|
| 933 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 934 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 935 | // is controlled by the AGC core |
---|
| 936 | WarpRadio_v1_RxHpDisable(radio4); |
---|
| 937 | } |
---|
| 938 | |
---|
| 939 | usleep(10); |
---|
| 940 | |
---|
| 941 | //Enable the receiver |
---|
| 942 | WarpRadio_v1_RxEnable(radio4); |
---|
| 943 | |
---|
| 944 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 945 | { |
---|
| 946 | //Enable this radio's AGC if user has set AGC Mode |
---|
| 947 | warplab_AGC_WriteReg_RADIO4_AGC_EN(1); |
---|
| 948 | } |
---|
| 949 | |
---|
| 950 | /***************** END Setup the radio board ************/ |
---|
| 951 | |
---|
[1832] | 952 | //if(DEBUG_LVL > 1) xil_printf("Radio 4 Rx Enabled\n"); |
---|
| 953 | if(DEBUG_LVL > 1) xil_printf("Radio 4 Rx Enabled\n"); |
---|
[1741] | 954 | sendACK(packetNo, command); |
---|
| 955 | break; |
---|
| 956 | #endif |
---|
| 957 | |
---|
[1832] | 958 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1385] | 959 | case RADIO1_RXDIS: |
---|
| 960 | WarpRadio_v1_TxRxDisable(radio1); |
---|
| 961 | |
---|
| 962 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 963 | { |
---|
| 964 | //Enable the Rx HP filter |
---|
| 965 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 966 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 967 | // is controlled by the AGC core |
---|
| 968 | WarpRadio_v1_RxHpEnable(radio1); |
---|
| 969 | } |
---|
| 970 | |
---|
| 971 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 972 | { |
---|
| 973 | //Disable this radio's AGC if user has set AGC Mode |
---|
[1741] | 974 | warplab_AGC_WriteReg_RADIO1_AGC_EN(0); |
---|
[1385] | 975 | } |
---|
| 976 | |
---|
[1832] | 977 | //if(DEBUG_LVL > 1) xil_printf("Radio 1 Rx Disabled\n"); |
---|
| 978 | if(DEBUG_LVL > 1) xil_printf("Radio 1 Rx Disabled\n"); |
---|
[1385] | 979 | sendACK(packetNo, command); |
---|
| 980 | break; |
---|
[1741] | 981 | #endif |
---|
[1385] | 982 | |
---|
| 983 | case RADIO2_RXDIS: |
---|
| 984 | WarpRadio_v1_TxRxDisable(radio2); |
---|
| 985 | |
---|
| 986 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 987 | { |
---|
| 988 | //Enable the Rx HP filter |
---|
| 989 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 990 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 991 | // is controlled by the AGC core |
---|
| 992 | WarpRadio_v1_RxHpEnable(radio2); |
---|
| 993 | } |
---|
| 994 | |
---|
| 995 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 996 | { |
---|
| 997 | //Disable this radio's AGC if user has set AGC Mode |
---|
[1741] | 998 | warplab_AGC_WriteReg_RADIO2_AGC_EN(0); |
---|
[1385] | 999 | } |
---|
| 1000 | |
---|
[1832] | 1001 | //if(DEBUG_LVL > 1) xil_printf("Radio 2 Rx Disabled\n"); |
---|
| 1002 | if(DEBUG_LVL > 1) xil_printf("Radio 2 Rx Disabled\n"); |
---|
[1385] | 1003 | sendACK(packetNo, command); |
---|
| 1004 | break; |
---|
| 1005 | |
---|
[1741] | 1006 | case RADIO3_RXDIS: |
---|
| 1007 | WarpRadio_v1_TxRxDisable(radio3); |
---|
| 1008 | |
---|
| 1009 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 1010 | { |
---|
| 1011 | //Enable the Rx HP filter |
---|
| 1012 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 1013 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 1014 | // is controlled by the AGC core |
---|
| 1015 | WarpRadio_v1_RxHpEnable(radio3); |
---|
| 1016 | } |
---|
| 1017 | |
---|
| 1018 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 1019 | { |
---|
| 1020 | //Disable this radio's AGC if user has set AGC Mode |
---|
| 1021 | warplab_AGC_WriteReg_RADIO3_AGC_EN(0); |
---|
| 1022 | } |
---|
| 1023 | |
---|
[1832] | 1024 | //if(DEBUG_LVL > 1) xil_printf("Radio 3 Rx Disabled\n"); |
---|
| 1025 | if(DEBUG_LVL > 1) xil_printf("Radio 3 Rx Disabled\n"); |
---|
[1741] | 1026 | sendACK(packetNo, command); |
---|
| 1027 | break; |
---|
| 1028 | |
---|
[1832] | 1029 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 1030 | case RADIO4_RXDIS: |
---|
| 1031 | WarpRadio_v1_TxRxDisable(radio4); |
---|
| 1032 | |
---|
| 1033 | if(0 == MGC_AGC_Sel_Variable) |
---|
| 1034 | { |
---|
| 1035 | //Enable the Rx HP filter |
---|
| 1036 | // Only needed in Manual Gain Control (MGC) Mode |
---|
| 1037 | // In Automatic Gain Control (AGC) Mode, the RxHp |
---|
| 1038 | // is controlled by the AGC core |
---|
| 1039 | WarpRadio_v1_RxHpEnable(radio4); |
---|
| 1040 | } |
---|
| 1041 | |
---|
| 1042 | if(1 == MGC_AGC_Sel_Variable) |
---|
| 1043 | { |
---|
| 1044 | //Disable this radio's AGC if user has set AGC Mode |
---|
| 1045 | warplab_AGC_WriteReg_RADIO4_AGC_EN(0); |
---|
| 1046 | } |
---|
| 1047 | |
---|
[1832] | 1048 | //if(DEBUG_LVL > 1) xil_printf("Radio 4 Rx Disabled\n"); |
---|
| 1049 | if(DEBUG_LVL > 1) xil_printf("Radio 4 Rx Disabled\n"); |
---|
[1741] | 1050 | sendACK(packetNo, command); |
---|
| 1051 | break; |
---|
| 1052 | #endif |
---|
| 1053 | |
---|
[1832] | 1054 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1386] | 1055 | case RADIO1_TXDATA: |
---|
| 1056 | memcpy |
---|
| 1057 | ( |
---|
| 1058 | (unsigned int *)(WARPLAB_TXBUFF_RADIO1 + 4*rxArg0),\ |
---|
| 1059 | (unsigned int *)(receivePtr32 + 3),\ |
---|
| 1060 | (bytesReceived-12) |
---|
| 1061 | ); |
---|
| 1062 | sendACK(packetNo, command); |
---|
| 1063 | break; |
---|
[1741] | 1064 | #endif |
---|
[1386] | 1065 | |
---|
[1385] | 1066 | case RADIO2_TXDATA: |
---|
[1832] | 1067 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 2 Tx (offset: %x)\n",rxArg0); |
---|
| 1068 | //if(DEBUG_LVL > 1) xil_printf("Sample bytes: %x %x %x %x\n", *(unsigned int *)(receivePtr32 + 3), *(unsigned int *)(receivePtr32 + 4), *(unsigned int *)(receivePtr32 + 5), *(unsigned int *)(receivePtr32 + 6)); |
---|
[1385] | 1069 | |
---|
[1832] | 1070 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 2 Tx (offset: %x)\n",rxArg0); |
---|
[1385] | 1071 | |
---|
[1832] | 1072 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 2 Tx (offset: %x)\n",rxArg0); |
---|
[1418] | 1073 | |
---|
[1385] | 1074 | memcpy |
---|
| 1075 | ( |
---|
[1386] | 1076 | (unsigned int *)(WARPLAB_TXBUFF_RADIO2 + 4*rxArg0),\ |
---|
[1385] | 1077 | (unsigned int *)(receivePtr32 + 3),\ |
---|
| 1078 | (bytesReceived-12) |
---|
| 1079 | ); |
---|
[1418] | 1080 | |
---|
[1385] | 1081 | sendACK(packetNo, command); |
---|
| 1082 | break; |
---|
| 1083 | |
---|
[1741] | 1084 | case RADIO3_TXDATA: |
---|
[1832] | 1085 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 3 Tx (offset: %x)\n",rxArg0); |
---|
| 1086 | //if(DEBUG_LVL > 1) xil_printf("Sample bytes: %x %x %x %x\n", *(unsigned int *)(receivePtr32 + 3), *(unsigned int *)(receivePtr32 + 4), *(unsigned int *)(receivePtr32 + 5), *(unsigned int *)(receivePtr32 + 6)); |
---|
[1741] | 1087 | |
---|
[1832] | 1088 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 3 Tx (offset: %x)\n",rxArg0); |
---|
[1741] | 1089 | |
---|
[1832] | 1090 | //if(DEBUG_LVL > 1) xil_printf("Got some data for Radio 3 Tx (offset: %x)\n",rxArg0); |
---|
[1741] | 1091 | /* |
---|
| 1092 | memcpy |
---|
| 1093 | ( |
---|
[1832] | 1094 | (unsigned int *)(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR + warplab_buffers_2x2_SMWO_TxBuff_Radio3_OFFSET + 4*rxArg0),\ |
---|
[1741] | 1095 | (unsigned int *)(receivePtr32 + 3),\ |
---|
| 1096 | (bytesReceived-12) |
---|
| 1097 | ); |
---|
| 1098 | */ |
---|
| 1099 | memcpy |
---|
| 1100 | ( |
---|
| 1101 | (unsigned int *)(WARPLAB_TXBUFF_RADIO3 + 4*rxArg0),\ |
---|
| 1102 | (unsigned int *)(receivePtr32 + 3),\ |
---|
| 1103 | (bytesReceived-12) |
---|
| 1104 | ); |
---|
| 1105 | sendACK(packetNo, command); |
---|
| 1106 | break; |
---|
| 1107 | |
---|
[1832] | 1108 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 1109 | case RADIO4_TXDATA: |
---|
| 1110 | memcpy |
---|
| 1111 | ( |
---|
| 1112 | (unsigned int *)(WARPLAB_TXBUFF_RADIO4 + 4*rxArg0),\ |
---|
| 1113 | (unsigned int *)(receivePtr32 + 3),\ |
---|
| 1114 | (bytesReceived-12) |
---|
| 1115 | ); |
---|
| 1116 | sendACK(packetNo, command); |
---|
| 1117 | break; |
---|
| 1118 | #endif |
---|
| 1119 | |
---|
[1832] | 1120 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1386] | 1121 | case RADIO1_RXDATA: |
---|
| 1122 | memcpy |
---|
| 1123 | ( |
---|
| 1124 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1125 | (unsigned int *)(WARPLAB_RXBUFF_RADIO1 + 4*rxArg0),\ |
---|
| 1126 | 1024 |
---|
| 1127 | ); |
---|
| 1128 | |
---|
| 1129 | sendPtr32[0] = packetNo + 1; |
---|
| 1130 | sendPtr32[1] = ACK; |
---|
| 1131 | sendPtr32[2] = command; |
---|
| 1132 | sendPtr32[3] = rxArg0; |
---|
| 1133 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1134 | break; |
---|
[1741] | 1135 | #endif |
---|
[1386] | 1136 | |
---|
[1385] | 1137 | case RADIO2_RXDATA: |
---|
[1832] | 1138 | //while(warplab_buffers_2x2_ReadReg_CaptureDone(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR) == 0) {} |
---|
[1385] | 1139 | |
---|
| 1140 | /* |
---|
| 1141 | memcpy |
---|
| 1142 | ( |
---|
| 1143 | (unsigned int *)(sendPtr32 + 4), \ |
---|
[1832] | 1144 | (unsigned int *)(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR + warplab_buffers_2x2_SMRO_RxBuff_Radio2_OFFSET + 4*rxArg0),\ |
---|
[1385] | 1145 | 1024 |
---|
| 1146 | ); |
---|
| 1147 | */ |
---|
| 1148 | memcpy |
---|
| 1149 | ( |
---|
| 1150 | (unsigned int *)(sendPtr32 + 4), \ |
---|
[1386] | 1151 | (unsigned int *)(WARPLAB_RXBUFF_RADIO2 + 4*rxArg0),\ |
---|
[1385] | 1152 | 1024 |
---|
| 1153 | ); |
---|
| 1154 | |
---|
[1832] | 1155 | //if(DEBUG_LVL > 1) xil_printf("Read Rx data (offset: %x)\n",rxArg0); |
---|
| 1156 | //if(DEBUG_LVL > 1) xil_printf("Copied 1024 bytes from %x\n",(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR + warplab_buffers_2x2_SMRO_RxBuff_Radio2_OFFSET + rxArg0)); |
---|
[1385] | 1157 | |
---|
| 1158 | sendPtr32[0] = packetNo + 1; |
---|
| 1159 | sendPtr32[1] = ACK; |
---|
| 1160 | sendPtr32[2] = command; |
---|
| 1161 | sendPtr32[3] = rxArg0; |
---|
| 1162 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1163 | break; |
---|
| 1164 | |
---|
[1741] | 1165 | case RADIO3_RXDATA: |
---|
[1832] | 1166 | //while(warplab_buffers_2x2_ReadReg_CaptureDone(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR) == 0) {} |
---|
[1741] | 1167 | |
---|
| 1168 | /* |
---|
| 1169 | memcpy |
---|
| 1170 | ( |
---|
| 1171 | (unsigned int *)(sendPtr32 + 4), \ |
---|
[1832] | 1172 | (unsigned int *)(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR + warplab_buffers_2x2_SMRO_RxBuff_Radio3_OFFSET + 4*rxArg0),\ |
---|
[1741] | 1173 | 1024 |
---|
| 1174 | ); |
---|
| 1175 | */ |
---|
| 1176 | memcpy |
---|
| 1177 | ( |
---|
| 1178 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1179 | (unsigned int *)(WARPLAB_RXBUFF_RADIO3 + 4*rxArg0),\ |
---|
| 1180 | 1024 |
---|
| 1181 | ); |
---|
| 1182 | |
---|
| 1183 | |
---|
[1832] | 1184 | //if(DEBUG_LVL > 1) xil_printf("Read Rx data (offset: %x)\n",rxArg0); |
---|
| 1185 | //if(DEBUG_LVL > 1) xil_printf("Copied 1024 bytes from %x\n",(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR + warplab_buffers_2x2_SMRO_RxBuff_Radio3_OFFSET + rxArg0)); |
---|
[1741] | 1186 | |
---|
| 1187 | sendPtr32[0] = packetNo + 1; |
---|
| 1188 | sendPtr32[1] = ACK; |
---|
| 1189 | sendPtr32[2] = command; |
---|
| 1190 | sendPtr32[3] = rxArg0; |
---|
| 1191 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1192 | break; |
---|
| 1193 | |
---|
[1832] | 1194 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 1195 | case RADIO4_RXDATA: |
---|
| 1196 | memcpy |
---|
| 1197 | ( |
---|
| 1198 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1199 | (unsigned int *)(WARPLAB_RXBUFF_RADIO4 + 4*rxArg0),\ |
---|
| 1200 | 1024 |
---|
| 1201 | ); |
---|
| 1202 | |
---|
| 1203 | sendPtr32[0] = packetNo + 1; |
---|
| 1204 | sendPtr32[1] = ACK; |
---|
| 1205 | sendPtr32[2] = command; |
---|
| 1206 | sendPtr32[3] = rxArg0; |
---|
| 1207 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1208 | break; |
---|
| 1209 | #endif |
---|
| 1210 | |
---|
[1832] | 1211 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1418] | 1212 | case RADIO1_RSSIDATA: |
---|
| 1213 | memcpy |
---|
| 1214 | ( |
---|
| 1215 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1216 | (unsigned int *)(WARPLAB_RSSIBUFF_RADIO1 + 4*rxArg0),\ |
---|
| 1217 | 1024 |
---|
| 1218 | ); |
---|
| 1219 | sendPtr32[0] = packetNo + 1; |
---|
| 1220 | sendPtr32[1] = ACK; |
---|
| 1221 | sendPtr32[2] = command; |
---|
| 1222 | sendPtr32[3] = rxArg0; |
---|
| 1223 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1224 | break; |
---|
[1741] | 1225 | #endif |
---|
[1418] | 1226 | |
---|
[1385] | 1227 | case RADIO2_RSSIDATA: |
---|
[1832] | 1228 | //while(warplab_buffers_2x2_ReadReg_CaptureDone(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR) == 0) {} |
---|
[1385] | 1229 | |
---|
| 1230 | /* |
---|
| 1231 | memcpy |
---|
| 1232 | ( |
---|
| 1233 | (unsigned int *)(sendPtr32 + 4), \ |
---|
[1832] | 1234 | (unsigned int *)(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR + warplab_buffers_2x2_SMRO_RSSIBuff_Radio2_OFFSET + 4*rxArg0),\ |
---|
[1385] | 1235 | 1024 |
---|
| 1236 | ); |
---|
| 1237 | */ |
---|
| 1238 | memcpy |
---|
| 1239 | ( |
---|
| 1240 | (unsigned int *)(sendPtr32 + 4), \ |
---|
[1418] | 1241 | (unsigned int *)(WARPLAB_RSSIBUFF_RADIO2 + 4*rxArg0),\ |
---|
[1385] | 1242 | 1024 |
---|
| 1243 | ); |
---|
| 1244 | |
---|
| 1245 | |
---|
[1832] | 1246 | //if(DEBUG_LVL > 1) xil_printf("Read RSSI data (offset: %x)\n",rxArg0); |
---|
| 1247 | //if(DEBUG_LVL > 1) xil_printf("Copied 1024 bytes from %x\n",(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR + warplab_buffers_2x2_SMRO_RSSIBuff_Radio2_OFFSET + 4*rxArg0)); |
---|
[1385] | 1248 | |
---|
| 1249 | sendPtr32[0] = packetNo + 1; |
---|
| 1250 | sendPtr32[1] = ACK; |
---|
| 1251 | sendPtr32[2] = command; |
---|
| 1252 | sendPtr32[3] = rxArg0; |
---|
| 1253 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1254 | break; |
---|
| 1255 | |
---|
[1741] | 1256 | case RADIO3_RSSIDATA: |
---|
[1832] | 1257 | //while(warplab_buffers_2x2_ReadReg_CaptureDone(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR) == 0) {} |
---|
[1385] | 1258 | |
---|
[1741] | 1259 | /* |
---|
| 1260 | memcpy |
---|
| 1261 | ( |
---|
| 1262 | (unsigned int *)(sendPtr32 + 4), \ |
---|
[1832] | 1263 | (unsigned int *)(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR + warplab_buffers_2x2_SMRO_RSSIBuff_Radio3_OFFSET + 4*rxArg0),\ |
---|
[1741] | 1264 | 1024 |
---|
| 1265 | ); |
---|
| 1266 | */ |
---|
| 1267 | memcpy |
---|
| 1268 | ( |
---|
| 1269 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1270 | (unsigned int *)(WARPLAB_RSSIBUFF_RADIO3 + 4*rxArg0),\ |
---|
| 1271 | 1024 |
---|
| 1272 | ); |
---|
| 1273 | |
---|
| 1274 | |
---|
[1832] | 1275 | //if(DEBUG_LVL > 1) xil_printf("Read RSSI data (offset: %x)\n",rxArg0); |
---|
| 1276 | //if(DEBUG_LVL > 1) xil_printf("Copied 1024 bytes from %x\n",(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR + warplab_buffers_2x2_SMRO_RSSIBuff_Radio3_OFFSET + 4*rxArg0)); |
---|
[1741] | 1277 | |
---|
| 1278 | sendPtr32[0] = packetNo + 1; |
---|
| 1279 | sendPtr32[1] = ACK; |
---|
| 1280 | sendPtr32[2] = command; |
---|
| 1281 | sendPtr32[3] = rxArg0; |
---|
| 1282 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1283 | break; |
---|
| 1284 | |
---|
[1832] | 1285 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 1286 | case RADIO4_RSSIDATA: |
---|
| 1287 | memcpy |
---|
| 1288 | ( |
---|
| 1289 | (unsigned int *)(sendPtr32 + 4), \ |
---|
| 1290 | (unsigned int *)(WARPLAB_RSSIBUFF_RADIO4 + 4*rxArg0),\ |
---|
| 1291 | 1024 |
---|
| 1292 | ); |
---|
| 1293 | sendPtr32[0] = packetNo + 1; |
---|
| 1294 | sendPtr32[1] = ACK; |
---|
| 1295 | sendPtr32[2] = command; |
---|
| 1296 | sendPtr32[3] = rxArg0; |
---|
| 1297 | xilsock_sendto(sock, sendBuffer, 16+1024, (struct sockaddr *)&addr, alen); |
---|
| 1298 | break; |
---|
| 1299 | #endif |
---|
| 1300 | |
---|
[1832] | 1301 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1386] | 1302 | case RADIO1TXBUFF_TXEN: |
---|
[1832] | 1303 | warplab_buffers_WriteReg_RADIO1TXBUFF_TXEN(1); |
---|
[1386] | 1304 | |
---|
| 1305 | sendACK(packetNo, command); |
---|
| 1306 | break; |
---|
[1741] | 1307 | #endif |
---|
[1386] | 1308 | |
---|
[1385] | 1309 | case RADIO2TXBUFF_TXEN: |
---|
[1832] | 1310 | warplab_buffers_WriteReg_RADIO2TXBUFF_TXEN(1); |
---|
[1385] | 1311 | |
---|
| 1312 | sendACK(packetNo, command); |
---|
| 1313 | break; |
---|
| 1314 | |
---|
[1741] | 1315 | case RADIO3TXBUFF_TXEN: |
---|
[1832] | 1316 | warplab_buffers_WriteReg_RADIO3TXBUFF_TXEN(1); |
---|
[1741] | 1317 | |
---|
| 1318 | sendACK(packetNo, command); |
---|
| 1319 | break; |
---|
| 1320 | |
---|
[1832] | 1321 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 1322 | case RADIO4TXBUFF_TXEN: |
---|
[1832] | 1323 | warplab_buffers_WriteReg_RADIO4TXBUFF_TXEN(1); |
---|
[1741] | 1324 | |
---|
| 1325 | sendACK(packetNo, command); |
---|
| 1326 | break; |
---|
| 1327 | #endif |
---|
| 1328 | |
---|
[1832] | 1329 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1386] | 1330 | case RADIO1TXBUFF_TXDIS: |
---|
[1832] | 1331 | warplab_buffers_WriteReg_RADIO1TXBUFF_TXEN(0); |
---|
[1386] | 1332 | |
---|
| 1333 | sendACK(packetNo, command); |
---|
| 1334 | break; |
---|
[1741] | 1335 | #endif |
---|
[1386] | 1336 | |
---|
[1385] | 1337 | case RADIO2TXBUFF_TXDIS: |
---|
[1832] | 1338 | warplab_buffers_WriteReg_RADIO2TXBUFF_TXEN(0); |
---|
[1385] | 1339 | |
---|
| 1340 | sendACK(packetNo, command); |
---|
| 1341 | break; |
---|
| 1342 | |
---|
[1741] | 1343 | case RADIO3TXBUFF_TXDIS: |
---|
[1832] | 1344 | warplab_buffers_WriteReg_RADIO3TXBUFF_TXEN(0); |
---|
[1741] | 1345 | |
---|
| 1346 | sendACK(packetNo, command); |
---|
| 1347 | break; |
---|
| 1348 | |
---|
[1832] | 1349 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 1350 | case RADIO4TXBUFF_TXDIS: |
---|
[1832] | 1351 | warplab_buffers_WriteReg_RADIO4TXBUFF_TXEN(0); |
---|
[1741] | 1352 | |
---|
| 1353 | sendACK(packetNo, command); |
---|
| 1354 | break; |
---|
| 1355 | #endif |
---|
| 1356 | |
---|
[1832] | 1357 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1386] | 1358 | case RADIO1RXBUFF_RXEN: |
---|
[1832] | 1359 | warplab_buffers_WriteReg_RADIO1RXBUFF_RXEN(1); |
---|
[1386] | 1360 | |
---|
| 1361 | sendACK(packetNo, command); |
---|
| 1362 | break; |
---|
[1741] | 1363 | #endif |
---|
[1386] | 1364 | |
---|
[1385] | 1365 | case RADIO2RXBUFF_RXEN: |
---|
[1832] | 1366 | warplab_buffers_WriteReg_RADIO2RXBUFF_RXEN(1); |
---|
[1385] | 1367 | |
---|
| 1368 | sendACK(packetNo, command); |
---|
| 1369 | break; |
---|
| 1370 | |
---|
[1741] | 1371 | case RADIO3RXBUFF_RXEN: |
---|
[1832] | 1372 | warplab_buffers_WriteReg_RADIO3RXBUFF_RXEN(1); |
---|
[1741] | 1373 | |
---|
| 1374 | sendACK(packetNo, command); |
---|
| 1375 | break; |
---|
| 1376 | |
---|
[1832] | 1377 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 1378 | case RADIO4RXBUFF_RXEN: |
---|
[1832] | 1379 | warplab_buffers_WriteReg_RADIO4RXBUFF_RXEN(1); |
---|
[1741] | 1380 | |
---|
| 1381 | sendACK(packetNo, command); |
---|
| 1382 | break; |
---|
| 1383 | #endif |
---|
| 1384 | |
---|
[1832] | 1385 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1386] | 1386 | case RADIO1RXBUFF_RXDIS: |
---|
[1832] | 1387 | warplab_buffers_WriteReg_RADIO1RXBUFF_RXEN(0); |
---|
[1386] | 1388 | |
---|
| 1389 | sendACK(packetNo, command); |
---|
| 1390 | break; |
---|
[1741] | 1391 | #endif |
---|
[1386] | 1392 | |
---|
[1385] | 1393 | case RADIO2RXBUFF_RXDIS: |
---|
[1832] | 1394 | warplab_buffers_WriteReg_RADIO2RXBUFF_RXEN(0); |
---|
[1385] | 1395 | |
---|
| 1396 | sendACK(packetNo, command); |
---|
| 1397 | break; |
---|
| 1398 | |
---|
[1741] | 1399 | case RADIO3RXBUFF_RXDIS: |
---|
[1832] | 1400 | warplab_buffers_WriteReg_RADIO3RXBUFF_RXEN(0); |
---|
[1741] | 1401 | |
---|
| 1402 | sendACK(packetNo, command); |
---|
| 1403 | break; |
---|
| 1404 | |
---|
[1832] | 1405 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 1406 | case RADIO4RXBUFF_RXDIS: |
---|
[1832] | 1407 | warplab_buffers_WriteReg_RADIO4RXBUFF_RXEN(0); |
---|
[1741] | 1408 | |
---|
| 1409 | sendACK(packetNo, command); |
---|
| 1410 | break; |
---|
| 1411 | #endif |
---|
| 1412 | |
---|
[1385] | 1413 | case RX_DONECHECK: |
---|
| 1414 | |
---|
| 1415 | sendPtr32[0] = packetNo + 1; |
---|
| 1416 | sendPtr32[1] = ACK; |
---|
| 1417 | sendPtr32[2] = command; |
---|
| 1418 | |
---|
[1832] | 1419 | if(warplab_buffers_ReadReg_CaptureDone(WARPLAB_BASEADDR) == 0) |
---|
[1385] | 1420 | sendPtr32[3] = 0; |
---|
| 1421 | else |
---|
| 1422 | sendPtr32[3] = 1; |
---|
| 1423 | |
---|
| 1424 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1425 | break; |
---|
| 1426 | |
---|
| 1427 | case RX_DONEREADING: |
---|
[1832] | 1428 | //warplab_buffers_2x2_WriteReg_DoneReading(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR, 1); |
---|
| 1429 | //warplab_buffers_2x2_WriteReg_DoneReading(XPAR_warplab_buffers_2X2_OPBW_0_BASEADDR, 0); |
---|
[1385] | 1430 | |
---|
| 1431 | sendACK(packetNo, command); |
---|
| 1432 | break; |
---|
| 1433 | |
---|
| 1434 | case RX_START: |
---|
[1832] | 1435 | //if(DEBUG_LVL > 1) xil_printf("Starting Rx\n"); |
---|
| 1436 | //if(DEBUG_LVL > 1) xil_printf("Starting Rx\n"); |
---|
[1385] | 1437 | sendACK(packetNo, command); |
---|
| 1438 | |
---|
| 1439 | if(waitForSync() == 0) |
---|
| 1440 | { |
---|
[1832] | 1441 | warplab_buffers_WriteReg_StartCapture(1); |
---|
[1741] | 1442 | warplab_AGC_Start(); |
---|
[1832] | 1443 | warplab_buffers_WriteReg_StartCapture(0); |
---|
[1385] | 1444 | |
---|
[1832] | 1445 | //if(DEBUG_LVL > 1) xil_printf("Capture started\n"); |
---|
[1385] | 1446 | } |
---|
| 1447 | else |
---|
[1832] | 1448 | if(DEBUG_LVL > 1) xil_printf("No MAGIC_SYNC received; canceling Rx Capture\n"); |
---|
[1385] | 1449 | break; |
---|
| 1450 | |
---|
| 1451 | case TX_START: |
---|
[1832] | 1452 | //if(DEBUG_LVL > 1) xil_printf("Starting Tx\n"); |
---|
| 1453 | if(DEBUG_LVL > 1) xil_printf("Starting Tx\n"); |
---|
[1385] | 1454 | sendACK(packetNo, command); |
---|
| 1455 | |
---|
| 1456 | if(waitForSync() == 0) |
---|
| 1457 | { |
---|
[1832] | 1458 | warplab_buffers_WriteReg_StartTx(1); |
---|
| 1459 | warplab_buffers_WriteReg_StartTx(0); |
---|
| 1460 | //if(DEBUG_LVL > 1) xil_printf("Transmit started\n"); |
---|
[1385] | 1461 | } |
---|
| 1462 | else |
---|
[1832] | 1463 | if(DEBUG_LVL > 1) xil_printf("No MAGIC_SYNC received; canceling Tx\n"); |
---|
[1385] | 1464 | break; |
---|
| 1465 | |
---|
| 1466 | case TX_STOP: |
---|
| 1467 | sendACK(packetNo, command); |
---|
| 1468 | |
---|
[1832] | 1469 | warplab_buffers_WriteReg_StopTx(1); |
---|
| 1470 | warplab_buffers_WriteReg_StopTx(0); |
---|
[1385] | 1471 | |
---|
| 1472 | break; |
---|
| 1473 | |
---|
| 1474 | case TXRX_START: |
---|
[1832] | 1475 | if(DEBUG_LVL > 1) xil_printf("Starting TxRX\n"); |
---|
[1385] | 1476 | sendACK(packetNo, command); |
---|
| 1477 | |
---|
| 1478 | if(waitForSync() == 0) |
---|
| 1479 | { |
---|
[1832] | 1480 | warplab_buffers_WriteReg_StartTxRx(1); |
---|
| 1481 | warplab_buffers_WriteReg_StartTxRx(0); |
---|
[1385] | 1482 | } |
---|
| 1483 | else |
---|
[1832] | 1484 | if(DEBUG_LVL > 1) xil_printf("No MAGIC_SYNC received; canceling TxRx\n"); |
---|
[1385] | 1485 | break; |
---|
| 1486 | |
---|
| 1487 | case READ_AGC_DONE_ADDR: |
---|
| 1488 | sendPtr32[0] = packetNo + 1; |
---|
| 1489 | sendPtr32[1] = ACK; |
---|
| 1490 | sendPtr32[2] = command; |
---|
| 1491 | |
---|
[1832] | 1492 | sendPtr32[3] = warplab_buffers_ReadReg_AGCDoneAddr(WARPLAB_BASEADDR); |
---|
[1385] | 1493 | |
---|
| 1494 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1495 | break; |
---|
| 1496 | |
---|
[1832] | 1497 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1386] | 1498 | case READ_RADIO1AGCDONERSSI: |
---|
| 1499 | sendPtr32[0] = packetNo + 1; |
---|
| 1500 | sendPtr32[1] = ACK; |
---|
| 1501 | sendPtr32[2] = command; |
---|
| 1502 | |
---|
[1832] | 1503 | sendPtr32[3] = warplab_buffers_ReadReg_Radio1AGCDoneRSSI(WARPLAB_BASEADDR); |
---|
[1386] | 1504 | |
---|
| 1505 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1506 | break; |
---|
[1741] | 1507 | #endif |
---|
[1386] | 1508 | |
---|
[1385] | 1509 | case READ_RADIO2AGCDONERSSI: |
---|
| 1510 | sendPtr32[0] = packetNo + 1; |
---|
| 1511 | sendPtr32[1] = ACK; |
---|
| 1512 | sendPtr32[2] = command; |
---|
| 1513 | |
---|
[1832] | 1514 | sendPtr32[3] = warplab_buffers_ReadReg_Radio2AGCDoneRSSI(WARPLAB_BASEADDR); |
---|
[1385] | 1515 | |
---|
| 1516 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1517 | break; |
---|
| 1518 | |
---|
[1741] | 1519 | case READ_RADIO3AGCDONERSSI: |
---|
| 1520 | sendPtr32[0] = packetNo + 1; |
---|
| 1521 | sendPtr32[1] = ACK; |
---|
| 1522 | sendPtr32[2] = command; |
---|
| 1523 | |
---|
[1832] | 1524 | sendPtr32[3] = warplab_buffers_ReadReg_Radio3AGCDoneRSSI(WARPLAB_BASEADDR); |
---|
[1741] | 1525 | |
---|
| 1526 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1527 | break; |
---|
| 1528 | |
---|
[1832] | 1529 | #ifdef WARPLAB_CONFIG_4RF |
---|
[1741] | 1530 | case READ_RADIO4AGCDONERSSI: |
---|
| 1531 | sendPtr32[0] = packetNo + 1; |
---|
| 1532 | sendPtr32[1] = ACK; |
---|
| 1533 | sendPtr32[2] = command; |
---|
| 1534 | |
---|
[1832] | 1535 | sendPtr32[3] = warplab_buffers_ReadReg_Radio4AGCDoneRSSI(WARPLAB_BASEADDR); |
---|
[1741] | 1536 | |
---|
| 1537 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1538 | break; |
---|
| 1539 | #endif |
---|
| 1540 | |
---|
[1385] | 1541 | case AGC_RESET: |
---|
[1741] | 1542 | warplab_AGC_Reset(); |
---|
[1385] | 1543 | sendACK(packetNo, command); |
---|
| 1544 | break; |
---|
| 1545 | |
---|
| 1546 | case READ_AGC_GAINS: |
---|
| 1547 | sendPtr32[0] = packetNo + 1; |
---|
| 1548 | sendPtr32[1] = ACK; |
---|
| 1549 | sendPtr32[2] = command; |
---|
| 1550 | |
---|
[1741] | 1551 | sendPtr32[3] = warplab_AGC_GetGains(); |
---|
[1385] | 1552 | |
---|
| 1553 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1554 | break; |
---|
| 1555 | |
---|
| 1556 | case SET_AGC_TARGET_dBm: |
---|
| 1557 | agctarget = (int)receivePtr32[2]; |
---|
[1741] | 1558 | warplab_AGC_SetTarget(agctarget); |
---|
[1832] | 1559 | xil_printf("agctarget = %d\n",agctarget); |
---|
[1385] | 1560 | sendACK(packetNo, command); |
---|
| 1561 | break; |
---|
| 1562 | |
---|
| 1563 | case SET_AGC_DCO_EN_DIS: |
---|
| 1564 | agc_dco_state = (unsigned int)receivePtr32[2]; |
---|
[1741] | 1565 | warplab_AGC_SetDCO(agc_dco_state); |
---|
[1832] | 1566 | warplab_buffers_WriteReg_DCO_EN_SEL(agc_dco_state); |
---|
| 1567 | xil_printf("agc_dco_state = %d\n",agc_dco_state); |
---|
[1385] | 1568 | sendACK(packetNo, command); |
---|
| 1569 | break; |
---|
| 1570 | |
---|
| 1571 | case SET_AGC_NOISEEST_dBm: |
---|
| 1572 | agcnoiseEst = (int)receivePtr32[2]; |
---|
[1741] | 1573 | warplab_AGC_setNoiseEstimate(agcnoiseEst); |
---|
[1832] | 1574 | xil_printf("agctarget = %d\n",agctarget); |
---|
[1385] | 1575 | sendACK(packetNo, command); |
---|
| 1576 | break; |
---|
| 1577 | |
---|
| 1578 | case SET_AGC_THRESHOLDS: |
---|
[1741] | 1579 | warplab_AGC_WriteReg_Thresholds((unsigned int)receivePtr32[2]); |
---|
[1385] | 1580 | sendACK(packetNo, command); |
---|
| 1581 | break; |
---|
| 1582 | |
---|
| 1583 | case SET_AGC_TRIG_DELAY: |
---|
[1741] | 1584 | warplab_AGC_WriteReg_AGC_TRIGGER_DELAY((unsigned int)receivePtr32[2]); |
---|
[1385] | 1585 | sendACK(packetNo, command); |
---|
| 1586 | break; |
---|
| 1587 | |
---|
| 1588 | case READ_AGC_THRESHOLDS: |
---|
| 1589 | sendPtr32[0] = packetNo + 1; |
---|
| 1590 | sendPtr32[1] = ACK; |
---|
| 1591 | sendPtr32[2] = command; |
---|
| 1592 | |
---|
[1832] | 1593 | sendPtr32[3] = warplab_AGC_ReadReg_Thresholds(XPAR_WARPLAB_BUFFERS_PLBW_AGC_PLBW_0_BASEADDR); |
---|
[1385] | 1594 | |
---|
| 1595 | xilsock_sendto(sock, sendBuffer, 16, (struct sockaddr *)&addr, alen); |
---|
| 1596 | break; |
---|
| 1597 | |
---|
| 1598 | case CLOSE: |
---|
[1832] | 1599 | if(DEBUG_LVL > 1) xil_printf("Closing sockets.\n"); |
---|
[1385] | 1600 | sendACK(packetNo, command); |
---|
| 1601 | done = 1; |
---|
| 1602 | |
---|
| 1603 | break; |
---|
| 1604 | |
---|
| 1605 | case TX_TEST: |
---|
[1832] | 1606 | if(DEBUG_LVL > 1) xil_printf("Starting Tx Test\n"); |
---|
[1385] | 1607 | sendACK(packetNo, command); |
---|
| 1608 | |
---|
| 1609 | break; |
---|
| 1610 | |
---|
| 1611 | default: |
---|
[1832] | 1612 | if(DEBUG_LVL > 1) xil_printf("Received command (%d) is not recognized. Please retry transmission.\n", command); |
---|
[1385] | 1613 | |
---|
| 1614 | sendPtr32[0] = packetNo + 1; |
---|
| 1615 | sendPtr32[1] = NOACK; |
---|
| 1616 | bytesSend = 8; |
---|
| 1617 | xilsock_sendto(sock, sendBuffer, bytesSend, (struct sockaddr *)&addr, alen); |
---|
| 1618 | } |
---|
| 1619 | } |
---|
| 1620 | } |
---|
| 1621 | |
---|
| 1622 | shut_socket(); |
---|
| 1623 | |
---|
| 1624 | return 0; |
---|
| 1625 | } |
---|
| 1626 | |
---|
| 1627 | void sendACK(unsigned int packetNo, unsigned int commandToACK) |
---|
| 1628 | { |
---|
| 1629 | sendPtr32[0] = packetNo + 1; |
---|
| 1630 | sendPtr32[1] = ACK; |
---|
| 1631 | sendPtr32[2] = commandToACK; |
---|
| 1632 | xilsock_sendto(sock, sendBuffer, 12, (struct sockaddr *)&addr, alen); |
---|
| 1633 | return; |
---|
| 1634 | } |
---|
| 1635 | |
---|
| 1636 | unsigned char sevenSegmentMap(unsigned char x) |
---|
| 1637 | { |
---|
| 1638 | switch(x) |
---|
| 1639 | { |
---|
| 1640 | case(0x0) : return 0x007E; |
---|
| 1641 | case(0x1) : return 0x0030; |
---|
| 1642 | case(0x2) : return 0x006D; |
---|
| 1643 | case(0x3) : return 0x0079; |
---|
| 1644 | case(0x4) : return 0x0033; |
---|
| 1645 | case(0x5) : return 0x005B; |
---|
| 1646 | case(0x6) : return 0x005F; |
---|
| 1647 | case(0x7) : return 0x0070; |
---|
| 1648 | case(0x8) : return 0x007F; |
---|
| 1649 | case(0x9) : return 0x007B; |
---|
| 1650 | |
---|
| 1651 | case(0xA) : return 0x0077; |
---|
| 1652 | case(0xB) : return 0x007F; |
---|
| 1653 | case(0xC) : return 0x004E; |
---|
| 1654 | case(0xD) : return 0x007E; |
---|
| 1655 | case(0xE) : return 0x004F; |
---|
| 1656 | case(0xF) : return 0x0047; |
---|
| 1657 | default : return 0x0000; |
---|
| 1658 | } |
---|
| 1659 | } |
---|
| 1660 | |
---|
| 1661 | #define XPAR_EEPROM_CONTROLLER_BASEADDR XPAR_EEPROM_CONTROLLER_MEM0_BASEADDR |
---|
| 1662 | //New TxDCO calibration code |
---|
| 1663 | int warpphy_applyTxDCOCalibration(unsigned int radioSelection) |
---|
| 1664 | { |
---|
| 1665 | int eepromStatus = 0; |
---|
| 1666 | short calReadback = 0; |
---|
| 1667 | signed short best_I, best_Q; |
---|
| 1668 | unsigned char radioNum; |
---|
[1741] | 1669 | Xuint8 memory[8], version, revision, valid, i; |
---|
[1385] | 1670 | Xuint16 serial; |
---|
| 1671 | |
---|
| 1672 | //Radio selection will be 0x11111111, 0x22222222, 0x44444444 or 0x88888888 |
---|
| 1673 | // corresponding to radios in slots 1, 2, 3 or 4 |
---|
| 1674 | // We need the slot number to initialize the EEPROM |
---|
| 1675 | radioNum = (radioSelection & 0xF) == 1 ? 1 : ( (radioSelection & 0xF) == 2 ? 2 : ( (radioSelection & 0xF) == 4 ? 3 : 4 ) ); |
---|
[1832] | 1676 | if(DEBUG_LVL>2) xil_printf("Applying TxDCO correction for radio %d\n", radioNum); |
---|
[1385] | 1677 | |
---|
| 1678 | //Mimic the radio test code, in hopes of a more stable EEPROM read... |
---|
| 1679 | //Choose the EEPROM on the selected radio board; second arg is [0,1,2,3,4] for [FPGA, radio1, radio2, radio3, radio4] |
---|
| 1680 | eepromStatus = WarpEEPROM_EEPROMSelect((unsigned int *)XPAR_EEPROM_CONTROLLER_BASEADDR, 0); |
---|
| 1681 | if(eepromStatus != 0) |
---|
| 1682 | { |
---|
[1832] | 1683 | if(DEBUG_LVL>2) xil_printf("EEPROM Select Failed!\n"); |
---|
[1741] | 1684 | return -1; |
---|
[1385] | 1685 | } |
---|
| 1686 | |
---|
| 1687 | //Initialize the EEPROM controller |
---|
| 1688 | eepromStatus = WarpEEPROM_Initialize((unsigned int *)XPAR_EEPROM_CONTROLLER_BASEADDR); |
---|
| 1689 | if(eepromStatus != 0) |
---|
| 1690 | { |
---|
[1832] | 1691 | if(DEBUG_LVL>2) xil_printf("EEPROM Init Returned %x\n", eepromStatus); |
---|
| 1692 | if(DEBUG_LVL>2) xil_printf("EEPROM Init Failed!\n"); |
---|
[1741] | 1693 | return -1; |
---|
[1385] | 1694 | } |
---|
| 1695 | |
---|
| 1696 | //Select the EEPROM on the current radio board |
---|
| 1697 | eepromStatus = WarpEEPROM_EEPROMSelect((unsigned int*)XPAR_EEPROM_CONTROLLER_BASEADDR, radioNum); |
---|
| 1698 | |
---|
| 1699 | if(eepromStatus != 0) |
---|
| 1700 | { |
---|
[1832] | 1701 | if(DEBUG_LVL>2) xil_printf("TxDCO: EEPROM error\n"); |
---|
[1385] | 1702 | return -1; |
---|
| 1703 | } |
---|
| 1704 | |
---|
| 1705 | //Read the first page from the EERPOM |
---|
| 1706 | WarpEEPROM_ReadMem((unsigned int*)XPAR_EEPROM_CONTROLLER_BASEADDR, 0, 0, memory); |
---|
| 1707 | version = (memory[0] & 0xE0) >> 5; |
---|
| 1708 | revision = (memory[1] & 0xE0) >> 5; |
---|
| 1709 | valid = memory[1] & 0x1F; |
---|
| 1710 | |
---|
[1832] | 1711 | if(DEBUG_LVL>2) xil_printf("\n\nEEPROM Values for Radio Board in Slot %d\n", radioNum); |
---|
[1385] | 1712 | |
---|
[1832] | 1713 | if(DEBUG_LVL>2) xil_printf(" WARP Radio Board Version %d.%d\n", version, revision); |
---|
[1385] | 1714 | |
---|
| 1715 | serial = WarpEEPROM_ReadWARPSerial((unsigned int*)XPAR_EEPROM_CONTROLLER_BASEADDR); |
---|
| 1716 | |
---|
[1832] | 1717 | if(DEBUG_LVL>2) xil_printf(" Serial Number (WARP): WR-a-%05d\n", serial); |
---|
[1385] | 1718 | |
---|
| 1719 | WarpEEPROM_ReadDSSerial((unsigned int*)XPAR_EEPROM_CONTROLLER_BASEADDR, memory); |
---|
[1748] | 1720 | if(DEBUG_LVL>2) print(" EEPROM Hard-wired Serial Number: "); |
---|
| 1721 | if(DEBUG_LVL>2){ |
---|
[1385] | 1722 | for(i=1;i<7;i++) |
---|
| 1723 | xil_printf(" %x",memory[7-i]); |
---|
[1832] | 1724 | xil_printf("\n\n"); |
---|
[1748] | 1725 | } |
---|
[1385] | 1726 | //Read the Tx DCO values |
---|
| 1727 | calReadback = WarpEEPROM_ReadRadioCal((unsigned int*)XPAR_EEPROM_CONTROLLER_BASEADDR, 2, 1); |
---|
| 1728 | |
---|
| 1729 | //Scale the stored values |
---|
| 1730 | best_I = (signed short)(((signed char)(calReadback & 0xFF))<<1); |
---|
| 1731 | best_Q = (signed short)(((signed char)((calReadback>>8) & 0xFF))<<1); |
---|
| 1732 | |
---|
[1832] | 1733 | if(DEBUG_LVL>2) xil_printf("TxDCO: Applied values to radio %d - I: %d\tQ: %d\n", radioNum, best_I, best_Q); |
---|
[1385] | 1734 | |
---|
| 1735 | //Finally, write the Tx DCO values to the DAC |
---|
| 1736 | WarpRadio_v1_DACOffsetAdj(ICHAN, best_I, radioSelection); |
---|
| 1737 | WarpRadio_v1_DACOffsetAdj(QCHAN, best_Q, radioSelection); |
---|
[1741] | 1738 | |
---|
[1385] | 1739 | return 0; |
---|
| 1740 | } |
---|
| 1741 | |
---|
[1741] | 1742 | |
---|
| 1743 | void warplab_AGC_Reset() |
---|
| 1744 | { |
---|
| 1745 | // Cycle the agc's software reset port |
---|
| 1746 | |
---|
| 1747 | warplab_AGC_WriteReg_SRESET_IN(1); |
---|
| 1748 | usleep(10); |
---|
| 1749 | warplab_AGC_WriteReg_SRESET_IN(0); |
---|
| 1750 | usleep(100); |
---|
| 1751 | |
---|
| 1752 | return; |
---|
| 1753 | } |
---|
| 1754 | |
---|
| 1755 | void warplab_AGC_MasterReset() |
---|
| 1756 | { |
---|
| 1757 | // Cycle the master reset register in the AGC and enable it |
---|
| 1758 | |
---|
| 1759 | warplab_AGC_WriteReg_AGC_EN(0); |
---|
| 1760 | usleep(10); |
---|
| 1761 | warplab_AGC_WriteReg_MRESET_IN(0); |
---|
| 1762 | usleep(10); |
---|
| 1763 | warplab_AGC_WriteReg_MRESET_IN(1); |
---|
| 1764 | usleep(10); |
---|
| 1765 | warplab_AGC_WriteReg_MRESET_IN(0); |
---|
| 1766 | usleep(10); |
---|
| 1767 | warplab_AGC_WriteReg_AGC_EN(1); |
---|
| 1768 | |
---|
| 1769 | return; |
---|
| 1770 | } |
---|
| 1771 | |
---|
| 1772 | void warplab_AGC_Start() |
---|
| 1773 | { |
---|
| 1774 | // Cycle the agc's packet in port |
---|
| 1775 | warplab_AGC_WriteReg_PACKET_IN(1); |
---|
| 1776 | usleep(10); |
---|
| 1777 | warplab_AGC_WriteReg_PACKET_IN(0); |
---|
| 1778 | usleep(100); |
---|
| 1779 | |
---|
| 1780 | return; |
---|
| 1781 | } |
---|
| 1782 | |
---|
| 1783 | void warplab_AGC_Initialize(int noise_estimate) |
---|
| 1784 | { |
---|
| 1785 | int g_bbset = 0; |
---|
| 1786 | |
---|
| 1787 | // First set all standard parameters |
---|
| 1788 | |
---|
| 1789 | // Turn off both resets and the master enable |
---|
| 1790 | warplab_AGC_WriteReg_AGC_EN(0); |
---|
| 1791 | warplab_AGC_WriteReg_SRESET_IN(0); |
---|
| 1792 | warplab_AGC_WriteReg_MRESET_IN(0); |
---|
| 1793 | |
---|
| 1794 | // An adjustment parameter |
---|
| 1795 | warplab_AGC_WriteReg_ADJ(8); |
---|
| 1796 | |
---|
| 1797 | // Timing for the DC-offset correction |
---|
| 1798 | warplab_AGC_WriteReg_DCO_Timing(0x12001000); |
---|
| 1799 | |
---|
| 1800 | // Initial baseband gain setting |
---|
| 1801 | warplab_AGC_WriteReg_GBB_init(52); |
---|
| 1802 | |
---|
| 1803 | // RF gain AGCstate thresholds |
---|
| 1804 | warplab_AGC_WriteReg_Thresholds(0xD5CBA6); |
---|
| 1805 | |
---|
| 1806 | // Overall AGC timing |
---|
| 1807 | warplab_AGC_WriteReg_Timing(0x9A962A28);//0x826E3C0A; |
---|
| 1808 | |
---|
| 1809 | // vIQ and RSSI average lengths |
---|
| 1810 | warplab_AGC_WriteReg_AVG_LEN(0x10F); //103 |
---|
| 1811 | |
---|
| 1812 | // Disable DCO, disable DCO subtraction |
---|
| 1813 | warplab_AGC_WriteReg_Bits(0x0); |
---|
| 1814 | |
---|
| 1815 | // Compute and set the initial g_BB gain value from the noise estimate |
---|
| 1816 | // The initial g_bb sets noise to -19 db, assuming 32 db RF gain |
---|
| 1817 | |
---|
| 1818 | g_bbset = -19 - 32 - noise_estimate; |
---|
| 1819 | warplab_AGC_WriteReg_GBB_init(g_bbset); |
---|
| 1820 | |
---|
| 1821 | // Perform a master reset |
---|
| 1822 | warplab_AGC_MasterReset(); |
---|
| 1823 | |
---|
| 1824 | // Agc is now reset and enabled, ready to go! |
---|
| 1825 | return; |
---|
| 1826 | } |
---|
| 1827 | |
---|
| 1828 | void warplab_AGC_setNoiseEstimate(int noise_estimate) |
---|
| 1829 | { |
---|
| 1830 | int g_bbset; |
---|
| 1831 | |
---|
| 1832 | g_bbset = -19 - 32 - noise_estimate; |
---|
| 1833 | |
---|
| 1834 | warplab_AGC_WriteReg_GBB_init(g_bbset); |
---|
| 1835 | |
---|
| 1836 | return; |
---|
| 1837 | } |
---|
| 1838 | |
---|
| 1839 | unsigned int warplab_AGC_GetGains(void) |
---|
| 1840 | { |
---|
| 1841 | unsigned int gBB_A, gRF_A, gBB_B, gRF_B, gBB_C, gRF_C, gBB_D, gRF_D, gains; |
---|
| 1842 | |
---|
| 1843 | // Get the gains from the registers |
---|
[1832] | 1844 | gBB_A = warplab_AGC_ReadReg_GBB_A(XPAR_WARPLAB_BUFFERS_PLBW_AGC_PLBW_0_BASEADDR); |
---|
| 1845 | gRF_A = warplab_AGC_ReadReg_GRF_A(XPAR_WARPLAB_BUFFERS_PLBW_AGC_PLBW_0_BASEADDR); |
---|
[1741] | 1846 | |
---|
[1832] | 1847 | gBB_B = warplab_AGC_ReadReg_GBB_B(XPAR_WARPLAB_BUFFERS_PLBW_AGC_PLBW_0_BASEADDR); |
---|
| 1848 | gRF_B = warplab_AGC_ReadReg_GRF_B(XPAR_WARPLAB_BUFFERS_PLBW_AGC_PLBW_0_BASEADDR); |
---|
[1741] | 1849 | |
---|
[1832] | 1850 | gBB_C = warplab_AGC_ReadReg_GBB_C(XPAR_WARPLAB_BUFFERS_PLBW_AGC_PLBW_0_BASEADDR); |
---|
| 1851 | gRF_C = warplab_AGC_ReadReg_GRF_C(XPAR_WARPLAB_BUFFERS_PLBW_AGC_PLBW_0_BASEADDR); |
---|
[1741] | 1852 | |
---|
[1832] | 1853 | gBB_D = warplab_AGC_ReadReg_GBB_D(XPAR_WARPLAB_BUFFERS_PLBW_AGC_PLBW_0_BASEADDR); |
---|
| 1854 | gRF_D = warplab_AGC_ReadReg_GRF_D(XPAR_WARPLAB_BUFFERS_PLBW_AGC_PLBW_0_BASEADDR); |
---|
[1741] | 1855 | |
---|
| 1856 | // First concatenate the two radios together, into the gRF register |
---|
| 1857 | // 2 lowest bits are RF, 5 higher bits are BB, last bit is unused |
---|
| 1858 | // Multiply by 2^2, shift gBB right by 2 bits |
---|
| 1859 | |
---|
| 1860 | gRF_A = gRF_A + (gBB_A * 4); |
---|
| 1861 | gRF_B = gRF_B + (gBB_B * 4); |
---|
| 1862 | gRF_C = gRF_C + (gBB_C * 4); |
---|
| 1863 | gRF_D = gRF_D + (gBB_D * 4); |
---|
| 1864 | |
---|
| 1865 | // Multiply by 2^8 shift gRF right by 8 bits |
---|
| 1866 | |
---|
| 1867 | gains = gRF_A + (gRF_B * 256) + (gRF_C * 65536) + (gRF_D * 16777216); |
---|
| 1868 | |
---|
| 1869 | return gains; |
---|
| 1870 | } |
---|
| 1871 | |
---|
| 1872 | void warplab_AGC_SetTarget(unsigned int target) |
---|
| 1873 | { |
---|
| 1874 | warplab_AGC_WriteReg_T_dB(target); |
---|
| 1875 | return; |
---|
| 1876 | } |
---|
| 1877 | |
---|
| 1878 | void warplab_AGC_SetDCO(unsigned int AGCstate) |
---|
| 1879 | { |
---|
| 1880 | // Enables DCO and DCO subtraction (correction scheme and butterworth hipass are active) |
---|
| 1881 | |
---|
| 1882 | unsigned int bits; |
---|
| 1883 | |
---|
[1832] | 1884 | bits = warplab_AGC_ReadReg_Bits(XPAR_WARPLAB_BUFFERS_PLBW_AGC_PLBW_0_BASEADDR); |
---|
[1741] | 1885 | |
---|
| 1886 | if(AGCstate) |
---|
| 1887 | bits = bits | 0x6; |
---|
| 1888 | else |
---|
| 1889 | bits = bits & 0x1; |
---|
| 1890 | |
---|
| 1891 | warplab_AGC_WriteReg_Bits(bits); |
---|
| 1892 | |
---|
| 1893 | return; |
---|
| 1894 | } |
---|