Model { Name "simple_streaming_txrx" Version 6.6 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.115" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "windows-1252" SaveDefaultBlockParams on SampleTimeColors on LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes on ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off InitFcn "simple_streaming_init" StartFcn "simple_streaming_init" Created "Wed Jul 02 10:11:39 2008" Creator "chunter" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "chunter" ModifiedDateFormat "%" LastModifiedDate "Mon Aug 04 15:41:53 2008" ModelVersionFormat "1.%" ConfigurationManager "None" SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" AccelVerboseBuild off TryForcingSFcnDF off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ProdHWDeviceType "32-bit Generic" ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.2.0" Array { Type "Handle" Dimension 7 Simulink.SolverCC { $ObjectID 2 Version "1.2.0" StartTime "0.0" StopTime "inf" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" Solver "ode45" SolverName "ode45" ZeroCrossControl "UseLocalSettings" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" RateTranMode "Deterministic" } Simulink.DataIOCC { $ObjectID 3 Version "1.2.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on InspectSignalLogs off SaveTime on StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" OutputOption "RefineOutputTimes" OutputTimes "[]" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Array { Type "Cell" Dimension 5 Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "InitFltsAndDblsToZero" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" PropName "DisabledProps" } Version "1.2.0" BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnforceIntegerDowncast on ExpressionFolding on ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero on NoFixptDivByZeroProtection off EfficientFloat2IntCast off OptimizeModelRefInitCode off LifeSpan "inf" BufferReusableBoundary on } Simulink.DebuggingCC { $ObjectID 5 Version "1.2.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" CheckSSInitialOutputMsg on CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" ModelReferenceSimTargetVerbose off UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" StrictBusMsg "Warning" } Simulink.HardwareCC { $ObjectID 6 Version "1.2.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.2.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" ModelReferenceNumInstancesAllowed "Multi" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 8 Array { Type "Cell" Dimension 1 Cell "IncludeHyperlinkInReport" PropName "DisabledProps" } Version "1.2.0" SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 9 Array { Type "Cell" Dimension 16 Cell "IgnoreCustomStorageClasses" Cell "InsertBlockDesc" Cell "SFDataObjDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" PropName "DisabledProps" } Version "1.2.0" ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off PrefixModelToSubsysFcnNames on MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 10 Array { Type "Cell" Dimension 15 Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlComp" "liant" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportNonFinite" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" Cell "PortableWordSizes" PropName "DisabledProps" } Version "1.2.0" TargetFcnLib "ansi_tfl_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" GenFloatMathFcnCalls "ANSI_C" UtilityFuncGeneration "Auto" GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on IncludeMdlTerminateFcn on CombineOutputUpdateFcns off SuppressErrorStatus off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { Orientation "right" ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Arial" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on } BlockParameterDefaults { Block { BlockType ComplexToRealImag Output "Real and imag" SampleTime "-1" } Block { BlockType Concatenate NumInputs "2" ConcatenateDimension "1" } Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutDataTypeMode "Inherit from 'Constant value'" OutDataType "sfix(16)" ConRadixGroup "Use specified scaling" OutScaling "2^0" SampleTime "inf" FramePeriod "inf" } Block { BlockType DataTypeConversion OutDataTypeMode "Inherit via back propagation" OutDataType "sfix(16)" OutScaling "2^0" LockScale off ConvertRealWorld "Real World Value (RWV)" RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType DiscretePulseGenerator PulseType "Sample based" TimeSource "Use simulation time" Amplitude "1" Period "2" PulseWidth "1" PhaseDelay "0" SampleTime "1" VectorParams1D on } Block { BlockType Display Format "short" Decimation "10" Floating off SampleTime "-1" } Block { BlockType From IconDisplay "Tag" } Block { BlockType Gain Gain "1" Multiplication "Element-wise(K.*u)" ParameterDataTypeMode "Same as input" ParameterDataType "sfix(16)" ParameterScalingMode "Best Precision: Matrix-wise" ParameterScaling "2^0" OutDataTypeMode "Same as input" OutDataType "sfix(16)" OutScaling "2^0" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Goto IconDisplay "Tag" } Block { BlockType Ground } Block { BlockType Inport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" DataType "auto" OutDataType "sfix(16)" OutScaling "2^0" SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchByCopyingInsideSignal off Interpolate on } Block { BlockType "M-S-Function" FunctionName "mlfile" DisplayMFileStacktrace on } Block { BlockType Outport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" DataType "auto" OutDataType "sfix(16)" OutScaling "2^0" SignalType "auto" SamplingMode "auto" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType RealImagToComplex Input "Real and imag" ConstantPart "0" SampleTime "-1" } Block { BlockType Reshape OutputDimensionality "1-D array" OutputDimensions "[1,1]" } Block { BlockType Scope ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "-1" } Block { BlockType "S-Function" FunctionName "system" SFunctionModules "''" PortCounts "[]" } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" } Block { BlockType Terminator } Block { BlockType ToWorkspace VariableName "simulink_output" MaxDataPoints "1000" Decimation "1" SampleTime "0" FixptAsFi off } } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Arial" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Arial" FontSize 9 FontWeight "normal" FontAngle "normal" } System { Name "simple_streaming_txrx" Location [100, 74, 1526, 846] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" ReportName "simulink-default.rpt" Block { BlockType Reference Name " System Generator" Tag "genX" Ports [] Position [589, 244, 640, 294] ShowName off AttributesFormatString "System\\nGenerator" UserDataPersistent on UserData "DataTag0" SourceBlock "xbsIndex_r4/ System Generator" SourceType "Xilinx System Generator Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" infoedit " System Generator" xilinxfamily "virtex2p" part "xc2vp70" speed "-6" package "ff1517" synthesis_tool "XST" clock_wrapper "Clock Enables" directory "./netlist" testbench off simulink_period "1/8" sysclk_period "10" dcm_input_clock_period "100" incr_netlist off trim_vbits "Everywhere in SubSystem" dbl_ovrd "According to Block Masks" core_generation "According to Block Masks" run_coregen off deprecated_control off eval_field "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sysgen" block_version "10.1.2" sg_icon_stat "51,50,-1,-1,red,beige,0,07734,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa" "tch([0 51 51 0 ],[0 0 50 50 ],[0.93 0.92 0.86]);\npatch([12 4 16 4 12 25 29 3" "3 47 36 25 17 29 17 25 36 47 33 29 25 12 ],[5 13 25 37 45 45 41 45 45 34 45 3" "7 25 13 5 16 5 5 9 5 5 ],[0.6 0.2 0.25]);\nplot([0 51 51 0 0 ],[0 0 50 50 0 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Channel" Ports [2, 2] Position [620, 105, 660, 165] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Channel" Location [496, 335, 1008, 705] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" Position [25, 38, 55, 52] IconDisplay "Port number" } Block { BlockType Inport Name "Q" Position [25, 108, 55, 122] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "AWGN\nChannel" Ports [1, 1] Position [80, 28, 155, 62] SourceBlock "commchan3/AWGN\nChannel" SourceType "AWGN Channel" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" seed "67" noiseMode "Signal to noise ratio (Eb/No)" EbNodB "40" EsNodB "10" SNRdB "10" bitsPerSym "1" Ps "1" Tsym "1" variance "1" } Block { BlockType Reference Name "AWGN\nChannel1" Ports [1, 1] Position [80, 98, 155, 132] SourceBlock "commchan3/AWGN\nChannel" SourceType "AWGN Channel" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" seed "30" noiseMode "Signal to noise ratio (Eb/No)" EbNodB "40" EsNodB "10" SNRdB "10" bitsPerSym "1" Ps "1" Tsym "1" variance "1" } Block { BlockType Outport Name "IO" Position [180, 38, 210, 52] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "QO" Position [180, 108, 210, 122] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "I" SrcPort 1 DstBlock "AWGN\nChannel" DstPort 1 } Line { SrcBlock "AWGN\nChannel" SrcPort 1 DstBlock "IO" DstPort 1 } Line { SrcBlock "Q" SrcPort 1 DstBlock "AWGN\nChannel1" DstPort 1 } Line { SrcBlock "AWGN\nChannel1" SrcPort 1 DstBlock "QO" DstPort 1 } } } Block { BlockType SubSystem Name "ChipScope" Ports [] Position [1055, 227, 1139, 342] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "ChipScope" Location [179, 78, 1578, 880] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "ChipScope" Ports [14] Position [645, 69, 875, 1016] SourceBlock "xbsIndex_r4/ChipScope" SourceType "Xilinx ChipScope Block" infoedit "Enables run-time debugging and verification" " of signals by inserting ChipScope Pro ICON and ILA cores.

Restricti" "ons:
Only one ChipScope core can be instantiated in a System Generator de" "sign.This block cannot be used at the same time as JTAG hardware co-simulatio" "n.A design or subsystem containing a ChipScope block must have at least one o" "utput port." num_trig_ports "1" current_port "0" show_trig_port "0" match_units "1" match_type "Basic" data_is_trigger off num_data_ports "13" data_depth "8192" SRL16s on match_type_t0 "1" match_type_t1 "1" match_type_t2 "1" match_type_t3 "1" match_type_t4 "1" match_type_t5 "1" match_type_t6 "1" match_type_t7 "1" match_type_t8 "1" match_type_t9 "1" match_type_t10 "1" match_type_t11 "1" match_type_t12 "1" match_type_t13 "1" match_type_t14 "1" match_type_t15 "1" match_units_t0 "1" match_units_t1 "1" match_units_t2 "1" match_units_t3 "1" match_units_t4 "1" match_units_t5 "1" match_units_t6 "1" match_units_t7 "1" match_units_t8 "1" match_units_t9 "1" match_units_t10 "1" match_units_t11 "1" match_units_t12 "1" match_units_t13 "1" match_units_t14 "1" match_units_t15 "1" dbl_ovrd "0" has_advanced_control "0" sggui_pos "20,20,336,501" block_type "chipscope" block_version "10.1" sg_icon_stat "230,947,1,1,white,blue,0,5a9b1a39,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 230 230 0 ],[0 0 947 947 ],[0.77 0.82 0.91]);\npatch([54 16 70 16 " "54 115 131 147 212 161 112 76 130 76 112 161 212 147 131 115 54 ],[383 421 47" "5 529 567 567 551 567 567 516 565 529 475 421 385 434 383 383 399 383 383 ],[" "0.98 0.96 0.92]);\nplot([0 230 230 0 0 ],[0 0 947 947 0 ]);\nfprintf('','COMM" "ENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'trig0');\ncolor('black');port_label('input',2,'Sy" "mbols_Tx_I');\ncolor('black');port_label('input',3,'Symbols_Tx_Q');\ncolor('b" "lack');port_label('input',4,'Symbols_Filt_I');\ncolor('black');port_label('in" "put',5,'Symbols_Filt_Q');\ncolor('black');port_label('input',6,'Upconverted')" ";\ncolor('black');port_label('input',7,'PHASEERROR');\ncolor('black');port_la" "bel('input',8,'CFOINC');\ncolor('black');port_label('input',9,'TED');\ncolor(" "'black');port_label('input',10,'TEDFILT');\ncolor('black');port_label('input'" ",11,'dly');\ncolor('black');port_label('input',12,'Symbols_Rx_I');\ncolor('bl" "ack');port_label('input',13,'Symbols_Rx_Q');\ncolor('black');port_label('inpu" "t',14,'RXINPUT');\nfprintf('','COMMENT: end icon text');\n" sg_list_contents "{'table'=>{'show_trig_port'=>'popup(0)','us" "erSelections'=>{'show_trig_port'=>'0'}}}" } Block { BlockType From Name "From1" Position [435, 232, 530, 268] CloseFcn "tagdialog Close" GotoTag "Symbols_Tx_Q" TagVisibility "global" Port { PortNumber 1 Name "Symbols_Tx_Q" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From10" Position [435, 622, 530, 658] CloseFcn "tagdialog Close" GotoTag "TED" TagVisibility "global" Port { PortNumber 1 Name "TED" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From11" Position [435, 687, 530, 723] CloseFcn "tagdialog Close" GotoTag "TEDFILT" TagVisibility "global" Port { PortNumber 1 Name "TEDFILT" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From12" Position [435, 752, 530, 788] CloseFcn "tagdialog Close" GotoTag "dly" TagVisibility "global" Port { PortNumber 1 Name "dly" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From13" Position [435, 947, 530, 983] CloseFcn "tagdialog Close" GotoTag "RXINPUT" TagVisibility "global" Port { PortNumber 1 Name "RXINPUT" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From2" Position [435, 167, 530, 203] CloseFcn "tagdialog Close" GotoTag "Symbols_Tx_I" TagVisibility "global" Port { PortNumber 1 Name "Symbols_Tx_I" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From3" Position [435, 297, 530, 333] CloseFcn "tagdialog Close" GotoTag "Symbols_Filt_I" TagVisibility "global" Port { PortNumber 1 Name "Symbols_Filt_I" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From4" Position [435, 362, 530, 398] CloseFcn "tagdialog Close" GotoTag "Symbols_Filt_Q" TagVisibility "global" Port { PortNumber 1 Name "Symbols_Filt_Q" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From5" Position [435, 427, 530, 463] CloseFcn "tagdialog Close" GotoTag "Upconverted" TagVisibility "global" Port { PortNumber 1 Name "Upconverted" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From6" Position [435, 492, 530, 528] CloseFcn "tagdialog Close" GotoTag "PHASEERROR" TagVisibility "global" Port { PortNumber 1 Name "PHASEERROR" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From7" Position [435, 557, 530, 593] CloseFcn "tagdialog Close" GotoTag "CFOINC" TagVisibility "global" Port { PortNumber 1 Name "CFOINC" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From8" Position [435, 817, 530, 853] CloseFcn "tagdialog Close" GotoTag "Symbols_Rx_I" TagVisibility "global" Port { PortNumber 1 Name "Symbols_Rx_I" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType From Name "From9" Position [435, 882, 530, 918] CloseFcn "tagdialog Close" GotoTag "Symbols_Rx_Q" TagVisibility "global" Port { PortNumber 1 Name "Symbols_Rx_Q" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "chipscope_trigger" Ports [1, 1] Position [450, 110, 515, 130] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type " "Simulink integer, double and fixed point to Xilinx fixed point type.

Ha" "rdware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "1" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3" "2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In " "','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C" "OMMENT: end icon text');\n" } Line { SrcBlock "chipscope_trigger" SrcPort 1 DstBlock "ChipScope" DstPort 1 } Line { Name "Symbols_Tx_I" Labels [0, 0] SrcBlock "From2" SrcPort 1 DstBlock "ChipScope" DstPort 2 } Line { Name "Symbols_Tx_Q" Labels [0, 0] SrcBlock "From1" SrcPort 1 DstBlock "ChipScope" DstPort 3 } Line { Name "Symbols_Filt_I" Labels [0, 0] SrcBlock "From3" SrcPort 1 DstBlock "ChipScope" DstPort 4 } Line { Name "Symbols_Filt_Q" Labels [0, 0] SrcBlock "From4" SrcPort 1 DstBlock "ChipScope" DstPort 5 } Line { Name "Upconverted" Labels [0, 0] SrcBlock "From5" SrcPort 1 DstBlock "ChipScope" DstPort 6 } Line { Name "PHASEERROR" Labels [0, 0] SrcBlock "From6" SrcPort 1 DstBlock "ChipScope" DstPort 7 } Line { Name "CFOINC" Labels [0, 0] SrcBlock "From7" SrcPort 1 DstBlock "ChipScope" DstPort 8 } Line { Name "TED" Labels [0, 0] SrcBlock "From10" SrcPort 1 DstBlock "ChipScope" DstPort 9 } Line { Name "TEDFILT" Labels [0, 0] SrcBlock "From11" SrcPort 1 DstBlock "ChipScope" DstPort 10 } Line { Name "dly" Labels [0, 0] SrcBlock "From12" SrcPort 1 DstBlock "ChipScope" DstPort 11 } Line { Name "Symbols_Rx_I" Labels [0, 0] SrcBlock "From8" SrcPort 1 DstBlock "ChipScope" DstPort 12 } Line { Name "Symbols_Rx_Q" Labels [0, 0] SrcBlock "From9" SrcPort 1 DstBlock "ChipScope" DstPort 13 } Line { Name "RXINPUT" Labels [0, 0] SrcBlock "From13" SrcPort 1 DstBlock "ChipScope" DstPort 14 } } } Block { BlockType Reference Name "DAC1" Ports [1, 1] Position [1055, 75, 1115, 95] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point" " inputs into ouputs of type Simulink integer, double, or fixed point.

Ha" "rdware notes: In hardware these blocks become top level output ports or are " "discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa" "tch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30" " 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 " "15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic" "on text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_la" "bel('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMM" "ENT: end icon text');\n" } Block { BlockType Reference Name "DAC2" Ports [1, 1] Position [1055, 110, 1115, 130] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point" " inputs into ouputs of type Simulink integer, double, or fixed point.

Ha" "rdware notes: In hardware these blocks become top level output ports or are " "discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa" "tch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30" " 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 " "15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic" "on text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_la" "bel('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMM" "ENT: end icon text');\n" } Block { BlockType Reference Name "DAC3" Ports [1, 1] Position [1055, 145, 1115, 165] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point" " inputs into ouputs of type Simulink integer, double, or fixed point.

Ha" "rdware notes: In hardware these blocks become top level output ports or are " "discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa" "tch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30" " 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 " "15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic" "on text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_la" "bel('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMM" "ENT: end icon text');\n" } Block { BlockType SubSystem Name "DACs" Ports [0, 3] Position [910, 68, 960, 172] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "DACs" Location [293, 74, 954, 602] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Convert" Ports [1, 1] Position [320, 85, 365, 115] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating req" "uire hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2" "3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20" " 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 " "30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert1" Ports [1, 1] Position [320, 270, 365, 300] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating req" "uire hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2" "3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20" " 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 " "30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert2" Ports [1, 1] Position [320, 435, 365, 465] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating req" "uire hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2" "3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20" " 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 " "30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType From Name "From" Position [25, 70, 115, 90] CloseFcn "tagdialog Close" GotoTag "Symbols_Tx_I" TagVisibility "global" } Block { BlockType From Name "From1" Position [25, 105, 115, 125] CloseFcn "tagdialog Close" GotoTag "Symbols_Filt_I" TagVisibility "global" } Block { BlockType From Name "From10" Position [25, 325, 115, 345] CloseFcn "tagdialog Close" GotoTag "Symbols_Rx_Q" TagVisibility "global" } Block { BlockType From Name "From2" Position [25, 35, 115, 55] CloseFcn "tagdialog Close" GotoTag "DAC1SEL" TagVisibility "global" } Block { BlockType From Name "From3" Position [25, 255, 115, 275] CloseFcn "tagdialog Close" GotoTag "Symbols_Tx_Q" TagVisibility "global" } Block { BlockType From Name "From4" Position [25, 290, 115, 310] CloseFcn "tagdialog Close" GotoTag "Symbols_Filt_Q" TagVisibility "global" } Block { BlockType From Name "From5" Position [25, 220, 115, 240] CloseFcn "tagdialog Close" GotoTag "DAC2SEL" TagVisibility "global" } Block { BlockType From Name "From6" Position [25, 440, 115, 460] CloseFcn "tagdialog Close" GotoTag "Upconverted" TagVisibility "global" } Block { BlockType From Name "From7" Position [25, 475, 115, 495] CloseFcn "tagdialog Close" GotoTag "Carrier_I" TagVisibility "global" } Block { BlockType From Name "From8" Position [25, 140, 115, 160] CloseFcn "tagdialog Close" GotoTag "Symbols_Rx_I" TagVisibility "global" } Block { BlockType From Name "From9" Position [25, 405, 115, 425] CloseFcn "tagdialog Close" GotoTag "DAC3SEL" TagVisibility "global" } Block { BlockType Reference Name "Mux" Ports [4, 1] Position [245, 31, 290, 164] SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[17 0 0 34 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "10.1" sg_icon_stat "45,133,1,1,white,blue,3,f9706ab4,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 19 114 133 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 " "22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[49 56 67 78 85 85 82 85 85" " 75 85 78 67 56 49 59 49 49 52 49 49 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 " "],[0 19 114 133 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf(''," "'COMMENT: begin icon text');\ncolor('black');port_label('input',1,'sel');\nco" "lor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3" ",'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');disp('\\b" "f{}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux1" Ports [4, 1] Position [245, 214, 290, 351] SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[17 0 0 34 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "10.1" sg_icon_stat "45,137,1,1,white,blue,3,f9706ab4,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 19.5714 117.429 137 ],[0.77 0.82 0.91]);\npatch([10 3" " 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[51 58 69 80 87 87" " 84 87 87 77 87 80 69 58 51 61 51 51 54 51 51 ],[0.98 0.96 0.92]);\nplot([0 4" "5 45 0 0 ],[0 19.5714 117.429 137 0 ]);\nfprintf('','COMMENT: end icon graphi" "cs');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po" "rt_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor(" "'black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text')" ";\n" } Block { BlockType Reference Name "Mux2" Ports [3, 1] Position [245, 398, 290, 502] SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[9 0 0 17 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1" sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npatch([10 3" " 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 63 70 70" " 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\nplot([0 4" "5 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end icon graphi" "cs');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in" "put',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po" "rt_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on');\nfpr" "intf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale" Ports [1, 1] Position [155, 466, 195, 504] SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting" " the binary point position.

Hardware notes: In hardware this block costs" " nothing." scale_factor "-1" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1" sg_icon_stat "40,38,1,1,white,blue,0,4d520166,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 " "32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 " "50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\bf{2^{-1}}','texmode','on');\nfprint" "f('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale1" Ports [1, 1] Position [135, 61, 175, 99] SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting" " the binary point position.

Hardware notes: In hardware this block costs" " nothing." scale_factor "-1" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1" sg_icon_stat "40,38,1,1,white,blue,0,4d520166,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 " "32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 " "50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\bf{2^{-1}}','texmode','on');\nfprint" "f('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale2" Ports [1, 1] Position [135, 246, 175, 284] SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting" " the binary point position.

Hardware notes: In hardware this block costs" " nothing." scale_factor "-1" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1" sg_icon_stat "40,38,1,1,white,blue,0,4d520166,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 " "32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 " "50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\bf{2^{-1}}','texmode','on');\nfprint" "f('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample" Ports [1, 1] Position [195, 65, 215, 95] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values ca" "n be zeros or copies of the most recent input sample.

Hardware notes: No" " hardware is needed if inserted values are copies of the input sample; otherw" "ise, a mux and single bit flip-flop are used." sample_ratio "8" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1" sg_icon_stat "20,30,1,1,white,blue,0,8b0564a6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 " "34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 " "50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54" " 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}8','tex" "mode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample1" Ports [1, 1] Position [195, 250, 215, 280] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values ca" "n be zeros or copies of the most recent input sample.

Hardware notes: No" " hardware is needed if inserted values are copies of the input sample; otherw" "ise, a mux and single bit flip-flop are used." sample_ratio "8" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1" sg_icon_stat "20,30,1,1,white,blue,0,8b0564a6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 " "34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 " "50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54" " 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}8','tex" "mode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "DAC1" Position [410, 93, 440, 107] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "DAC2" Position [410, 278, 440, 292] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "DAC3" Position [410, 443, 440, 457] Port "3" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "From" SrcPort 1 DstBlock "Scale1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Scale2" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Mux2" DstPort 2 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Scale" DstPort 1 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Mux2" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "DAC1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "DAC2" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "DAC3" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Mux" DstPort 4 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Mux1" DstPort 4 } Line { SrcBlock "Scale" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "Scale1" SrcPort 1 DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "Scale2" SrcPort 1 DstBlock "Up Sample1" DstPort 1 } } } Block { BlockType Reference Name "Discrete-Time\nScatter Plot\nScope" Tag "ScatterPlot" Ports [1] Position [1260, 79, 1335, 131] SourceBlock "commsink2/Discrete-Time\nScatter Plot\nScope" SourceType "Discrete-Time Scatter Plot Scope" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sampPerSymb "1" offsetEye "0" numTraces "40" numNewFrames "10" LineMarkers "." LineColors "b" fading on render on AxisGrid on xMin "-3.3" xMax "3.315" yMin "-3.3" yMax "3.315" inphaseLabel "In-phase Amplitude" quadratureLabel "Quadrature Amplitude" openScopeAtSimStart on FrameNumber off FigPos "get(0,'defaultfigureposition');" figTitle "Scatter Plot" numLinesMax "8" block_type_ "scatter" } Block { BlockType SubSystem Name "EDK Processor" Ports [] Position [661, 243, 723, 307] CopyFcn "xlProcBlockCopyCallback(gcbh);xlBlockMoveCallba" "ck(gcbh);" DeleteFcn "xlDestroyGui(gcbh);" LoadFcn "xlBlockLoadCallback(gcbh);" ModelCloseFcn "xlDestroyGui(gcbh);" PreSaveFcn "xlBlockPreSaveCallback(gcbh);" PostSaveFcn "xlBlockPostSaveCallback(gcbh);" DestroyFcn "xlDestroyGui(gcbh);" OpenFcn "bh=gcbh;xlProcBlockCallbacks('populatesharedmem" "orylistbox',bh);xlOpenGui(bh, 'edkprocessor_gui.xml', @xlProcBlockEnablement," " @xlProcBlockAction)" CloseFcn "xlDestroyGui(gcbh);" MoveFcn "xlBlockMoveCallback(gcbh);" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off MaskType "Xilinx EDK Processor Block" MaskDescription "Xilinx EDK Processor" MaskHelp "eval('');xlDoc('-book','sysgen','-topic','EDK_P" "rocessor');" MaskPromptString "Configure Processor for|EDK Project| |Available" " Memories| | |Bus Type|Base Address| |Lock| |Dual Clocks|Constraint file| |In" "herit Device Type| | | | | | | | | | | | | | | | | | " MaskStyleString "popup(EDK pcore generation|HDL netlisting),edit" ",edit,popup(),edit,edit,popup(PLB|FSL),edit,edit,checkbox,edit,checkbo" "x,edit,edit,checkbox,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,e" "dit,edit,edit,edit,edit,edit,edit" MaskTunableValueString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on" ",on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on" MaskCallbackString "||||||||||||||||||||||||||||||||" MaskEnableString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on" ",on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on" MaskVisibilityString "on,on,off,on,on,off,on,on,off,on,off,on,on,off," "on,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off" MaskToolTipString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on" ",on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on" MaskVarAliasString ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," MaskVariables "mode=&1;xmp=&2;MemVisToProc=&3;AvailableMemorie" "s=&4;portInterfaceTable=&5;bus_type_sgadvanced=&6;bus_type=@7;baseaddr=&8;bas" "eaddr_lock_sgadvanced=&9;baseaddr_lock=@10;dual_clock_sgadvanced=&11;dual_clo" "ck=@12;ucf_file=&13;inheritDeviceType_sgadvanced=&14;inheritDeviceType=@15;cl" "ock_name=&16;internalPortList=&17;resetPolarity=&18;memxtable=&19;procinfo=&2" "0;fslifaceports=&21;memmapdirty=&22;blockname=&23;xpsintstyle=&24;proc=&25;ha" "s_advanced_control=@26;sggui_pos=&27;block_type=&28;block_version=&29;sg_icon" "_stat=&30;sg_mask_display=&31;sg_list_contents=&32;sg_blockgui_xml=&33;" MaskInitialization "try\n tmp_gcb = gcb;\n tmp_gcbh = gcbh;\n if" " (strcmp('SysGenIndex',get_param(bdroot(tmp_gcbh),'tag')) && ~isempty(regexp(" "bdroot(tmp_gcb), '^xbs', 'once')))\n return;\n end;\n xlMungeMaskParams;" "\n serialized_declarations = '{}';\n xledkprocessor_init();\n ptable_ = xl" "blockprep(get_param(tmp_gcb, 'MaskWSVariables'));\ncatch\n global dbgsysgen;" "\n if(~isempty(dbgsysgen) && dbgsysgen)\n e = regexprep(lasterr, '\\n', '" "\\nError: ');\n disp(['Error: While running MaskInit code on block ' tmp_g" "cb ': ' e]);\n error(e);\n end\nend\n" MaskDisplay "fprintf('','COMMENT: begin icon graphics');\npa" "tch([0 62 62 0 ],[0 0 64 64 ],[0.77 0.82 0.91]);\npatch([14 4 19 4 14 30 34 3" "8 56 42 29 19 33 19 29 42 56 38 34 30 14 ],[8 18 33 48 58 58 54 58 58 44 57 4" "7 33 19 9 22 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 62 62 0 0 ],[0 0 64 64 " "0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ndisp('MicroBlaze');\n\nfprintf('','COMMENT: end icon text');\n" MaskSelfModifiable on MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskIconUnits "autoscale" MaskValueString "EDK pcore generation||<" "div> <<cfoEnable>>
Type : UFix_1_0
Addr : 0x80000800

<<cfoK>>
<<cfoKI>>
<<cfoKP>>
<<cfoR" "eset>>
<<dac1Sel>><" "br>
<<dac2Sel>>
<<dac3Sel>>
<<downConv>>
<<initialDelay>>
<&" "lt;otrBenefit>>
Type : UFix_32_0
Addr : 0x80000828
&" "lt;<otrCost>>
<<rxInpu" "tSel>>
<<timingK>><" "br>
<<timingKI>>
<<timingKP>>
<<timingReset>>
<<txModSel>>
<" ";<upConv>>
Type : UFix_32_0
Addr : 0x80000848
&l" "t;<otr>>
Type : UFix_32_0
Addr : 0x80000850
<" ";<rssi>>
Type : UFix_32_0
Addr : 0x80000854
<" "<viq>>
<<viqReset>" ">
||{'exposed'=>[],'portdir'=>[],'portname'=>[],'shor" "tname'=>[]}||PLB|0x80000000||off||off|||off|plb|{}|0|{'mlist'=>['simple_strea" "ming_txrx/Registers/From Register16','simple_streaming_txrx/Registers/From Re" "gister12','simple_streaming_txrx/Registers/From Register13','simple_streaming" "_txrx/Registers/From Register14','simple_streaming_txrx/Registers/From Regist" "er11','simple_streaming_txrx/Registers/From Register','simple_streaming_txrx/" "Registers/From Register1','simple_streaming_txrx/Registers/From Register4','s" "imple_streaming_txrx/Registers/From Register5','simple_streaming_txrx/Registe" "rs/From Register15','simple_streaming_txrx/Registers/From Register17','simple" "_streaming_txrx/Registers/From Register18','simple_streaming_txrx/Registers/F" "rom Register6','simple_streaming_txrx/Registers/From Register7','simple_strea" "ming_txrx/Registers/From Register9','simple_streaming_txrx/Registers/From Reg" "ister8','simple_streaming_txrx/Registers/From Register10','simple_streaming_t" "xrx/Registers/From Register2','simple_streaming_txrx/Registers/From Register3" "','simple_streaming_txrx/Registers/To Register2','simple_streaming_txrx/Regis" "ters/To Register1','simple_streaming_txrx/Registers/To Register','simple_stre" "aming_txrx/Registers/From Register19'],'mlname'=>['\\'cfoEnable\\'','\\'cfoK" "\\'','\\'cfoKI\\'','\\'cfoKP\\'','\\'cfoReset\\'','\\'dac1Sel\\'','\\'dac2Sel" "\\'','\\'dac3Sel\\'','\\'downConv\\'','\\'initialDelay\\'','\\'otrBenefit\\''" ",'\\'otrCost\\'','\\'rxInputSel\\'','\\'timingK\\'','\\'timingKI\\'','\\'timi" "ngKP\\'','\\'timingReset\\'','\\'txModSel\\'','\\'upConv\\'','\\'otr\\'','\\'" "rssi\\'','\\'viq\\'','\\'viqReset\\''],'mlstate'=>[1.0000000000000000,0.00000" "000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00" "000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0" ".00000000000000000,1.0000000000000000,0.00000000000000000,0.00000000000000000" ",0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000" "000,0.00000000000000000,1.0000000000000000,1.0000000000000000,1.0000000000000" "000,0.00000000000000000,0.00000000000000000]}|{'xmliface'=>'Xilinx//microblaz" "e//iface.xml'}|[0,0]|off||default||0|20,20,383,441|edkprocessor|2.4|62,64,-1," "-1,white,blue,0,07734,right|fprintf('','COMMENT: begin icon graphics');\npatc" "h([0 62 62 0 ],[0 0 64 64 ],[0.77 0.82 0.91]);\npatch([14 4 19 4 14 30 34 38 " "56 42 29 19 33 19 29 42 56 38 34 30 14 ],[8 18 33 48 58 58 54 58 58 44 57 47 " "33 19 9 22 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 62 62 0 0 ],[0 0 64 64 0 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic" "on text');\nfprintf('','COMMENT: end icon text');\n|{'table'=>{'AvailableMemo" "ries'=>'popup()','userSelections'=>{'AvailableMemories'=>''}}}|" MaskTabNameString ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," System { Name "EDK Processor" Location [514, 109, 754, 491] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Constant Name "Constant" Position [40, 535, 60, 555] } Block { BlockType Constant Name "Constant1" Position [40, 590, 60, 610] } Block { BlockType Constant Name "Constant2" Position [40, 650, 60, 670] } Block { BlockType Constant Name "Constant3" Position [40, 710, 60, 730] } Block { BlockType Constant Name "Constant4" Position [40, 770, 60, 790] } Block { BlockType Reference Name "Constant5" Ports [0, 1] Position [20, 462, 75, 488] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Unsigned" const "0" n_bits "1" bin_pt "0" explicit_period on period "xlGetSimulinkPeriod(gcb)" dsp48_infoedit "The use of this block for DSP48 instruction" "s is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "10.1.2" sg_icon_stat "55,26,1,1,white,blue,0,72d575a1,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2" "7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17" " 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2" "6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMME" "NT: end icon text');\n" Port { PortNumber 1 Name "Sl_wait" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Constant Name "Constant6" Position [40, 885, 60, 905] } Block { BlockType Reference Name "From Register" Ports [0, 1] Position [260, 957, 320, 1013] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'otr'" init "0" period "xlGetSimulinkPeriod(gcb)" ownership "Owned and initialized elsewhere" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" Port { PortNumber 1 Name "otr_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register1" Ports [0, 1] Position [260, 1042, 320, 1098] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'rssi'" init "0" period "xlGetSimulinkPeriod(gcb)" ownership "Owned and initialized elsewhere" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" Port { PortNumber 1 Name "rssi_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "From Register2" Ports [0, 1] Position [260, 1127, 320, 1183] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'viq'" init "0" period "xlGetSimulinkPeriod(gcb)" ownership "Owned and initialized elsewhere" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" Port { PortNumber 1 Name "viq_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_ABus" Ports [1, 1] Position [110, 590, 175, 610] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type " "Simulink integer, double and fixed point to Xilinx fixed point type.

Ha" "rdware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "32" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'PLB_ABus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.2" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3" "2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In " "','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C" "OMMENT: end icon text');\n" Port { PortNumber 1 Name "PLB_ABus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_PAValid" Ports [1, 1] Position [110, 650, 175, 670] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type " "Simulink integer, double and fixed point to Xilinx fixed point type.

Ha" "rdware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "1" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'PLB_PAValid'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.2" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3" "2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In " "','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C" "OMMENT: end icon text');\n" Port { PortNumber 1 Name "PLB_PAValid" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_RNW" Ports [1, 1] Position [110, 710, 175, 730] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type " "Simulink integer, double and fixed point to Xilinx fixed point type.

Ha" "rdware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "1" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'PLB_RNW'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.2" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3" "2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In " "','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C" "OMMENT: end icon text');\n" Port { PortNumber 1 Name "PLB_RNW" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_wrDBus" Ports [1, 1] Position [110, 770, 175, 790] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type " "Simulink integer, double and fixed point to Xilinx fixed point type.

Ha" "rdware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "32" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'PLB_wrDBus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.2" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3" "2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In " "','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C" "OMMENT: end icon text');\n" Port { PortNumber 1 Name "PLB_wrDBus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "SPLB_Rst" Ports [1, 1] Position [110, 535, 175, 555] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type " "Simulink integer, double and fixed point to Xilinx fixed point type.

Ha" "rdware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "1" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'SPLB_Rst'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.2" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3" "2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In " "','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C" "OMMENT: end icon text');\n" Port { PortNumber 1 Name "SPLB_Rst" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Sl_addrAck" Ports [1, 1] Position [460, 50, 520, 70] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed p" "oint inputs into ouputs of type Simulink integer, double, or fixed point.

<" "P>Hardware notes: In hardware these blocks become top level output ports or " "are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'Sl_addrAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2" "9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por" "t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_rdComp" Ports [1, 1] Position [460, 160, 520, 180] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed p" "oint inputs into ouputs of type Simulink integer, double, or fixed point.

<" "P>Hardware notes: In hardware these blocks become top level output ports or " "are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'Sl_rdComp'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2" "9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por" "t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_rdDAck" Ports [1, 1] Position [460, 760, 520, 780] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed p" "oint inputs into ouputs of type Simulink integer, double, or fixed point.

<" "P>Hardware notes: In hardware these blocks become top level output ports or " "are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'Sl_rdDAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2" "9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por" "t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_rdDBus" Ports [1, 1] Position [460, 1625, 520, 1645] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed p" "oint inputs into ouputs of type Simulink integer, double, or fixed point.

<" "P>Hardware notes: In hardware these blocks become top level output ports or " "are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'Sl_rdDBus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2" "9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por" "t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_wait" Ports [1, 1] Position [110, 465, 170, 485] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed p" "oint inputs into ouputs of type Simulink integer, double, or fixed point.

<" "P>Hardware notes: In hardware these blocks become top level output ports or " "are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'Sl_wait'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2" "9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por" "t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_wrComp" Ports [1, 1] Position [460, 635, 520, 655] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed p" "oint inputs into ouputs of type Simulink integer, double, or fixed point.

<" "P>Hardware notes: In hardware these blocks become top level output ports or " "are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'Sl_wrComp'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2" "9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por" "t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_wrDAck" Ports [1, 1] Position [460, 335, 520, 355] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed p" "oint inputs into ouputs of type Simulink integer, double, or fixed point.

<" "P>Hardware notes: In hardware these blocks become top level output ports or " "are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'Sl_wrDAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2" "9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por" "t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Terminator Name "Terminator" Position [630, 30, 650, 50] ShowName off } Block { BlockType Terminator Name "Terminator1" Position [630, 80, 650, 100] ShowName off } Block { BlockType Terminator Name "Terminator2" Position [630, 225, 650, 245] ShowName off } Block { BlockType Terminator Name "Terminator3" Position [630, 2010, 650, 2030] ShowName off } Block { BlockType Terminator Name "Terminator4" Position [280, 465, 300, 485] ShowName off } Block { BlockType Terminator Name "Terminator5" Position [630, 130, 650, 150] ShowName off } Block { BlockType Terminator Name "Terminator6" Position [630, 180, 650, 200] ShowName off } Block { BlockType Reference Name "To Register" Ports [2, 1] Position [610, 277, 670, 333] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'cfoEnable'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "1" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "cfoEnable_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register1" Ports [2, 1] Position [610, 362, 670, 418] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'cfoK'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "cfoK_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register10" Ports [2, 1] Position [610, 1142, 670, 1198] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'otrBenefit'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "otrBenefit_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register11" Ports [2, 1] Position [610, 1232, 670, 1288] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'otrCost'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "otrCost_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register12" Ports [2, 1] Position [610, 1317, 670, 1373] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'rxInputSel'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "2" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "rxInputSel_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register13" Ports [2, 1] Position [610, 1402, 670, 1458] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'timingK'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "timingK_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register14" Ports [2, 1] Position [610, 1492, 670, 1548] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'timingKI'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "timingKI_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register15" Ports [2, 1] Position [610, 1577, 670, 1633] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'timingKP'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "timingKP_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register16" Ports [2, 1] Position [610, 1662, 670, 1718] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'timingReset'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "1" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "timingReset_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register17" Ports [2, 1] Position [610, 1752, 670, 1808] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'txModSel'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "2" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "txModSel_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register18" Ports [2, 1] Position [610, 1837, 670, 1893] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'upConv'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "upConv_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register19" Ports [2, 1] Position [610, 1922, 670, 1978] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'viqReset'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "1" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "viqReset_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register2" Ports [2, 1] Position [610, 452, 670, 508] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'cfoKI'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "cfoKI_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register3" Ports [2, 1] Position [610, 537, 670, 593] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'cfoKP'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "cfoKP_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register4" Ports [2, 1] Position [610, 622, 670, 678] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'cfoReset'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "1" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "cfoReset_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register5" Ports [2, 1] Position [610, 712, 670, 768] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'dac1Sel'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "2" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "dac1Sel_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register6" Ports [2, 1] Position [610, 797, 670, 853] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'dac2Sel'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "2" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "dac2Sel_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register7" Ports [2, 1] Position [610, 882, 670, 938] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'dac3Sel'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "1" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "dac3Sel_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register8" Ports [2, 1] Position [610, 972, 670, 1028] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'downConv'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "downConv_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "To Register9" Ports [2, 1] Position [610, 1057, 670, 1113] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'initialDelay'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "2" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "initialDelay_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "plb_decode" Ports [7, 9] Position [205, 514, 375, 926] SourceBlock "xbsIndex_r4/MCode" SourceType "Xilinx MCode Block Block" infoedit "Pass input values to a MATLAB function for " "evaluation in Xilinx fixed-point type. The input ports of the block are input" " arguments of the function. The output ports of the block are output argument" "s of the function." mfname "xlmax" explicit_period off period "1" dbl_ovrd off enable_stdout off enable_debug off xl_use_area off xl_area "[0,0,0,0,0,0,0]" mfilecontent "function [wrDBusReg, addrAck, rdComp, wrDAc" "k, bankAddr, RNWReg, rdDAck, rdDBus, linearAddr] = ...\n plb_bus_decode(pl" "bRst, plbABus, plbPAValid, plbRNW, plbWrDBus, rdData, addrPref)\n\n% constant" " variables (TODO: should pass from outside)\nADDRPREF_LEN = 20;\nBANKADDR_LEN" " = 2;\nLINEARADDR_LEN = 8;\nABUS_LEN = 32;\nDBUS_LEN = 32;\n\n% declare and i" "nitialize persistent variables\n% register input bus signals\npersistent plbR" "stReg_, plbRstReg_ = xl_state(0, {xlBoolean});\npersistent plbABusReg_, plbAB" "usReg_ = xl_state(0, {xlUnsigned, ABUS_LEN, 0});\npersistent plbPAValidReg_, " "plbPAValidReg_ = xl_state(0, {xlBoolean});\npersistent plbRNWReg_, plbRNWReg_" " = xl_state(0, {xlUnsigned, 1, 0});\npersistent plbWrDBusReg_, plbWrDBusReg_ " "= xl_state(0, {xlUnsigned, DBUS_LEN, 0});\n\n% ===== rest of the outputs ====" "=\n\nbankAddr = xl_slice(plbABusReg_, 2+BANKADDR_LEN+LINEARADDR_LEN-1, 2+LI" "NEARADDR_LEN);\nlinearAddr = xl_slice(plbABusReg_, 2+LINEARADDR_LEN-1, 2);\nR" "NWReg = plbRNWReg_;\nwrDBusReg = plbWrDBusReg_;\n\n% ===== p_select =====\n\n" "% register PAValid\npersistent aValidReg, aValidReg = xl_state(0, {xlBoolean}" ");\naValidReg = plbPAValidReg_;\n\n% extract and register the address prefix" "\naddrPref_in = xl_slice(plbABusReg_, xl_nbits(plbABusReg_)-1, xl_nbits(plbAB" "usReg_)-ADDRPREF_LEN);\nif addrPref_in == addrPref\n ps1 = true;\nelse \n " " ps1 = false;\nend \n\npersistent ps1Reg, ps1Reg = xl_state(0, ps1);\nps1Re" "g = ps1;\n\nps = xl_and(ps1Reg, aValidReg);\n\n% ===== addrAck =====\n\n% reg" "ister ps\npersistent psReg, psReg = xl_state(0, ps);\n\naddrAck = xfix({xlUns" "igned, 1, 0}, xl_and(xl_not(plbRstReg_), ps, xl_not(psReg)));\n\npsReg = ps;" "\n\n% ===== rdComp, rd/wr DAck =====\n \nrdComp1 = xfix({xlUnsigned, 1, 0}, x" "l_and(addrAck, RNWReg));\n\nNUM_rdCompDelay = 3;\npersistent rdCompDelay, rdC" "ompDelay = xl_state(zeros(1, NUM_rdCompDelay), rdComp1, NUM_rdCompDelay);\nrd" "Comp2 = rdCompDelay.back;\nrdCompDelay.push_front_pop_back(rdComp1);\n\npersi" "stent rdCompReg, rdCompReg = xl_state(0, rdComp1);\nrdComp = rdCompReg;\nrdCo" "mpReg = rdComp2;\n\npersistent rdDAckReg, rdDAckReg = xl_state(0, rdComp1);\n" "rdDAck = rdDAckReg;\nrdDAckReg = rdComp;\n\npersistent wrDAckReg, wrDAckReg =" " xl_state(0, addrAck);\nwrDAck = wrDAckReg;\nwrDAckReg = xl_and(addrAck, xl_n" "ot(RNWReg));\n\n% ===== rdDBus =====\n\nrdSel = xl_or(rdComp2, rdComp);\n\nif" " rdSel == 1\n rdDBus1 = rdData;\nelse\n rdDBus1 = 0;\nend % if\n\npersi" "stent rdDBusReg, rdDBusReg = xl_state(0, rdDBus1);\nrdDBus = rdDBusReg;\nrdDB" "usReg = rdDBus1;\n\n% rdDBus = xl_concat(rdDBus32, rdDBus32);\n% rdDBus = rdD" "Bus32;\n\n% ===== update the persistent variables =====\n\nplbRstReg_ = plbRs" "t;\nplbABusReg_ = plbABus;\nplbPAValidReg_ = plbPAValid;\nplbRNWReg_ = plbRNW" ";\nplbWrDBusReg_ = xl_slice(plbWrDBus, DBUS_LEN-1, 0);\n" suppress_output "1" defparams "{}" hide_port_list "{}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mcode" block_version "10.1.2" sg_icon_stat "170,412,1,1,white,blue,0,8b15b975,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 170 170 0 ],[0 0 412 412 ],[0.77 0.82 0.91]);\npatch([40 12 52 12 " "40 85 97 109 157 119 83 57 97 57 83 119 157 109 97 85 40 ],[139 167 207 247 2" "75 275 263 275 275 237 273 247 207 167 141 177 139 139 151 139 139 ],[0.98 0." "96 0.92]);\nplot([0 170 170 0 0 ],[0 0 412 412 0 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');p" "ort_label('input',1,'plbRst');\ncolor('black');port_label('input',2,'plbABus'" ");\ncolor('black');port_label('input',3,'plbPAValid');\ncolor('black');port_l" "abel('input',4,'plbRNW');\ncolor('black');port_label('input',5,'plbWrDBus');" "\ncolor('black');port_label('input',6,'rdData');\ncolor('black');port_label('" "input',7,'addrPref');\ncolor('black');port_label('output',1,'wrDBusReg');\nco" "lor('black');port_label('output',2,'addrAck');\ncolor('black');port_label('ou" "tput',3,'rdComp');\ncolor('black');port_label('output',4,'wrDAck');\ncolor('b" "lack');port_label('output',5,'bankAddr');\ncolor('black');port_label('output'" ",6,'RNWReg');\ncolor('black');port_label('output',7,'rdDAck');\ncolor('black'" ");port_label('output',8,'rdDBus');\ncolor('black');port_label('output',9,'lin" "earAddr');\ncolor('black');disp('\\bf{xlmax}','texmode','on');\nfprintf('','C" "OMMENT: end icon text');\n" Port { PortNumber 1 Name "wrDBusReg" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "Sl_addrAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "Sl_rdComp" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 4 Name "Sl_wrDAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 5 Name "bankAddr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 6 Name "RNWReg" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 7 Name "Sl_rdDAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 8 Name "Sl_rdDBus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 9 Name "linearAddr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "plb_memmap" Ports [28, 41] Position [405, 929, 575, 1201] SourceBlock "xbsIndex_r4/MCode" SourceType "Xilinx MCode Block Block" infoedit "Pass input values to a MATLAB function for " "evaluation in Xilinx fixed-point type. The input ports of the block are input" " arguments of the function. The output ports of the block are output argument" "s of the function." mfname "xlmax" explicit_period off period "1" dbl_ovrd off enable_stdout off enable_debug off xl_use_area off xl_area "[0,0,0,0,0,0,0]" mfilecontent "function [read_bank_out, sm_cfoEnable_din, " "sm_cfoEnable_en, sm_cfoK_din, sm_cfoK_en, sm_cfoKI_din, sm_cfoKI_en, sm_cfoKP" "_din, sm_cfoKP_en, sm_cfoReset_din, sm_cfoReset_en, sm_dac1Sel_din, sm_dac1Se" "l_en, sm_dac2Sel_din, sm_dac2Sel_en, sm_dac3Sel_din, sm_dac3Sel_en, sm_downCo" "nv_din, sm_downConv_en, sm_initialDelay_din, sm_initialDelay_en, sm_otrBenefi" "t_din, sm_otrBenefit_en, sm_otrCost_din, sm_otrCost_en, sm_rxInputSel_din, sm" "_rxInputSel_en, sm_timingK_din, sm_timingK_en, sm_timingKI_din, sm_timingKI_e" "n, sm_timingKP_din, sm_timingKP_en, sm_timingReset_din, sm_timingReset_en, sm" "_txModSel_din, sm_txModSel_en, sm_upConv_din, sm_upConv_en, sm_viqReset_din, " "sm_viqReset_en] = plb_memmap_select(wrDBus, bankAddr, linearAddr, RNWReg, add" "rAck, sm_otr, sm_rssi, sm_viq, sm_cfoEnable, sm_cfoK, sm_cfoKI, sm_cfoKP, sm_" "cfoReset, sm_dac1Sel, sm_dac2Sel, sm_dac3Sel, sm_downConv, sm_initialDelay, s" "m_otrBenefit, sm_otrCost, sm_rxInputSel, sm_timingK, sm_timingKI, sm_timingKP" ", sm_timingReset, sm_txModSel, sm_upConv, sm_viqReset)\n\n\n% connvert the in" "put data to UFix_32_0 (the bus data type)\n% 'From Register' blocks\n% sm_otr" "_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_otr_bus = xl_force(sm_otr, xlUnsigne" "d, 0);\n\n% sm_rssi_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_rssi_bus = xl_for" "ce(sm_rssi, xlUnsigned, 0);\n\n% sm_viq_bus = xfix({xlUnsigned, 32, 0}, 0);\n" "sm_viq_bus = xl_force(sm_viq, xlUnsigned, 0);\n\n% 'To Register' blocks\n% sm" "_cfoEnable_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_cfoEnable_dout = xl_force" "(sm_cfoEnable, xlUnsigned, 0);\n\n% sm_cfoK_dout = xfix({xlUnsigned, 32, 0}, " "0);\nsm_cfoK_dout = xl_force(sm_cfoK, xlUnsigned, 0);\n\n% sm_cfoKI_dout = xf" "ix({xlUnsigned, 32, 0}, 0);\nsm_cfoKI_dout = xl_force(sm_cfoKI, xlUnsigned, 0" ");\n\n% sm_cfoKP_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_cfoKP_dout = xl_for" "ce(sm_cfoKP, xlUnsigned, 0);\n\n% sm_cfoReset_dout = xfix({xlUnsigned, 32, 0}" ", 0);\nsm_cfoReset_dout = xl_force(sm_cfoReset, xlUnsigned, 0);\n\n% sm_dac1S" "el_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_dac1Sel_dout = xl_force(sm_dac1Se" "l, xlUnsigned, 0);\n\n% sm_dac2Sel_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_d" "ac2Sel_dout = xl_force(sm_dac2Sel, xlUnsigned, 0);\n\n% sm_dac3Sel_dout = xfi" "x({xlUnsigned, 32, 0}, 0);\nsm_dac3Sel_dout = xl_force(sm_dac3Sel, xlUnsigned" ", 0);\n\n% sm_downConv_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_downConv_dout" " = xl_force(sm_downConv, xlUnsigned, 0);\n\n% sm_initialDelay_dout = xfix({xl" "Unsigned, 32, 0}, 0);\nsm_initialDelay_dout = xl_force(sm_initialDelay, xlUns" "igned, 0);\n\n% sm_otrBenefit_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_otrBen" "efit_dout = xl_force(sm_otrBenefit, xlUnsigned, 0);\n\n% sm_otrCost_dout = xf" "ix({xlUnsigned, 32, 0}, 0);\nsm_otrCost_dout = xl_force(sm_otrCost, xlUnsigne" "d, 0);\n\n% sm_rxInputSel_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_rxInputSel" "_dout = xl_force(sm_rxInputSel, xlUnsigned, 0);\n\n% sm_timingK_dout = xfix({" "xlUnsigned, 32, 0}, 0);\nsm_timingK_dout = xl_force(sm_timingK, xlUnsigned, 0" ");\n\n% sm_timingKI_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_timingKI_dout = " "xl_force(sm_timingKI, xlUnsigned, 0);\n\n% sm_timingKP_dout = xfix({xlUnsigne" "d, 32, 0}, 0);\nsm_timingKP_dout = xl_force(sm_timingKP, xlUnsigned, 0);\n\n%" " sm_timingReset_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_timingReset_dout = x" "l_force(sm_timingReset, xlUnsigned, 0);\n\n% sm_txModSel_dout = xfix({xlUnsig" "ned, 32, 0}, 0);\nsm_txModSel_dout = xl_force(sm_txModSel, xlUnsigned, 0);\n" "\n% sm_upConv_dout = xfix({xlUnsigned, 32, 0}, 0);\nsm_upConv_dout = xl_force" "(sm_upConv, xlUnsigned, 0);\n\n% sm_viqReset_dout = xfix({xlUnsigned, 32, 0}," " 0);\nsm_viqReset_dout = xl_force(sm_viqReset, xlUnsigned, 0);\n\n% 'From FIF" "O' blocks\n% 'To FIFO' blocks\n% 'Shared Memory' blocks\n\n% 'dout' ports of " "'From Register' blocks\n\n% registered register mux output\npersistent reg_ba" "nk_out_reg; reg_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nreg_bank_ou" "t = reg_bank_out_reg;\n\nif linearAddr == 20\n reg_bank_out_reg = sm_otr_b" "us;\nelseif linearAddr == 21\n reg_bank_out_reg = sm_rssi_bus;\nelseif lin" "earAddr == 22\n reg_bank_out_reg = sm_viq_bus;\nelseif linearAddr == 0\n " " reg_bank_out_reg = sm_cfoEnable_dout;\nelseif linearAddr == 1\n reg_bank" "_out_reg = sm_cfoK_dout;\nelseif linearAddr == 2\n reg_bank_out_reg = sm_c" "foKI_dout;\nelseif linearAddr == 3\n reg_bank_out_reg = sm_cfoKP_dout;\nel" "seif linearAddr == 4\n reg_bank_out_reg = sm_cfoReset_dout;\nelseif linear" "Addr == 5\n reg_bank_out_reg = sm_dac1Sel_dout;\nelseif linearAddr == 6\n " " reg_bank_out_reg = sm_dac2Sel_dout;\nelseif linearAddr == 7\n reg_bank_" "out_reg = sm_dac3Sel_dout;\nelseif linearAddr == 8\n reg_bank_out_reg = sm" "_downConv_dout;\nelseif linearAddr == 9\n reg_bank_out_reg = sm_initialDel" "ay_dout;\nelseif linearAddr == 10\n reg_bank_out_reg = sm_otrBenefit_dout;" "\nelseif linearAddr == 11\n reg_bank_out_reg = sm_otrCost_dout;\nelseif li" "nearAddr == 12\n reg_bank_out_reg = sm_rxInputSel_dout;\nelseif linearAddr" " == 13\n reg_bank_out_reg = sm_timingK_dout;\nelseif linearAddr == 14\n " " reg_bank_out_reg = sm_timingKI_dout;\nelseif linearAddr == 15\n reg_bank_" "out_reg = sm_timingKP_dout;\nelseif linearAddr == 16\n reg_bank_out_reg = " "sm_timingReset_dout;\nelseif linearAddr == 17\n reg_bank_out_reg = sm_txMo" "dSel_dout;\nelseif linearAddr == 18\n reg_bank_out_reg = sm_upConv_dout;\n" "elseif linearAddr == 19\n reg_bank_out_reg = sm_viqReset_dout;\nend\n\n\n%" " 'From FIFO' and 'To FIFO' blocks\n\n\n\n\n\nopCode = xl_concat(addrAck, RNWR" "eg, bankAddr, linearAddr);\n\n% 'Shared Memory' blocks\n\n\n\n\n\n% 'din' por" "ts of 'Shared Memory' blocks\n\n\n% 'we' ports of 'Shared Memory' blocks\n\n" "\n% 'addr' ports of 'Shared Memory' blocks\n\n\n% 're' ports of 'From FIFO' b" "locks\n\n\n% 'en' ports of 'To Register' blocks\nif opCode == xl_concat(xfix(" "{xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbi" "ts(linearAddr), 0}, 0))\n sm_cfoEnable_en = true;\nelse\n sm_cfoEnable_" "en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 1))\n sm" "_cfoK_en = true;\nelse\n sm_cfoK_en = false;\nend\nif opCode == xl_concat(" "xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, x" "l_nbits(linearAddr), 0}, 2))\n sm_cfoKI_en = true;\nelse\n sm_cfoKI_en " "= false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 3))\n sm_cf" "oKP_en = true;\nelse\n sm_cfoKP_en = false;\nend\nif opCode == xl_concat(x" "fix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl" "_nbits(linearAddr), 0}, 4))\n sm_cfoReset_en = true;\nelse\n sm_cfoRese" "t_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ..." "\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 5))\n " " sm_dac1Sel_en = true;\nelse\n sm_dac1Sel_en = false;\nend\nif opCode == x" "l_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUn" "signed, xl_nbits(linearAddr), 0}, 6))\n sm_dac2Sel_en = true;\nelse\n s" "m_dac2Sel_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 1" "0), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 7" "))\n sm_dac3Sel_en = true;\nelse\n sm_dac3Sel_en = false;\nend\nif opCo" "de == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfi" "x({xlUnsigned, xl_nbits(linearAddr), 0}, 8))\n sm_downConv_en = true;\nels" "e\n sm_downConv_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned," " 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAdd" "r), 0}, 9))\n sm_initialDelay_en = true;\nelse\n sm_initialDelay_en = f" "alse;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 10))\n sm_otrB" "enefit_en = true;\nelse\n sm_otrBenefit_en = false;\nend\nif opCode == xl_" "concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsi" "gned, xl_nbits(linearAddr), 0}, 11))\n sm_otrCost_en = true;\nelse\n sm" "_otrCost_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10" "), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 12" "))\n sm_rxInputSel_en = true;\nelse\n sm_rxInputSel_en = false;\nend\ni" "f opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 13))\n sm_timingK_en = true" ";\nelse\n sm_timingK_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsi" "gned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(line" "arAddr), 0}, 14))\n sm_timingKI_en = true;\nelse\n sm_timingKI_en = fal" "se;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 15))\n sm_timing" "KP_en = true;\nelse\n sm_timingKP_en = false;\nend\nif opCode == xl_concat" "(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, " "xl_nbits(linearAddr), 0}, 16))\n sm_timingReset_en = true;\nelse\n sm_t" "imingReset_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, " "10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, " "17))\n sm_txModSel_en = true;\nelse\n sm_txModSel_en = false;\nend\nif " "opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n " " xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 18))\n sm_upConv_en = true;\n" "else\n sm_upConv_en = false;\nend\nif opCode == xl_concat(xfix({xlUnsigned" ", 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAd" "dr), 0}, 19))\n sm_viqReset_en = true;\nelse\n sm_viqReset_en = false;" "\nend\n\n\n% 'din' ports of 'To FIFO' blocks\n\n\n% 'we' ports of 'To FIFO' b" "locks\n\n\n% 'din' ports of 'To Register' blocks\nsm_cfoEnable_din = xl_force" "(xl_slice(wrDBus, 1 - 1, 0), ...\n xlUnsigned" ", ...\n 0);\nsm_cfoK_din = xl_force(xl_slice(" "wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_cfoKI_din = xl_force(xl_slice(wrDBus, " "32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_cfoKP_din = xl_force(xl_slice(wrDBus, 32 - 1, " "0), ...\n xlUnsigned, ...\n " " 0);\nsm_cfoReset_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), .." ".\n xlUnsigned, ...\n " " 0);\nsm_dac1Sel_din = xl_force(xl_slice(wrDBus, 2 - 1, 0), ...\n " " xlUnsigned, ...\n " " 0);\nsm_dac2Sel_din = xl_force(xl_slice(wrDBus, 2 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\n" "sm_dac3Sel_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_down" "Conv_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_initialDe" "lay_din = xl_force(xl_slice(wrDBus, 2 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_otrBenefit_" "din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n " " xlUnsigned, ...\n 0);\nsm_otrCost_din = " "xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n x" "lUnsigned, ...\n 0);\nsm_rxInputSel_din = xl_" "force(xl_slice(wrDBus, 2 - 1, 0), ...\n xlUns" "igned, ...\n 0);\nsm_timingK_din = xl_force(x" "l_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned," " ...\n 0);\nsm_timingKI_din = xl_force(xl_sli" "ce(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ..." "\n 0);\nsm_timingKP_din = xl_force(xl_slice(w" "rDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_timingReset_din = xl_force(xl_slice(wrD" "Bus, 1 - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_txModSel_din = xl_force(xl_slice(wrDBus, 2" " - 1, 0), ...\n xlUnsigned, ...\n " " 0);\nsm_upConv_din = xl_force(xl_slice(wrDBus, 32 - 1, 0" "), ...\n xlUnsigned, ...\n " " 0);\nsm_viqReset_din = xl_force(xl_slice(wrDBus, 1 - 1, 0), ..." "\n xlUnsigned, ...\n " " 0);\n\n\npersistent read_bank_out_reg; read_bank_out_reg = xl_state(0" ", {xlUnsigned, 32, 0});\nread_bank_out = read_bank_out_reg;\n\npersistent ban" "kAddr_reg; bankAddr_reg = xl_state(0, bankAddr);\n\nif bankAddr_reg == 0\n " " % Bank 0: Shared Memories\n read_bank_out_reg = 0;\nelseif bankAddr_reg =" "= 1\n % Bank 1: From/To FIFOs\n read_bank_out_reg = 0;\nelseif bankAdd" "r_reg == 2\n % Bank 1: From/To Registers\n read_bank_out_reg = reg_bank" "_out;\nelseif bankAddr_reg == 3\n % Bank 1: Configure Registers\n read_" "bank_out_reg = 0;\nend\n\nbankAddr_reg = bankAddr;\n" suppress_output "1" defparams "{}" hide_port_list "{}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mcode" block_version "10.1.2" sg_icon_stat "170,272,1,1,white,blue,0,c94a72c5,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 170 170 0 ],[0 0 272 272 ],[0.77 0.82 0.91]);\npatch([40 12 52 12 " "40 85 97 109 157 119 83 57 97 57 83 119 157 109 97 85 40 ],[69 97 137 177 205" " 205 193 205 205 167 203 177 137 97 71 107 69 69 81 69 69 ],[0.98 0.96 0.92])" ";\nplot([0 170 170 0 0 ],[0 0 272 272 0 ]);\nfprintf('','COMMENT: end icon gr" "aphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'wrDBus');\ncolor('black');port_label('input',2,'bankAddr');\ncolo" "r('black');port_label('input',3,'linearAddr');\ncolor('black');port_label('in" "put',4,'RNWReg');\ncolor('black');port_label('input',5,'addrAck');\ncolor('bl" "ack');port_label('input',6,'sm_otr');\ncolor('black');port_label('input',7,'s" "m_rssi');\ncolor('black');port_label('input',8,'sm_viq');\ncolor('black');por" "t_label('input',9,'sm_cfoEnable');\ncolor('black');port_label('input',10,'sm_" "cfoK');\ncolor('black');port_label('input',11,'sm_cfoKI');\ncolor('black');po" "rt_label('input',12,'sm_cfoKP');\ncolor('black');port_label('input',13,'sm_cf" "oReset');\ncolor('black');port_label('input',14,'sm_dac1Sel');\ncolor('black'" ");port_label('input',15,'sm_dac2Sel');\ncolor('black');port_label('input',16," "'sm_dac3Sel');\ncolor('black');port_label('input',17,'sm_downConv');\ncolor('" "black');port_label('input',18,'sm_initialDelay');\ncolor('black');port_label(" "'input',19,'sm_otrBenefit');\ncolor('black');port_label('input',20,'sm_otrCos" "t');\ncolor('black');port_label('input',21,'sm_rxInputSel');\ncolor('black');" "port_label('input',22,'sm_timingK');\ncolor('black');port_label('input',23,'s" "m_timingKI');\ncolor('black');port_label('input',24,'sm_timingKP');\ncolor('b" "lack');port_label('input',25,'sm_timingReset');\ncolor('black');port_label('i" "nput',26,'sm_txModSel');\ncolor('black');port_label('input',27,'sm_upConv');" "\ncolor('black');port_label('input',28,'sm_viqReset');\ncolor('black');port_l" "abel('output',1,'read_bank_out');\ncolor('black');port_label('output',2,'sm_c" "foEnable_din');\ncolor('black');port_label('output',3,'sm_cfoEnable_en');\nco" "lor('black');port_label('output',4,'sm_cfoK_din');\ncolor('black');port_label" "('output',5,'sm_cfoK_en');\ncolor('black');port_label('output',6,'sm_cfoKI_di" "n');\ncolor('black');port_label('output',7,'sm_cfoKI_en');\ncolor('black');po" "rt_label('output',8,'sm_cfoKP_din');\ncolor('black');port_label('output',9,'s" "m_cfoKP_en');\ncolor('black');port_label('output',10,'sm_cfoReset_din');\ncol" "or('black');port_label('output',11,'sm_cfoReset_en');\ncolor('black');port_la" "bel('output',12,'sm_dac1Sel_din');\ncolor('black');port_label('output',13,'sm" "_dac1Sel_en');\ncolor('black');port_label('output',14,'sm_dac2Sel_din');\ncol" "or('black');port_label('output',15,'sm_dac2Sel_en');\ncolor('black');port_lab" "el('output',16,'sm_dac3Sel_din');\ncolor('black');port_label('output',17,'sm_" "dac3Sel_en');\ncolor('black');port_label('output',18,'sm_downConv_din');\ncol" "or('black');port_label('output',19,'sm_downConv_en');\ncolor('black');port_la" "bel('output',20,'sm_initialDelay_din');\ncolor('black');port_label('output',2" "1,'sm_initialDelay_en');\ncolor('black');port_label('output',22,'sm_otrBenefi" "t_din');\ncolor('black');port_label('output',23,'sm_otrBenefit_en');\ncolor('" "black');port_label('output',24,'sm_otrCost_din');\ncolor('black');port_label(" "'output',25,'sm_otrCost_en');\ncolor('black');port_label('output',26,'sm_rxIn" "putSel_din');\ncolor('black');port_label('output',27,'sm_rxInputSel_en');\nco" "lor('black');port_label('output',28,'sm_timingK_din');\ncolor('black');port_l" "abel('output',29,'sm_timingK_en');\ncolor('black');port_label('output',30,'sm" "_timingKI_din');\ncolor('black');port_label('output',31,'sm_timingKI_en');\nc" "olor('black');port_label('output',32,'sm_timingKP_din');\ncolor('black');port" "_label('output',33,'sm_timingKP_en');\ncolor('black');port_label('output',34," "'sm_timingReset_din');\ncolor('black');port_label('output',35,'sm_timingReset" "_en');\ncolor('black');port_label('output',36,'sm_txModSel_din');\ncolor('bla" "ck');port_label('output',37,'sm_txModSel_en');\ncolor('black');port_label('ou" "tput',38,'sm_upConv_din');\ncolor('black');port_label('output',39,'sm_upConv_" "en');\ncolor('black');port_label('output',40,'sm_viqReset_din');\ncolor('blac" "k');port_label('output',41,'sm_viqReset_en');\ncolor('black');disp('\\bf{xlma" "x}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "rdData" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "cfoEnable_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "cfoEnable_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 4 Name "cfoK_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 5 Name "cfoK_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 6 Name "cfoKI_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 7 Name "cfoKI_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 8 Name "cfoKP_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 9 Name "cfoKP_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 10 Name "cfoReset_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 11 Name "cfoReset_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 12 Name "dac1Sel_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 13 Name "dac1Sel_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 14 Name "dac2Sel_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 15 Name "dac2Sel_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 16 Name "dac3Sel_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 17 Name "dac3Sel_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 18 Name "downConv_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 19 Name "downConv_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 20 Name "initialDelay_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 21 Name "initialDelay_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 22 Name "otrBenefit_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 23 Name "otrBenefit_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 24 Name "otrCost_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 25 Name "otrCost_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 26 Name "rxInputSel_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 27 Name "rxInputSel_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 28 Name "timingK_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 29 Name "timingK_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 30 Name "timingKI_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 31 Name "timingKI_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 32 Name "timingKP_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 33 Name "timingKP_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 34 Name "timingReset_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 35 Name "timingReset_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 36 Name "txModSel_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 37 Name "txModSel_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 38 Name "upConv_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 39 Name "upConv_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 40 Name "viqReset_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 41 Name "viqReset_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "sg_plb_addrpref" Ports [1, 1] Position [110, 885, 175, 905] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type " "Simulink integer, double and fixed point to Xilinx fixed point type.

Ha" "rdware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "20" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_map" "ped_port'=>'sg_plb_addrpref'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.2" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3" "2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In " "','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C" "OMMENT: end icon text');\n" Port { PortNumber 1 Name "addrPref" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Line { Name "Sl_addrAck" SrcBlock "plb_decode" SrcPort 2 Points [0, 0] Branch { Labels [1, 0] Points [5, 0; 0, 385] DstBlock "plb_memmap" DstPort 5 } Branch { Labels [0, 0] Points [30, 0; 0, -525] DstBlock "Sl_addrAck" DstPort 1 } } Line { Name "Sl_wrDAck" SrcBlock "plb_decode" SrcPort 4 Points [0, 0] Branch { Labels [1, 0] Points [30, 0; 0, -330] DstBlock "Sl_wrDAck" DstPort 1 } Branch { Labels [0, 0] Points [30, 0; 0, -30] DstBlock "Sl_wrComp" DstPort 1 } } Line { Name "viqReset_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 41 Points [10, 0; 0, 800] DstBlock "To Register19" DstPort 2 } Line { Name "viqReset_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 40 Points [10, 0; 0, 775] DstBlock "To Register19" DstPort 1 } Line { Name "upConv_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 39 Points [10, 0; 0, 725] DstBlock "To Register18" DstPort 2 } Line { Name "upConv_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 38 Points [10, 0; 0, 700] DstBlock "To Register18" DstPort 1 } Line { Name "txModSel_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 37 Points [10, 0; 0, 650] DstBlock "To Register17" DstPort 2 } Line { Name "txModSel_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 36 Points [10, 0; 0, 625] DstBlock "To Register17" DstPort 1 } Line { Name "timingReset_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 35 Points [10, 0; 0, 570] DstBlock "To Register16" DstPort 2 } Line { Name "timingReset_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 34 Points [10, 0; 0, 545] DstBlock "To Register16" DstPort 1 } Line { Name "timingKP_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 33 Points [10, 0; 0, 495] DstBlock "To Register15" DstPort 2 } Line { Name "timingKP_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 32 Points [10, 0; 0, 470] DstBlock "To Register15" DstPort 1 } Line { Name "timingKI_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 31 Points [10, 0; 0, 420] DstBlock "To Register14" DstPort 2 } Line { Name "timingKI_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 30 Points [10, 0; 0, 395] DstBlock "To Register14" DstPort 1 } Line { Name "timingK_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 29 Points [10, 0; 0, 340] DstBlock "To Register13" DstPort 2 } Line { Name "timingK_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 28 Points [10, 0; 0, 315] DstBlock "To Register13" DstPort 1 } Line { Name "rxInputSel_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 27 Points [10, 0; 0, 265] DstBlock "To Register12" DstPort 2 } Line { Name "rxInputSel_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 26 Points [10, 0; 0, 240] DstBlock "To Register12" DstPort 1 } Line { Name "otrCost_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 25 Points [10, 0; 0, 190] DstBlock "To Register11" DstPort 2 } Line { Name "otrCost_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 24 Points [10, 0; 0, 165] DstBlock "To Register11" DstPort 1 } Line { Name "otrBenefit_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 23 Points [10, 0; 0, 110] DstBlock "To Register10" DstPort 2 } Line { Name "otrBenefit_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 22 Points [10, 0; 0, 85] DstBlock "To Register10" DstPort 1 } Line { Name "initialDelay_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 21 Points [10, 0; 0, 35] DstBlock "To Register9" DstPort 2 } Line { Name "initialDelay_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 20 Points [15, 0] DstBlock "To Register9" DstPort 1 } Line { Name "downConv_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 19 Points [15, 0] DstBlock "To Register8" DstPort 2 } Line { Name "downConv_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 18 Points [10, 0; 0, -65] DstBlock "To Register8" DstPort 1 } Line { Name "dac3Sel_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 17 Points [10, 0; 0, -120] DstBlock "To Register7" DstPort 2 } Line { Name "dac3Sel_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 16 Points [10, 0; 0, -145] DstBlock "To Register7" DstPort 1 } Line { Name "dac2Sel_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 15 Points [10, 0; 0, -195] DstBlock "To Register6" DstPort 2 } Line { Name "dac2Sel_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 14 Points [10, 0; 0, -220] DstBlock "To Register6" DstPort 1 } Line { Name "dac1Sel_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 13 Points [10, 0; 0, -270] DstBlock "To Register5" DstPort 2 } Line { Name "dac1Sel_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 12 Points [10, 0; 0, -295] DstBlock "To Register5" DstPort 1 } Line { Name "cfoReset_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 11 Points [10, 0; 0, -350] DstBlock "To Register4" DstPort 2 } Line { Name "cfoReset_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 10 Points [10, 0; 0, -375] DstBlock "To Register4" DstPort 1 } Line { Name "cfoKP_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 9 Points [10, 0; 0, -425] DstBlock "To Register3" DstPort 2 } Line { Name "cfoKP_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 8 Points [10, 0; 0, -450] DstBlock "To Register3" DstPort 1 } Line { Name "cfoKI_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 7 Points [10, 0; 0, -500] DstBlock "To Register2" DstPort 2 } Line { Name "cfoKI_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 6 Points [10, 0; 0, -525] DstBlock "To Register2" DstPort 1 } Line { Name "cfoK_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 5 Points [10, 0; 0, -580] DstBlock "To Register1" DstPort 2 } Line { Name "cfoK_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 4 Points [10, 0; 0, -605] DstBlock "To Register1" DstPort 1 } Line { Name "cfoEnable_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 3 Points [10, 0; 0, -655] DstBlock "To Register" DstPort 2 } Line { Name "cfoEnable_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 2 Points [10, 0; 0, -680] DstBlock "To Register" DstPort 1 } Line { Name "rdData" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 1 Points [0, -45; -200, 0; 0, 15; -195, 0; 0, -95] DstBlock "plb_decode" DstPort 6 } Line { Name "viqReset_dout" Labels [0, 0] SrcBlock "To Register19" SrcPort 1 Points [0, -50; -285, 0] DstBlock "plb_memmap" DstPort 28 } Line { Name "upConv_dout" Labels [0, 0] SrcBlock "To Register18" SrcPort 1 Points [0, -50; -290, 0; 0, -625] DstBlock "plb_memmap" DstPort 27 } Line { Name "txModSel_dout" Labels [0, 0] SrcBlock "To Register17" SrcPort 1 Points [0, -55; -290, 0; 0, -545] DstBlock "plb_memmap" DstPort 26 } Line { Name "timingReset_dout" Labels [0, 0] SrcBlock "To Register16" SrcPort 1 Points [0, -50; -145, 0; 0, -430; -145, 0; 0, -40] DstBlock "plb_memmap" DstPort 25 } Line { Name "timingKP_dout" Labels [0, 0] SrcBlock "To Register15" SrcPort 1 Points [0, -50; -290, 0; 0, -395] DstBlock "plb_memmap" DstPort 24 } Line { Name "timingKI_dout" Labels [0, 0] SrcBlock "To Register14" SrcPort 1 Points [0, -55; -290, 0; 0, -315] DstBlock "plb_memmap" DstPort 23 } Line { Name "timingK_dout" Labels [0, 0] SrcBlock "To Register13" SrcPort 1 Points [0, -50; -290, 0; 0, -240] DstBlock "plb_memmap" DstPort 22 } Line { Name "rxInputSel_dout" Labels [0, 0] SrcBlock "To Register12" SrcPort 1 Points [0, -50; -290, 0; 0, -165] DstBlock "plb_memmap" DstPort 21 } Line { Name "otrCost_dout" Labels [0, 0] SrcBlock "To Register11" SrcPort 1 Points [0, -50; -290, 0; 0, -90] DstBlock "plb_memmap" DstPort 20 } Line { Name "otrBenefit_dout" Labels [0, 0] SrcBlock "To Register10" SrcPort 1 Points [0, 40; -290, 0; 0, -100] DstBlock "plb_memmap" DstPort 19 } Line { Name "initialDelay_dout" Labels [0, 0] SrcBlock "To Register9" SrcPort 1 Points [0, 50; -90, 0; 0, 75; -200, 0; 0, -110] DstBlock "plb_memmap" DstPort 18 } Line { Name "downConv_dout" Labels [0, 0] SrcBlock "To Register8" SrcPort 1 Points [0, -55; -95, 0; 0, -25; -195, 0; 0, 170] DstBlock "plb_memmap" DstPort 17 } Line { Name "dac3Sel_dout" Labels [0, 0] SrcBlock "To Register7" SrcPort 1 Points [0, 35; -95, 0; 0, -25; -195, 0; 0, 160] DstBlock "plb_memmap" DstPort 16 } Line { Name "dac2Sel_dout" Labels [0, 0] SrcBlock "To Register6" SrcPort 1 Points [0, 50; -290, 0; 0, 195] DstBlock "plb_memmap" DstPort 15 } Line { Name "dac1Sel_dout" Labels [0, 0] SrcBlock "To Register5" SrcPort 1 Points [0, 50; -290, 0; 0, 270] DstBlock "plb_memmap" DstPort 14 } Line { Name "cfoReset_dout" Labels [0, 0] SrcBlock "To Register4" SrcPort 1 Points [0, 55; -290, 0; 0, 345] DstBlock "plb_memmap" DstPort 13 } Line { Name "cfoKP_dout" Labels [0, 0] SrcBlock "To Register3" SrcPort 1 Points [0, 50; -290, 0; 0, 425] DstBlock "plb_memmap" DstPort 12 } Line { Name "cfoKI_dout" Labels [0, 0] SrcBlock "To Register2" SrcPort 1 Points [0, 50; -290, 0; 0, 500] DstBlock "plb_memmap" DstPort 11 } Line { Name "cfoK_dout" Labels [0, 0] SrcBlock "To Register1" SrcPort 1 Points [0, 55; -290, 0; 0, 575] DstBlock "plb_memmap" DstPort 10 } Line { Name "cfoEnable_dout" Labels [0, 0] SrcBlock "To Register" SrcPort 1 Points [0, 50; -150, 0; 0, 275; -140, 0; 0, 380] DstBlock "plb_memmap" DstPort 9 } Line { Name "viq_dout" Labels [0, 0] SrcBlock "From Register2" SrcPort 1 Points [60, 0; 0, -155] DstBlock "plb_memmap" DstPort 8 } Line { Name "rssi_dout" Labels [0, 0] SrcBlock "From Register1" SrcPort 1 Points [60, 0; 0, -80] DstBlock "plb_memmap" DstPort 7 } Line { Name "otr_dout" Labels [0, 0] SrcBlock "From Register" SrcPort 1 Points [60, 0; 0, -5] DstBlock "plb_memmap" DstPort 6 } Line { Name "RNWReg" Labels [0, 0] SrcBlock "plb_decode" SrcPort 6 Points [5, 0; 0, 195] DstBlock "plb_memmap" DstPort 4 } Line { Name "linearAddr" Labels [0, 0] SrcBlock "plb_decode" SrcPort 9 Points [5, 0; 0, 50] DstBlock "plb_memmap" DstPort 3 } Line { Name "bankAddr" Labels [0, 0] SrcBlock "plb_decode" SrcPort 5 Points [5, 0; 0, 220] DstBlock "plb_memmap" DstPort 2 } Line { Name "wrDBusReg" Labels [0, 0] SrcBlock "plb_decode" SrcPort 1 Points [10, 0] DstBlock "plb_memmap" DstPort 1 } Line { Name "Sl_rdDBus" Labels [0, 0] SrcBlock "plb_decode" SrcPort 8 Points [5, 0; 0, 780] DstBlock "Sl_rdDBus" DstPort 1 } Line { Name "Sl_rdDAck" Labels [0, 0] SrcBlock "plb_decode" SrcPort 7 Points [65, 0] DstBlock "Sl_rdDAck" DstPort 1 } Line { Name "Sl_rdComp" Labels [0, 0] SrcBlock "plb_decode" SrcPort 3 Points [60, 0; 0, -460] DstBlock "Sl_rdComp" DstPort 1 } Line { Name "addrPref" Labels [0, 0] SrcBlock "sg_plb_addrpref" SrcPort 1 Points [10, 0] DstBlock "plb_decode" DstPort 7 } Line { Name "PLB_wrDBus" Labels [0, 0] SrcBlock "PLB_wrDBus" SrcPort 1 DstBlock "plb_decode" DstPort 5 } Line { Name "PLB_RNW" Labels [0, 0] SrcBlock "PLB_RNW" SrcPort 1 DstBlock "plb_decode" DstPort 4 } Line { Name "PLB_PAValid" Labels [0, 0] SrcBlock "PLB_PAValid" SrcPort 1 DstBlock "plb_decode" DstPort 3 } Line { Name "PLB_ABus" Labels [0, 0] SrcBlock "PLB_ABus" SrcPort 1 DstBlock "plb_decode" DstPort 2 } Line { Name "SPLB_Rst" Labels [0, 0] SrcBlock "SPLB_Rst" SrcPort 1 Points [5, 0; 0, -5] DstBlock "plb_decode" DstPort 1 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "sg_plb_addrpref" DstPort 1 } Line { Name "Sl_wait" Labels [0, 0] SrcBlock "Constant5" SrcPort 1 DstBlock "Sl_wait" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "PLB_wrDBus" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "PLB_RNW" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "PLB_PAValid" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "PLB_ABus" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "SPLB_Rst" DstPort 1 } Line { SrcBlock "Sl_wrComp" SrcPort 1 Points [65, 0; 0, -455] DstBlock "Terminator6" DstPort 1 } Line { SrcBlock "Sl_wrDAck" SrcPort 1 Points [65, 0; 0, -205] DstBlock "Terminator5" DstPort 1 } Line { SrcBlock "Sl_wait" SrcPort 1 DstBlock "Terminator4" DstPort 1 } Line { SrcBlock "Sl_rdDBus" SrcPort 1 Points [65, 0; 0, 385] DstBlock "Terminator3" DstPort 1 } Line { SrcBlock "Sl_rdDAck" SrcPort 1 Points [65, 0; 0, -535] DstBlock "Terminator2" DstPort 1 } Line { SrcBlock "Sl_rdComp" SrcPort 1 Points [45, 0; 0, -80] DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "Sl_addrAck" SrcPort 1 Points [45, 0; 0, -20] DstBlock "Terminator" DstPort 1 } } } Block { BlockType Gain Name "Gain" Position [550, 105, 580, 135] NamePlacement "alternate" Gain "1/2" ParameterDataTypeMode "Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain1" Position [550, 135, 580, 165] Gain "1/2" ParameterDataTypeMode "Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType RealImagToComplex Name "Real-Imag to\nComplex" Ports [2, 1] Position [1195, 88, 1225, 117] } Block { BlockType SubSystem Name "Receiver" Ports [3] Position [710, 71, 790, 169] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Receiver" Location [74, 131, 1459, 905] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Upconverted" Position [45, 103, 75, 117] IconDisplay "Port number" } Block { BlockType Inport Name "RX I" Position [20, 193, 50, 207] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "RX Q" Position [20, 233, 50, 247] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "ADC1" Ports [1, 1] Position [195, 99, 250, 121] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type " "Simulink integer, double and fixed point to Xilinx fixed point type.

Ha" "rdware notes: In hardware these blocks become top level input ports." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" period "1/8" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1" sg_icon_stat "55,22,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3" "2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In " "','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType SubSystem Name "AGC\nHook" Ports [2, 2] Position [260, 193, 305, 237] NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "AGC\nHook" Location [392, 110, 1818, 882] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" Position [25, 28, 55, 42] IconDisplay "Port number" } Block { BlockType Inport Name "Q" Position [25, 118, 55, 132] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Coarse" Ports [] Position [385, 176, 428, 237] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Coarse" Location [405, 176, 1657, 931] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Accumulator" Ports [1, 1] Position [515, 66, 575, 124] SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulat" "or. Output type and binary point position match the input.

Hardware no" "tes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulat" "or is forced to run at the system rate even if the input 'b' is running at a " "slower rate." operation "Add" n_bits "32" overflow "Saturate" scale "1" rst off hasbypass off en off dbl_ovrd off use_behavioral_HDL on xl_use_area off xl_area "[35 33 0 68 0 0 0]" has_advanced_control "0" sggui_pos "20,20,367,457" block_type "accum" block_version "10.1.2" sg_icon_stat "60,58,1,1,white,blue,0,75328ba6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('b" "lack');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Constant Name "Constant" Position [45, 30, 75, 60] Value "0" } Block { BlockType Reference Name "Convert" Ports [1, 1] Position [340, 45, 385, 75] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and satura" "ting require hardware resources; truncating and wrapping do not." arith_type "Unsigned" n_bits "1" bin_pt "0" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.2" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17" " 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 " "27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ]," "[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert1" Ports [1, 1] Position [625, 80, 670, 110] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and satura" "ting require hardware resources; truncating and wrapping do not." arith_type "Unsigned" n_bits "32" bin_pt "0" quantization "Truncate" overflow "Saturate" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[16 0 0 31 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.2" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17" " 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 " "27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ]," "[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert2" Ports [1, 1] Position [485, 280, 530, 310] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and satura" "ting require hardware resources; truncating and wrapping do not." arith_type "Unsigned" n_bits "32" bin_pt "0" quantization "Truncate" overflow "Saturate" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[16 0 0 31 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.2" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17" " 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 " "27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ]," "[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Counter" Ports [0, 1] Position [325, 460, 385, 520] SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counte" "rs are the least expensive in hardware. A count limited counter is implement" "ed by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "1" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1/8" dbl_ovrd off use_behavioral_HDL off use_rpm off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.2" sg_icon_stat "60,60,1,1,white,blue,0,a170c862,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample" Ports [1, 1] Position [270, 267, 330, 323] SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency " "controls determine the hardware implementation. The cost in hardware of diff" "erent implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "Last Value of Frame (most efficien" "t)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,f354a31c,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf" "\\downarrow}4\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon" " text');\n" } Block { BlockType From Name "From" Position [190, 127, 280, 153] CloseFcn "tagdialog Close" GotoTag "BENEFIT" TagVisibility "global" } Block { BlockType From Name "From1" Position [190, 172, 280, 198] CloseFcn "tagdialog Close" GotoTag "COST" TagVisibility "global" } Block { BlockType Goto Name "Goto" Position [720, 280, 760, 310] GotoTag "RSSI" TagVisibility "global" } Block { BlockType Goto Name "Goto1" Position [720, 80, 760, 110] GotoTag "OTR" TagVisibility "global" } Block { BlockType Reference Name "Logical" Ports [2, 1] Position [260, 30, 315, 90] SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,261" block_type "logical" block_version "10.1.2" sg_icon_stat "55,60,1,1,white,blue,0,f4a65842,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 5" "2 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('\\newlineor\\newlinez^{-0}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux" Ports [3, 1] Position [435, 43, 480, 147] SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[1 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1.2" sg_icon_stat "45,104,1,1,white,blue,3,613f58e1,ri" "ght" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npat" "ch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 " "63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\np" "lot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end ico" "n graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bl" "ack');port_label('input',3,'d1');\ncolor('black');disp('\\bf{}','texmode','on" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Negate" Ports [1, 1] Position [305, 157, 360, 213] SourceBlock "xbsIndex_r4/Negate" SourceType "Xilinx Negate Block Block" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,391" block_type "negate" block_version "10.1.2" sg_icon_stat "55,56,1,1,white,blue,0,6784aebb,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('\\bf{x(-1)}','texmode','on');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "OTRA" Ports [1, 1] Position [160, 35, 225, 55] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs " "of type Simulink integer, double and fixed point to Xilinx fixed point type." "

Hardware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "1" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1/8" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.2" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29" " 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 " "18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[" "0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}" "\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "OTRB" Ports [1, 1] Position [160, 65, 225, 85] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs " "of type Simulink integer, double and fixed point to Xilinx fixed point type." "

Hardware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "1" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1/8" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.2" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29" " 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 " "18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[" "0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}" "\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "RSSI" Ports [1, 1] Position [160, 285, 225, 305] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs " "of type Simulink integer, double and fixed point to Xilinx fixed point type." "

Hardware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "10" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1/8" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1.2" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29" " 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 " "18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[" "0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}" "\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "RSSI_CLK" Ports [1, 1] Position [465, 480, 525, 500] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26" " 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 " "18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[" "0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('bla" "ck');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register" Ports [1, 1] Position [375, 267, 435, 323] SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,ac6b57db,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmo" "de','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Scope Name "Scope" Ports [1] Position [665, 474, 695, 506] Floating off Location [188, 390, 512, 629] Open off NumInputPorts "1" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" } DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Reference Name "Up Sample" Ports [1, 1] Position [615, 268, 675, 322] SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.2" sg_icon_stat "60,54,1,1,white,blue,0,b6c489dd,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Line { SrcBlock "OTRA" SrcPort 1 DstBlock "Logical" DstPort 1 } Line { SrcBlock "OTRB" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "From" SrcPort 1 Points [95, 0; 0, -45] DstBlock "Mux" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Negate" DstPort 1 } Line { SrcBlock "Negate" SrcPort 1 Points [25, 0; 0, -55] DstBlock "Mux" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 Points [30, 0] Branch { DstBlock "OTRA" DstPort 1 } Branch { Points [0, 30] DstBlock "OTRB" DstPort 1 } } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "RSSI" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Goto" DstPort 1 } Line { SrcBlock "Counter" SrcPort 1 DstBlock "RSSI_CLK" DstPort 1 } Line { SrcBlock "RSSI_CLK" SrcPort 1 DstBlock "Scope" DstPort 1 } } } Block { BlockType SubSystem Name "Fine" Ports [2] Position [325, 180, 365, 240] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Fine" Location [2, 74, 1918, 1156] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" Position [55, 45, 85, 60] Orientation "down" IconDisplay "Port number" } Block { BlockType Inport Name "Q" Position [15, 45, 45, 60] Orientation "down" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Accumulator" Ports [2, 1] Position [690, 286, 750, 344] SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulat" "or. Output type and binary point position match the input.

Hardware no" "tes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulat" "or is forced to run at the system rate even if the input 'b' is running at a " "slower rate." operation "Add" n_bits "30+ceil(log2(viqAvgLen))" overflow "Flag as error" scale "1" rst on hasbypass off en off dbl_ovrd off use_behavioral_HDL on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "179,548,367,457" block_type "accum" block_version "10.1.2" sg_icon_stat "60,58,1,1,white,blue,0,1b1827f6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('b" "lack');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q'" ");\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [215, 116, 275, 174] SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on xl_use_area off xl_area "[17 0 0 32 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,307" block_type "addsub" block_version "10.1.2" sg_icon_stat "60,58,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [550, 271, 610, 329] SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "32" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,307" block_type "addsub" block_version "10.1.2" sg_icon_stat "60,58,1,1,white,blue,0,46b4c804,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant2" Ports [0, 1] Position [785, 424, 835, 436] SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Unsigned" const "viqAvgLen+2" n_bits "ceil(log2(viqAvgLen+1))" bin_pt "0" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 ins" "tructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "50,12,1,1,white,blue,0,a3502154,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 50 50 0 ],[0 0 12 12 ],[0.77 0.82 0.91]);\npatch([22 20 23" " 20 22 25 26 27 30 27 24 22 25 22 24 27 30 27 26 25 22 ],[1 3 6 9 11 11 10 11" " 11 8 11 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 1" "2 12 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b" "egin icon text');\ncolor('black');port_label('output',1,'130');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert" Ports [1, 1] Position [420, 385, 455, 415] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and satura" "ting require hardware resources; truncating and wrapping do not." arith_type "Boolean" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.2" sg_icon_stat "35,30,1,1,white,blue,0,74901e60,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 35 35 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([10 5 12 " "5 10 18 20 22 30 23 17 12 18 12 17 23 30 22 20 18 10 ],[3 8 15 22 27 27 25 27" " 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 35 35 0 0 ],[0" " 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMEN" "T: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf" "('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert1" Ports [1, 1] Position [1070, 300, 1105, 330] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and satura" "ting require hardware resources; truncating and wrapping do not." arith_type "Unsigned" n_bits "32" bin_pt "0" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.2" sg_icon_stat "35,30,1,1,white,blue,0,74901e60,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 35 35 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([10 5 12 " "5 10 18 20 22 30 23 17 12 18 12 17 23 30 22 20 18 10 ],[3 8 15 22 27 27 25 27" " 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 35 35 0 0 ],[0" " 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMEN" "T: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf" "('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Counter" Ports [2, 1] Position [690, 370, 750, 430] SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counte" "rs are the least expensive in hardware. A count limited counter is implement" "ed by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "ceil(log2(viqAvgLen+1))" bin_pt "0" load_pin off rst on en on explicit_period "on" period "1/8" dbl_ovrd off use_behavioral_HDL off use_rpm off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1.2" sg_icon_stat "60,60,1,1,white,blue,0,46c73e85,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor(" "'black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'o" "ut');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay" Ports [1, 1] Position [465, 302, 510, 328] SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "viqAvgLen" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.2" sg_icon_stat "45,26,1,1,white,blue,0,cab5cdac,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([15 11 17" " 11 15 22 24 26 33 27 21 17 23 17 21 27 33 26 24 22 15 ],[3 7 13 19 23 23 21 " "23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[" "0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');disp('z^{-128}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType From Name "From" Position [320, 386, 395, 414] CloseFcn "tagdialog Close" GotoTag "VIQRESET" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out" Ports [1, 1] Position [1130, 90, 1190, 110] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,grey,0,b3a044a9,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.88 0.88 0.88]);\npatch([24 21 26" " 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 " "18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[" "0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('bla" "ck');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(" "'','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Gateway Out1" Ports [1, 1] Position [1130, 135, 1190, 155] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,grey,0,b3a044a9,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.88 0.88 0.88]);\npatch([24 21 26" " 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 " "18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[" "0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('bla" "ck');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(" "'','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Gateway Out2" Ports [1, 1] Position [1130, 170, 1190, 190] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,grey,0,b3a044a9,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.88 0.88 0.88]);\npatch([24 21 26" " 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 " "18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[" "0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('bla" "ck');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(" "'','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Gateway Out3" Ports [1, 1] Position [1130, 205, 1190, 225] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,grey,0,b3a044a9,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.88 0.88 0.88]);\npatch([24 21 26" " 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 " "18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[" "0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('bla" "ck');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(" "'','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Gateway Out4" Ports [1, 1] Position [1130, 240, 1190, 260] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1.2" sg_icon_stat "60,20,1,1,white,grey,0,b3a044a9,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.88 0.88 0.88]);\npatch([24 21 26" " 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 " "18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[" "0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('bla" "ck');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf(" "'','COMMENT: end icon text');\n" } Block { BlockType Goto Name "Goto" Position [1175, 300, 1215, 330] GotoTag "VIQ" TagVisibility "global" } Block { BlockType Reference Name "Mult" Ports [2, 1] Position [105, 65, 160, 120] SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "Full" arith_type "Unsigned" n_bits "32" bin_pt "32" quantization "Truncate" overflow "Saturate" en off latency "3" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[31 62 0 30 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "465,280,367,433" block_type "mult" block_version "10.1.2" sg_icon_stat "55,55,1,1,white,blue,0,9c0d74db,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-3}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [105, 165, 160, 220] SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "Full" arith_type "Unsigned" n_bits "32" bin_pt "32" quantization "Truncate" overflow "Saturate" en off latency "3" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[31 62 0 30 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1.2" sg_icon_stat "55,55,1,1,white,blue,0,9c0d74db,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-3}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register" Ports [2, 1] Position [345, 301, 400, 334] SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.2" sg_icon_stat "55,33,1,1,white,blue,0,b6caf0d3,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 33 33 ],[0.77 0.82 0.91]);\npatch([18 13 21" " 13 18 27 29 31 40 33 26 21 29 21 26 33 40 31 29 27 18 ],[4 9 17 25 30 30 28 " "30 30 23 30 25 17 9 4 11 4 4 6 4 4 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]," "[0 0 33 33 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('bl" "ack');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q')" ";\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: " "end icon text');\n" } Block { BlockType Reference Name "Reinterpret1" Ports [1, 1] Position [335, 129, 385, 161] SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without alterin" "g the binary representation. You can changed the signal between signed and " "unsigned, and relocate the binary point.

Hardware notes: In hardware thi" "s block costs nothing.

Example: Suppose the input is 6 bits wide, signe" "d, with 2 fractional bits, and the output is forced to unsigned with 0 fracti" "onal bits. Then an input of -2.0 (1110.00 in binary 2's complement) becomes " "an output of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "0" has_advanced_control "0" sggui_pos "148,292,336,312" block_type "reinterpret" block_version "10.1.2" sg_icon_stat "50,32,1,1,white,blue,0,8982c1db,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18" " 11 16 24 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 " "27 27 20 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ]," "[0 0 32 32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COM" "MENT: end icon text');\n" } Block { BlockType Reference Name "Relational" Ports [2, 1] Position [860, 387, 915, 443] SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operat" "or Block" mode "a=b" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "relational" block_version "10.1.2" sg_icon_stat "55,56,1,1,white,blue,0,1cf02e61,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\n" "ewlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale" Ports [1, 1] Position [855, 287, 910, 343] SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by a" "djusting the binary point position.

Hardware notes: In hardware this blo" "ck costs nothing." scale_factor "-ceil(log2(viqAvgLen))" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.2" sg_icon_stat "55,56,1,1,white,blue,0,d685c6d2,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('\\bf{2^{-7}}','texmode','on');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Scope Name "Scope" Ports [5] Position [1430, 184, 1485, 316] Floating off Location [1, 45, 1921, 1171] Open off NumInputPorts "5" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" } YMin "0~0~-1.5e+006~1.06e+006~-1" YMax "2.75e+006~3e+006~2.5e+006~1.145e+00" "6~1" SaveName "ScopeData1" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "Subsystem" Ports [2, 1] Position [590, 389, 640, 436] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Subsystem" Location [2, 70, 1918, 1152] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0." "500000]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" Position [50, 70, 80, 84] IconDisplay "Port number" } Block { BlockType Inport Name "R" Position [50, 50, 80, 64] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Constant1" Ports [0, 1] Position [25, 29, 75, 41] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Boolean" const "1" n_bits "1" bin_pt "0" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 i" "nstructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "50,12,1,1,white,blue,0,06094819,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 50 50 0 ],[0 0 12 12 ],[0.77 0.82 0.91]);\npatch([22 20 " "23 20 22 25 26 27 30 27 24 22 25 22 24 27 30 27 26 25 22 ],[1 3 6 9 11 11 10 " "11 11 8 11 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0" " 12 12 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register" Ports [3, 1] Position [150, 27, 210, 83] SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,923c1847,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 1" "9 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46" " 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'e" "n');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z" "^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "O" Position [235, 50, 265, 64] IconDisplay "Port number" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "O" DstPort 1 } } } Block { BlockType SubSystem Name "posedge" Ports [1, 1] Position [485, 384, 545, 416] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "posedge" Location [327, 730, 677, 846] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0." "500000]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 35, 55, 49] IconDisplay "Port number" } Block { BlockType Reference Name "Delay" Ports [1, 1] Position [90, 51, 140, 89] SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a" " chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.2" sg_icon_stat "50,38,1,1,white,blue,0,fc531c0e,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 50 50 0 ],[0 0 38 38 ],[0.77 0.82 0.91]);\npatch([15 9 1" "8 9 15 25 28 31 42 34 26 20 29 20 26 34 42 31 28 25 15 ],[4 10 19 28 34 34 31" " 34 34 26 34 28 19 10 4 12 4 4 7 4 4 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 " "],[0 0 38 38 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','CO" "MMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpr" "intf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Inverter" Ports [1, 1] Position [160, 57, 195, 83] SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's c" "omplement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1.2" sg_icon_stat "35,26,1,1,white,blue,0,1ab4a85f,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 35 35 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([10 6 1" "2 6 10 17 19 21 28 22 16 12 18 12 16 22 28 21 19 17 10 ],[3 7 13 19 23 23 21 " "23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 35 35 0 0 ],[" "0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Reference Name "Logical" Ports [2, 1] Position [215, 25, 270, 85] SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "10.1.2" sg_icon_stat "55,60,1,1,white,blue,0,087b5522,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 1" "7 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48" " 52 52 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0" " ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [295, 50, 325, 64] IconDisplay "Port number" } Line { SrcBlock "In1" SrcPort 1 Points [15, 0] Branch { DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Out1" DstPort 1 } } } Line { SrcBlock "Mult1" SrcPort 1 Points [35, 0] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Mult" SrcPort 1 Points [15, 0; 0, 35] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "I" SrcPort 1 Points [0, 15] Branch { DstBlock "Mult" DstPort 1 } Branch { Points [0, 25] DstBlock "Mult" DstPort 2 } } Line { SrcBlock "Q" SrcPort 1 Points [0, 115] Branch { DstBlock "Mult1" DstPort 1 } Branch { Points [0, 25] DstBlock "Mult1" DstPort 2 } } Line { Labels [0, 0] SrcBlock "From" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "posedge" SrcPort 1 Points [20, 0] Branch { Points [0, -25; 80, 0; 0, 10] DstBlock "Counter" DstPort 1 } Branch { Labels [0, 0] DstBlock "Subsystem" DstPort 1 } } Line { SrcBlock "Subsystem" SrcPort 1 Points [20, 0] Branch { DstBlock "Counter" DstPort 2 } Branch { Points [0, -65] Branch { Points [0, -20] DstBlock "Accumulator" DstPort 2 } Branch { Points [-20, 0] Branch { Points [-335, 0; 0, -25] DstBlock "Register" DstPort 2 } Branch { Points [0, -100] DstBlock "Gateway Out4" DstPort 1 } } } } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "Counter" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [40, 0; 0, 55; -390, 0; 0, -45] DstBlock "Subsystem" DstPort 2 } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "Scale" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [10, 0] Branch { DstBlock "AddSub1" DstPort 2 } Branch { Points [0, -170] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Reinterpret1" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 Points [50, 0] Branch { DstBlock "Accumulator" DstPort 1 } Branch { Points [0, -120] DstBlock "Gateway Out2" DstPort 1 } } Line { Labels [0, 0] SrcBlock "Convert" SrcPort 1 DstBlock "posedge" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 Points [5, 0] Branch { DstBlock "Goto" DstPort 1 } Branch { DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Reinterpret1" SrcPort 1 Points [50, 0] Branch { Points [0, -45] DstBlock "Gateway Out" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "AddSub1" DstPort 1 } Branch { Points [-125, 0; 0, 25] DstBlock "Register" DstPort 1 } } } Line { SrcBlock "Scale" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Gateway Out" SrcPort 1 Points [45, 0; 0, 100] DstBlock "Scope" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 Points [55, 0; 0, 80] DstBlock "Scope" DstPort 2 } Line { SrcBlock "Gateway Out2" SrcPort 1 Points [65, 0; 0, 70] DstBlock "Scope" DstPort 3 } Line { SrcBlock "Gateway Out3" SrcPort 1 Points [75, 0; 0, 60] DstBlock "Scope" DstPort 4 } Line { SrcBlock "Gateway Out4" SrcPort 1 Points [85, 0; 0, 50] DstBlock "Scope" DstPort 5 } Line { SrcBlock "Register" SrcPort 1 Points [0, -5] DstBlock "Delay" DstPort 1 } } } Block { BlockType Outport Name "IO" Position [525, 28, 555, 42] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "OO" Position [525, 118, 555, 132] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "I" SrcPort 1 Points [180, 0] Branch { DstBlock "IO" DstPort 1 } Branch { Labels [0, 0] Points [0, 160] DstBlock "Fine" DstPort 1 } } Line { SrcBlock "Q" SrcPort 1 Points [155, 0] Branch { DstBlock "OO" DstPort 1 } Branch { Points [0, 100] DstBlock "Fine" DstPort 2 } } } } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [380, 266, 440, 324] Orientation "left" NamePlacement "alternate" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "3" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on xl_use_area off xl_area "[2 0 0 3 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,307" block_type "addsub" block_version "10.1" sg_icon_stat "60,58,1,1,white,blue,0,36a47907,left" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 " "34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 " "53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58" " 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p" "ort_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}'" ",'texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Carrier Recovery" Ports [2, 1] Position [500, 210, 575, 245] Orientation "left" NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Carrier Recovery" Location [455, 220, 1883, 1002] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" Position [360, 178, 390, 192] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" Position [360, 208, 390, 222] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "2nd Order Filter" Ports [2, 1] Position [585, 217, 700, 268] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "2nd Order Filter" Location [-67, 279, 1201, 1035] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Phase Error" Position [115, 179, 145, 191] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Reset" Position [95, 373, 125, 387] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [915, 162, 965, 213] NamePlacement "alternate" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[19 0 0 36 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,307" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [765, 232, 815, 283] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "35" bin_pt "34" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[19 0 0 36 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [850, 184, 885, 216] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[18 35 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1" sg_icon_stat "35,32,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [765, 159, 800, 191] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[18 35 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "35,32,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType From Name "From" Position [380, 147, 480, 173] CloseFcn "tagdialog Close" GotoTag "CFO_KP" TagVisibility "global" } Block { BlockType From Name "From1" Position [380, 222, 480, 248] CloseFcn "tagdialog Close" GotoTag "CFO_KI" TagVisibility "global" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [665, 198, 710, 247] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "35" bin_pt "34" quantization "Truncate" overflow "Flag as error" en off latency "3" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[89 143 0 153 0 4 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,49,1,1,white,blue,0,9c0d74db,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-3}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [665, 148, 710, 197] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "35" bin_pt "34" quantization "Truncate" overflow "Flag as error" en off latency "3" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[89 143 0 153 0 4 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,49,1,1,white,blue,0,9c0d74db,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-3}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register1" Ports [2, 1] Position [1020, 176, 1065, 229] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[18 36 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "45,53,1,1,white,blue,0,b6caf0d3,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 53 53 ],[0.77 0.82 0.91]);\npatch([10 3 14 " "3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[9 16 27 38 45 45 42 4" "5 45 35 45 38 27 16 9 19 9 9 12 9 9 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ]" ",[0 0 53 53 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q'" ");\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT:" " end icon text');\n" } Block { BlockType Reference Name "Register2" Ports [2, 1] Position [765, 286, 815, 339] Orientation "left" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[18 35 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "50,53,1,1,white,blue,0,b6caf0d3,lef" "t" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 50 50 0 ],[0 0 53 53 ],[0.77 0.82 0.91]);\npatch([11 3 15 " "3 11 24 28 32 46 35 24 16 28 16 24 35 46 32 28 24 11 ],[7 15 27 39 47 47 43 4" "7 47 36 47 39 27 15 7 18 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ]" ",[0 0 53 53 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q'" ");\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT:" " end icon text');\n" } Block { BlockType Outport Name "Phase Inc" Position [1140, 198, 1170, 212] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 Points [-20, 0; 0, -45] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [15, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, 40] DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Mult1" SrcPort 1 Points [0, 20] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Reset" SrcPort 1 Points [655, 0; 65, 0] Branch { Points [120, 0; 0, -165] DstBlock "Register1" DstPort 2 } Branch { Points [0, -55] DstBlock "Register2" DstPort 2 } } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Phase Inc" DstPort 1 } Line { SrcBlock "Phase Error" SrcPort 1 Points [485, 0] Branch { DstBlock "Mult2" DstPort 2 } Branch { Points [0, 25] DstBlock "Mult1" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "From" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } } } Block { BlockType Reference Name "Convert" Ports [1, 1] Position [940, 410, 985, 440] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating" " require hardware resources; truncating and wrapping do not." arith_type "Boolean" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 " "15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 2" "7 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0" " 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType From Name "From" Position [725, 317, 825, 343] CloseFcn "tagdialog Close" GotoTag "CFO_K" TagVisibility "global" } Block { BlockType From Name "From1" Position [385, 292, 485, 318] CloseFcn "tagdialog Close" GotoTag "CFO_RESET" TagVisibility "global" } Block { BlockType From Name "From2" Position [645, 410, 795, 440] CloseFcn "tagdialog Close" GotoTag "CFO_ENABLECORRECTION" TagVisibility "global" } Block { BlockType Goto Name "Goto" Position [575, 78, 680, 112] GotoTag "PHASEERROR" TagVisibility "global" } Block { BlockType Goto Name "Goto1" Position [1035, 168, 1140, 202] GotoTag "CFOINC" TagVisibility "global" } Block { BlockType Reference Name "Inverter" Ports [1, 1] Position [840, 396, 895, 454] SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complem" "ent) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1" sg_icon_stat "55,58,1,1,white,blue,0,1ab4a85f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13" " 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51" " 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 " "0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i" "con text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [875, 293, 920, 342] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pip" "eline stage of the dedicated multiplier you must select 'Pipeline for maximum" " performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "32" bin_pt "31" quantization "Truncate" overflow "Flag as error" en off latency "3" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[59 104 0 100 0 3 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1" sg_icon_stat "45,49,1,1,white,blue,0,9c0d74db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13" " 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50" " 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 " "0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black" "');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');" "\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-3}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Phase Error\nDetector" Ports [2, 1] Position [440, 170, 480, 230] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Phase Error\nDetector" Location [123, 74, 962, 876] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Inport Name "Q" Position [30, 78, 60, 92] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [300, 27, 345, 118] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "13" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "45,91,1,1,white,blue,0,46b4c804,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult" Ports [2, 1] Position [190, 31, 235, 69] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 0 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,38,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [190, 76, 235, 114] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 0 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,38,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Threshold" Ports [1, 1] Position [105, 27, 135, 53] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Threshold" SourceType "Xilinx Threshold Block" infoedit "Presents -1 as output if input is n" "egative; otherwise presents 1. Output is a two bit signed number." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sgn" block_version "10.1" sg_icon_stat "30,26,1,1,white,blue,0,acbf15a3,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 27 31 35 50 38 26 18 32 18 26 38 50 35 31 27 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'sgn');\ncolor" "('black');disp('z^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "Threshold1" Ports [1, 1] Position [105, 72, 135, 98] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Threshold" SourceType "Xilinx Threshold Block" infoedit "Presents -1 as output if input is n" "egative; otherwise presents 1. Output is a two bit signed number." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sgn" block_version "10.1" sg_icon_stat "30,26,1,1,white,blue,0,acbf15a3,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 27 31 35 50 38 26 18 32 18 26 38 50 35 31 27 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'sgn');\ncolor" "('black');disp('z^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Outport Name "Err" Position [370, 68, 400, 82] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Threshold1" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Threshold" SrcPort 1 DstBlock "Mult" DstPort 1 } Line { SrcBlock "Mult" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "I" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, 65] DstBlock "Mult1" DstPort 2 } Branch { DstBlock "Threshold" DstPort 1 } } Line { SrcBlock "Q" SrcPort 1 Points [0, 0; 15, 0] Branch { Points [0, -25] DstBlock "Mult" DstPort 2 } Branch { DstBlock "Threshold1" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Err" DstPort 1 } } } Block { BlockType Reference Name "Register" Ports [2, 1] Position [1115, 307, 1175, 363] SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[16 32 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,b6caf0d3,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15" " 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50" " 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black" "');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\n" "color('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end" " icon text');\n" } Block { BlockType Reference Name "Up Sample" Ports [1, 1] Position [975, 306, 1000, 334] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values" " can be zeros or copies of the most recent input sample.

Hardware notes" ": No hardware is needed if inserted values are copies of the input sample; ot" "herwise, a mux and single bit flip-flop are used." sample_ratio "8" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "25,28,1,1,white,blue,0,8b0564a6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16" " 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50" " 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}8'," "'texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name " phase inc" Position [1240, 328, 1270, 342] NamePlacement "alternate" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Phase Error\nDetector" SrcPort 1 Points [55, 0] Branch { Points [30, 0] DstBlock "2nd Order Filter" DstPort 1 } Branch { Points [0, -105] DstBlock "Goto" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 Points [80, 0] DstBlock "2nd Order Filter" DstPort 2 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "2nd Order Filter" SrcPort 1 Points [20, 0; 0, 60] DstBlock "Mult2" DstPort 1 } Line { SrcBlock "I" SrcPort 1 DstBlock "Phase Error\nDetector" DstPort 1 } Line { SrcBlock "Q" SrcPort 1 DstBlock "Phase Error\nDetector" DstPort 2 } Line { SrcBlock "From" SrcPort 1 DstBlock "Mult2" DstPort 2 } Line { SrcBlock "Mult2" SrcPort 1 Points [25, 0] Branch { DstBlock "Up Sample" DstPort 1 } Branch { Points [0, -135] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "Register" SrcPort 1 DstBlock " phase inc" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 Points [75, 0; 0, -75] DstBlock "Register" DstPort 2 } Annotation { Position [624, 217] } } } Block { BlockType Reference Name "Constant" Ports [0, 1] Position [195, 132, 250, 158] SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Signed (2's comp)" const "0" n_bits "14" bin_pt "13" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instruction" "s is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1" sg_icon_stat "55,26,1,1,white,blue,0,72d575a1,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2" "7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17" " 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2" "6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMME" "NT: end icon text');\n" } Block { BlockType Reference Name "Convert2" Ports [1, 1] Position [170, 191, 205, 209] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating req" "uire hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "35,18,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2" "3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20" " 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 " "30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert3" Ports [1, 1] Position [170, 231, 205, 249] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating req" "uire hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "35,18,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2" "3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20" " 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 " "30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Decimate &\nFilter" Ports [2, 3] Position [595, 97, 640, 153] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Decimate &\nFilter" Location [2, 74, 1270, 830] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" Position [140, 88, 170, 102] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" Position [140, 148, 170, 162] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Convert1" Ports [1, 1] Position [490, 145, 520, 165] ShowName off SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating" " require hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "30,20,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 " "15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 2" "7 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0" " 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert2" Ports [1, 1] Position [490, 220, 520, 240] ShowName off SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating" " require hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "30,20,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 " "15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 2" "7 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0" " 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert3" Ports [1, 1] Position [490, 85, 520, 105] ShowName off SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating" " require hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "30,20,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 " "15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 2" "7 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0" " 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "I MF1" Ports [1, 1] Position [240, 79, 285, 111] NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off MaskDescription "This block implements a decimating poly" "phase FIR filter. In this version, \nthe decimation rate must be 8, and the f" "ilter must be of length 64." MaskPromptString "Filter Coefficients|Interpolation Rate|" "Input Sample Period|Coefficients - Num Bits|Coefficients - Binary Point|Multi" "plier Latency|Multiplier - Num Bits|Multiplier - Binary Point|Final Adder - N" "um Bits|Final Adder - Binary Point" MaskStyleString "edit,edit,edit,edit,edit,edit,edit,edit" ",edit,edit" MaskTunableValueString "on,on,on,on,on,on,on,on,on,on" MaskCallbackString "|||||||||" MaskEnableString "on,on,on,on,on,on,on,on,on,on" MaskVisibilityString "on,on,on,on,on,on,on,on,on,on" MaskToolTipString "on,on,on,on,on,on,on,on,on,on" MaskVarAliasString ",,,,,,,,," MaskVariables "h_in=@1;polyphaseBranches=@2;data_sampl" "ePeriod=@3;coeff_prec=@4;coeff_bp=@5;multLatency=@6;mult_prec=@7;mult_bp=@8;a" "dd_prec=@9;add_bp=@10;" MaskInitialization "h = reshape(reshape(h_in(1:64),8,8)',1," "64);\nsubFilterLength = 8;\n" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskIconUnits "autoscale" MaskValueString "rcosfir(.3, 4, 8, 1,'sqrt')|8|1/8|14|13" "|1|18|17|16|14" MaskTabNameString ",,,,,,,,," System { Name "I MF1" Location [2, 74, 1270, 814] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [45, 273, 75, 287] IconDisplay "Port number" } Block { BlockType Reference Name "3-bit\nCounter" Ports [0, 1] Position [75, 577, 125, 603] SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counte" "rs are the least expensive in hardware. A count limited counter is implement" "ed by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "3" bin_pt "0" load_pin off rst off en off explicit_period "off" period "data_samplePeriod" dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[3 3 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" block_version "10.1" sg_icon_stat "50,26,1,1,white,blue,0,a170c862,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 0" Ports [2, 1] Position [385, 17, 435, 68] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 1" Ports [2, 1] Position [385, 87, 435, 138] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 2" Ports [2, 1] Position [385, 157, 435, 208] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 3" Ports [2, 1] Position [385, 222, 435, 273] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 4" Ports [2, 1] Position [385, 287, 435, 338] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 5" Ports [2, 1] Position [385, 357, 435, 408] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 6" Ports [2, 1] Position [385, 427, 435, 478] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 7" Ports [2, 1] Position [385, 492, 435, 543] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Accumulator" Ports [2, 1] Position [1000, 273, 1050, 322] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulat" "or. Output type and binary point position match the input.

Hardware no" "tes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulat" "or is forced to run at the system rate even if the input 'b' is running at a " "slower rate." operation "Add" n_bits "add_prec" overflow "Wrap" scale "1" rst on hasbypass on en off dbl_ovrd off use_behavioral_HDL on xl_use_area off xl_area "[9 17 0 16 0 0 0]" has_advanced_control "0" sggui_pos "20,20,367,457" block_type "accum" block_version "10.1" sg_icon_stat "50,49,1,1,white,blue,0,1b1827f6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('b" "lack');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q'" ");\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Adder Tree" Ports [8, 1] Position [780, 12, 835, 558] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Adder Tree" Location [592, 132, 987, 600] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0." "500000]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [25, 58, 55, 72] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [25, 143, 55, 157] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [25, 168, 55, 182] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [25, 283, 55, 297] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [25, 308, 55, 322] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [25, 398, 55, 412] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [25, 423, 55, 437] Port "8" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [80, 27, 130, 78] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [80, 137, 130, 188] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [165, 127, 215, 178] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{" "-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub3" Ports [2, 1] Position [80, 277, 130, 328] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub4" Ports [2, 1] Position [80, 392, 130, 443] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub5" Ports [2, 1] Position [165, 292, 215, 343] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{" "-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub6" Ports [2, 1] Position [265, 192, 315, 243] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "add_prec" bin_pt "add_bp" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 21 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [340, 213, 370, 227] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "AddSub5" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [15, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 Points [10, 0; 0, 85] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "In3" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In5" SrcPort 1 DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "In7" SrcPort 1 DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "AddSub4" DstPort 2 } } } Block { BlockType Reference Name "Constant" Ports [0, 1] Position [860, 430, 885, 450] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Unsigned" const "3" n_bits "3" bin_pt "0" explicit_period on period "data_samplePeriod" dsp48_infoedit "The use of this block for DSP48 ins" "tructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "10.1" sg_icon_stat "25,20,1,1,white,blue,0,bdb1da60,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22" " 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 " "23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[" "0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('output',1,'3');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay" Ports [1, 1] Position [460, 505, 485, 535] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [460, 440, 485, 470] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [460, 370, 485, 400] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [460, 300, 485, 330] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [460, 235, 485, 265] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [460, 170, 485, 200] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [460, 100, 485, 130] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay7" Ports [1, 1] Position [460, 30, 485, 60] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample" Ports [1, 1] Position [1200, 301, 1225, 329] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency " "controls determine the hardware implementation. The cost in hardware of diff" "erent implementations varies considerably; press Help for details." sample_ratio "8" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[17 17 0 16 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1" sg_icon_stat "25,28,1,1,white,blue,0,0b8b50ce,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\downarr" "ow}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult" Ports [2, 1] Position [670, 37, 715, 73] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [670, 107, 715, 143] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [670, 177, 715, 213] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [670, 242, 715, 278] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult4" Ports [2, 1] Position [670, 307, 715, 343] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult5" Ports [2, 1] Position [670, 377, 715, 413] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult6" Ports [2, 1] Position [670, 447, 715, 483] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult8" Ports [2, 1] Position [670, 512, 715, 548] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 0" Ports [1, 1] Position [535, 526, 585, 554] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(1:subFilterLength)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 13 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 1" Ports [1, 1] Position [535, 461, 585, 489] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(1*subFilterLength+1:2*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 2" Ports [1, 1] Position [530, 391, 580, 419] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(2*subFilterLength+1:3*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 3" Ports [1, 1] Position [535, 321, 585, 349] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(3*subFilterLength+1:4*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 4" Ports [1, 1] Position [530, 256, 580, 284] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(4*subFilterLength+1:5*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 5" Ports [1, 1] Position [530, 191, 580, 219] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(5*subFilterLength+1:6*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 6" Ports [1, 1] Position [530, 121, 580, 149] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(6*subFilterLength+1:7*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 7" Ports [1, 1] Position [530, 51, 580, 79] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(7*subFilterLength+1:8*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "Register" Ports [2, 1] Position [1110, 288, 1155, 337] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "10.1" sg_icon_stat "45,49,1,1,white,blue,0,cc3303a0,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 49 49 ],[0.77 0.82 0.91]);\npatch([10 3 14 " "3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 4" "3 43 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ]" ",[0 0 49 49 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q')" ";\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: " "end icon text');\n" } Block { BlockType Reference Name "Relational" Ports [2, 1] Position [925, 428, 970, 472] ShowName off SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operat" "or Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "10.1" sg_icon_stat "45,44,1,1,white,blue,0,1b68ef8e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\n" "ewlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nDemultiplexer" Ports [1, 8] Position [125, 17, 195, 538] SourceBlock "xbsIndex_r4/Time Division\nDemultip" "lexer" SourceType "Xilinx Time Division Demultiplexer " "Block" infoedit "Samples presented at the input are " "selected and down-sampled according to the frame sampling pattern specified. " "The sampled input is presented either as a single or multiple channel at the " "output." frame_pattern "ones(1,8)" impl_style "Multiple Channel" vin off dbl_ovrd off xl_use_area off xl_area "[135 270 0 0 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "tdd" block_version "10.1" sg_icon_stat "70,521,1,1,white,blue,0,7e5bffcf,ri" "ght" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 70 70 0 ],[0 0 521 521 ],[0.77 0.82 0.91]);\npatch([17 5 2" "1 5 17 35 40 45 65 49 34 23 39 23 34 49 65 45 40 35 17 ],[233 245 261 277 289" " 289 284 289 289 273 288 277 261 245 234 249 233 233 238 233 233 ],[0.98 0.96" " 0.92]);\nplot([0 70 70 0 0 ],[0 0 521 521 0 ]);\nfprintf('','COMMENT: end ic" "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,'d');\ncolor('black');port_label('output',1,'q0');\ncolor('bl" "ack');port_label('output',2,'q1');\ncolor('black');port_label('output',3,'q2'" ");\ncolor('black');port_label('output',4,'q3');\ncolor('black');port_label('o" "utput',5,'q4');\ncolor('black');port_label('output',6,'q5');\ncolor('black');" "port_label('output',7,'q6');\ncolor('black');port_label('output',8,'q7');\nco" "lor('black');disp('TDD');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Y" Position [1265, 308, 1295, 322] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "3-bit\nCounter" SrcPort 1 Points [185, 0] Branch { Points [190, 0] Branch { Points [0, -50] Branch { Points [0, -65] Branch { Points [0, -70] Branch { Points [0, -70] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -70] Branch { DstBlock "ROM 6" DstPort 1 } Branch { Points [0, -70] DstBlock "ROM 7" DstPort 1 } } Branch { DstBlock "ROM 5" DstPort 1 } } Branch { DstBlock "ROM 4" DstPort 1 } } Branch { DstBlock "ROM 3" DstPort 1 } } Branch { DstBlock "ROM 2" DstPort 1 } } Branch { DstBlock "ROM 1" DstPort 1 } } Branch { DstBlock "ROM 0" DstPort 1 } } Branch { Points [370, 0; 0, -130] DstBlock "Relational" DstPort 2 } } Branch { Points [0, -60] Branch { DstBlock "ASR 7" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 6" DstPort 2 } Branch { Points [0, -70] Branch { DstBlock "ASR 5" DstPort 2 } Branch { Points [0, -75] Branch { Points [55, 0] DstBlock "ASR 4" DstPort 2 } Branch { Points [0, -60] Branch { DstBlock "ASR 3" DstPort 2 } Branch { Points [0, -70] Branch { Points [55, 0] DstBlock "ASR 2" DstPort 2 } Branch { Points [0, -65] Branch { Points [0, -70] DstBlock "ASR 0" DstPort 2 } Branch { DstBlock "ASR 1" DstPort 2 } } } } } } } } } Line { SrcBlock "ASR 7" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "ASR 6" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "ASR 5" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "ASR 4" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "ASR 3" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "ASR 2" SrcPort 1 DstBlock "Delay5" DstPort 1 } Line { SrcBlock "ASR 1" SrcPort 1 DstBlock "Delay6" DstPort 1 } Line { SrcBlock "ASR 0" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Mult8" SrcPort 1 DstBlock "Adder Tree" DstPort 8 } Line { SrcBlock "Mult6" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 7 } Line { SrcBlock "Mult5" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 6 } Line { SrcBlock "Mult4" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 5 } Line { SrcBlock "Mult3" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 4 } Line { SrcBlock "Mult2" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 3 } Line { SrcBlock "Mult1" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 2 } Line { SrcBlock "Mult" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 1 } Line { SrcBlock "ROM 0" SrcPort 1 DstBlock "Mult8" DstPort 2 } Line { SrcBlock "ROM 1" SrcPort 1 DstBlock "Mult6" DstPort 2 } Line { SrcBlock "ROM 2" SrcPort 1 DstBlock "Mult5" DstPort 2 } Line { SrcBlock "ROM 3" SrcPort 1 DstBlock "Mult4" DstPort 2 } Line { SrcBlock "ROM 4" SrcPort 1 DstBlock "Mult3" DstPort 2 } Line { SrcBlock "ROM 5" SrcPort 1 DstBlock "Mult2" DstPort 2 } Line { SrcBlock "ROM 6" SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "ROM 7" SrcPort 1 DstBlock "Mult" DstPort 2 } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [5, 0; 0, -125] Branch { Points [0, -15] DstBlock "Accumulator" DstPort 2 } Branch { DstBlock "Register" DstPort 2 } } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Adder Tree" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "X" SrcPort 1 DstBlock "Time Division\nDemultiplexer" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 1 Points [0, -20] DstBlock "ASR 0" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 2 Points [165, 0; 0, -15] DstBlock "ASR 1" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 3 Points [170, 0] DstBlock "ASR 2" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 4 Points [170, 0] DstBlock "ASR 3" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 5 Points [170, 0] DstBlock "ASR 4" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 6 Points [170, 0] DstBlock "ASR 5" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 7 DstBlock "ASR 6" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 8 DstBlock "ASR 7" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Mult8" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Mult6" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Mult5" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "Mult3" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "Mult" DstPort 1 } } } Block { BlockType SubSystem Name "I MF2" Ports [1, 1] Position [240, 139, 285, 171] NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off MaskDescription "This block implements a decimating poly" "phase FIR filter. In this version, \nthe decimation rate must be 8, and the f" "ilter must be of length 64." MaskPromptString "Filter Coefficients|Interpolation Rate|" "Input Sample Period|Coefficients - Num Bits|Coefficients - Binary Point|Multi" "plier Latency|Multiplier - Num Bits|Multiplier - Binary Point|Final Adder - N" "um Bits|Final Adder - Binary Point" MaskStyleString "edit,edit,edit,edit,edit,edit,edit,edit" ",edit,edit" MaskTunableValueString "on,on,on,on,on,on,on,on,on,on" MaskCallbackString "|||||||||" MaskEnableString "on,on,on,on,on,on,on,on,on,on" MaskVisibilityString "on,on,on,on,on,on,on,on,on,on" MaskToolTipString "on,on,on,on,on,on,on,on,on,on" MaskVarAliasString ",,,,,,,,," MaskVariables "h_in=@1;polyphaseBranches=@2;data_sampl" "ePeriod=@3;coeff_prec=@4;coeff_bp=@5;multLatency=@6;mult_prec=@7;mult_bp=@8;a" "dd_prec=@9;add_bp=@10;" MaskInitialization "h = reshape(reshape(h_in(1:64),8,8)',1," "64);\nsubFilterLength = 8;\n" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskIconUnits "autoscale" MaskValueString "rcosfir(.3, 4, 8, 1,'sqrt')|8|1/8|14|13" "|1|18|17|16|14" MaskTabNameString ",,,,,,,,," System { Name "I MF2" Location [2, 74, 1270, 814] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [45, 273, 75, 287] IconDisplay "Port number" } Block { BlockType Reference Name "3-bit\nCounter" Ports [0, 1] Position [75, 577, 125, 603] SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counte" "rs are the least expensive in hardware. A count limited counter is implement" "ed by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "3" bin_pt "0" load_pin off rst off en off explicit_period "off" period "data_samplePeriod" dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[3 3 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" block_version "10.1" sg_icon_stat "50,26,1,1,white,blue,0,a170c862,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 0" Ports [2, 1] Position [385, 17, 435, 68] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 1" Ports [2, 1] Position [385, 87, 435, 138] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 2" Ports [2, 1] Position [385, 157, 435, 208] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 3" Ports [2, 1] Position [385, 222, 435, 273] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 4" Ports [2, 1] Position [385, 287, 435, 338] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 5" Ports [2, 1] Position [385, 357, 435, 408] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 6" Ports [2, 1] Position [385, 427, 435, 478] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 7" Ports [2, 1] Position [385, 492, 435, 543] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Accumulator" Ports [2, 1] Position [1000, 273, 1050, 322] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulat" "or. Output type and binary point position match the input.

Hardware no" "tes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulat" "or is forced to run at the system rate even if the input 'b' is running at a " "slower rate." operation "Add" n_bits "add_prec" overflow "Wrap" scale "1" rst on hasbypass on en off dbl_ovrd off use_behavioral_HDL on xl_use_area off xl_area "[9 17 0 16 0 0 0]" has_advanced_control "0" sggui_pos "20,20,367,457" block_type "accum" block_version "10.1" sg_icon_stat "50,49,1,1,white,blue,0,1b1827f6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('b" "lack');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q'" ");\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Adder Tree" Ports [8, 1] Position [780, 12, 835, 558] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Adder Tree" Location [592, 132, 987, 600] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0." "500000]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [25, 58, 55, 72] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [25, 143, 55, 157] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [25, 168, 55, 182] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [25, 283, 55, 297] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [25, 308, 55, 322] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [25, 398, 55, 412] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [25, 423, 55, 437] Port "8" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [80, 27, 130, 78] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [80, 137, 130, 188] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [165, 127, 215, 178] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{" "-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub3" Ports [2, 1] Position [80, 277, 130, 328] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub4" Ports [2, 1] Position [80, 392, 130, 443] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub5" Ports [2, 1] Position [165, 292, 215, 343] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{" "-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub6" Ports [2, 1] Position [265, 192, 315, 243] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "add_prec" bin_pt "add_bp" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 21 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [340, 213, 370, 227] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "In8" SrcPort 1 DstBlock "AddSub4" DstPort 2 } Line { SrcBlock "In7" SrcPort 1 DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "In5" SrcPort 1 DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "In3" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "In1" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [10, 0; 0, 85] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [15, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "AddSub5" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 2 } } } Block { BlockType Reference Name "Constant" Ports [0, 1] Position [860, 430, 885, 450] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Unsigned" const "3" n_bits "3" bin_pt "0" explicit_period on period "data_samplePeriod" dsp48_infoedit "The use of this block for DSP48 ins" "tructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "10.1" sg_icon_stat "25,20,1,1,white,blue,0,bdb1da60,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22" " 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 " "23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[" "0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('output',1,'3');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay" Ports [1, 1] Position [460, 505, 485, 535] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [460, 440, 485, 470] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [460, 370, 485, 400] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [460, 300, 485, 330] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [460, 235, 485, 265] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [460, 170, 485, 200] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [460, 100, 485, 130] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay7" Ports [1, 1] Position [460, 30, 485, 60] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample" Ports [1, 1] Position [1200, 301, 1225, 329] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency " "controls determine the hardware implementation. The cost in hardware of diff" "erent implementations varies considerably; press Help for details." sample_ratio "8" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[17 17 0 16 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "10.1" sg_icon_stat "25,28,1,1,white,blue,0,0b8b50ce,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\downarr" "ow}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult" Ports [2, 1] Position [670, 37, 715, 73] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [670, 107, 715, 143] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [670, 177, 715, 213] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [670, 242, 715, 278] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult4" Ports [2, 1] Position [670, 307, 715, 343] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult5" Ports [2, 1] Position [670, 377, 715, 413] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult6" Ports [2, 1] Position [670, 447, 715, 483] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult8" Ports [2, 1] Position [670, 512, 715, 548] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 0" Ports [1, 1] Position [535, 526, 585, 554] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(1:subFilterLength)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 13 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 1" Ports [1, 1] Position [535, 461, 585, 489] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(1*subFilterLength+1:2*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 2" Ports [1, 1] Position [530, 391, 580, 419] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(2*subFilterLength+1:3*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 3" Ports [1, 1] Position [535, 321, 585, 349] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(3*subFilterLength+1:4*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 4" Ports [1, 1] Position [530, 256, 580, 284] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(4*subFilterLength+1:5*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 5" Ports [1, 1] Position [530, 191, 580, 219] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(5*subFilterLength+1:6*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 6" Ports [1, 1] Position [530, 121, 580, 149] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(6*subFilterLength+1:7*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 7" Ports [1, 1] Position [530, 51, 580, 79] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(7*subFilterLength+1:8*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "Register" Ports [2, 1] Position [1110, 288, 1155, 337] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "45,49,1,1,white,blue,0,cc3303a0,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 49 49 ],[0.77 0.82 0.91]);\npatch([10 3 14 " "3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 4" "3 43 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ]" ",[0 0 49 49 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q')" ";\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: " "end icon text');\n" } Block { BlockType Reference Name "Relational" Ports [2, 1] Position [925, 428, 970, 472] ShowName off SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operat" "or Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "10.1" sg_icon_stat "45,44,1,1,white,blue,0,1b68ef8e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\n" "ewlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nDemultiplexer" Ports [1, 8] Position [125, 17, 195, 538] SourceBlock "xbsIndex_r4/Time Division\nDemultip" "lexer" SourceType "Xilinx Time Division Demultiplexer " "Block" infoedit "Samples presented at the input are " "selected and down-sampled according to the frame sampling pattern specified. " "The sampled input is presented either as a single or multiple channel at the " "output." frame_pattern "ones(1,8)" impl_style "Multiple Channel" vin off dbl_ovrd off xl_use_area off xl_area "[135 270 0 0 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "tdd" block_version "10.1" sg_icon_stat "70,521,1,1,white,blue,0,7e5bffcf,ri" "ght" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 70 70 0 ],[0 0 521 521 ],[0.77 0.82 0.91]);\npatch([17 5 2" "1 5 17 35 40 45 65 49 34 23 39 23 34 49 65 45 40 35 17 ],[233 245 261 277 289" " 289 284 289 289 273 288 277 261 245 234 249 233 233 238 233 233 ],[0.98 0.96" " 0.92]);\nplot([0 70 70 0 0 ],[0 0 521 521 0 ]);\nfprintf('','COMMENT: end ic" "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,'d');\ncolor('black');port_label('output',1,'q0');\ncolor('bl" "ack');port_label('output',2,'q1');\ncolor('black');port_label('output',3,'q2'" ");\ncolor('black');port_label('output',4,'q3');\ncolor('black');port_label('o" "utput',5,'q4');\ncolor('black');port_label('output',6,'q5');\ncolor('black');" "port_label('output',7,'q6');\ncolor('black');port_label('output',8,'q7');\nco" "lor('black');disp('TDD');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Y" Position [1265, 308, 1295, 322] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "Mult" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "Mult3" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Mult5" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Mult6" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Mult8" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 8 DstBlock "ASR 7" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 7 DstBlock "ASR 6" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 6 Points [170, 0] DstBlock "ASR 5" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 5 Points [170, 0] DstBlock "ASR 4" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 4 Points [170, 0] DstBlock "ASR 3" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 3 Points [170, 0] DstBlock "ASR 2" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 2 Points [165, 0; 0, -15] DstBlock "ASR 1" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 1 Points [0, -20] DstBlock "ASR 0" DstPort 1 } Line { SrcBlock "X" SrcPort 1 DstBlock "Time Division\nDemultiplexer" DstPort 1 } Line { SrcBlock "Adder Tree" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [5, 0; 0, -125] Branch { DstBlock "Register" DstPort 2 } Branch { Points [0, -15] DstBlock "Accumulator" DstPort 2 } } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "ROM 7" SrcPort 1 DstBlock "Mult" DstPort 2 } Line { SrcBlock "ROM 6" SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "ROM 5" SrcPort 1 DstBlock "Mult2" DstPort 2 } Line { SrcBlock "ROM 4" SrcPort 1 DstBlock "Mult3" DstPort 2 } Line { SrcBlock "ROM 3" SrcPort 1 DstBlock "Mult4" DstPort 2 } Line { SrcBlock "ROM 2" SrcPort 1 DstBlock "Mult5" DstPort 2 } Line { SrcBlock "ROM 1" SrcPort 1 DstBlock "Mult6" DstPort 2 } Line { SrcBlock "ROM 0" SrcPort 1 DstBlock "Mult8" DstPort 2 } Line { SrcBlock "Mult" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 2 } Line { SrcBlock "Mult2" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 3 } Line { SrcBlock "Mult3" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 4 } Line { SrcBlock "Mult4" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 5 } Line { SrcBlock "Mult5" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 6 } Line { SrcBlock "Mult6" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 7 } Line { SrcBlock "Mult8" SrcPort 1 DstBlock "Adder Tree" DstPort 8 } Line { SrcBlock "ASR 0" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "ASR 1" SrcPort 1 DstBlock "Delay6" DstPort 1 } Line { SrcBlock "ASR 2" SrcPort 1 DstBlock "Delay5" DstPort 1 } Line { SrcBlock "ASR 3" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "ASR 4" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "ASR 5" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "ASR 6" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "ASR 7" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "3-bit\nCounter" SrcPort 1 Points [185, 0] Branch { Points [0, -60] Branch { Points [0, -65] Branch { Points [0, -70] Branch { Points [0, -75] Branch { Points [0, -60] Branch { Points [0, -70] Branch { Points [0, -65] Branch { DstBlock "ASR 1" DstPort 2 } Branch { Points [0, -70] DstBlock "ASR 0" DstPort 2 } } Branch { Points [55, 0] DstBlock "ASR 2" DstPort 2 } } Branch { DstBlock "ASR 3" DstPort 2 } } Branch { Points [55, 0] DstBlock "ASR 4" DstPort 2 } } Branch { DstBlock "ASR 5" DstPort 2 } } Branch { DstBlock "ASR 6" DstPort 2 } } Branch { DstBlock "ASR 7" DstPort 2 } } Branch { Points [190, 0] Branch { Points [370, 0; 0, -130] DstBlock "Relational" DstPort 2 } Branch { Points [0, -50] Branch { DstBlock "ROM 0" DstPort 1 } Branch { Points [0, -65] Branch { DstBlock "ROM 1" DstPort 1 } Branch { Points [0, -70] Branch { DstBlock "ROM 2" DstPort 1 } Branch { Points [0, -70] Branch { DstBlock "ROM 3" DstPort 1 } Branch { Points [0, -65] Branch { DstBlock "ROM 4" DstPort 1 } Branch { Points [0, -65] Branch { DstBlock "ROM 5" DstPort 1 } Branch { Points [0, -70] Branch { Points [0, -70] DstBlock "ROM 7" DstPort 1 } Branch { DstBlock "ROM 6" DstPort 1 } } } } } } } } } } } } Block { BlockType Reference Name "Scale" Ports [1, 1] Position [380, 84, 420, 106] ShowName off SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjus" "ting the binary point position.

Hardware notes: In hardware this block c" "osts nothing." scale_factor "1" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "scale" block_version "10.1" sg_icon_stat "40,22,1,1,white,blue,0,c3728872,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13" " 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50" " 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 " "0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');disp('\\bf{2^{1}}','texmode','on');\nfpr" "intf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale1" Ports [1, 1] Position [380, 219, 420, 241] ShowName off SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjus" "ting the binary point position.

Hardware notes: In hardware this block c" "osts nothing." scale_factor "0" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "scale" block_version "10.1" sg_icon_stat "40,22,1,1,white,blue,0,24e5474d,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13" " 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50" " 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 " "0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');disp('\\bf{2^{0}}','texmode','on');\nfpr" "intf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale2" Ports [1, 1] Position [380, 144, 420, 166] ShowName off SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjus" "ting the binary point position.

Hardware notes: In hardware this block c" "osts nothing." scale_factor "1" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "scale" block_version "10.1" sg_icon_stat "40,22,1,1,white,blue,0,c3728872,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13" " 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50" " 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 " "0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');disp('\\bf{2^{1}}','texmode','on');\nfpr" "intf('','COMMENT: end icon text');\n" } Block { BlockType Scope Name "Scope" Ports [6] Position [505, 322, 565, 458] Floating off Location [1921, 222, 3361, 1076] Open off NumInputPorts "6" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } YMin "-0.75~-0.75~-1~-1.5~-1.5~-1" YMax "0.75~0.75~0.75~1.5~1.5~0.75" SaveName "ScopeData4" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "dMF" Ports [1, 1] Position [240, 214, 285, 246] NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off MaskDescription "This block implements a decimating poly" "phase FIR filter. In this version, \nthe decimation rate must be 8, and the f" "ilter must be of length 64." MaskPromptString "Filter Coefficients|Interpolation Rate|" "Input Sample Period|Coefficients - Num Bits|Coefficients - Binary Point|Multi" "plier Latency|Multiplier - Num Bits|Multiplier - Binary Point|Final Adder - N" "um Bits|Final Adder - Binary Point" MaskStyleString "edit,edit,edit,edit,edit,edit,edit,edit" ",edit,edit" MaskTunableValueString "on,on,on,on,on,on,on,on,on,on" MaskCallbackString "|||||||||" MaskEnableString "on,on,on,on,on,on,on,on,on,on" MaskVisibilityString "on,on,on,on,on,on,on,on,on,on" MaskToolTipString "on,on,on,on,on,on,on,on,on,on" MaskVarAliasString ",,,,,,,,," MaskVariables "h_in=@1;polyphaseBranches=@2;data_sampl" "ePeriod=@3;coeff_prec=@4;coeff_bp=@5;multLatency=@6;mult_prec=@7;mult_bp=@8;a" "dd_prec=@9;add_bp=@10;" MaskInitialization "h = reshape(reshape(h_in(1:64),8,8)',1," "64);\nsubFilterLength = 8;\n" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskIconUnits "autoscale" MaskValueString "dmf*2|8|1/8|14|13|1|18|17|16|14" MaskTabNameString ",,,,,,,,," System { Name "dMF" Location [2, 74, 1270, 814] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [45, 273, 75, 287] IconDisplay "Port number" } Block { BlockType Reference Name "3-bit\nCounter" Ports [0, 1] Position [75, 577, 125, 603] SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counte" "rs are the least expensive in hardware. A count limited counter is implement" "ed by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "3" bin_pt "0" load_pin off rst off en off explicit_period "off" period "data_samplePeriod" dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[3 3 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" block_version "10.1" sg_icon_stat "50,26,1,1,white,blue,0,a170c862,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 0" Ports [2, 1] Position [385, 17, 435, 68] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 1" Ports [2, 1] Position [385, 87, 435, 138] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 2" Ports [2, 1] Position [385, 157, 435, 208] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 3" Ports [2, 1] Position [385, 222, 435, 273] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 4" Ports [2, 1] Position [385, 287, 435, 338] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 5" Ports [2, 1] Position [385, 357, 435, 408] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 6" Ports [2, 1] Position [385, 427, 435, 478] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 7" Ports [2, 1] Position [385, 492, 435, 543] SourceBlock "xbsIndex_r4/Addressable Shift Regis" "ter" SourceType "Xilinx Addressable Shift Register B" "lock" infoedit "Delay of configurable length. Any " "element in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sp" "artan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q" "');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Accumulator" Ports [2, 1] Position [1000, 273, 1050, 322] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulat" "or. Output type and binary point position match the input.

Hardware no" "tes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulat" "or is forced to run at the system rate even if the input 'b' is running at a " "slower rate." operation "Add" n_bits "add_prec" overflow "Wrap" scale "1" rst on hasbypass on en off dbl_ovrd off use_behavioral_HDL on xl_use_area off xl_area "[9 17 0 16 0 0 0]" has_advanced_control "0" sggui_pos "20,20,367,457" block_type "accum" block_version "10.1" sg_icon_stat "50,49,1,1,white,blue,0,1b1827f6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('b" "lack');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q'" ");\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Adder Tree" Ports [8, 1] Position [780, 12, 835, 558] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Adder Tree" Location [592, 132, 987, 600] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0." "500000]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [25, 58, 55, 72] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [25, 143, 55, 157] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [25, 168, 55, 182] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [25, 283, 55, 297] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [25, 308, 55, 322] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [25, 398, 55, 412] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [25, 423, 55, 437] Port "8" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [80, 27, 130, 78] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [80, 137, 130, 188] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [165, 127, 215, 178] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{" "-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub3" Ports [2, 1] Position [80, 277, 130, 328] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub4" Ports [2, 1] Position [80, 392, 130, 443] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub5" Ports [2, 1] Position [165, 292, 215, 343] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{" "-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub6" Ports [2, 1] Position [265, 192, 315, 243] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "add_prec" bin_pt "add_bp" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 21 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 1" "9 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50" " 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0" " ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','C" "OMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor(" "'black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\" "bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [340, 213, 370, 227] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "AddSub5" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [15, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 Points [10, 0; 0, 85] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "In3" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In5" SrcPort 1 DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "In7" SrcPort 1 DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "AddSub4" DstPort 2 } } } Block { BlockType Reference Name "Constant" Ports [0, 1] Position [860, 430, 885, 450] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Unsigned" const "3" n_bits "3" bin_pt "0" explicit_period on period "data_samplePeriod" dsp48_infoedit "The use of this block for DSP48 ins" "tructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "10.1" sg_icon_stat "25,20,1,1,white,blue,0,bdb1da60,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22" " 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 " "23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[" "0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('output',1,'3');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay" Ports [1, 1] Position [460, 505, 485, 535] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [460, 440, 485, 470] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [460, 370, 485, 400] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [460, 300, 485, 330] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [460, 235, 485, 265] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [460, 170, 485, 200] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [460, 100, 485, 130] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay7" Ports [1, 1] Position [460, 30, 485, 60] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[9 18 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "25,30,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample" Ports [1, 1] Position [1200, 301, 1225, 329] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency " "controls determine the hardware implementation. The cost in hardware of diff" "erent implementations varies considerably; press Help for details." sample_ratio "8" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[17 17 0 16 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "dsamp" block_version "10.1" sg_icon_stat "25,28,1,1,white,blue,0,0b8b50ce,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\downarr" "ow}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult" Ports [2, 1] Position [670, 37, 715, 73] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [670, 107, 715, 143] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [670, 177, 715, 213] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [670, 242, 715, 278] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult4" Ports [2, 1] Position [670, 307, 715, 343] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult5" Ports [2, 1] Position [670, 377, 715, 413] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult6" Ports [2, 1] Position [670, 447, 715, 483] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult8" Ports [2, 1] Position [670, 512, 715, 548] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -13 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 0" Ports [1, 1] Position [535, 526, 585, 554] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(1:subFilterLength)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 1" Ports [1, 1] Position [535, 461, 585, 489] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(1*subFilterLength+1:2*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 2" Ports [1, 1] Position [530, 391, 580, 419] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(2*subFilterLength+1:3*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 3" Ports [1, 1] Position [535, 321, 585, 349] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(3*subFilterLength+1:4*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 4" Ports [1, 1] Position [530, 256, 580, 284] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(4*subFilterLength+1:5*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 5" Ports [1, 1] Position [530, 191, 580, 219] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(5*subFilterLength+1:6*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 6" Ports [1, 1] Position [530, 121, 580, 149] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(6*subFilterLength+1:7*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 7" Ports [1, 1] Position [530, 51, 580, 79] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(7*subFilterLength+1:8*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "Register" Ports [2, 1] Position [1110, 288, 1155, 337] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "45,49,1,1,white,blue,0,cc3303a0,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 49 49 ],[0.77 0.82 0.91]);\npatch([10 3 14 " "3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 4" "3 43 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ]" ",[0 0 49 49 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q')" ";\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: " "end icon text');\n" } Block { BlockType Reference Name "Relational" Ports [2, 1] Position [925, 428, 970, 472] ShowName off SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operat" "or Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "10.1" sg_icon_stat "45,44,1,1,white,blue,0,1b68ef8e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\n" "ewlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nDemultiplexer" Ports [1, 8] Position [125, 17, 195, 538] SourceBlock "xbsIndex_r4/Time Division\nDemultip" "lexer" SourceType "Xilinx Time Division Demultiplexer " "Block" infoedit "Samples presented at the input are " "selected and down-sampled according to the frame sampling pattern specified. " "The sampled input is presented either as a single or multiple channel at the " "output." frame_pattern "ones(1,8)" impl_style "Multiple Channel" vin off dbl_ovrd off xl_use_area off xl_area "[135 270 0 0 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "tdd" block_version "10.1" sg_icon_stat "70,521,1,1,white,blue,0,7e5bffcf,ri" "ght" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 70 70 0 ],[0 0 521 521 ],[0.77 0.82 0.91]);\npatch([17 5 2" "1 5 17 35 40 45 65 49 34 23 39 23 34 49 65 45 40 35 17 ],[233 245 261 277 289" " 289 284 289 289 273 288 277 261 245 234 249 233 233 238 233 233 ],[0.98 0.96" " 0.92]);\nplot([0 70 70 0 0 ],[0 0 521 521 0 ]);\nfprintf('','COMMENT: end ic" "on graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_" "label('input',1,'d');\ncolor('black');port_label('output',1,'q0');\ncolor('bl" "ack');port_label('output',2,'q1');\ncolor('black');port_label('output',3,'q2'" ");\ncolor('black');port_label('output',4,'q3');\ncolor('black');port_label('o" "utput',5,'q4');\ncolor('black');port_label('output',6,'q5');\ncolor('black');" "port_label('output',7,'q6');\ncolor('black');port_label('output',8,'q7');\nco" "lor('black');disp('TDD');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Y" Position [1265, 308, 1295, 322] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "3-bit\nCounter" SrcPort 1 Points [185, 0] Branch { Points [190, 0] Branch { Points [0, -50] Branch { Points [0, -65] Branch { Points [0, -70] Branch { Points [0, -70] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -70] Branch { DstBlock "ROM 6" DstPort 1 } Branch { Points [0, -70] DstBlock "ROM 7" DstPort 1 } } Branch { DstBlock "ROM 5" DstPort 1 } } Branch { DstBlock "ROM 4" DstPort 1 } } Branch { DstBlock "ROM 3" DstPort 1 } } Branch { DstBlock "ROM 2" DstPort 1 } } Branch { DstBlock "ROM 1" DstPort 1 } } Branch { DstBlock "ROM 0" DstPort 1 } } Branch { Points [370, 0; 0, -130] DstBlock "Relational" DstPort 2 } } Branch { Points [0, -60] Branch { DstBlock "ASR 7" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 6" DstPort 2 } Branch { Points [0, -70] Branch { DstBlock "ASR 5" DstPort 2 } Branch { Points [0, -75] Branch { Points [55, 0] DstBlock "ASR 4" DstPort 2 } Branch { Points [0, -60] Branch { DstBlock "ASR 3" DstPort 2 } Branch { Points [0, -70] Branch { Points [55, 0] DstBlock "ASR 2" DstPort 2 } Branch { Points [0, -65] Branch { Points [0, -70] DstBlock "ASR 0" DstPort 2 } Branch { DstBlock "ASR 1" DstPort 2 } } } } } } } } } Line { SrcBlock "ASR 7" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "ASR 6" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "ASR 5" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "ASR 4" SrcPort 1 DstBlock "Delay3" DstPort 1 } Line { SrcBlock "ASR 3" SrcPort 1 DstBlock "Delay4" DstPort 1 } Line { SrcBlock "ASR 2" SrcPort 1 DstBlock "Delay5" DstPort 1 } Line { SrcBlock "ASR 1" SrcPort 1 DstBlock "Delay6" DstPort 1 } Line { SrcBlock "ASR 0" SrcPort 1 DstBlock "Delay7" DstPort 1 } Line { SrcBlock "Mult8" SrcPort 1 DstBlock "Adder Tree" DstPort 8 } Line { SrcBlock "Mult6" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 7 } Line { SrcBlock "Mult5" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 6 } Line { SrcBlock "Mult4" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 5 } Line { SrcBlock "Mult3" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 4 } Line { SrcBlock "Mult2" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 3 } Line { SrcBlock "Mult1" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 2 } Line { SrcBlock "Mult" SrcPort 1 Points [45, 0] DstBlock "Adder Tree" DstPort 1 } Line { SrcBlock "ROM 0" SrcPort 1 DstBlock "Mult8" DstPort 2 } Line { SrcBlock "ROM 1" SrcPort 1 DstBlock "Mult6" DstPort 2 } Line { SrcBlock "ROM 2" SrcPort 1 DstBlock "Mult5" DstPort 2 } Line { SrcBlock "ROM 3" SrcPort 1 DstBlock "Mult4" DstPort 2 } Line { SrcBlock "ROM 4" SrcPort 1 DstBlock "Mult3" DstPort 2 } Line { SrcBlock "ROM 5" SrcPort 1 DstBlock "Mult2" DstPort 2 } Line { SrcBlock "ROM 6" SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "ROM 7" SrcPort 1 DstBlock "Mult" DstPort 2 } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [5, 0; 0, -125] Branch { Points [0, -15] DstBlock "Accumulator" DstPort 2 } Branch { DstBlock "Register" DstPort 2 } } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Adder Tree" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "X" SrcPort 1 DstBlock "Time Division\nDemultiplexer" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 1 Points [0, -20] DstBlock "ASR 0" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 2 Points [165, 0; 0, -15] DstBlock "ASR 1" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 3 Points [170, 0] DstBlock "ASR 2" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 4 Points [170, 0] DstBlock "ASR 3" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 5 Points [170, 0] DstBlock "ASR 4" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 6 Points [170, 0] DstBlock "ASR 5" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 7 DstBlock "ASR 6" DstPort 1 } Line { SrcBlock "Time Division\nDemultiplexer" SrcPort 8 DstBlock "ASR 7" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Mult8" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Mult6" DstPort 1 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Mult5" DstPort 1 } Line { SrcBlock "Delay3" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 DstBlock "Mult3" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Delay6" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 DstBlock "Mult" DstPort 1 } } } Block { BlockType Outport Name " I" Position [570, 88, 600, 102] NamePlacement "alternate" IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name " Q" Position [570, 148, 600, 162] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name " dI" Position [570, 223, 600, 237] Port "3" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "I" SrcPort 1 Points [40, 0] Branch { DstBlock "I MF1" DstPort 1 } Branch { Points [0, 135] DstBlock "dMF" DstPort 1 } } Line { SrcBlock "I MF1" SrcPort 1 Points [60, 0] Branch { DstBlock "Scale" DstPort 1 } Branch { Points [0, 245] DstBlock "Scope" DstPort 1 } } Line { SrcBlock "Q" SrcPort 1 DstBlock "I MF2" DstPort 1 } Line { SrcBlock "Scale" SrcPort 1 Points [20, 0] Branch { DstBlock "Convert3" DstPort 1 } Branch { Points [0, 305] DstBlock "Scope" DstPort 4 } } Line { SrcBlock "Scale2" SrcPort 1 Points [15, 0] Branch { DstBlock "Convert1" DstPort 1 } Branch { Points [0, 265] DstBlock "Scope" DstPort 5 } } Line { SrcBlock "Convert3" SrcPort 1 DstBlock " I" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock " Q" DstPort 1 } Line { SrcBlock "I MF2" SrcPort 1 Points [50, 0] Branch { DstBlock "Scale2" DstPort 1 } Branch { Points [0, 205] DstBlock "Scope" DstPort 2 } } Line { SrcBlock "dMF" SrcPort 1 Points [40, 0] Branch { DstBlock "Scale1" DstPort 1 } Branch { Points [0, 150] DstBlock "Scope" DstPort 3 } } Line { SrcBlock "Scale1" SrcPort 1 Points [10, 0] Branch { DstBlock "Convert2" DstPort 1 } Branch { Points [0, 210] DstBlock "Scope" DstPort 6 } } Line { SrcBlock "Convert2" SrcPort 1 DstBlock " dI" DstPort 1 } } } Block { BlockType SubSystem Name "Downconverter" Ports [5, 2] Position [495, 94, 565, 156] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Downconverter" Location [92, 105, 1360, 907] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Mixed" Position [420, 193, 450, 207] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "SEL" Position [735, 123, 765, 137] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "I" Position [595, 573, 625, 587] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Q" Position [595, 603, 625, 617] NamePlacement "alternate" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Phase Inc" Position [225, 353, 255, 367] NamePlacement "alternate" Port "5" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [410, 290, 440, 325] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Unsigned" n_bits "32" bin_pt "32" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[16 0 0 31 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,307" block_type "addsub" block_version "10.1" sg_icon_stat "30,35,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15" " 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54" " 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black" "');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a +" " b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "ComplexMult" Ports [4, 2] Position [750, 511, 820, 574] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "ComplexMult" Location [1006, 233, 1687, 1013] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "A I" Position [180, 180, 195, 210] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "A Q" Position [180, 210, 195, 240] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "B I" Position [180, 285, 195, 315] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "B Q" Position [180, 315, 195, 345] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [400, 191, 460, 249] SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,307" block_type "addsub" block_version "10.1" sg_icon_stat "60,58,1,1,white,blue,0,46b4c804,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [400, 281, 460, 339] SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on xl_use_area off xl_area "[9 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,307" block_type "addsub" block_version "10.1" sg_icon_stat "60,58,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult" Ports [2, 1] Position [315, 189, 360, 216] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1" sg_icon_stat "45,27,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [315, 219, 360, 246] SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1" sg_icon_stat "45,27,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [315, 279, 360, 306] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1" sg_icon_stat "45,27,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [315, 309, 360, 336] SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1" sg_icon_stat "45,27,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "I" Position [485, 213, 515, 227] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "Q" Position [485, 303, 515, 317] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Mult" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Mult3" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "I" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "A I" SrcPort 1 Points [65, 0] Branch { DstBlock "Mult" DstPort 1 } Branch { Points [0, 120] DstBlock "Mult3" DstPort 1 } } Line { SrcBlock "B I" SrcPort 1 Points [55, 0] Branch { Points [0, -90] DstBlock "Mult" DstPort 2 } Branch { DstBlock "Mult2" DstPort 2 } } Line { SrcBlock "A Q" SrcPort 1 Points [70, 0] Branch { DstBlock "Mult1" DstPort 1 } Branch { Points [0, 60] DstBlock "Mult2" DstPort 1 } } Line { SrcBlock "B Q" SrcPort 1 Points [60, 0] Branch { Points [0, -90] DstBlock "Mult1" DstPort 2 } Branch { DstBlock "Mult3" DstPort 2 } } } } Block { BlockType From Name "From" Position [140, 287, 240, 313] CloseFcn "tagdialog Close" GotoTag "DOWNCONV" TagVisibility "global" } Block { BlockType Goto Name "Goto1" Position [665, 361, 735, 379] ShowName off GotoTag "dCarrier_I" TagVisibility "global" } Block { BlockType Reference Name "Inverter1" Ports [1, 1] Position [560, 281, 595, 309] SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complem" "ent) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1" sg_icon_stat "35,28,1,1,white,blue,0,1ab4a85f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13" " 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51" " 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 " "0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i" "con text');\n" } Block { BlockType Reference Name "Mux1" Ports [4, 1] Position [950, 164, 980, 301] ShowName off SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[18 18 0 36 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,303" block_type "mux" block_version "10.1" sg_icon_stat "30,137,1,1,white,blue,3,4cbe4f37,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 30 30 0 ],[0 19.5714 117.429 137 ],[0.77 0.82 0.91]);\npatch([" "7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[57 62 69 76 81 81 7" "9 81 81 74 80 75 69 63 58 64 57 57 59 57 57 ],[0.98 0.96 0.92]);\nplot([0 30 " "30 0 0 ],[0 19.5714 117.429 137 0 ]);\nfprintf('','COMMENT: end icon graphics" "');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port" "_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('b" "lack');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon " "text');\n" } Block { BlockType Reference Name "Mux2" Ports [4, 1] Position [950, 299, 980, 436] ShowName off SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[18 18 0 36 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1" sg_icon_stat "30,137,1,1,white,blue,3,4cbe4f37,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 30 30 0 ],[0 19.5714 117.429 137 ],[0.77 0.82 0.91]);\npatch([" "7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[57 62 69 76 81 81 7" "9 81 81 74 80 75 69 63 58 64 57 57 59 57 57 ],[0.98 0.96 0.92]);\nplot([0 30 " "30 0 0 ],[0 19.5714 117.429 137 0 ]);\nfprintf('','COMMENT: end icon graphics" "');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port" "_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('b" "lack');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon " "text');\n" } Block { BlockType Reference Name "i1i1" Ports [2, 1] Position [695, 287, 745, 338] SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pip" "eline stage of the dedicated multiplier you must select 'Pipeline for maximum" " performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13" " 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50" " 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 " "0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black" "');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');" "\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "i1i2" Ports [2, 1] Position [695, 187, 745, 238] SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pip" "eline stage of the dedicated multiplier you must select 'Pipeline for maximum" " performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13" " 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50" " 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 " "0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black" "');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');" "\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "myDDS" Ports [1, 2] Position [475, 279, 540, 341] NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "myDDS" Location [257, 444, 804, 658] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "phase inc" Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Reference Name "10MSB" Ports [1, 1] Position [175, 41, 220, 69] SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from" " each input sample and presents it at the output. The output type is ordinar" "ily unsigned with binary point at zero, but can be Boolean when the slice is " "one bit wide.

Hardware notes: In hardware this block costs nothing." nbits "10" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "10.1" sg_icon_stat "45,28,1,1,white,blue,0,b1026674,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24" " 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 " "27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]," "[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Accumulator" Ports [1, 1] Position [90, 30, 140, 80] SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulat" "or. Output type and binary point position match the input.

Hardware no" "tes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulat" "or is forced to run at the system rate even if the input 'b' is running at a " "slower rate." operation "Add" n_bits "32" overflow "Wrap" scale "1" rst off hasbypass off en off dbl_ovrd off use_behavioral_HDL on xl_use_area off xl_area "[16 32 0 32 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "accum" block_version "10.1" sg_icon_stat "50,50,1,1,white,blue,0,75328ba6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 50 50 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([11 3 15 " "3 11 24 28 32 46 35 24 16 28 16 24 35 46 32 28 24 11 ],[5 13 25 37 45 45 41 4" "5 45 34 45 37 25 13 5 16 5 5 9 5 5 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ]," "[0 0 50 50 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('bl" "ack');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Cos ROM" Ports [1, 1] Position [330, 29, 380, 81] NamePlacement "alternate" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "1024" initVector "cos(2*pi*[0:1023]/1024)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,52,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "Sin ROM" Ports [1, 1] Position [330, 89, 380, 141] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "1024" initVector "sin(2*pi*[0:1023]/1024)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "10.1" sg_icon_stat "50,52,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Outport Name "sin" Position [405, 108, 435, 122] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "cos" Position [405, 48, 435, 62] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "10MSB" DstPort 1 } Line { SrcBlock "phase inc" SrcPort 1 Points [0, 0] DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "Cos ROM" SrcPort 1 Points [0, 0] DstBlock "cos" DstPort 1 } Line { SrcBlock "Sin ROM" SrcPort 1 Points [0, 0] DstBlock "sin" DstPort 1 } Line { SrcBlock "10MSB" SrcPort 1 Points [5, 0] Branch { DstBlock "Cos ROM" DstPort 1 } Branch { Points [0, 60] DstBlock "Sin ROM" DstPort 1 } } } } Block { BlockType Outport Name " I" Position [1010, 228, 1040, 242] NamePlacement "alternate" IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name " Q" Position [1010, 363, 1040, 377] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Mixed" SrcPort 1 Points [210, 0] Branch { DstBlock "i1i2" DstPort 1 } Branch { Points [0, 100] DstBlock "i1i1" DstPort 1 } } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "myDDS" DstPort 1 } Line { SrcBlock "Phase Inc" SrcPort 1 Points [135, 0] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "From" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "myDDS" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "myDDS" SrcPort 2 Points [65, 0] Branch { Points [0, -100] DstBlock "i1i2" DstPort 2 } Branch { Points [0, 45] Branch { DstBlock "Goto1" DstPort 1 } Branch { Points [0, 150] DstBlock "ComplexMult" DstPort 1 } } } Line { SrcBlock "Mux1" SrcPort 1 DstBlock " I" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock " Q" DstPort 1 } Line { SrcBlock "SEL" SrcPort 1 Points [25, 0] Branch { Points [140, 0] DstBlock "Mux1" DstPort 1 } Branch { Points [0, 185] DstBlock "Mux2" DstPort 1 } } Line { SrcBlock "i1i2" SrcPort 1 Points [70, 0; 0, 0] Branch { Points [0, 35] DstBlock "Mux1" DstPort 3 } Branch { DstBlock "Mux1" DstPort 2 } } Line { SrcBlock "i1i1" SrcPort 1 Points [35, 0; 0, 35] Branch { Points [0, 35] DstBlock "Mux2" DstPort 3 } Branch { DstBlock "Mux2" DstPort 2 } } Line { SrcBlock "I" SrcPort 1 Points [85, 0; 0, -30] DstBlock "ComplexMult" DstPort 3 } Line { SrcBlock "Q" SrcPort 1 Points [90, 0; 0, -45] DstBlock "ComplexMult" DstPort 4 } Line { SrcBlock "ComplexMult" SrcPort 1 Points [75, 0; 0, -245] DstBlock "Mux1" DstPort 4 } Line { SrcBlock "ComplexMult" SrcPort 2 Points [85, 0; 0, -140] DstBlock "Mux2" DstPort 4 } Line { SrcBlock "Inverter1" SrcPort 1 Points [25, 0; 0, 30] Branch { DstBlock "i1i1" DstPort 2 } Branch { Points [0, 210] DstBlock "ComplexMult" DstPort 2 } } } } Block { BlockType From Name "From" Position [35, 27, 135, 53] CloseFcn "tagdialog Close" GotoTag "RXINPUTSEL" TagVisibility "global" } Block { BlockType From Name "From1" Position [515, 342, 615, 368] Orientation "left" NamePlacement "alternate" CloseFcn "tagdialog Close" GotoTag "INITIALDELAY" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out1" Ports [1, 1] Position [135, 103, 165, 117] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed p" "oint inputs into ouputs of type Simulink integer, double, or fixed point.

<" "P>Hardware notes: In hardware these blocks become top level output ports or " "are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "30,14,1,1,white,grey,0,b3a044a9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 30 30 0 ],[0 0 14 14 ],[0.88 0.88 0.88]);\npatch([11 9 12 9 11 15 " "16 17 21 18 15 13 16 13 15 18 21 17 16 15 11 ],[2 4 7 10 12 12 11 12 12 9 12 " "10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 14 14 0 ]" ");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico" "n text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_lab" "el('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: " "end icon text');\n" } Block { BlockType Goto Name "Goto1" Position [385, 46, 450, 64] ShowName off GotoTag "RXINPUT" TagVisibility "global" } Block { BlockType Goto Name "Goto4" Position [850, 97, 940, 113] ShowName off GotoTag "Symbols_Rx_I" TagVisibility "global" } Block { BlockType Goto Name "Goto5" Position [850, 117, 940, 133] ShowName off GotoTag "Symbols_Rx_Q" TagVisibility "global" } Block { BlockType Reference Name "Mux1" Ports [4, 1] Position [280, 24, 310, 161] ShowName off SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "3" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[14 14 0 28 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1" sg_icon_stat "30,137,1,1,white,blue,3,4cbe4f37,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 30 30 0 ],[0 19.5714 117.429 137 ],[0.77 0.82 0.91]);\npatch([7 2 " "9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[57 62 69 76 81 81 79 81" " 81 74 80 75 69 63 58 64 57 57 59 57 57 ],[0.98 0.96 0.92]);\nplot([0 30 30 0" " 0 ],[0 19.5714 117.429 137 0 ]);\nfprintf('','COMMENT: end icon graphics');" "\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_la" "bel('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('blac" "k');disp('\\bf{ z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');\n" } Block { BlockType Reference Name "RX_I" Ports [1, 1] Position [90, 189, 145, 211] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type " "Simulink integer, double and fixed point to Xilinx fixed point type.

Ha" "rdware notes: In hardware these blocks become top level input ports." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Saturate" period "1/8" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1" sg_icon_stat "55,22,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3" "2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In " "','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "RX_Q" Ports [1, 1] Position [90, 229, 145, 251] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type " "Simulink integer, double and fixed point to Xilinx fixed point type.

Ha" "rdware notes: In hardware these blocks become top level input ports." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Saturate" period "1/8" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "20,20,348,406" block_type "gatewayin" block_version "10.1" sg_icon_stat "55,22,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 3" "2 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In " "','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Timing Recovery" Ports [2, 1] Position [515, 250, 555, 310] Orientation "left" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Timing Recovery" Location [2, 74, 1270, 830] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "dI" Position [90, 208, 120, 222] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "I" Position [90, 238, 120, 252] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "1MSB" Ports [1, 1] Position [665, 108, 695, 132] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from eac" "h input sample and presents it at the output. The output type is ordinarily " "unsigned with binary point at zero, but can be Boolean when the slice is one " "bit wide.

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "10.1" sg_icon_stat "30,24,1,1,white,blue,0,b1026674,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 " "22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 2" "7 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0" " 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf(" "'','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "2nd Order Filter" Ports [2, 1] Position [300, 223, 365, 252] NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "2nd Order Filter" Location [6, 74, 1274, 830] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Err In" Position [115, 179, 145, 191] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Reset" Position [95, 373, 125, 387] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [905, 162, 955, 213] NamePlacement "alternate" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[17 0 0 33 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [765, 232, 815, 283] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "35" bin_pt "34" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[17 0 0 33 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [850, 184, 885, 216] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[18 35 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "35,32,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [765, 159, 800, 191] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[16 32 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "35,32,1,1,white,blue,0,fc531c0e,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Display Name "Display" Ports [1] Position [615, 265, 705, 295] ShowName off Decimation "1" Lockdown off } Block { BlockType Display Name "Display1" Ports [1] Position [615, 295, 705, 325] ShowName off Decimation "1" Lockdown off } Block { BlockType From Name "From" Position [380, 147, 480, 173] CloseFcn "tagdialog Close" GotoTag "TIMING_KP" TagVisibility "global" } Block { BlockType From Name "From1" Position [380, 222, 480, 248] CloseFcn "tagdialog Close" GotoTag "TIMING_KI" TagVisibility "global" } Block { BlockType From Name "From2" Position [820, 87, 920, 113] CloseFcn "tagdialog Close" GotoTag "TIMING_K" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out" Ports [1, 1] Position [535, 274, 580, 286] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "45,12,1,1,white,grey,0,b3a044a9,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([19 17 20" " 17 19 22 23 24 27 24 21 19 22 19 21 24 27 24 23 22 19 ],[1 3 6 9 11 11 10 11" " 11 8 11 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 1" "2 12 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b" "egin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');" "port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Gateway Out1" Ports [1, 1] Position [535, 304, 580, 316] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "45,12,1,1,white,grey,0,b3a044a9,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([19 17 20" " 17 19 22 23 24 27 24 21 19 22 19 21 24 27 24 23 22 19 ],[1 3 6 9 11 11 10 11" " 11 8 11 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 1" "2 12 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b" "egin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');" "port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Gateway Out2" Ports [1, 1] Position [1030, 395, 1070, 405] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "40,10,1,1,white,grey,0,b3a044a9,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 40 40 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([18 16 18" " 16 18 21 22 23 26 24 22 20 22 20 22 24 26 23 22 21 18 ],[1 3 5 7 9 9 8 9 9 7" " 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 10 10 0" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_l" "abel('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT" ": end icon text');\n" } Block { BlockType Reference Name "Gateway Out3" Ports [1, 1] Position [1030, 410, 1070, 420] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "40,10,1,1,white,grey,0,b3a044a9,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 40 40 0 ],[0 0 10 10 ],[0.88 0.88 0.88]);\npatch([18 16 18" " 16 18 21 22 23 26 24 22 20 22 20 22 24 26 23 22 21 18 ],[1 3 5 7 9 9 8 9 9 7" " 9 7 5 3 1 3 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 10 10 0" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_l" "abel('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT" ": end icon text');\n" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [665, 198, 710, 247] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "32" bin_pt "31" quantization "Truncate" overflow "Flag as error" en off latency "3" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[41 81 0 81 0 2 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,49,1,1,white,blue,0,9c0d74db,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-3}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [665, 148, 710, 197] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "32" bin_pt "31" quantization "Truncate" overflow "Flag as error" en off latency "3" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[41 81 0 81 0 2 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,49,1,1,white,blue,0,9c0d74db,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-3}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [1095, 88, 1140, 137] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "32" bin_pt "31" quantization "Truncate" overflow "Wrap" en off latency "3" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[65 112 0 112 0 3 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,49,1,1,white,blue,0,9c0d74db,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-3}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register1" Ports [2, 1] Position [1020, 176, 1065, 229] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[18 36 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "45,53,1,1,white,blue,0,b6caf0d3,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 53 53 ],[0.77 0.82 0.91]);\npatch([10 3 14 " "3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[9 16 27 38 45 45 42 4" "5 45 35 45 38 27 16 9 19 9 9 12 9 9 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ]" ",[0 0 53 53 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q'" ");\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT:" " end icon text');\n" } Block { BlockType Reference Name "Register2" Ports [2, 1] Position [765, 286, 815, 339] Orientation "left" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en off dbl_ovrd off xl_use_area off xl_area "[18 35 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "50,53,1,1,white,blue,0,b6caf0d3,lef" "t" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 50 50 0 ],[0 0 53 53 ],[0.77 0.82 0.91]);\npatch([11 3 15 " "3 11 24 28 32 46 35 24 16 28 16 24 35 46 32 28 24 11 ],[7 15 27 39 47 47 43 4" "7 47 36 47 39 27 15 7 18 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ]" ",[0 0 53 53 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('b" "lack');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q'" ");\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT:" " end icon text');\n" } Block { BlockType Scope Name "Scope" Ports [2] Position [1105, 391, 1135, 424] Floating off Location [188, 390, 1047, 902] Open off NumInputPorts "2" List { ListType AxesTitles axes1 "%" axes2 "%" } YMin "0.0002125~-0.000256348" YMax "0.000245~-0.000231934" SaveName "ScopeData2" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Outport Name "Err Filt" Position [1170, 108, 1200, 122] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Delay2" SrcPort 1 Points [60, 0] Branch { DstBlock "AddSub1" DstPort 1 } Branch { Points [0, 225] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 Points [-20, 0; 0, -45] DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [15, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, 40] Branch { Points [0, 115] DstBlock "Gateway Out3" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } } Line { SrcBlock "Mult1" SrcPort 1 Points [0, 20] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Reset" SrcPort 1 Points [655, 0; 65, 0] Branch { Points [120, 0; 0, -165] DstBlock "Register1" DstPort 2 } Branch { Points [0, -55] DstBlock "Register2" DstPort 2 } } Line { SrcBlock "Err In" SrcPort 1 Points [485, 0] Branch { DstBlock "Mult2" DstPort 2 } Branch { Points [0, 25] DstBlock "Mult1" DstPort 1 } } Line { SrcBlock "From1" SrcPort 1 Points [15, 0] Branch { DstBlock "Mult1" DstPort 2 } Branch { Points [0, 75] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "From" SrcPort 1 Points [20, 0] Branch { DstBlock "Mult2" DstPort 1 } Branch { Points [0, 120] DstBlock "Gateway Out" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Gateway Out" SrcPort 1 DstBlock "Display" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 DstBlock "Display1" DstPort 1 } Line { SrcBlock "Gateway Out2" SrcPort 1 DstBlock "Scope" DstPort 1 } Line { SrcBlock "Gateway Out3" SrcPort 1 DstBlock "Scope" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mult3" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 Points [5, 0; 0, -80] DstBlock "Mult3" DstPort 2 } Line { SrcBlock "Mult3" SrcPort 1 DstBlock "Err Filt" DstPort 1 } } } Block { BlockType Reference Name "Accumulator" Ports [2, 1] Position [560, 228, 610, 277] SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. " " Output type and binary point position match the input.

Hardware notes:" " When \"Reinitialize with input 'b' on reset\" is selected, the accumulator i" "s forced to run at the system rate even if the input 'b' is running at a slow" "er rate." operation "Add" n_bits "32" overflow "Wrap" scale "1" rst on hasbypass off en off dbl_ovrd off use_behavioral_HDL on xl_use_area off xl_area "[16 32 0 32 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "accum" block_version "10.1" sg_icon_stat "50,49,1,1,white,blue,0,1b1827f6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15" " 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54" " 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('black" "');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [505, 97, 555, 148] SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "32" bin_pt "31" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[2 0 0 4 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,46b4c804,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15" " 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54" " 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black" "');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a -" " b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant" Ports [0, 1] Position [425, 95, 470, 125] SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Unsigned" const "1/4" n_bits "4" bin_pt "3" explicit_period on period "1/8" dsp48_infoedit "The use of this block for DSP48 instruc" "tions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "10.1" sg_icon_stat "45,30,1,1,white,blue,0,885ee819,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 " "20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 2" "3 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 " "26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: " "begin icon text');\ncolor('black');port_label('output',1,'0.25');\nfprintf(''" ",'COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert" Ports [1, 1] Position [920, 223, 950, 237] ShowName off SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating" " require hardware resources; truncating and wrapping do not." arith_type "Boolean" n_bits "8" bin_pt "6" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "10.1" sg_icon_stat "30,14,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 " "15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 2" "7 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0" " 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Counter" Ports [1, 1] Position [670, 310, 720, 360] SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters a" "re the least expensive in hardware. A count limited counter is implemented b" "y combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "3" bin_pt "0" load_pin off rst on en off explicit_period "off" period "1/8" dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[3 3 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" block_version "10.1" sg_icon_stat "50,50,1,1,white,blue,0,300e9576,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14" " 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54" " 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('bla" "ck');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Scope Name "DAC\nScope1" Ports [6] Position [925, 407, 960, 508] ShowName off Floating off Location [6, 82, 1278, 930] Open off NumInputPorts "6" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" } YMin "-0.4~-0.0075~-1~0~0~-1" YMax "0.4~0.0075~1~7~1~1" SaveName "ScopeData3" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [740, 137, 775, 153] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain" ", each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "35,16,1,1,white,blue,0,fc531c0e,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15" " 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50" " 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf(" "'','COMMENT: end icon text');\n" } Block { BlockType From Name "From" Position [125, 302, 225, 328] CloseFcn "tagdialog Close" GotoTag "TIMING_RESET" TagVisibility "global" } Block { BlockType Reference Name "Gateway Out1" Ports [1, 1] Position [805, 443, 835, 457] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fix" "ed point inputs into ouputs of type Simulink integer, double, or fixed point." "

Hardware notes: In hardware these blocks become top level output ports" " or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "30,14,1,1,white,grey,0,b3a044a9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 30 30 0 ],[0 0 14 14 ],[0.88 0.88 0.88]);\npatch([11 9 12 9 11" " 15 16 17 21 18 15 13 16 13 15 18 21 17 16 15 11 ],[2 4 7 10 12 12 11 12 12 9" " 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 14 14" " 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin" " icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port" "_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMME" "NT: end icon text');\n" Port { PortNumber 1 Name "Err" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out2" Ports [1, 1] Position [805, 458, 835, 472] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fix" "ed point inputs into ouputs of type Simulink integer, double, or fixed point." "

Hardware notes: In hardware these blocks become top level output ports" " or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "30,14,1,1,white,grey,0,b3a044a9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 30 30 0 ],[0 0 14 14 ],[0.88 0.88 0.88]);\npatch([11 9 12 9 11" " 15 16 17 21 18 15 13 16 13 15 18 21 17 16 15 11 ],[2 4 7 10 12 12 11 12 12 9" " 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 14 14" " 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin" " icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port" "_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMME" "NT: end icon text');\n" Port { PortNumber 1 Name "Err Filt" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out3" Ports [1, 1] Position [805, 473, 835, 487] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fix" "ed point inputs into ouputs of type Simulink integer, double, or fixed point." "

Hardware notes: In hardware these blocks become top level output ports" " or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "30,14,1,1,white,grey,0,b3a044a9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 30 30 0 ],[0 0 14 14 ],[0.88 0.88 0.88]);\npatch([11 9 12 9 11" " 15 16 17 21 18 15 13 16 13 15 18 21 17 16 15 11 ],[2 4 7 10 12 12 11 12 12 9" " 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 14 14" " 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin" " icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port" "_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMME" "NT: end icon text');\n" Port { PortNumber 1 Name "Dly" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out4" Ports [1, 1] Position [805, 413, 835, 427] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fix" "ed point inputs into ouputs of type Simulink integer, double, or fixed point." "

Hardware notes: In hardware these blocks become top level output ports" " or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "30,14,1,1,white,grey,0,b3a044a9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 30 30 0 ],[0 0 14 14 ],[0.88 0.88 0.88]);\npatch([11 9 12 9 11" " 15 16 17 21 18 15 13 16 13 15 18 21 17 16 15 11 ],[2 4 7 10 12 12 11 12 12 9" " 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 14 14" " 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin" " icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port" "_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMME" "NT: end icon text');\n" } Block { BlockType Reference Name "Gateway Out5" Ports [1, 1] Position [805, 428, 835, 442] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fix" "ed point inputs into ouputs of type Simulink integer, double, or fixed point." "

Hardware notes: In hardware these blocks become top level output ports" " or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "30,14,1,1,white,grey,0,b3a044a9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 30 30 0 ],[0 0 14 14 ],[0.88 0.88 0.88]);\npatch([11 9 12 9 11" " 15 16 17 21 18 15 13 16 13 15 18 21 17 16 15 11 ],[2 4 7 10 12 12 11 12 12 9" " 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 14 14" " 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin" " icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port" "_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMME" "NT: end icon text');\n" } Block { BlockType Reference Name "Gateway Out6" Ports [1, 1] Position [805, 488, 835, 502] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fix" "ed point inputs into ouputs of type Simulink integer, double, or fixed point." "

Hardware notes: In hardware these blocks become top level output ports" " or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "30,14,1,1,white,grey,0,b3a044a9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 30 30 0 ],[0 0 14 14 ],[0.88 0.88 0.88]);\npatch([11 9 12 9 11" " 15 16 17 21 18 15 13 16 13 15 18 21 17 16 15 11 ],[2 4 7 10 12 12 11 12 12 9" " 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 14 14" " 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin" " icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port" "_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMME" "NT: end icon text');\n" } Block { BlockType Goto Name "Goto" Position [300, 108, 370, 132] GotoTag "TED" TagVisibility "global" } Block { BlockType Goto Name "Goto1" Position [1110, 156, 1180, 174] ShowName off GotoTag "dly" TagVisibility "global" } Block { BlockType Goto Name "Goto2" Position [435, 33, 505, 57] GotoTag "TEDFILT" TagVisibility "global" } Block { BlockType Reference Name "Inverter" Ports [1, 1] Position [805, 135, 835, 155] ShowName off SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complem" "ent) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "10.1" sg_icon_stat "30,20,1,1,white,blue,0,1ab4a85f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13" " 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51" " 39 51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 " "0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end i" "con text');\n" } Block { BlockType Reference Name "Logical" Ports [2, 1] Position [875, 105, 900, 160] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "10.1" sg_icon_stat "25,55,1,1,white,blue,0,087b5522,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13" " 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52" " 40 52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 " "0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texm" "ode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register1" Ports [3, 1] Position [975, 188, 1020, 242] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[2 3 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "45,54,1,1,white,blue,0,923c1847,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15" " 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50" " 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black" "');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}" "','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Timing Error\nDetector" Ports [2, 1] Position [175, 200, 215, 260] NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Timing Error\nDetector" Location [127, 200, 552, 345] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "dI" Position [80, 128, 110, 142] IconDisplay "Port number" } Block { BlockType Inport Name "I" Position [80, 108, 110, 122] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "Accumulator" Ports [1, 1] Position [615, 115, 665, 165] SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulat" "or. Output type and binary point position match the input.

Hardware no" "tes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulat" "or is forced to run at the system rate even if the input 'b' is running at a " "slower rate." operation "Add" n_bits "24" overflow "Wrap" scale "1" rst off hasbypass off en off dbl_ovrd off use_behavioral_HDL on xl_use_area off xl_area "[12 24 0 24 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "accum" block_version "10.1" sg_icon_stat "50,50,1,1,white,blue,0,75328ba6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 50 50 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([11 3 15 " "3 11 24 28 32 46 35 24 16 28 16 24 35 46 32 28 24 11 ],[5 13 25 37 45 45 41 4" "5 45 34 45 37 25 13 5 16 5 5 9 5 5 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ]," "[0 0 50 50 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('bl" "ack');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [490, 112, 540, 163] SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[9 0 0 17 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,46b4c804,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay" Ports [1, 1] Position [400, 127, 445, 173] SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "8" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 16 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "45,46,1,1,white,blue,0,a6538547,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-8}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult" Ports [2, 1] Position [245, 106, 290, 144] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[8 -1 0 16 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,38,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale" Ports [1, 1] Position [735, 124, 775, 156] ShowName off SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by a" "djusting the binary point position.

Hardware notes: In hardware this blo" "ck costs nothing." scale_factor "-3" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "scale" block_version "10.1" sg_icon_stat "40,32,1,1,white,blue,0,1c7dbea6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('\\bf{2^{-3}}','texmode','on');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Threshold" Ports [1, 1] Position [160, 102, 190, 128] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Threshold" SourceType "Xilinx Threshold Block" infoedit "Presents -1 as output if input is n" "egative; otherwise presents 1. Output is a two bit signed number." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sgn" block_version "10.1" sg_icon_stat "30,26,1,1,white,blue,0,acbf15a3,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 27 31 35 50 38 26 18 32 18 26 38 50 35 31 27 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'sgn');\ncolor" "('black');disp('z^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Outport Name "Err" Position [875, 138, 905, 152] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Threshold" SrcPort 1 DstBlock "Mult" DstPort 1 } Line { SrcBlock "I" SrcPort 1 DstBlock "Threshold" DstPort 1 } Line { SrcBlock "dI" SrcPort 1 DstBlock "Mult" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "Scale" DstPort 1 } Line { SrcBlock "Mult" SrcPort 1 Points [85, 0] Branch { DstBlock "AddSub" DstPort 1 } Branch { Points [0, 25] DstBlock "Delay" DstPort 1 } Branch { Points [0, -55; 465, 0; 0, 75] DstBlock "Err" DstPort 1 } } } } Block { BlockType Reference Name "Up Sample" Ports [1, 1] Position [425, 228, 450, 252] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values" " can be zeros or copies of the most recent input sample.

Hardware notes" ": No hardware is needed if inserted values are copies of the input sample; ot" "herwise, a mux and single bit flip-flop are used." sample_ratio "8" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "25,24,1,1,white,blue,0,8b0564a6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16" " 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50" " 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}8'," "'texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample1" Ports [1, 1] Position [340, 303, 365, 327] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values" " can be zeros or copies of the most recent input sample.

Hardware notes" ": No hardware is needed if inserted values are copies of the input sample; ot" "herwise, a mux and single bit flip-flop are used." sample_ratio "8" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "25,24,1,1,white,blue,0,8b0564a6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16" " 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50" " 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}8'," "'texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Dly" Position [1090, 208, 1120, 222] NamePlacement "alternate" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Timing Error\nDetector" SrcPort 1 Points [30, 0] Branch { DstBlock "2nd Order Filter" DstPort 1 } Branch { Points [0, 190] DstBlock "Gateway Out4" DstPort 1 } Branch { Points [0, -110] DstBlock "Goto" DstPort 1 } } Line { SrcBlock "From" SrcPort 1 Points [55, 0] Branch { DstBlock "2nd Order Filter" DstPort 2 } Branch { DstBlock "Up Sample1" DstPort 1 } } Line { SrcBlock "I" SrcPort 1 DstBlock "Timing Error\nDetector" DstPort 2 } Line { SrcBlock "dI" SrcPort 1 DstBlock "Timing Error\nDetector" DstPort 1 } Line { SrcBlock "2nd Order Filter" SrcPort 1 Points [15, 0] Branch { DstBlock "Up Sample" DstPort 1 } Branch { Points [0, 195] DstBlock "Gateway Out5" DstPort 1 } Branch { Points [0, -195] DstBlock "Goto2" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "1MSB" SrcPort 1 Points [30, 0; -10, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 25] DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "Accumulator" SrcPort 1 Points [15, 0] Branch { Points [0, 195] DstBlock "Gateway Out1" DstPort 1 } Branch { Points [0, -135] DstBlock "1MSB" DstPort 1 } } Line { SrcBlock "Counter" SrcPort 1 Points [50, 0] Branch { Points [0, -140] DstBlock "Register1" DstPort 1 } Branch { Points [0, 130] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 Points [0, 95] Branch { DstBlock "Convert" DstPort 1 } Branch { Points [-125, 0; 0, 250] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Register1" SrcPort 1 Points [35, 0] Branch { DstBlock "Dly" DstPort 1 } Branch { Points [0, -50] DstBlock "Goto1" DstPort 1 } Branch { Points [0, 320; -270, 0] DstBlock "Gateway Out6" DstPort 1 } } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "Gateway Out4" SrcPort 1 DstBlock "DAC\nScope1" DstPort 1 } Line { SrcBlock "Gateway Out5" SrcPort 1 DstBlock "DAC\nScope1" DstPort 2 } Line { Name "Err" Labels [0, 0] SrcBlock "Gateway Out1" SrcPort 1 DstBlock "DAC\nScope1" DstPort 3 } Line { Name "Err Filt" Labels [0, 0] SrcBlock "Gateway Out2" SrcPort 1 DstBlock "DAC\nScope1" DstPort 4 } Line { Name "Dly" Labels [0, 0] SrcBlock "Gateway Out3" SrcPort 1 DstBlock "DAC\nScope1" DstPort 5 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 Points [15, 0; 0, -105] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 Points [0, 95; -15, 0] DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "DAC\nScope1" DstPort 6 } Line { SrcBlock "Up Sample1" SrcPort 1 Points [30, 0] Branch { Points [0, -50] DstBlock "Accumulator" DstPort 2 } Branch { Points [0, 20; 235, 0] Branch { DstBlock "Counter" DstPort 1 } Branch { Points [0, -120] DstBlock "Register1" DstPort 2 } } } } } Block { BlockType SubSystem Name "Variable\nDelay" Ports [2, 1] Position [390, 88, 445, 117] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Variable\nDelay" Location [2, 74, 1270, 830] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" Position [200, 33, 230, 47] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "dly" Position [200, 58, 230, 72] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "ASR" Ports [2, 1] Position [295, 27, 345, 78] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any elem" "ent in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sparta" "n-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15" " 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54" " 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black" "');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Q" Position [370, 48, 400, 62] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "D" SrcPort 1 DstBlock "ASR" DstPort 1 } Line { SrcBlock "ASR" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "dly" SrcPort 1 DstBlock "ASR" DstPort 2 } } } Block { BlockType SubSystem Name "Variable\nDelay1" Ports [2, 1] Position [390, 138, 445, 167] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Variable\nDelay1" Location [2, 74, 1270, 830] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" Position [200, 33, 230, 47] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "dly" Position [200, 58, 230, 72] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "ASR" Ports [2, 1] Position [295, 27, 345, 78] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any elem" "ent in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sparta" "n-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15" " 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54" " 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black" "');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Q" Position [370, 48, 400, 62] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "dly" SrcPort 1 DstBlock "ASR" DstPort 2 } Line { SrcBlock "ASR" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 DstBlock "ASR" DstPort 1 } } } Block { BlockType SubSystem Name "Variable\nDelay2" Ports [2, 1] Position [390, 188, 445, 217] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Variable\nDelay2" Location [2, 74, 1270, 830] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" Position [200, 33, 230, 47] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "dly" Position [200, 58, 230, 72] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "ASR" Ports [2, 1] Position [295, 27, 345, 78] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any elem" "ent in the delay line can be addressed and driven onto the output port.
Hardware notes: Implemented using SRL16s. If Virtex-4, Virtex-II or Sparta" "n-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15" " 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54" " 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 " "0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT" ": begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black" "');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Q" Position [370, 48, 400, 62] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "D" SrcPort 1 DstBlock "ASR" DstPort 1 } Line { SrcBlock "ASR" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "dly" SrcPort 1 DstBlock "ASR" DstPort 2 } } } Line { SrcBlock "Upconverted" SrcPort 1 Points [15, 0] Branch { Points [0, -35] DstBlock "Mux1" DstPort 2 } Branch { DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Downconverter" SrcPort 1 DstBlock "Decimate &\nFilter" DstPort 1 } Line { SrcBlock "Downconverter" SrcPort 2 DstBlock "Decimate &\nFilter" DstPort 2 } Line { SrcBlock "Carrier Recovery" SrcPort 1 Points [-20, 0; 0, -85] DstBlock "Downconverter" DstPort 5 } Line { SrcBlock "Decimate &\nFilter" SrcPort 3 Points [95, 0; 0, 120] DstBlock "Timing Recovery" DstPort 1 } Line { SrcBlock "From" SrcPort 1 Points [115, 0] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, -20; 215, 0; 0, 95] DstBlock "Downconverter" DstPort 2 } } Line { SrcBlock "Mux1" SrcPort 1 Points [35, 0] Branch { DstBlock "Variable\nDelay" DstPort 1 } Branch { Points [0, -40] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "ADC1" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Gateway Out1" SrcPort 1 DstBlock "ADC1" DstPort 1 } Line { SrcBlock "Timing Recovery" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [-15, 0; 0, -85] Branch { Points [0, -50] Branch { Points [0, -50] DstBlock "Variable\nDelay" DstPort 2 } Branch { DstBlock "Variable\nDelay1" DstPort 2 } } Branch { DstBlock "Variable\nDelay2" DstPort 2 } } Line { SrcBlock "From1" SrcPort 1 Points [-55, 0] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Variable\nDelay" SrcPort 1 DstBlock "Downconverter" DstPort 1 } Line { SrcBlock "RX I" SrcPort 1 DstBlock "RX_I" DstPort 1 } Line { SrcBlock "RX Q" SrcPort 1 DstBlock "RX_Q" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Mux1" DstPort 4 } Line { SrcBlock "RX_I" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "RX_Q" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Variable\nDelay1" SrcPort 1 Points [15, 0; 0, -30] DstBlock "Downconverter" DstPort 3 } Line { SrcBlock "Variable\nDelay2" SrcPort 1 Points [20, 0; 0, -70] DstBlock "Downconverter" DstPort 4 } Line { SrcBlock "Decimate &\nFilter" SrcPort 1 Points [100, 0] Branch { DstBlock "Goto4" DstPort 1 } Branch { Points [0, 115] Branch { Points [0, 0] DstBlock "Carrier Recovery" DstPort 1 } Branch { Points [0, 75] DstBlock "Timing Recovery" DstPort 2 } } } Line { SrcBlock "Decimate &\nFilter" SrcPort 2 Points [105, 0] Branch { DstBlock "Goto5" DstPort 1 } Branch { Points [0, 110] DstBlock "Carrier Recovery" DstPort 2 } } Line { SrcBlock "Convert2" SrcPort 1 Points [10, 0; 0, 5] DstBlock "AGC\nHook" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 Points [10, 0; 0, -15] DstBlock "AGC\nHook" DstPort 2 } Line { SrcBlock "AGC\nHook" SrcPort 1 Points [30, 0; 0, -60] DstBlock "Variable\nDelay1" DstPort 1 } Line { SrcBlock "AGC\nHook" SrcPort 2 Points [40, 0; 0, -30] DstBlock "Variable\nDelay2" DstPort 1 } } } Block { BlockType Reference Name "Register" Ports [1, 1] Position [980, 66, 1020, 104] SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "40,38,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa" "tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3" "8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4" "0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 " "0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_" "label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register1" Ports [1, 1] Position [980, 101, 1020, 139] SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "40,38,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa" "tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3" "8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4" "0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 " "0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_" "label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register2" Ports [1, 1] Position [980, 136, 1020, 174] SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "40,38,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa" "tch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 3" "8 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 4" "0 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 " "0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_" "label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Registers" Ports [] Position [945, 225, 1026, 341] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Registers" Location [117, 74, 1416, 876] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Constant" Ports [0, 1] Position [610, 1612, 640, 1628] SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Boolean" const "1" n_bits "16" bin_pt "14" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instruction" "s is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.2" sg_icon_stat "30,16,1,1,white,blue,0,06094819,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2" "7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17" " 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2" "6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMME" "NT: end icon text');\n" } Block { BlockType Reference Name "Convert" Ports [1, 1] Position [650, 415, 695, 445] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating req" "uire hardware resources; truncating and wrapping do not." arith_type "Unsigned" n_bits "17" bin_pt "14" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2" "3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20" " 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 " "30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert1" Ports [1, 1] Position [650, 315, 695, 345] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating req" "uire hardware resources; truncating and wrapping do not." arith_type "Unsigned" n_bits "34" bin_pt "34" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2" "3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20" " 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 " "30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert2" Ports [1, 1] Position [650, 225, 695, 255] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating req" "uire hardware resources; truncating and wrapping do not." arith_type "Unsigned" n_bits "34" bin_pt "34" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2" "3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20" " 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 " "30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert3" Ports [1, 1] Position [650, 510, 695, 540] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating req" "uire hardware resources; truncating and wrapping do not." arith_type "Boolean" n_bits "17" bin_pt "14" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2" "3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20" " 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 " "30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert4" Ports [1, 1] Position [650, 790, 695, 820] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating req" "uire hardware resources; truncating and wrapping do not." arith_type "Unsigned" n_bits "17" bin_pt "10" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2" "3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20" " 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 " "30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert7" Ports [1, 1] Position [650, 885, 695, 915] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating req" "uire hardware resources; truncating and wrapping do not." arith_type "Boolean" n_bits "17" bin_pt "14" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "45,30,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2" "3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20" " 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 " "30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample" Ports [1, 1] Position [145, 421, 185, 449] SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls" " determine the hardware implementation. The cost in hardware of different im" "plementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 2 0 0 0 0 0]" has_advanced_control "0" sggui_pos "759,116,360,300" block_type "dsamp" block_version "10.1" sg_icon_stat "40,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar" "row}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Down Sample1" Ports [1, 1] Position [735, 416, 775, 444] SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls" " determine the hardware implementation. The cost in hardware of different im" "plementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "759,116,360,300" block_type "dsamp" block_version "10.1" sg_icon_stat "40,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar" "row}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Down Sample2" Ports [1, 1] Position [735, 316, 775, 344] SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls" " determine the hardware implementation. The cost in hardware of different im" "plementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[17 34 0 0 0 0 0]" has_advanced_control "0" sggui_pos "759,116,360,300" block_type "dsamp" block_version "10.1" sg_icon_stat "40,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar" "row}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Down Sample3" Ports [1, 1] Position [735, 226, 775, 254] SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls" " determine the hardware implementation. The cost in hardware of different im" "plementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[17 34 0 0 0 0 0]" has_advanced_control "0" sggui_pos "759,116,360,300" block_type "dsamp" block_version "10.1" sg_icon_stat "40,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar" "row}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Down Sample4" Ports [1, 1] Position [735, 791, 775, 819] SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls" " determine the hardware implementation. The cost in hardware of different im" "plementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[9 17 0 0 0 0 0]" has_advanced_control "0" sggui_pos "759,116,360,300" block_type "dsamp" block_version "10.1" sg_icon_stat "40,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar" "row}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Down Sample5" Ports [1, 1] Position [735, 691, 775, 719] SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls" " determine the hardware implementation. The cost in hardware of different im" "plementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[16 32 0 0 0 0 0]" has_advanced_control "0" sggui_pos "759,116,360,300" block_type "dsamp" block_version "10.1" sg_icon_stat "40,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar" "row}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Down Sample6" Ports [1, 1] Position [735, 601, 775, 629] SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls" " determine the hardware implementation. The cost in hardware of different im" "plementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[16 32 0 0 0 0 0]" has_advanced_control "0" sggui_pos "759,116,360,300" block_type "dsamp" block_version "10.1" sg_icon_stat "40,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar" "row}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Down Sample7" Ports [1, 1] Position [735, 886, 775, 914] SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls" " determine the hardware implementation. The cost in hardware of different im" "plementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "759,116,360,300" block_type "dsamp" block_version "10.1" sg_icon_stat "40,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar" "row}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType Reference Name "Down Sample8" Ports [1, 1] Position [735, 511, 775, 539] SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls" " determine the hardware implementation. The cost in hardware of different im" "plementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "759,116,360,300" block_type "dsamp" block_version "10.1" sg_icon_stat "40,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar" "row}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" "\n" } Block { BlockType From Name "From" Position [565, 1576, 605, 1604] CloseFcn "tagdialog Close" GotoTag "VIQ" TagVisibility "global" } Block { BlockType Reference Name "From Register" Ports [0, 1] Position [135, 132, 195, 188] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'dac1Sel'" init "dac1Sel" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "2" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register1" Ports [0, 1] Position [135, 217, 195, 273] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'dac2Sel'" init "dac2Sel" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "2" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register10" Ports [0, 1] Position [555, 497, 615, 553] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'timingReset'" init "timingReset" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "1" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register11" Ports [0, 1] Position [555, 872, 615, 928] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'cfoReset'" init "cfoReset" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "1" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register12" Ports [0, 1] Position [465, 777, 525, 833] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'cfoK'" init "cfoK" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register13" Ports [0, 1] Position [555, 677, 615, 733] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'cfoKI'" init "cfoKI" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register14" Ports [0, 1] Position [555, 587, 615, 643] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'cfoKP'" init "cfoKP" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register15" Ports [0, 1] Position [555, 1062, 615, 1118] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'initialDelay'" init "initialDelay" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "2" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register16" Ports [0, 1] Position [555, 1157, 615, 1213] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'cfoEnable'" init "cfoEnable" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "1" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register17" Ports [0, 1] Position [555, 1247, 615, 1303] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'otrBenefit'" init "benefit" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register18" Ports [0, 1] Position [555, 1337, 615, 1393] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'otrCost'" init "cost" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register19" Ports [0, 1] Position [555, 1427, 615, 1483] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'viqReset'" init "0" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "1" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register2" Ports [0, 1] Position [45, 407, 105, 463] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'txModSel'" init "txModSel" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "2" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register3" Ports [0, 1] Position [45, 512, 105, 568] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'upConv'" init "upConv" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register4" Ports [0, 1] Position [135, 302, 195, 358] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'dac3Sel'" init "dac3Sel" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "1" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register5" Ports [0, 1] Position [555, 967, 615, 1023] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'downConv'" init "downConv" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register6" Ports [0, 1] Position [555, 132, 615, 188] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'rxInputSel'" init "rxInputSel" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "2" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register7" Ports [0, 1] Position [465, 402, 525, 458] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'timingK'" init "timingK" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register8" Ports [0, 1] Position [465, 302, 525, 358] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'timingKP'" init "timingKP" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register9" Ports [0, 1] Position [465, 212, 525, 268] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Bl" "ock" infoedit "Register block that reads data to a shared " "memory register. Delay of one sample period." shared_memory_name "'timingKI'" init "timingKI" period "1/8" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType From Name "From1" Position [565, 1666, 605, 1694] CloseFcn "tagdialog Close" GotoTag "RSSI" TagVisibility "global" } Block { BlockType From Name "From2" Position [565, 1756, 605, 1784] CloseFcn "tagdialog Close" GotoTag "OTR" TagVisibility "global" } Block { BlockType Goto Name "Goto1" Position [760, 987, 850, 1003] ShowName off GotoTag "DOWNCONV" TagVisibility "global" } Block { BlockType Goto Name "Goto10" Position [250, 322, 340, 338] ShowName off GotoTag "DAC3SEL" TagVisibility "global" } Block { BlockType Goto Name "Goto11" Position [815, 517, 905, 533] ShowName off GotoTag "TIMING_RESET" TagVisibility "global" } Block { BlockType Goto Name "Goto12" Position [815, 892, 905, 908] ShowName off GotoTag "CFO_RESET" TagVisibility "global" } Block { BlockType Goto Name "Goto13" Position [815, 797, 905, 813] ShowName off GotoTag "CFO_K" TagVisibility "global" } Block { BlockType Goto Name "Goto14" Position [815, 697, 905, 713] ShowName off GotoTag "CFO_KI" TagVisibility "global" } Block { BlockType Goto Name "Goto15" Position [815, 607, 905, 623] ShowName off GotoTag "CFO_KP" TagVisibility "global" } Block { BlockType Goto Name "Goto16" Position [815, 1082, 905, 1098] ShowName off GotoTag "INITIALDELAY" TagVisibility "global" } Block { BlockType Goto Name "Goto17" Position [815, 1177, 905, 1193] ShowName off GotoTag "CFO_ENABLECORRECTION" TagVisibility "global" } Block { BlockType Goto Name "Goto18" Position [815, 1267, 905, 1283] ShowName off GotoTag "BENEFIT" TagVisibility "global" } Block { BlockType Goto Name "Goto19" Position [815, 1357, 905, 1373] ShowName off GotoTag "COST" TagVisibility "global" } Block { BlockType Goto Name "Goto2" Position [815, 152, 905, 168] ShowName off GotoTag "RXINPUTSEL" TagVisibility "global" } Block { BlockType Goto Name "Goto20" Position [815, 1447, 905, 1463] ShowName off GotoTag "VIQRESET" TagVisibility "global" } Block { BlockType Goto Name "Goto3" Position [815, 422, 905, 438] ShowName off GotoTag "TIMING_K" TagVisibility "global" } Block { BlockType Goto Name "Goto4" Position [250, 152, 340, 168] ShowName off GotoTag "DAC1SEL" TagVisibility "global" } Block { BlockType Goto Name "Goto5" Position [250, 237, 340, 253] ShowName off GotoTag "DAC2SEL" TagVisibility "global" } Block { BlockType Goto Name "Goto6" Position [815, 322, 905, 338] ShowName off GotoTag "TIMING_KP" TagVisibility "global" } Block { BlockType Goto Name "Goto7" Position [815, 232, 905, 248] ShowName off GotoTag "TIMING_KI" TagVisibility "global" } Block { BlockType Goto Name "Goto8" Position [250, 427, 340, 443] ShowName off GotoTag "TXMODSEL" TagVisibility "global" } Block { BlockType Goto Name "Goto9" Position [250, 532, 340, 548] ShowName off GotoTag "UPCONV" TagVisibility "global" } Block { BlockType Reference Name "Reinterpret" Ports [1, 1] Position [130, 524, 205, 556] SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the bi" "nary representation. You can changed the signal between signed and unsigned" ", and relocate the binary point.

Hardware notes: In hardware this block " "costs nothing.

Example: Suppose the input is 6 bits wide, signed, with " "2 fractional bits, and the output is forced to unsigned with 0 fractional bit" "s. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outpu" "t of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "32" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "75,32,1,1,white,blue,0,8982c1db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 2" "4 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20" " 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 " "32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: en" "d icon text');\n" } Block { BlockType Reference Name "Reinterpret1" Ports [1, 1] Position [640, 979, 715, 1011] SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the bi" "nary representation. You can changed the signal between signed and unsigned" ", and relocate the binary point.

Hardware notes: In hardware this block " "costs nothing.

Example: Suppose the input is 6 bits wide, signed, with " "2 fractional bits, and the output is forced to unsigned with 0 fractional bit" "s. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outpu" "t of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "32" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "75,32,1,1,white,blue,0,8982c1db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 2" "4 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20" " 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 " "32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: en" "d icon text');\n" } Block { BlockType Reference Name "Reinterpret2" Ports [1, 1] Position [550, 414, 625, 446] SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the bi" "nary representation. You can changed the signal between signed and unsigned" ", and relocate the binary point.

Hardware notes: In hardware this block " "costs nothing.

Example: Suppose the input is 6 bits wide, signed, with " "2 fractional bits, and the output is forced to unsigned with 0 fractional bit" "s. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outpu" "t of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "29" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "75,32,1,1,white,blue,0,8982c1db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 2" "4 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20" " 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 " "32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: en" "d icon text');\n" } Block { BlockType Reference Name "Reinterpret3" Ports [1, 1] Position [550, 314, 625, 346] SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the bi" "nary representation. You can changed the signal between signed and unsigned" ", and relocate the binary point.

Hardware notes: In hardware this block " "costs nothing.

Example: Suppose the input is 6 bits wide, signed, with " "2 fractional bits, and the output is forced to unsigned with 0 fractional bit" "s. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outpu" "t of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "32" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "75,32,1,1,white,blue,0,8982c1db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 2" "4 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20" " 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 " "32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: en" "d icon text');\n" } Block { BlockType Reference Name "Reinterpret4" Ports [1, 1] Position [550, 224, 625, 256] SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the bi" "nary representation. You can changed the signal between signed and unsigned" ", and relocate the binary point.

Hardware notes: In hardware this block " "costs nothing.

Example: Suppose the input is 6 bits wide, signed, with " "2 fractional bits, and the output is forced to unsigned with 0 fractional bit" "s. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outpu" "t of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "32" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "75,32,1,1,white,blue,0,8982c1db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 2" "4 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20" " 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 " "32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: en" "d icon text');\n" } Block { BlockType Reference Name "Reinterpret5" Ports [1, 1] Position [550, 789, 625, 821] SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the bi" "nary representation. You can changed the signal between signed and unsigned" ", and relocate the binary point.

Hardware notes: In hardware this block " "costs nothing.

Example: Suppose the input is 6 bits wide, signed, with " "2 fractional bits, and the output is forced to unsigned with 0 fractional bit" "s. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outpu" "t of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "25" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "75,32,1,1,white,blue,0,8982c1db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 2" "4 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20" " 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 " "32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: en" "d icon text');\n" } Block { BlockType Reference Name "Reinterpret6" Ports [1, 1] Position [640, 689, 715, 721] SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the bi" "nary representation. You can changed the signal between signed and unsigned" ", and relocate the binary point.

Hardware notes: In hardware this block " "costs nothing.

Example: Suppose the input is 6 bits wide, signed, with " "2 fractional bits, and the output is forced to unsigned with 0 fractional bit" "s. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outpu" "t of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "32" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "75,32,1,1,white,blue,0,8982c1db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 2" "4 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20" " 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 " "32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: en" "d icon text');\n" } Block { BlockType Reference Name "Reinterpret7" Ports [1, 1] Position [640, 599, 715, 631] SourceBlock "xbsIndex_r4/Reinterpret" SourceType "Xilinx Type Reinterpreter Block" infoedit "Changes signal type without altering the bi" "nary representation. You can changed the signal between signed and unsigned" ", and relocate the binary point.

Hardware notes: In hardware this block " "costs nothing.

Example: Suppose the input is 6 bits wide, signed, with " "2 fractional bits, and the output is forced to unsigned with 0 fractional bit" "s. Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outpu" "t of 56 (111000 in binary)." force_arith_type on arith_type "Unsigned" force_bin_pt on bin_pt "32" has_advanced_control "0" sggui_pos "20,20,336,312" block_type "reinterpret" block_version "10.1" sg_icon_stat "75,32,1,1,white,blue,0,8982c1db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 2" "4 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20" " 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 " "32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg" "in icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: en" "d icon text');\n" } Block { BlockType Reference Name "To Register" Ports [2, 1] Position [685, 1577, 745, 1633] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'viq'" init "0" ownership "Locally owned and initialized" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,266" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "To Register1" Ports [2, 1] Position [685, 1667, 745, 1723] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'rssi'" init "0" ownership "Locally owned and initialized" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,266" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "To Register2" Ports [2, 1] Position [685, 1757, 745, 1813] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Bloc" "k" infoedit "Register block that writes data to a shared" " memory register. Delay of one sample period." shared_memory_name "'otr'" init "0" ownership "Locally owned and initialized" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,266" block_type "toreg" block_version "10.1.2" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black')" ";port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\n" "fprintf('','COMMENT: end icon text');\n" } Line { SrcBlock "From Register" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "From Register1" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "From Register2" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "From Register3" SrcPort 1 DstBlock "Reinterpret" DstPort 1 } Line { SrcBlock "Reinterpret" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "From Register4" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "From Register5" SrcPort 1 DstBlock "Reinterpret1" DstPort 1 } Line { SrcBlock "Reinterpret1" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "From Register6" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "From Register7" SrcPort 1 DstBlock "Reinterpret2" DstPort 1 } Line { SrcBlock "Reinterpret2" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "From Register8" SrcPort 1 DstBlock "Reinterpret3" DstPort 1 } Line { SrcBlock "Reinterpret3" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "From Register9" SrcPort 1 DstBlock "Reinterpret4" DstPort 1 } Line { SrcBlock "Reinterpret4" SrcPort 1 DstBlock "Convert2" DstPort 1 } Line { SrcBlock "Convert2" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "From Register10" SrcPort 1 DstBlock "Convert3" DstPort 1 } Line { SrcBlock "Convert3" SrcPort 1 DstBlock "Down Sample8" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "From Register12" SrcPort 1 DstBlock "Reinterpret5" DstPort 1 } Line { SrcBlock "Reinterpret5" SrcPort 1 DstBlock "Convert4" DstPort 1 } Line { SrcBlock "Convert4" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "From Register13" SrcPort 1 DstBlock "Reinterpret6" DstPort 1 } Line { SrcBlock "Reinterpret6" SrcPort 1 DstBlock "Down Sample5" DstPort 1 } Line { SrcBlock "From Register14" SrcPort 1 DstBlock "Reinterpret7" DstPort 1 } Line { SrcBlock "Reinterpret7" SrcPort 1 DstBlock "Down Sample6" DstPort 1 } Line { SrcBlock "From Register11" SrcPort 1 DstBlock "Convert7" DstPort 1 } Line { SrcBlock "Convert7" SrcPort 1 DstBlock "Down Sample7" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "Down Sample5" SrcPort 1 DstBlock "Goto14" DstPort 1 } Line { SrcBlock "Down Sample6" SrcPort 1 DstBlock "Goto15" DstPort 1 } Line { SrcBlock "Down Sample7" SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "Down Sample8" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "From Register15" SrcPort 1 DstBlock "Goto16" DstPort 1 } Line { SrcBlock "From Register16" SrcPort 1 DstBlock "Goto17" DstPort 1 } Line { SrcBlock "From Register17" SrcPort 1 DstBlock "Goto18" DstPort 1 } Line { SrcBlock "From Register18" SrcPort 1 DstBlock "Goto19" DstPort 1 } Line { SrcBlock "From" SrcPort 1 DstBlock "To Register" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "To Register1" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "To Register2" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [15, 0] Branch { Points [0, 90] Branch { DstBlock "To Register1" DstPort 2 } Branch { Points [0, 90] DstBlock "To Register2" DstPort 2 } } Branch { DstBlock "To Register" DstPort 2 } } Line { SrcBlock "From Register19" SrcPort 1 DstBlock "Goto20" DstPort 1 } Annotation { Name "Transmitter Registers" Position [121, 107] DropShadow on } Annotation { Name "Receiver Registers" Position [641, 112] DropShadow on } } } Block { BlockType Reference Name "Resource Estimator" Tag "resEstTag" Ports [] Position [516, 243, 569, 296] ShowName off AttributesFormatString "Resource\\nEstimator" SourceBlock "xbsIndex_r4/Resource Estimator" SourceType "Xilinx Resource Estimator Block" Slices "3401" FFs "3180" BRAMs "6" LUTs "4413" IOBs "244" EBMs "75" TBUFs "0" xl_use_estimator_area off est_options "Estimate" has_advanced_control "0" sggui_pos "107,63,336,293" block_type "resource_estimator" block_version "10.1.2" sg_icon_stat "53,53,-1,-1,blue,white,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa" "tch([0 53 53 0 ],[0 0 53 53 ],[0.98 0.96 0.92]);\npatch([13 4 16 4 13 27 31 3" "5 50 38 27 19 31 19 27 38 50 35 31 27 13 ],[6 15 27 39 48 48 44 48 48 36 47 3" "9 27 15 7 18 6 6 10 6 6 ],[0.77 0.82 0.91]);\nplot([0 53 53 0 0 ],[0 0 53 53 " "0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Transmitter" Ports [0, 3] Position [425, 72, 525, 168] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Transmitter" Location [213, 102, 1416, 724] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Goto Name "Goto1" Position [525, 71, 595, 89] ShowName off GotoTag "Upconverted" TagVisibility "global" } Block { BlockType Goto Name "Goto2" Position [165, 32, 255, 48] ShowName off GotoTag "Symbols_Tx_I" TagVisibility "global" } Block { BlockType Goto Name "Goto3" Position [165, 52, 255, 68] ShowName off GotoTag "Symbols_Tx_Q" TagVisibility "global" } Block { BlockType Goto Name "Goto6" Position [365, 27, 455, 43] ShowName off GotoTag "Symbols_Filt_I" TagVisibility "global" } Block { BlockType Goto Name "Goto7" Position [365, 47, 455, 63] ShowName off GotoTag "Symbols_Filt_Q" TagVisibility "global" } Block { BlockType SubSystem Name "Interpolate" Ports [2, 2] Position [210, 72, 265, 123] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Interpolate" Location [2, 74, 1430, 876] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" Position [90, 73, 120, 87] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" Position [90, 98, 120, 112] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Polyphase\nInterpolator2" Ports [1, 1] Position [210, 67, 255, 93] NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off MaskDescription "This block implements a interpolating p" "olyphase FIR filter. In this version, \nthe interpolation rate must be 8, and" " the filter must be of length 64." MaskPromptString "Filter Coefficients|Interpolation Rate|" "Input Sample Period|Coefficients - Num Bits|Coefficients - Binary Point|Multi" "plier Latency|Multiplier - Num Bits|Multiplier - Binary Point|Final Adder - N" "um Bits|Final Adder - Binary Point" MaskStyleString "edit,edit,edit,edit,edit,edit,edit,edit" ",edit,edit" MaskTunableValueString "on,on,on,on,on,on,on,on,on,on" MaskCallbackString "|||||||||" MaskEnableString "on,on,on,on,on,on,on,on,on,on" MaskVisibilityString "on,on,on,on,on,on,on,on,on,on" MaskToolTipString "on,on,on,on,on,on,on,on,on,on" MaskVarAliasString ",,,,,,,,," MaskVariables "h=@1;polyphaseBranches=@2;data_samplePe" "riod=@3;coeff_prec=@4;coeff_bp=@5;multLatency=@6;mult_prec=@7;mult_bp=@8;add_" "prec=@9;add_bp=@10;" MaskInitialization "subFilterLength = 8;" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskIconUnits "autoscale" MaskValueString "rcosfir(.3, 4, 8, 1,'sqrt')|8|1|14|13|1" "|18|17|16|15" MaskTabNameString ",,,,,,,,," System { Name "Polyphase\nInterpolator2" Location [2, 74, 1278, 980] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [230, 49, 265, 61] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "3-bit\nCounter" Ports [0, 1] Position [255, 432, 305, 458] SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counte" "rs are the least expensive in hardware. A count limited counter is implement" "ed by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "1" cnt_by_val "1" arith_type "Unsigned" n_bits "3" bin_pt "0" load_pin off rst off en off explicit_period "off" period "data_samplePeriod / polyphaseBranch" "es" dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[3 3 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" block_version "10.1" sg_icon_stat "50,26,1,1,white,blue,0,a170c862,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [660, 97, 710, 148] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [660, 167, 710, 218] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [745, 157, 795, 208] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub3" Ports [2, 1] Position [660, 287, 710, 338] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub4" Ports [2, 1] Position [660, 357, 710, 408] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub5" Ports [2, 1] Position [745, 302, 795, 353] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub6" Ports [2, 1] Position [845, 222, 895, 273] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "add_prec" bin_pt "add_bp" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 21 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [268, 90, 292, 115] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [268, 140, 292, 165] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [268, 185, 292, 210] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [268, 235, 292, 260] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [268, 280, 292, 305] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay7" Ports [1, 1] Position [268, 330, 292, 355] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay8" Ports [1, 1] Position [268, 375, 292, 400] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult" Ports [2, 1] Position [535, 62, 580, 98] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [535, 117, 580, 153] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [535, 162, 580, 198] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [535, 212, 580, 248] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult4" Ports [2, 1] Position [535, 257, 580, 293] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult5" Ports [2, 1] Position [535, 307, 580, 343] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult6" Ports [2, 1] Position [535, 352, 580, 388] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult7" Ports [2, 1] Position [535, 402, 580, 438] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 0" Ports [1, 1] Position [395, 76, 445, 104] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(1:subFilterLength)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 1" Ports [1, 1] Position [395, 131, 445, 159] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(1*subFilterLength+1:2*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 2" Ports [1, 1] Position [395, 176, 445, 204] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(2*subFilterLength+1:3*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 3" Ports [1, 1] Position [395, 226, 445, 254] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(3*subFilterLength+1:4*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 4" Ports [1, 1] Position [395, 271, 445, 299] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(4*subFilterLength+1:5*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 12 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 5" Ports [1, 1] Position [395, 321, 445, 349] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(5*subFilterLength+1:6*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 6" Ports [1, 1] Position [395, 366, 445, 394] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(6*subFilterLength+1:7*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 7" Ports [1, 1] Position [395, 416, 445, 444] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(7*subFilterLength+1:8*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "Up Sample" Ports [1, 1] Position [320, 53, 350, 87] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample1" Ports [1, 1] Position [320, 108, 350, 142] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample2" Ports [1, 1] Position [320, 153, 350, 187] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample3" Ports [1, 1] Position [320, 203, 350, 237] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample4" Ports [1, 1] Position [320, 248, 350, 282] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample5" Ports [1, 1] Position [320, 298, 350, 332] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample6" Ports [1, 1] Position [320, 343, 350, 377] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample7" Ports [1, 1] Position [320, 393, 350, 427] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Y" Position [960, 243, 990, 257] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "Up Sample7" SrcPort 1 DstBlock "Mult7" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 DstBlock "Mult6" DstPort 1 } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "Mult5" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Mult3" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Mult" DstPort 1 } Line { SrcBlock "AddSub5" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "Mult7" SrcPort 1 Points [45, 0; 0, -25] DstBlock "AddSub4" DstPort 2 } Line { SrcBlock "Mult6" SrcPort 1 DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "Mult5" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "Mult4" SrcPort 1 Points [60, 0] DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [15, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 Points [10, 0; 0, 45] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "Mult3" SrcPort 1 Points [60, 0] DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Mult" SrcPort 1 Points [40, 0; 0, 30] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "3-bit\nCounter" SrcPort 1 Points [70, 0; 0, -15] Branch { DstBlock "ROM 7" DstPort 1 } Branch { Points [0, -50] Branch { DstBlock "ROM 6" DstPort 1 } Branch { Points [0, -45] Branch { DstBlock "ROM 5" DstPort 1 } Branch { Points [0, -50] Branch { DstBlock "ROM 4" DstPort 1 } Branch { Points [0, -45] Branch { DstBlock "ROM 3" DstPort 1 } Branch { Points [0, -50] Branch { DstBlock "ROM 2" DstPort 1 } Branch { Points [0, -45] Branch { DstBlock "ROM 1" DstPort 1 } Branch { DstBlock "ROM 0" DstPort 1 } } } } } } } } Line { SrcBlock "ROM 7" SrcPort 1 DstBlock "Mult7" DstPort 2 } Line { SrcBlock "ROM 6" SrcPort 1 DstBlock "Mult6" DstPort 2 } Line { SrcBlock "ROM 5" SrcPort 1 DstBlock "Mult5" DstPort 2 } Line { SrcBlock "ROM 4" SrcPort 1 DstBlock "Mult4" DstPort 2 } Line { SrcBlock "ROM 3" SrcPort 1 DstBlock "Mult3" DstPort 2 } Line { SrcBlock "ROM 2" SrcPort 1 DstBlock "Mult2" DstPort 2 } Line { SrcBlock "ROM 1" SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "ROM 0" SrcPort 1 DstBlock "Mult" DstPort 2 } Line { SrcBlock "X" SrcPort 1 Points [10, 0; 0, 15] Branch { DstBlock "Delay2" DstPort 1 } Branch { DstBlock "Up Sample" DstPort 1 } } Line { SrcBlock "Delay8" SrcPort 1 Points [0, 5] DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "Delay7" SrcPort 1 Points [0, 0] Branch { DstBlock "Up Sample6" DstPort 1 } Branch { DstBlock "Delay8" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 Points [0, 0; 0, 5] Branch { DstBlock "Up Sample5" DstPort 1 } Branch { DstBlock "Delay7" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 Points [0, 0] Branch { DstBlock "Up Sample4" DstPort 1 } Branch { DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "Delay4" SrcPort 1 Points [0, 0; 0, 5] Branch { DstBlock "Up Sample3" DstPort 1 } Branch { DstBlock "Delay5" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, 0] Branch { DstBlock "Up Sample2" DstPort 1 } Branch { DstBlock "Delay4" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [0, 0; 0, 5] Branch { DstBlock "Up Sample1" DstPort 1 } Branch { DstBlock "Delay3" DstPort 1 } } } } Block { BlockType SubSystem Name "Polyphase\nInterpolator3" Ports [1, 1] Position [210, 92, 255, 118] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off MaskDescription "This block implements a interpolating p" "olyphase FIR filter. In this version, \nthe interpolation rate must be 8, and" " the filter must be of length 64." MaskPromptString "Filter Coefficients|Interpolation Rate|" "Input Sample Period|Coefficients - Num Bits|Coefficients - Binary Point|Multi" "plier Latency|Multiplier - Num Bits|Multiplier - Binary Point|Final Adder - N" "um Bits|Final Adder - Binary Point" MaskStyleString "edit,edit,edit,edit,edit,edit,edit,edit" ",edit,edit" MaskTunableValueString "on,on,on,on,on,on,on,on,on,on" MaskCallbackString "|||||||||" MaskEnableString "on,on,on,on,on,on,on,on,on,on" MaskVisibilityString "on,on,on,on,on,on,on,on,on,on" MaskToolTipString "on,on,on,on,on,on,on,on,on,on" MaskVarAliasString ",,,,,,,,," MaskVariables "h=@1;polyphaseBranches=@2;data_samplePe" "riod=@3;coeff_prec=@4;coeff_bp=@5;multLatency=@6;mult_prec=@7;mult_bp=@8;add_" "prec=@9;add_bp=@10;" MaskInitialization "subFilterLength = 8;" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskIconUnits "autoscale" MaskValueString "rcosfir(.3, 4, 8, 1,'sqrt')|8|1|14|13|1" "|18|17|16|15" MaskTabNameString ",,,,,,,,," System { Name "Polyphase\nInterpolator3" Location [6, 74, 955, 931] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [230, 49, 265, 61] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "3-bit\nCounter" Ports [0, 1] Position [255, 432, 305, 458] SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counte" "rs are the least expensive in hardware. A count limited counter is implement" "ed by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "1" cnt_by_val "1" arith_type "Unsigned" n_bits "3" bin_pt "0" load_pin off rst off en off explicit_period "off" period "data_samplePeriod / polyphaseBranch" "es" dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[3 3 0 3 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" block_version "10.1" sg_icon_stat "50,26,1,1,white,blue,0,a170c862,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [660, 97, 710, 148] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [660, 167, 710, 218] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [745, 157, 795, 208] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub3" Ports [2, 1] Position [660, 287, 710, 338] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub4" Ports [2, 1] Position [660, 357, 710, 408] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[10 0 0 19 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub5" Ports [2, 1] Position [745, 302, 795, 353] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1" "}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub6" Ports [2, 1] Position [845, 222, 895, 273] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "add_prec" bin_pt "add_bp" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[11 0 0 21 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [268, 90, 292, 115] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [268, 140, 292, 165] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [268, 185, 292, 210] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [268, 235, 292, 260] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [268, 280, 292, 305] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay7" Ports [1, 1] Position [268, 330, 292, 355] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay8" Ports [1, 1] Position [268, 375, 292, 400] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a c" "hain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1" sg_icon_stat "24,25,1,1,white,blue,0,fc531c0e,dow" "n" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult" Ports [2, 1] Position [535, 62, 580, 98] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [535, 117, 580, 153] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [535, 162, 580, 198] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [535, 212, 580, 248] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult4" Ports [2, 1] Position [535, 257, 580, 293] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult5" Ports [2, 1] Position [535, 307, 580, 343] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult6" Ports [2, 1] Position [535, 352, 580, 388] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult7" Ports [2, 1] Position [535, 402, 580, 438] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "mult_prec" bin_pt "mult_bp" quantization "Truncate" overflow "Flag as error" en off latency "multLatency" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -11 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 0" Ports [1, 1] Position [395, 76, 445, 104] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(1:subFilterLength)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 1" Ports [1, 1] Position [395, 131, 445, 159] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(1*subFilterLength+1:2*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 2" Ports [1, 1] Position [395, 176, 445, 204] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(2*subFilterLength+1:3*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 3" Ports [1, 1] Position [395, 226, 445, 254] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(3*subFilterLength+1:4*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 4" Ports [1, 1] Position [395, 271, 445, 299] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(4*subFilterLength+1:5*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 12 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 5" Ports [1, 1] Position [395, 321, 445, 349] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(5*subFilterLength+1:6*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 6" Ports [1, 1] Position [395, 366, 445, 394] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(6*subFilterLength+1:7*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "ROM 7" Ports [1, 1] Position [395, 416, 445, 444] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "polyphaseBranches" initVector "h(7*subFilterLength+1:8*subFilterLe" "ngth)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "coeff_prec" bin_pt "coeff_bp" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "Up Sample" Ports [1, 1] Position [320, 53, 350, 87] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample1" Ports [1, 1] Position [320, 108, 350, 142] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample2" Ports [1, 1] Position [320, 153, 350, 187] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample3" Ports [1, 1] Position [320, 203, 350, 237] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample4" Ports [1, 1] Position [320, 248, 350, 282] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample5" Ports [1, 1] Position [320, 298, 350, 332] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample6" Ports [1, 1] Position [320, 343, 350, 377] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample7" Ports [1, 1] Position [320, 393, 350, 427] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted va" "lues can be zeros or copies of the most recent input sample.

Hardware n" "otes: No hardware is needed if inserted values are copies of the input sample" "; otherwise, a mux and single bit flip-flop are used." sample_ratio "polyphaseBranches" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "usamp" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,8b0564a6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 " "7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 5" "0 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow" "}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Y" Position [960, 243, 990, 257] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Delay2" SrcPort 1 Points [0, 0; 0, 5] Branch { DstBlock "Delay3" DstPort 1 } Branch { DstBlock "Up Sample1" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, 0] Branch { DstBlock "Delay4" DstPort 1 } Branch { DstBlock "Up Sample2" DstPort 1 } } Line { SrcBlock "Delay4" SrcPort 1 Points [0, 0; 0, 5] Branch { DstBlock "Delay5" DstPort 1 } Branch { DstBlock "Up Sample3" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 Points [0, 0] Branch { DstBlock "Delay6" DstPort 1 } Branch { DstBlock "Up Sample4" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 Points [0, 0; 0, 5] Branch { DstBlock "Delay7" DstPort 1 } Branch { DstBlock "Up Sample5" DstPort 1 } } Line { SrcBlock "Delay7" SrcPort 1 Points [0, 0] Branch { DstBlock "Delay8" DstPort 1 } Branch { DstBlock "Up Sample6" DstPort 1 } } Line { SrcBlock "Delay8" SrcPort 1 Points [0, 5] DstBlock "Up Sample7" DstPort 1 } Line { SrcBlock "X" SrcPort 1 Points [10, 0; 0, 15] Branch { DstBlock "Up Sample" DstPort 1 } Branch { DstBlock "Delay2" DstPort 1 } } Line { SrcBlock "ROM 0" SrcPort 1 DstBlock "Mult" DstPort 2 } Line { SrcBlock "ROM 1" SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "ROM 2" SrcPort 1 DstBlock "Mult2" DstPort 2 } Line { SrcBlock "ROM 3" SrcPort 1 DstBlock "Mult3" DstPort 2 } Line { SrcBlock "ROM 4" SrcPort 1 DstBlock "Mult4" DstPort 2 } Line { SrcBlock "ROM 5" SrcPort 1 DstBlock "Mult5" DstPort 2 } Line { SrcBlock "ROM 6" SrcPort 1 DstBlock "Mult6" DstPort 2 } Line { SrcBlock "ROM 7" SrcPort 1 DstBlock "Mult7" DstPort 2 } Line { SrcBlock "3-bit\nCounter" SrcPort 1 Points [70, 0; 0, -15] Branch { Points [0, -50] Branch { Points [0, -45] Branch { Points [0, -50] Branch { Points [0, -45] Branch { Points [0, -50] Branch { Points [0, -45] Branch { DstBlock "ROM 0" DstPort 1 } Branch { DstBlock "ROM 1" DstPort 1 } } Branch { DstBlock "ROM 2" DstPort 1 } } Branch { DstBlock "ROM 3" DstPort 1 } } Branch { DstBlock "ROM 4" DstPort 1 } } Branch { DstBlock "ROM 5" DstPort 1 } } Branch { DstBlock "ROM 6" DstPort 1 } } Branch { DstBlock "ROM 7" DstPort 1 } } Line { SrcBlock "Mult" SrcPort 1 Points [40, 0; 0, 30] DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Mult3" SrcPort 1 Points [60, 0] DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 Points [10, 0; 0, 45] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [15, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "Mult4" SrcPort 1 Points [60, 0] DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "Mult5" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "Mult6" SrcPort 1 DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "Mult7" SrcPort 1 Points [45, 0; 0, -25] DstBlock "AddSub4" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "AddSub5" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "Mult" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Mult3" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "Mult5" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 DstBlock "Mult6" DstPort 1 } Line { SrcBlock "Up Sample7" SrcPort 1 DstBlock "Mult7" DstPort 1 } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Y" DstPort 1 } } } Block { BlockType Outport Name " I" Position [360, 73, 390, 87] NamePlacement "alternate" IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name " Q" Position [360, 98, 390, 112] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "I" SrcPort 1 DstBlock "Polyphase\nInterpolator2" DstPort 1 } Line { SrcBlock "Q" SrcPort 1 DstBlock "Polyphase\nInterpolator3" DstPort 1 } Line { SrcBlock "Polyphase\nInterpolator2" SrcPort 1 DstBlock " I" DstPort 1 } Line { SrcBlock "Polyphase\nInterpolator3" SrcPort 1 DstBlock " Q" DstPort 1 } } } Block { BlockType SubSystem Name "Random\nSymbols" Ports [0, 2] Position [25, 74, 90, 121] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Random\nSymbols" Location [53, 116, 1449, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType SubSystem Name "6bit Datasource" Ports [0, 2] Position [185, 181, 220, 234] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "6bit Datasource" Location [241, 488, 1261, 848] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Concat1" Ports [2, 1] Position [205, 126, 255, 164] ShowName off SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. O" "utput will be cast to an unsigned value with the binary point at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1" sg_icon_stat "50,38,1,1,white,blue,0,df1e5aba,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('" "black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Concat2" Ports [2, 1] Position [310, 130, 355, 190] ShowName off SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. O" "utput will be cast to an unsigned value with the binary point at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1" sg_icon_stat "45,60,1,1,white,blue,0,df1e5aba,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('" "black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Concat3" Ports [2, 1] Position [205, 204, 255, 251] ShowName off SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. O" "utput will be cast to an unsigned value with the binary point at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1" sg_icon_stat "50,47,1,1,white,blue,0,df1e5aba,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('" "black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Concat4" Ports [2, 1] Position [310, 215, 355, 275] ShowName off SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. O" "utput will be cast to an unsigned value with the binary point at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "10.1" sg_icon_stat "45,60,1,1,white,blue,0,df1e5aba,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\ncolor('" "black');port_label('input',2,'lo');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "LFSR" Ports [0, 1] Position [90, 125, 135, 145] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/LFSR" SourceType "Xilinx Linear Feedback Shift Regist" "er Block" lfsr_type "Fibonacci" gate_type "XOR" n_bits "txLSFR_numBits" polynomial "txLSFR_polynomials{1}" rst_value "txLSFR_initValues{1}" rst off en off reloadable_seed off input_type off output_type off arith_type "Unsigned" bin_pt "4" dbl_ovrd off explicit_period on period "1" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "20,20,348,412" block_type "lfsr" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,4b212927,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "LFSR1" Ports [0, 1] Position [90, 145, 135, 165] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/LFSR" SourceType "Xilinx Linear Feedback Shift Regist" "er Block" lfsr_type "Fibonacci" gate_type "XOR" n_bits "txLSFR_numBits" polynomial "txLSFR_polynomials{2}" rst_value "txLSFR_initValues{2}" rst off en off reloadable_seed off input_type off output_type off arith_type "Unsigned" bin_pt "4" dbl_ovrd off explicit_period on period "1" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "lfsr" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,4b212927,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "LFSR2" Ports [0, 1] Position [90, 165, 135, 185] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/LFSR" SourceType "Xilinx Linear Feedback Shift Regist" "er Block" lfsr_type "Fibonacci" gate_type "XOR" n_bits "txLSFR_numBits" polynomial "txLSFR_polynomials{3}" rst_value "txLSFR_initValues{3}" rst off en off reloadable_seed off input_type off output_type off arith_type "Unsigned" bin_pt "4" dbl_ovrd off explicit_period on period "1" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "lfsr" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,4b212927,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "LFSR3" Ports [0, 1] Position [95, 205, 140, 225] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/LFSR" SourceType "Xilinx Linear Feedback Shift Regist" "er Block" lfsr_type "Fibonacci" gate_type "XOR" n_bits "txLSFR_numBits" polynomial "txLSFR_polynomials{4}" rst_value "txLSFR_initValues{4}" rst off en off reloadable_seed off input_type off output_type off arith_type "Unsigned" bin_pt "4" dbl_ovrd off explicit_period on period "1" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "lfsr" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,4b212927,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "LFSR4" Ports [0, 1] Position [95, 230, 140, 250] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/LFSR" SourceType "Xilinx Linear Feedback Shift Regist" "er Block" lfsr_type "Fibonacci" gate_type "XOR" n_bits "txLSFR_numBits" polynomial "txLSFR_polynomials{5}" rst_value "txLSFR_initValues{5}" rst off en off reloadable_seed off input_type off output_type off arith_type "Unsigned" bin_pt "4" dbl_ovrd off explicit_period on period "1" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "lfsr" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,4b212927,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "LFSR5" Ports [0, 1] Position [95, 250, 140, 270] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/LFSR" SourceType "Xilinx Linear Feedback Shift Regist" "er Block" lfsr_type "Fibonacci" gate_type "XOR" n_bits "txLSFR_numBits" polynomial "txLSFR_polynomials{6}" rst_value "txLSFR_initValues{6}" rst off en off reloadable_seed off input_type off output_type off arith_type "Unsigned" bin_pt "4" dbl_ovrd off explicit_period on period "1" xl_use_area off xl_area "[0, 0, 0, 0, 0, 0, 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "lfsr" block_version "10.1" sg_icon_stat "45,20,1,1,white,blue,0,4b212927,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "I" Position [455, 153, 485, 167] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "Q" Position [455, 238, 485, 252] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "LFSR" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "LFSR1" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Concat2" DstPort 1 } Line { SrcBlock "LFSR2" SrcPort 1 DstBlock "Concat2" DstPort 2 } Line { SrcBlock "Concat3" SrcPort 1 DstBlock "Concat4" DstPort 1 } Line { SrcBlock "LFSR5" SrcPort 1 DstBlock "Concat4" DstPort 2 } Line { SrcBlock "LFSR3" SrcPort 1 DstBlock "Concat3" DstPort 1 } Line { SrcBlock "LFSR4" SrcPort 1 DstBlock "Concat3" DstPort 2 } Line { SrcBlock "Concat2" SrcPort 1 DstBlock "I" DstPort 1 } Line { SrcBlock "Concat4" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType Reference Name "Convert" Ports [1, 1] Position [520, 165, 550, 185] ShowName off SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating" " require hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "10.1" sg_icon_stat "30,20,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 " "15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 2" "7 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0" " 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert1" Ports [1, 1] Position [520, 205, 550, 225] ShowName off SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating" " require hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" block_version "10.1" sg_icon_stat "30,20,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphic" "s');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 " "15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 2" "7 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0" " 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType From Name "From2" Position [245, 160, 335, 180] NamePlacement "alternate" CloseFcn "tagdialog Close" GotoTag "TXMODSEL" TagVisibility "global" } Block { BlockType SubSystem Name "Modulation" Ports [3, 2] Position [365, 155, 440, 235] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Modulation" Location [147, 132, 1543, 934] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Mod Sel" Position [520, 263, 550, 277] IconDisplay "Port number" } Block { BlockType Inport Name "I Bits" Position [520, 398, 550, 412] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Q Bits" Position [520, 483, 550, 497] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "16QAM Mapper" Ports [1, 1] Position [715, 348, 765, 372] NamePlacement "alternate" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "length(modConstellation_qam16)" initVector "modConstellation_qam16./max(abs(mod" "Constellation_qam16))" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "8" bin_pt "7" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,24,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "16QAM Mapper1" Ports [1, 1] Position [715, 478, 765, 502] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "length(modConstellation_qam16)" initVector "modConstellation_qam16" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "8" bin_pt "7" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,24,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "2LSB" Ports [1, 1] Position [620, 351, 650, 369] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from" " each input sample and presents it at the output. The output type is ordinar" "ily unsigned with binary point at zero, but can be Boolean when the slice is " "one bit wide.

Hardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "10.1" sg_icon_stat "30,18,1,1,white,blue,0,b1026674,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24" " 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 " "27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]," "[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "2LSB1" Ports [1, 1] Position [620, 481, 650, 499] SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from" " each input sample and presents it at the output. The output type is ordinar" "ily unsigned with binary point at zero, but can be Boolean when the slice is " "one bit wide.

Hardware notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "10.1" sg_icon_stat "30,18,1,1,white,blue,0,b1026674,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24" " 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 " "27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]," "[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "64QAM Mapper" Ports [1, 1] Position [715, 393, 765, 417] NamePlacement "alternate" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "length(modConstellation_qam64)" initVector "modConstellation_qam64" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "8" bin_pt "7" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,24,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "64QAM Mapper1" Ports [1, 1] Position [715, 524, 765, 546] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "length(modConstellation_qam64)" initVector "modConstellation_qam64" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "8" bin_pt "7" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,22,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "Constant7" Ports [0, 1] Position [815, 416, 840, 434] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Signed (2's comp)" const "0" n_bits "8" bin_pt "7" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 ins" "tructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "10.1" sg_icon_stat "25,18,1,1,white,blue,0,72d575a1,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22" " 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 " "23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[" "0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMME" "NT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('" "','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Counter" Ports [0, 1] Position [120, 370, 180, 430] SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counte" "rs are the least expensive in hardware. A count limited counter is implement" "ed by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "log2(symbolRomLen)" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off use_rpm off xl_use_area off xl_area "[8 13 0 13 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "10.1" sg_icon_stat "60,60,1,1,white,blue,0,a170c862,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 " "4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 5" "4 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'out');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "LSB" Ports [1, 1] Position [360, 366, 390, 384] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from" " each input sample and presents it at the output. The output type is ordinar" "ily unsigned with binary point at zero, but can be Boolean when the slice is " "one bit wide.

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1" sg_icon_stat "30,18,1,1,white,blue,0,b1026674,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24" " 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 " "27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]," "[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "MSB" Ports [1, 1] Position [360, 411, 390, 429] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from" " each input sample and presents it at the output. The output type is ordinar" "ily unsigned with binary point at zero, but can be Boolean when the slice is " "one bit wide.

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "MSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1" sg_icon_stat "30,18,1,1,white,blue,0,b1026674,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24" " 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 " "27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]," "[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux2" Ports [5, 1] Position [890, 253, 915, 367] ShowName off SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 8 0 16 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1" sg_icon_stat "25,114,1,1,white,blue,3,4258e972,ri" "ght" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npat" "ch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 " "63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\np" "lot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end ico" "n graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bl" "ack');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');" "\ncolor('black');port_label('input',5,'d3');\ncolor('black');disp('\\bf{ z^{" "-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux3" Ports [5, 1] Position [890, 388, 915, 502] ShowName off SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[8 8 0 16 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1" sg_icon_stat "25,114,1,1,white,blue,3,4258e972,ri" "ght" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\npat" "ch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 52 " "63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);\np" "lot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end ico" "n graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('bl" "ack');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');" "\ncolor('black');port_label('input',5,'d3');\ncolor('black');disp('\\bf{ z^{" "-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "QPSK Map" Ports [1, 1] Position [715, 297, 765, 323] NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "QPSK Map" Location [508, 69, 1015, 527] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0." "500000]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Bit" Position [60, 33, 90, 47] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Constant6" Ports [0, 1] Position [15, 56, 80, 84] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Signed (2's comp)" const "modConstellation_qpsk(1)" n_bits "8" bin_pt "7" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 i" "nstructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1" sg_icon_stat "65,28,1,1,white,blue,0,c48e66b9,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 " "22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 2" "1 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'0.9921875');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant7" Ports [0, 1] Position [15, 85, 80, 115] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Signed (2's comp)" const "modConstellation_qpsk(2)" n_bits "8" bin_pt "7" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 i" "nstructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1" sg_icon_stat "65,30,1,1,white,blue,0,ba00a726,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 " "22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 2" "1 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'-1');\nfprint" "f('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux2" Ports [3, 1] Position [115, 26, 140, 114] ShowName off SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1" sg_icon_stat "25,88,1,1,white,blue,3,03f9c9b9,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\np" "atch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 5" "2 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);" "\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end " "icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor(" "'black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{ z^{-1}}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Sym" Position [165, 63, 195, 77] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Mux2" DstPort 2 } Line { SrcBlock "Constant7" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "Bit" SrcPort 1 DstBlock "Mux2" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Sym" DstPort 1 } } } Block { BlockType SubSystem Name "QPSK Map1" Ports [1, 1] Position [715, 432, 765, 458] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "QPSK Map1" Location [508, 69, 1015, 527] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0." "500000]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Bit" Position [60, 33, 90, 47] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "Constant6" Ports [0, 1] Position [15, 56, 80, 84] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Signed (2's comp)" const "modConstellation_qpsk(1)" n_bits "8" bin_pt "7" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 i" "nstructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1" sg_icon_stat "65,28,1,1,white,blue,0,c48e66b9,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 " "22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 2" "1 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'0.9921875');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant7" Ports [0, 1] Position [15, 85, 80, 115] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Signed (2's comp)" const "modConstellation_qpsk(2)" n_bits "8" bin_pt "7" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 i" "nstructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1" sg_icon_stat "65,30,1,1,white,blue,0,ba00a726,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 " "22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 2" "1 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('output',1,'-1');\nfprint" "f('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mux2" Ports [3, 1] Position [115, 26, 140, 114] ShowName off SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "1" precision "Full" arith_type "Signed (2's comp)" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[4 8 0 8 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" block_version "10.1" sg_icon_stat "25,88,1,1,white,blue,3,03f9c9b9,r" "ight" sg_mask_display "fprintf('','COMMENT: begin icon g" "raphics');\npatch([0 45 45 0 ],[0 14.8571 89.1429 104 ],[0.77 0.82 0.91]);\np" "atch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[34 41 5" "2 63 70 70 67 70 70 60 70 63 52 41 34 44 34 34 37 34 34 ],[0.98 0.96 0.92]);" "\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\nfprintf('','COMMENT: end " "icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');por" "t_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor(" "'black');port_label('input',3,'d1');\ncolor('black');disp('\\bf{ z^{-1}}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Sym" Position [165, 63, 195, 77] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Sym" DstPort 1 } Line { SrcBlock "Bit" SrcPort 1 DstBlock "Mux2" DstPort 1 } Line { SrcBlock "Constant7" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Mux2" DstPort 2 } } } Block { BlockType Reference Name "ROM" Ports [1, 1] Position [240, 372, 300, 428] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "symbolRomLen" initVector "symbolRom" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" arith_type "Unsigned" n_bits "2" bin_pt "0" dbl_ovrd off optimize "Area" use_rpm on xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "10.1" sg_icon_stat "60,56,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Outport Name "I" Position [995, 303, 1025, 317] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "Q" Position [995, 438, 1025, 452] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "64QAM Mapper1" SrcPort 1 Points [45, 0; 0, -50] DstBlock "Mux3" DstPort 5 } Line { SrcBlock "16QAM Mapper1" SrcPort 1 Points [30, 0; 0, -25] DstBlock "Mux3" DstPort 4 } Line { SrcBlock "Constant7" SrcPort 1 Points [10, 0] Branch { DstBlock "Mux3" DstPort 2 } Branch { Points [0, -135] DstBlock "Mux2" DstPort 2 } } Line { SrcBlock "QPSK Map1" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "64QAM Mapper" SrcPort 1 Points [35, 0; 0, -55] DstBlock "Mux2" DstPort 5 } Line { SrcBlock "16QAM Mapper" SrcPort 1 Points [25, 0; 0, -30] DstBlock "Mux2" DstPort 4 } Line { SrcBlock "QPSK Map" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "Mod Sel" SrcPort 1 Points [280, 0] Branch { Points [0, 135] DstBlock "Mux3" DstPort 1 } Branch { DstBlock "Mux2" DstPort 1 } } Line { SrcBlock "2LSB1" SrcPort 1 DstBlock "16QAM Mapper1" DstPort 1 } Line { SrcBlock "2LSB" SrcPort 1 DstBlock "16QAM Mapper" DstPort 1 } Line { SrcBlock "I Bits" SrcPort 1 Points [15, 0] Branch { DstBlock "64QAM Mapper" DstPort 1 } Branch { Points [0, -45] DstBlock "2LSB" DstPort 1 } } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "I" DstPort 1 } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Q Bits" SrcPort 1 Points [15, 0] Branch { Points [0, 45] DstBlock "64QAM Mapper1" DstPort 1 } Branch { DstBlock "2LSB1" DstPort 1 } } Line { SrcBlock "ROM" SrcPort 1 Points [20, 0] Branch { Points [0, -25] DstBlock "LSB" DstPort 1 } Branch { Points [0, 20] DstBlock "MSB" DstPort 1 } } Line { SrcBlock "LSB" SrcPort 1 Points [150, 0; 0, -65] DstBlock "QPSK Map" DstPort 1 } Line { SrcBlock "MSB" SrcPort 1 Points [150, 0; 0, 25] DstBlock "QPSK Map1" DstPort 1 } Line { SrcBlock "Counter" SrcPort 1 DstBlock "ROM" DstPort 1 } } } Block { BlockType Outport Name "I" Position [615, 168, 645, 182] NamePlacement "alternate" IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "Q" Position [615, 208, 645, 222] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "6bit Datasource" SrcPort 1 DstBlock "Modulation" DstPort 2 } Line { SrcBlock "6bit Datasource" SrcPort 2 DstBlock "Modulation" DstPort 3 } Line { SrcBlock "Modulation" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Modulation" SrcPort 2 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "I" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Modulation" DstPort 1 } } } Block { BlockType Reference Name "Register" Ports [1, 1] Position [500, 164, 525, 196] SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "25,32,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');p" "ort_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register1" Ports [1, 1] Position [500, 194, 525, 226] SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1" sg_icon_stat "25,32,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 " "34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 " "49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56" " 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');p" "ort_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on'" ");\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "TX_I" Ports [1, 1] Position [570, 170, 630, 190] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed p" "oint inputs into ouputs of type Simulink integer, double, or fixed point.

<" "P>Hardware notes: In hardware these blocks become top level output ports or " "are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 16 0 0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2" "9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por" "t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "TX_Q" Ports [1, 1] Position [570, 200, 630, 220] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed p" "oint inputs into ouputs of type Simulink integer, double, or fixed point.

<" "P>Hardware notes: In hardware these blocks become top level output ports or " "are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 16 0 0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "10.1" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');" "\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 2" "9 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14" " 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 2" "0 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi" "n icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');por" "t_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Upconverter" Ports [2, 3] Position [360, 70, 430, 120] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Upconverter" Location [6, 74, 1274, 876] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "I" Position [310, 223, 340, 237] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "Q" Position [310, 233, 340, 247] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "ComplexMult" Ports [4, 2] Position [610, 111, 680, 174] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "ComplexMult" Location [486, 74, 1167, 854] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "A I" Position [130, 180, 145, 210] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "A Q" Position [130, 210, 145, 240] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "B I" Position [130, 285, 145, 315] NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "B Q" Position [130, 315, 145, 345] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [400, 191, 460, 249] SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on xl_use_area off xl_area "[8 0 0 16 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,307" block_type "addsub" block_version "10.1" sg_icon_stat "60,58,1,1,white,blue,0,46b4c804,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [400, 281, 460, 339] SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on xl_use_area off xl_area "[8 0 0 16 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,307" block_type "addsub" block_version "10.1" sg_icon_stat "60,58,1,1,white,blue,0,36a47907,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert" Ports [1, 1] Position [530, 205, 570, 235] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and satura" "ting require hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "40,30,1,1,white,blue,0,74901e60,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17" " 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 " "27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ]," "[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert1" Ports [1, 1] Position [530, 295, 570, 325] SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and satura" "ting require hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1" sg_icon_stat "40,30,1,1,white,blue,0,74901e60,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17" " 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 " "27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ]," "[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprin" "tf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult" Ports [2, 1] Position [315, 189, 360, 216] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[8 -15 0 16 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1" sg_icon_stat "45,27,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [315, 219, 360, 246] SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[8 -15 0 16 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1" sg_icon_stat "45,27,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [315, 279, 360, 306] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[8 -15 0 16 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1" sg_icon_stat "45,27,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [315, 309, 360, 336] SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Wrap" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[8 -15 0 16 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1" sg_icon_stat "45,27,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale" Ports [1, 1] Position [480, 203, 510, 237] ShowName off SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by a" "djusting the binary point position.

Hardware notes: In hardware this blo" "ck costs nothing." scale_factor "-1" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,4d520166,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('\\bf{2^{-1}}','texmode','on');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale1" Ports [1, 1] Position [480, 293, 510, 327] ShowName off SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by a" "djusting the binary point position.

Hardware notes: In hardware this blo" "ck costs nothing." scale_factor "-1" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1" sg_icon_stat "30,34,1,1,white,blue,0,4d520166,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('\\bf{2^{-1}}','texmode','on');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "I" Position [590, 213, 620, 227] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "Q" Position [590, 303, 620, 317] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Mult" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "Mult3" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "Scale" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "Scale1" DstPort 1 } Line { SrcBlock "Scale" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Scale1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "A I" SrcPort 1 Points [135, 0] Branch { DstBlock "Mult" DstPort 1 } Branch { Points [0, 120] DstBlock "Mult3" DstPort 1 } } Line { SrcBlock "B I" SrcPort 1 Points [120, 0] Branch { Points [0, 0; 0, -90] DstBlock "Mult" DstPort 2 } Branch { DstBlock "Mult2" DstPort 2 } } Line { SrcBlock "A Q" SrcPort 1 Points [130, 0] Branch { DstBlock "Mult1" DstPort 1 } Branch { Points [0, 60] DstBlock "Mult2" DstPort 1 } } Line { SrcBlock "B Q" SrcPort 1 Points [100, 0] Branch { Points [5, 0; 0, -90] DstBlock "Mult1" DstPort 2 } Branch { DstBlock "Mult3" DstPort 2 } } Line { SrcBlock "Convert" SrcPort 1 DstBlock "I" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Q" DstPort 1 } } } Block { BlockType From Name "From2" Position [270, 305, 360, 325] CloseFcn "tagdialog Close" GotoTag "UPCONV" TagVisibility "global" } Block { BlockType Goto Name "Goto1" Position [605, 321, 675, 339] ShowName off GotoTag "Carrier_I" TagVisibility "global" } Block { BlockType SubSystem Name "Re[A*B]" Ports [4, 1] Position [605, 220, 670, 270] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Re[A*B]" Location [62, 84, 1338, 886] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "A I" Position [30, 33, 60, 47] NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Inport Name "A Q" Position [25, 323, 55, 337] NamePlacement "alternate" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "B I" Position [30, 58, 60, 72] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "B Q" Position [25, 348, 55, 362] Port "4" IconDisplay "Port number" } Block { BlockType Reference Name "Gateway Out1" Ports [1, 1] Position [165, 158, 195, 172] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "30,14,1,1,white,grey,0,b3a044a9,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 30 30 0 ],[0 0 14 14 ],[0.88 0.88 0.88]);\npatch([11 9 12 " "9 11 15 16 17 21 18 15 13 16 13 15 18 21 17 16 15 11 ],[2 4 7 10 12 12 11 12 " "12 9 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 1" "4 14 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b" "egin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');" "port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Gateway Out5" Ports [1, 1] Position [165, 123, 195, 137] ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx" " fixed point inputs into ouputs of type Simulink integer, double, or fixed po" "int.

Hardware notes: In hardware these blocks become top level output p" "orts or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1" sg_icon_stat "30,14,1,1,white,grey,0,b3a044a9,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 30 30 0 ],[0 0 14 14 ],[0.88 0.88 0.88]);\npatch([11 9 12 " "9 11 15 16 17 21 18 15 13 16 13 15 18 21 17 16 15 11 ],[2 4 7 10 12 12 11 12 " "12 9 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 1" "4 14 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: b" "egin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');" "port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','C" "OMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale" Ports [1, 1] Position [525, 103, 565, 137] ShowName off SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by a" "djusting the binary point position.

Hardware notes: In hardware this blo" "ck costs nothing." scale_factor "-1" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1" sg_icon_stat "40,34,1,1,white,blue,0,4d520166,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');disp('\\bf{2^{-1}}','texmode','on');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType ToWorkspace Name "To Workspace" Position [220, 115, 280, 145] ShowName off VariableName "Symbols_I" MaxDataPoints "inf" SampleTime "-1" SaveFormat "Array" } Block { BlockType ToWorkspace Name "To Workspace1" Position [220, 150, 280, 180] ShowName off VariableName "Carrier_I" MaxDataPoints "inf" SampleTime "-1" SaveFormat "Array" } Block { BlockType Reference Name "i1i2" Ports [2, 1] Position [170, 27, 220, 78] SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[15 -17 0 29 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,367,433" block_type "mult" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "i1i2 plus q1q2" Ports [2, 1] Position [405, 90, 455, 145] SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Subtraction" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "12" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on xl_use_area off xl_area "[8 0 0 15 0 0 0]" has_advanced_control "0" sggui_pos "599,371,348,307" block_type "addsub" block_version "10.1" sg_icon_stat "50,55,1,1,white,blue,0,46b4c804,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 " "5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 5" "4 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "{a - b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "i1i4" Ports [2, 1] Position [170, 317, 220, 368] SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal" " pipeline stage of the dedicated multiplier you must select 'Pipeline for max" "imum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Truncate" overflow "Saturate" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[15 -17 0 29 0 1 0]" pipeline "on" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" block_version "10.1" sg_icon_stat "50,51,1,1,white,blue,0,2b745779,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 " "4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 5" "0 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ]" ",[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('b" "lack');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)" "');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nf" "printf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out" Position [600, 113, 630, 127] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "i1i4" SrcPort 1 Points [80, 0; 0, -215] DstBlock "i1i2 plus q1q2" DstPort 2 } Line { SrcBlock "i1i2" SrcPort 1 Points [80, 0; 0, 50] DstBlock "i1i2 plus q1q2" DstPort 1 } Line { SrcBlock "B Q" SrcPort 1 DstBlock "i1i4" DstPort 2 } Line { SrcBlock "A Q" SrcPort 1 DstBlock "i1i4" DstPort 1 } Line { SrcBlock "B I" SrcPort 1 Points [65, 0] Branch { DstBlock "i1i2" DstPort 2 } Branch { Points [0, 100] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "A I" SrcPort 1 Points [70, 0] Branch { DstBlock "i1i2" DstPort 1 } Branch { Points [0, 90] DstBlock "Gateway Out5" DstPort 1 } } Line { SrcBlock "i1i2 plus q1q2" SrcPort 1 DstBlock "Scale" DstPort 1 } Line { SrcBlock "Scale" SrcPort 1 DstBlock "Out" DstPort 1 } Line { SrcBlock "Gateway Out5" SrcPort 1 DstBlock "To Workspace" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 DstBlock "To Workspace1" DstPort 1 } } } Block { BlockType SubSystem Name "myDDS" Ports [1, 2] Position [420, 279, 485, 346] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "myDDS" Location [257, 444, 804, 658] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins "[0.500000, 0.500000, 0.500000, 0.5000" "00]" TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "phase inc" Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Reference Name "10MSB" Ports [1, 1] Position [175, 41, 220, 69] SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from" " each input sample and presents it at the output. The output type is ordinar" "ily unsigned with binary point at zero, but can be Boolean when the slice is " "one bit wide.

Hardware notes: In hardware this block costs nothing." nbits "10" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" block_version "10.1" sg_icon_stat "45,28,1,1,white,blue,0,b1026674,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24" " 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 " "27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]," "[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfpri" "ntf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Accumulator" Ports [1, 1] Position [90, 30, 140, 80] SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulat" "or. Output type and binary point position match the input.

Hardware no" "tes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulat" "or is forced to run at the system rate even if the input 'b' is running at a " "slower rate." operation "Add" n_bits "32" overflow "Wrap" scale "1" rst off hasbypass off en off dbl_ovrd off use_behavioral_HDL on xl_use_area off xl_area "[16 32 0 32 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "accum" block_version "10.1" sg_icon_stat "50,50,1,1,white,blue,0,75328ba6,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 50 50 0 ],[0 0 50 50 ],[0.77 0.82 0.91]);\npatch([11 3 15 " "3 11 24 28 32 46 35 24 16 28 16 24 35 46 32 28 24 11 ],[5 13 25 37 45 45 41 4" "5 45 34 45 37 25 13 5 16 5 5 9 5 5 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ]," "[0 0 50 50 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMM" "ENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('bl" "ack');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Cos ROM" Ports [1, 1] Position [330, 29, 380, 81] NamePlacement "alternate" SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "1024" initVector "cos(2*pi*[0:1023]/1024)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sprom" block_version "10.1" sg_icon_stat "50,52,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Reference Name "Sin ROM" Ports [1, 1] Position [330, 89, 380, 141] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory" " Block" depth "1024" initVector "sin(2*pi*[0:1023]/1024)" distributed_mem "Block RAM" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[0 0 1 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "10.1" sg_icon_stat "50,52,1,1,white,blue,0,a8b86474,rig" "ht" sg_mask_display "fprintf('','COMMENT: begin icon gra" "phics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 " "6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 5" "0 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ]" ",[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COM" "MENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor" "('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text'" ");\n" } Block { BlockType Outport Name "sin" Position [405, 108, 435, 122] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "cos" Position [405, 48, 435, 62] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "10MSB" DstPort 1 } Line { SrcBlock "phase inc" SrcPort 1 Points [0, 0] DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "Cos ROM" SrcPort 1 Points [0, 0] DstBlock "cos" DstPort 1 } Line { SrcBlock "Sin ROM" SrcPort 1 Points [0, 0] DstBlock "sin" DstPort 1 } Line { SrcBlock "10MSB" SrcPort 1 Points [5, 0] Branch { DstBlock "Cos ROM" DstPort 1 } Branch { Points [0, 60] DstBlock "Sin ROM" DstPort 1 } } } } Block { BlockType Outport Name " Mixed" Position [740, 238, 770, 252] NamePlacement "alternate" IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name " I" Position [840, 123, 870, 137] NamePlacement "alternate" Port "2" IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name " Q" Position [840, 153, 870, 167] NamePlacement "alternate" Port "3" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "I" SrcPort 1 Points [60, 0] Branch { DstBlock "Re[A*B]" DstPort 1 } Branch { Points [0, -110] DstBlock "ComplexMult" DstPort 1 } } Line { SrcBlock "Q" SrcPort 1 Points [65, 0] Branch { DstBlock "Re[A*B]" DstPort 2 } Branch { Points [0, -105] DstBlock "ComplexMult" DstPort 2 } } Line { SrcBlock "myDDS" SrcPort 2 Points [35, 0] Branch { DstBlock "Goto1" DstPort 1 } Branch { Points [0, -80] Branch { Points [0, 0] DstBlock "Re[A*B]" DstPort 3 } Branch { Points [0, -100] DstBlock "ComplexMult" DstPort 3 } } } Line { SrcBlock "myDDS" SrcPort 1 Points [45, 0; 0, -35] Branch { DstBlock "Re[A*B]" DstPort 4 } Branch { Points [0, -95] DstBlock "ComplexMult" DstPort 4 } } Line { SrcBlock "From2" SrcPort 1 DstBlock "myDDS" DstPort 1 } Line { SrcBlock "Re[A*B]" SrcPort 1 DstBlock " Mixed" DstPort 1 } Line { SrcBlock "ComplexMult" SrcPort 1 DstBlock " I" DstPort 1 } Line { SrcBlock "ComplexMult" SrcPort 2 DstBlock " Q" DstPort 1 } } } Block { BlockType Outport Name "Upconverted" Position [535, 38, 565, 52] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "IF I" Position [675, 173, 705, 187] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "IF Q" Position [675, 203, 705, 217] Port "3" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Random\nSymbols" SrcPort 1 Points [40, 0] Branch { Points [0, -45] DstBlock "Goto2" DstPort 1 } Branch { DstBlock "Interpolate" DstPort 1 } } Line { SrcBlock "Random\nSymbols" SrcPort 2 Points [45, 0] Branch { Points [0, -50] DstBlock "Goto3" DstPort 1 } Branch { DstBlock "Interpolate" DstPort 2 } } Line { SrcBlock "Interpolate" SrcPort 1 Points [45, 0] Branch { Points [0, -50] DstBlock "Goto6" DstPort 1 } Branch { DstBlock "Upconverter" DstPort 1 } } Line { SrcBlock "Interpolate" SrcPort 2 Points [50, 0] Branch { Points [0, -55] DstBlock "Goto7" DstPort 1 } Branch { DstBlock "Upconverter" DstPort 2 } } Line { SrcBlock "Upconverter" SrcPort 1 Points [50, 0] Branch { DstBlock "Goto1" DstPort 1 } Branch { Points [0, -35] DstBlock "Upconverted" DstPort 1 } } Line { SrcBlock "Upconverter" SrcPort 2 Points [40, 0; 0, 5; 10, 0] DstBlock "Register" DstPort 1 } Line { SrcBlock "Upconverter" SrcPort 3 Points [40, 0; 0, 100] DstBlock "Register1" DstPort 1 } Line { SrcBlock "TX_I" SrcPort 1 DstBlock "IF I" DstPort 1 } Line { SrcBlock "TX_Q" SrcPort 1 DstBlock "IF Q" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "TX_I" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "TX_Q" DstPort 1 } Annotation { Position [61, 84] } } } Line { SrcBlock "DACs" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "DACs" SrcPort 2 DstBlock "Register1" DstPort 1 } Line { SrcBlock "DACs" SrcPort 3 DstBlock "Register2" DstPort 1 } Line { Labels [0, 0] SrcBlock "Transmitter" SrcPort 1 DstBlock "Receiver" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 DstBlock "Channel" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "Channel" DstPort 2 } Line { SrcBlock "Register" SrcPort 1 DstBlock "DAC1" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "DAC2" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "DAC3" DstPort 1 } Line { SrcBlock "Transmitter" SrcPort 2 DstBlock "Gain" DstPort 1 } Line { SrcBlock "Transmitter" SrcPort 3 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Real-Imag to\nComplex" SrcPort 1 DstBlock "Discrete-Time\nScatter Plot\nScope" DstPort 1 } Line { SrcBlock "DAC1" SrcPort 1 Points [40, 0; 0, 10] DstBlock "Real-Imag to\nComplex" DstPort 1 } Line { SrcBlock "DAC2" SrcPort 1 Points [40, 0; 0, -10] DstBlock "Real-Imag to\nComplex" DstPort 2 } Line { SrcBlock "Channel" SrcPort 1 DstBlock "Receiver" DstPort 2 } Line { SrcBlock "Channel" SrcPort 2 DstBlock "Receiver" DstPort 3 } Annotation { Name "Single-Carrier Streaming PHY\nAuthors: Patrick " "Murphy and Chris Hunter\nxlVersion 10.1.2.1250" Position [256, 89] DropShadow on } Annotation { Name "This physical layer showcases some fundamental" "\ntechniques for combating issues like carrier frequency\noffset and timing m" "ismatches in streaming PHYs." Position [256, 144] DropShadow on } Annotation { Name "Clock Ratios:\n1 : Symbol Rate\n1/8 : Sample Ra" "te\n\nWhen clocked at 40MHz:\nIF Carrier : 10MHz\nSignal Bandwidth: 5Mhz (7.5" "MHz to 12.5 MHz)\nPHY Throughput with QPSK: 10Mbps" Position [256, 269] DropShadow on } } } MatData { NumRecords 1 DataRecord { Tag DataTag0 Data " %)30 . Z%$ 8 ( @ % " "\" $ ! 0 % 0 !@ $ , 7, !V86QU97, . P 8 ( " " 0 % \" $ \" 0 . 0 8 ( ! " " % \" $ + 0 0 \"P $A$3\"!.971L:7-T . 2 " " 8 ( ! % \" $ 8 0 0 & $5X<&]R=\"!" "A7-T96T #@ $@ & \" " " 0 !0 @ ! & $ $ !@ !!8V-O 0 !H$ !I;F9O961I= " " !X:6QI;GAF86UI;'D !P87)T " " !S<&5E9 !P86-K86=E " " !S>6YT:&5S:7-?=&]O;%]S9V%D=F%N8V5D !S>6YT:&5" "S:7-?=&]O; !C;&]C:U]W7-C;&M?<&5R:6]D !D8VU?:6YP=71?8VQO8VM?<&5R:6]D " " !I;F-R7VYE=&QI7-T96T@1V5N97)A=&]R X X !@ @ $ 4 ( " " 0 < ! ! ' =FER=&5X- . . 8 ( ! " "% \" $ ( 0 0 \" 'AC-'9S>#,U#@ # & \" " " 0 !0 @ ! P $ $ # \"TQ, . . 8 ( !" " % \" $ % 0 0 !0 &9F-C8X #@ # & " " \" 0 !0 @ $ $ . , 8 " " ( ! % \" $ # 0 0 , 6%-4 X P !@ " " @ $ 4 ( ! ! #@ $ & \"" " 0 !0 @ ! #0 $ $ T !#;&]C:R!%;F%B;&5S " " #@ $ & \" 0 !0 @ ! \"0 $ $ D " " N+VYE=&QI 0 " " ,X$ !I;F9O961I= !X:6QI;GAF86UI;'D " " !P87)T !S<&5E9 " " !P86-K86=E !S>6YT:&5S:7-?=&]O;%]S9V" "%D=F%N8V5D !S>6YT:&5S:7-?=&]O; !C;&]C:U]W7-C;&M?<&5R:6]D !D8VU?:6YP=7" "1?8VQO8VM?<&5R:6]D !I;F-R7VYE=&QI&,R=G" " W, . , 8 ( ! % \" $ \" 0 0 ( +" "38 X X !@ @ $ 4 ( 0 8 ! ! & " " 9F8Q-3$W . , 8 ( ! % \" 0 " " 0 X P !@ @ $ 4 ( 0 , ! ! " " P!84U0 #@ # & \" 0 !0 @ $ $ " " . 0 8 ( ! % \" $ - 0 0 " " #0 $-L;V-K($5N86)L97, . 0 8 ( ! % \" $ " ") 0 0 \"0 \"XO;F5T;&ES= . , 8 ( ! " " % \" 0 0 X P !@ @ $ " " 4 ( 0 , ! ! P!O9F8 #@ # & \" 0 " " !0 @ ! @ $ $ \" #$P . , 8 ( ! " " % \" $ # 0 0 , ,3 P X P !@ @ $ " "4 ( ! ! #@ # & \" 0 !0" " @ $ $ . , 8 ( ! % " " \" 0 0 X P !@ @ $ 4 " "( ! ! #@ $@ & \" 0 !0 @" " ! & $ $ !@ !!8V-O7-G96X X X !@ @ $ 4 ( 0 8 ! " " ! & ,3 N,2XR . 6 8 ( ! % \" $ C " " 0 0 (P #4Q+#4P+\"TQ+\"TQ+')E9\"QB96EG92PP+# W-S,T+')I9VAT " " . P $ 8 ( ! % \" $ \". 0 0 0 C@$ " "&9P'0G*3L*" " . , 8 ( ! % \" 0 0 " " X P !@ @ $ 4 ( ! ! #" "@ # & \" 0 !0 @ $ $ . " " , 8 ( ! % \" $ $ 0 0 0 5DA$3 X " " X !@ @ & 4 ( 0 $ ! D ( " " . . 8 ( !@ % \" $ ! 0 ) \"" " #@ #@ & \" 0 !0 @ ! !@ $ " " $ 8 Y+C(N,#$ X ! !@ @ $ 4 ( 0 P " " ! ! , >&QE9&MP;W-T9V5N X ! !@ @ $ 4" " ( 0 T ! ! - >&QE9&MS971T:6YG

&QE9&MP&QE9&MU<&1A=&5F;@ X #X! !@ @ \" 4 ( 0 $ " " ! 4 ! 8 0 #@! !E>'!O'!O'!O7=H97)E(&EN(%-U8E-Y&9A;6EL>0 '!A0 '1E0 X !( !@ @ " " $ 4 ( 0 !$ ! ! 1 (%-Y&,T=G-X,S4. , 8 ( ! % \" $ #" " 0 0 , +3$P X X !@ @ $ 4 ( 0 4 " " ! ! % 9F8V-C@ . , 8 ( ! % \" " " 0 0 X P !@ @ $ 4 ( 0" " , ! ! P!84U0 #@ # & \" 0 !0 @ " " $ $ . 0 8 ( ! % \" $ " " - 0 0 #0 $-L;V-K($5N86)L97, . 0 8 ( ! " " % \" $ ) 0 0 \"0 \"XO;F5T;&ES= . ," " 8 ( ! % \" 0 0 X P " " !@ @ $ 4 ( 0 , ! ! P!O9F8 #@ # " " & \" 0 !0 @ ! P $ $ # #$P, . , " "8 ( ! % \" $ # 0 0 , ,3 P X P !@" " @ $ 4 ( ! ! #@ # & " " \" 0 !0 @ $ $ . , 8 " "( ! % \" 0 0 X P !@ @" " $ 4 ( ! ! #@ $@ & \" " " 0 !0 @ ! & $ $ !@ !!8V-O7-G96X X X !@ @ $ 4 ( " "0 8 ! ! & ,3 N,2XR . 6 8 ( ! % " " \" $ C 0 0 (P #4Q+#4P+\"TQ+\"TQ+')E9\"QB96EG92PP+# " "W-S,T+')I9VAT . P $ 8 ( ! % \" $ \". 0 0" " 0 C@$ &9P'0G*3L* . , 8 ( ! % \" " " 0 0 X P !@ @ $ 4 ( ! " " ! #@ # & \" 0 !0 @ $ " " $ . , 8 ( ! % \" $ $ 0 " " 0 0 5DA$3 X X !@ @ & 4 ( 0 $ ! " " D ( . . 8 ( !@ % \" $ ! " " 0 ) \" #@ & 5 & \" ( !0 @ " " ! 0 $ !0 $ !X ! S@0 &EN9F]E9&ET " " 'AI;&EN>&9A;6EL>0 '!A0 '1E0 '-G7VQI0 '9E#)P#@ #@ & \" 0 !0 @ " " ! !P $ $ < !X8S)V<#

'0G*3L*9G!R:6" "YT9B@G)RPG0T]-345.5#H@96YD(&EC;VX@=&5X=\"