Model { Name "wlan_mac_hw" Version 7.8 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.759" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "windows-1252" PostLoadFcn "wlan_mac_hw_init" SaveDefaultBlockParams on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" DataTypeOverrideAppliesTo "AllNumericTypes" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" FPTRunName "Run 1" MaxMDLFileLineLength 120 InitFcn "wlan_mac_hw_init" StartFcn "wlan_mac_hw_init" Created "Tue Jun 18 20:50:04 2013" Creator "murphpo" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "murphpo" ModifiedDateFormat "%" LastModifiedDate "Mon Aug 20 10:02:29 2018" RTWModifiedTimeStamp 456659323 ModelVersionFormat "1.%" ConfigurationManager "None" SampleTimeColors off SampleTimeAnnotations off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes on ShowDesignRanges off ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowSignalResolutionIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off Object { $PropName "DataLoggingOverride" $ObjectID 1 $ClassName "Simulink.SimulationData.ModelLoggingInfo" model_ "wlan_mac_hw" signals_ [] overrideMode_ [0.0] Array { Type "Cell" Dimension 1 Cell "wlan_mac_hw" PropName "logAsSpecifiedByModels_" } Array { Type "Cell" Dimension 1 Cell [] PropName "logAsSpecifiedByModelsSSIDs_" } } RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on CovForceBlockReductionOff on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on CovModelRefEnable "Off" CovExternalEMLEnable off ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 2 Version "1.11.1" Array { Type "Handle" Dimension 8 Simulink.SolverCC { $ObjectID 3 Version "1.11.1" StartTime "0.0" StopTime "2e5" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ZcThreshold "auto" ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" ConcurrentTasks off Solver "ode45" SolverName "ode45" SolverJacobianMethodControl "auto" ShapePreserveControl "DisableAll" ZeroCrossControl "UseLocalSettings" ZeroCrossAlgorithm "Nonadaptive" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" InsertRTBMode "Whenever possible" } Simulink.DataIOCC { $ObjectID 4 Version "1.11.1" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveCompleteFinalSimState off SaveFormat "Array" SignalLoggingSaveFormat "ModelDataLogs" SaveOutput on SaveState off SignalLogging on DSMLogging on InspectSignalLogs off SaveTime on ReturnWorkspaceOutputs off StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" DSMLoggingName "dsmout" OutputOption "RefineOutputTimes" OutputTimes "[]" ReturnWorkspaceOutputsName "out" Refine "1" } Simulink.OptimizationCC { $ObjectID 5 Version "1.11.1" Array { Type "Cell" Dimension 8 Cell "BooleansAsBitfields" Cell "PassReuseOutputArgsAs" Cell "PassReuseOutputArgsThreshold" Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" Cell "UseSpecifiedMinMax" PropName "DisabledProps" } BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off UseIntDivNetSlope off UseFloatMulNetSlope off UseSpecifiedMinMax off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnhancedBackFolding off StrengthReduction off ExpressionFolding on BooleansAsBitfields off BitfieldContainerType "uint_T" EnableMemcpy on MemcpyThreshold 64 PassReuseOutputArgsAs "Structure reference" ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero off NoFixptDivByZeroProtection off EfficientFloat2IntCast off EfficientMapNaN2IntZero on OptimizeModelRefInitCode off LifeSpan "inf" MaxStackSize "Inherit from target" BufferReusableBoundary on SimCompilerOptimization "Off" AccelVerboseBuild off AccelParallelForEachSubsystem on } Simulink.DebuggingCC { $ObjectID 6 Version "1.11.1" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" SignalRangeChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" SaveWithDisabledLinksMsg "warning" SaveWithParameterizedLinksMsg "warning" CheckSSInitialOutputMsg on UnderspecifiedInitializationDetection "Classic" MergeDetectMultiDrivingBlocksExec "none" CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" MaskedZcDiagnostic "warning" IgnoredZcDiagnostic "warning" SolverPrmCheckMsg "none" InheritedTsInSrcMsg "none" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" FixptConstUnderflowMsg "none" FixptConstOverflowMsg "none" FixptConstPrecisionLossMsg "none" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Enable All" SignalLabelMismatchMsg "none" UnconnectedInputMsg "none" UnconnectedOutputMsg "none" UnconnectedLineMsg "none" SFcnCompatibilityMsg "none" FrameProcessingCompatibilityMsg "warning" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" SimStateInterfaceChecksumMismatchMsg "warning" SimStateOlderReleaseMsg "error" InitInArrayFormatMsg "warning" StrictBusMsg "ErrorLevel1" BusNameAdapt "WarnAndRepair" NonBusSignalsTreatedAsBus "none" LoggingUnavailableSignals "error" BlockIODiagnostic "none" SFUnusedDataAndEventsDiag "warning" SFUnexpectedBacktrackingDiag "warning" SFInvalidInputDataAccessInChartInitDiag "warning" SFNoUnconditionalDefaultTransitionDiag "warning" SFTransitionOutsideNaturalParentDiag "warning" SFUnconditionalTransitionShadowingDiag "warning" } Simulink.HardwareCC { $ObjectID 7 Version "1.11.1" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdBitPerFloat 32 ProdBitPerDouble 64 ProdBitPerPointer 32 ProdLargestAtomicInteger "Char" ProdLargestAtomicFloat "None" ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetBitPerFloat 32 TargetBitPerDouble 64 TargetBitPerPointer 32 TargetLargestAtomicInteger "Char" TargetLargestAtomicFloat "None" TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 8 Version "1.11.1" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" EnableParallelModelReferenceBuilds off ParallelModelReferenceErrorOnInvalidPool on ParallelModelReferenceMATLABWorkerInit "None" ModelReferenceNumInstancesAllowed "Multi" PropagateVarSize "Infer from blocks in model" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off PropagateSignalLabelsOutOfModel off SupportModelReferenceSimTargetCustomCode off } Simulink.SFSimCC { $ObjectID 9 Version "1.11.1" SFSimEnableDebug on SFSimOverflowDetection on SFSimEcho on SimBlas on SimCtrlC on SimExtrinsic on SimIntegrity on SimUseLocalCustomCode off SimParseCustomCode on SimBuildMode "sf_incremental_build" } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 10 Version "1.11.1" Array { Type "Cell" Dimension 8 Cell "IncludeHyperlinkInReport" Cell "GenerateTraceInfo" Cell "GenerateTraceReport" Cell "GenerateTraceReportSl" Cell "GenerateTraceReportSf" Cell "GenerateTraceReportEml" Cell "GenerateSLWebview" Cell "GenerateCodeMetricsReport" PropName "DisabledProps" } SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off RTWUseLocalCustomCode off RTWUseSimCustomCode off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off GenerateTraceInfo off GenerateTraceReport off GenerateTraceReportSl off GenerateTraceReportSf off GenerateTraceReportEml off GenerateCodeInfo off GenerateSLWebview off GenerateCodeMetricsReport off RTWCompilerOptimization "Off" CheckMdlBeforeBuild "Off" CustomRebuildMode "OnUpdate" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 11 Version "1.11.1" Array { Type "Cell" Dimension 21 Cell "IgnoreCustomStorageClasses" Cell "IgnoreTestpoints" Cell "InsertBlockDesc" Cell "InsertPolySpaceComments" Cell "SFDataObjDesc" Cell "MATLABFcnDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrFcnArg" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" Cell "ReqsInCode" PropName "DisabledProps" } ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IgnoreTestpoints off IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off MATLABFcnDesc off IncDataTypeInIds off MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrFcnArg "rt$I$N$M" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off InsertPolySpaceComments off SimulinkBlockComments on MATLABSourceComments off EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off UseSimReservedNames off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 12 Version "1.11.1" Array { Type "Cell" Dimension 16 Cell "GeneratePreprocessorConditionals" Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlCompliant" Cell "CPPClassGenCompliant" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" Cell "PortableWordSizes" PropName "DisabledProps" } TargetFcnLib "ansi_tfl_table_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" TargetFunctionLibrary "ANSI_C" UtilityFuncGeneration "Auto" ERTMultiwordTypeDef "System defined" CodeExecutionProfiling off ERTMultiwordLength 256 MultiwordLength 2048 GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on ParMdlRefBuildCompliant on CompOptLevelCompliant on ConcurrentExecutionCompliant on IncludeMdlTerminateFcn on GeneratePreprocessorConditionals "Disable all" CombineOutputUpdateFcns off CombineSignalStateStructs off SuppressErrorStatus off ERTFirstTimeCompliant off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on SupportVariableSizeSignals off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off CPPClassGenCompliant off AutosarCompliant off UseMalloc off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off RTWCAPIRootIO off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" ConfigPrmDlgPosition [ 840, 485, 1720, 1115 ] } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 2 } BlockDefaults { ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on BlockRotation 0 BlockMirror off } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } BlockParameterDefaults { Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: Inherit from 'Constant value'" LockScale off SampleTime "inf" FramePeriod "inf" PreserveConstantTs off } Block { BlockType DiscretePulseGenerator PulseType "Sample based" TimeSource "Use simulation time" Amplitude "1" Period "2" PulseWidth "1" PhaseDelay "0" SampleTime "1" VectorParams1D on } Block { BlockType From IconDisplay "Tag" TagVisibility "local" } Block { BlockType FromWorkspace VariableName "simulink_input" SampleTime "-1" Interpolate on ZeroCross off OutputAfterFinalValue "Extrapolation" } Block { BlockType Goto IconDisplay "Tag" } Block { BlockType Inport Port "1" OutputFunctionCall off OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: auto" LockScale off BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchInputForFeedbackSignals off Interpolate on } Block { BlockType Outport Port "1" OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: auto" LockScale off BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" SignalType "auto" SamplingMode "auto" SourceOfInitialOutputValue "Dialog" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Scope ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "-1" } Block { BlockType Step Time "1" Before "0" After "1" SampleTime "-1" VectorParams1D on ZeroCross on } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off CheckFcnCallInpInsideContextMsg off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" DataTypeOverrideAppliesTo "AllNumericTypes" MinMaxOverflowLogging "UseLocalSettings" SFBlockType "NONE" Variant off GeneratePreprocessorConditionals off } Block { BlockType Sum IconShape "rectangular" Inputs "++" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on AccumDataTypeStr "Inherit: Inherit via internal rule" OutMin "[]" OutMax "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Terminator } } System { Name "wlan_mac_hw" Location [122, 120, 1798, 1080] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "173" ReportName "simulink-default.rpt" SIDHighWatermark "4215" Block { BlockType Reference Name " System Generator" SID "3" Tag "genX" Ports [] Position [240, 343, 284, 390] ShowName off AttributesFormatString "System\\nGenerator" LibraryVersion "1.2" UserDataPersistent on UserData "DataTag0" SourceBlock "xbsIndex_r4/ System Generator" SourceType "Xilinx System Generator Block" infoedit " System Generator" xilinxfamily "virtex6" part "xc6vlx240t" speed "-2" package "ff1156" synthesis_tool "XST" clock_wrapper "Clock Enables" directory "./pcore_v201m" proj_type "Project Navigator" Synth_file "XST Defaults" Impl_file "ISE Defaults" testbench off simulink_period "1" sysclk_period "10" dcm_input_clock_period "10" incr_netlist off trim_vbits "Everywhere in SubSystem" dbl_ovrd "According to Block Masks" core_generation "According to Block Masks" run_coregen off deprecated_control off eval_field "0" has_advanced_control "0" sggui_pos "33,666,464,470" block_type "sysgen" sg_icon_stat "44,47,0,0,token,white,0,58c5b5770fe5f7c311f53dbc6e73f0f6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 44 44 0 0 ],[0 0 47 47 0 ],[1 1 1 ]" ");\npatch([1.975 14.98 23.98 32.98 41.98 23.98 10.975 1.975 ],[32.99 32.99 41.99 32.99 41.99 41.99 41.99 32.99 ]" ",[0.933333 0.203922 0.141176 ]);\npatch([10.975 23.98 14.98 1.975 10.975 ],[23.99 23.99 32.99 32.99 23.99 ],[0.6" "98039 0.0313725 0.219608 ]);\npatch([1.975 14.98 23.98 10.975 1.975 ],[14.99 14.99 23.99 23.99 14.99 ],[0.933333" " 0.203922 0.141176 ]);\npatch([10.975 41.98 32.98 23.98 14.98 1.975 10.975 ],[5.99 5.99 14.99 5.99 14.99 14.99 5" ".99 ],[0.698039 0.0313725 0.219608 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ic" "on text');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "CCA" SID "459" Ports [0, 2] Position [175, 111, 255, 149] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "CCA" Location [1389, 1143, 2045, 1355] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Constant Name "Constant" SID "4196" Position [205, 557, 230, 583] ZOrder -4 ShowName off Value "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "FORCE_CCA_BUSY" SID "4192" Ports [1, 1] Position [305, 560, 370, 580] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType From Name "From1" SID "2001" Position [280, 441, 455, 459] ZOrder -9 ShowName off GotoTag "MAC_NAV_BUSY" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "2002" Position [280, 461, 455, 479] ZOrder -9 ShowName off GotoTag "reg_CCA_Ignore_NAV" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "3496" Position [280, 511, 455, 529] ZOrder -9 ShowName off GotoTag "reg_CCA_Force_Busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "2006" Position [280, 381, 455, 399] ZOrder -9 ShowName off GotoTag "PHY_CCA_IND_BUSY" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "2004" Position [280, 401, 455, 419] ZOrder -9 ShowName off GotoTag "reg_CCA_Ignore_PHY_CS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "4194" Position [280, 601, 455, 619] ZOrder -9 ShowName off GotoTag "reg_CCA_En_Busy_Input" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "2010" Position [280, 321, 455, 339] ZOrder -9 ShowName off GotoTag "Status_Tx_PHY_Active" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "2008" Position [280, 341, 455, 359] ZOrder -9 ShowName off GotoTag "reg_CCA_Ignore_TxBusy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter1" SID "1413" Ports [1, 1] Position [770, 516, 795, 534] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Inverter2" SID "2011" Ports [1, 1] Position [530, 341, 555, 359] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Inverter3" SID "2012" Ports [1, 1] Position [530, 401, 555, 419] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Inverter4" SID "2013" Ports [1, 1] Position [530, 461, 555, 479] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Logical1" SID "2000" Ports [2, 1] Position [605, 441, 635, 479] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.44 27.44 " "23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 19.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2005" Ports [2, 1] Position [605, 381, 635, 419] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.44 27.44 " "23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 19.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "455" Ports [5, 1] Position [705, 310, 735, 610] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "5" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,300,5,1,white,blue,0,d9ddc810,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 300 300 0 ],[0.77 0.82 0." "91 ]);\nplot([0 30 30 0 0 ],[0 0 300 300 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[154.44 154.44 " "158.44 154.44 158.44 158.44 158.44 154.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[150.44 150.44 154.44 15" "4.44 150.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[146.44 146.44 150.44 150.44 146.44 ],[1 1 " "1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[142.44 142.44 146.44 142.44 146.44 146.44 142.44 ],[0.931 0." "946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\n\ncolo" "r('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2009" Ports [2, 1] Position [605, 321, 635, 359] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.44 27.44 " "23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 19.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "4193" Ports [2, 1] Position [605, 561, 635, 599] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,38,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 38 38 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[23.44 23.44 27.44 " "23.44 27.44 27.44 27.44 23.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[19.44 19.44 23.44 23.44 19.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[15.44 15.44 19.44 19.44 15.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[11.44 11.44 15.44 11.44 15.44 15.44 11.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Outport Name "CS Busy" SID "615" Position [860, 453, 890, 467] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "CS Idle" SID "1412" Position [860, 518, 890, 532] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Logical3" SrcPort 1 Points [10, 0] Branch { DstBlock "CS Busy" DstPort 1 } Branch { Points [0, 65] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "CS Idle" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Inverter4" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Inverter3" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Inverter2" DstPort 1 } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Inverter4" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Logical3" DstPort 3 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical3" DstPort 4 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "Logical3" DstPort 5 } Line { SrcBlock "FORCE_CCA_BUSY" SrcPort 1 DstBlock "Logical5" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 Points [20, 0; 0, -20] DstBlock "Logical5" DstPort 2 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "FORCE_CCA_BUSY" DstPort 1 } Annotation { Name "Medium is busy if:\n\nPHY Tx is running \nOR\nPHY Rx indicates CCA Busy\nOR\nMAC NAV indicates Busy" Position [506, 222] } } } Block { BlockType SubSystem Name "Changelog" SID "1402" Ports [] Position [563, 346, 607, 393] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Changelog" Location [32, 338, 1632, 1557] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "102" Annotation { Name "1.00.e:\nReworked backoff state to allow numSlots=0 at backoff start,\nfinishing at next idle_for_difs\n\n" "1.00.f:\nSame as 1.00.e, with ILA removed (to allow ILA in PHY)\n\n1.00.g:\n-Changed auto_tx logic to check auto_tx" "_en after TxSIFS counter\n finishes, for extra MAC processing time\n-Renamed from/goto/regs for MPDU Tx logic\n-Re" "-enabled ILA\n\n1.00.h:\n-Removed ILA\n-Added FCS_GOOD to status reg\n\n1.00.i:\n-Added logic to block Rx pkt det (" "replacement for Rx PHY blocking pkt done)\n-Added rate_length register with SIGNAL.rate, length and PHY_SEL capture" "d\n at RX_START\n\n1.00.j:\n-Blocked on FCS_Good now gated by data_done, not rx_end\n\n1.00.k:\n-Added gw outs for" " 64-bit timestamp\n-Added SR latch for auto-tx-en, so each assertion results in (at most) 1 auto Tx event\n\n1.00.l" ":\n-Added reg reset in front of last_byte_rx reg so last_byte_rx_index = 0 at every rx start\n\n1.00.m:\n-Fixed bac" "koff start bug when IDLE_FOR_DIFS = 1\n\n1.00.n:\n-Fixed byte order for capturing NAV duration\n-Added debug output" "s\n\n1.00.o:\n-Added option to not block Rx on Tx_Active (trying to debug odd Rx states...)\n\n1.00.p:\n-Added dela" "y from RX_START_IND to status register, so Tx MPDU FSM has time\n to react to new Rx before MAC code notices\n-Fix" "ed checking of backoff_done by MPDU FSM - now FSM-initiated backoff will properly\n cause deferral of FSM-initiate" "d Tx\n\n1.00.q:\n-Moved block_rx condition to rx_end & fcs_good from data_done & fcs_good (to avoid blocking\n rx " "phy while it's still in the post-last-byte extension, which lead to incorrect rx_end.error events)\n\n1.00.r:\n-Add" "ed time_at_rx_start registers (64-bit total)\n\n1.00.s:\n-Added backoff decrement logging via bram_block interface\n" "\n1.00.t:\n-Added option to block PHY Rx on all RxStart->RxEnd events, to preserve bad-FCS pkts for logging\n\n1.00" ".u:\n-Added BO pending logic, so node gets credit for starting 0-slot backoff during DIFS interval\n-Cleaned up IFS" " registers\n-Changed NAV_Adj value to Fix8_0 (was UFix10_0) to allow negative adjustment times\n-Removed unused res" "et input\n\n1.00.v:\n-Reverted unnecessary backoff control change (old logic correctly handled zero backoff case)\n" "\n1.00.w:\n-Removed unused \"Logging\" subsystem (still trying to figure out best way to log backoff trace)\n-Added" " NAV value register so software can check current NAV counter" Position [23, 507] HorizontalAlignment "left" BackgroundColor "[0.898039, 0.898039, 0.898039]" } Annotation { Name "1.00.x:\nAdded TxGain params to MPDU Tx and Auto Tx paths, captured and output to PHY for per-pkt Tx pwr " "control\nAdded TX_START_TIMESTAMP registers\n\n1.00.y:\nAdded posedge's to timestamp capture register enables\n (1" ".00.x TX_START was \"enbaled\" for whole pkt, instead of once at TX_START)\n\n1.00.z:\nAdded software resets for NA" "V and backoff counters (not required by standard, but useful for research)\n\n1.01.a:\nAdded TX_START time output f" "or PHY Tx timestamp insertion (better than inserting raw timestamp)\n\n1.01.b:\nAdded RX_ERROR==0 as condition for " "blocking on FCS_Good\n\n1.01.c-e:\nAdded register to add/subtract value from TX_START timestampe output. This offse" "t adjusts the timestamp\n value inserted into transmitted beacons, compensating for Tx latencies betwee Tx start an" "d actual Tx.\n\n1.01.f:\nIncreased backoff slot counter to 16 bits, matching num_slots values in Tx config register" "s. NOTE: This\n change modified the bit assignments in the STATUS register. The MAC software macros must be update" "d\n to match.\n\n2.00.a:\nGeneralized Tx control state machines (A and B replace MPDU_Tx and Auto_Tx); hardware no" "w supports\n complicated pkt exchanges like RTS/CTS/DATA/ACK and DATA/DATA/.../ACK\nDropped _dcf from core name\nA" "dded addressed-to-me exclusion for NAV update\n\n2.00.b:\nAdded reset bits for each Tx controller FSM in control re" "gister\nRemoved the 64-bit microsecond counter (to be part of new wlan_mac_time_hw core)\nAdded new gateways for ti" "mestamp input, to be captured on Tx/Rx start events, as before\n\n2.00.c:\nAdded Tx_Inhibit input, logic and regist" "er\n\n2.00.d:\nAdded per-FSM reset to OR for TX_PENDING bit in each Tx subsystem; without this PENDING would not\n " " de-assert on the FSM reset, leading to a never-Tx-again state in software\n\n2.00.e:\nAdded MAC_TIME_USEC_FRAC inp" "ut and register with FRAC value captured at Tx/Rx start\n\n2.00.f:\nFixed differing latencies between integer and f" "ractional parts of Tx/Rx start timestamps\n\n2.01.a:\n-Added Tx C controller, designed for transmtting beacons, pos" "sibly while Tx A is deferring\n-Updated PHY Tx interface for new Tx core, with 11n support\n-Promoted slot timer to" " top-level block\n-Demoted backoff to inside Tx A controller, added separate backoff for Tx C controller. Both back" "off\n counters use common slot timer\n-Added \"C not pending\" condition to A backoff decrement (required to trans" "mit beacons during Tx A deferral)\n-Added \"software CCA busy\" bit, so code can fake busy medium any time\n-Remove" "d TX_START_TIMESTAMP outputs; Tx PHY doesn't use these anymore\n\n2.01.b:\n-Added TBTT subsystem with simple Target" "_TU > Current_TU circuit\n\n2.01.c:\n-Added control reg bit to reset PHY active latches (useful for debugging PHY b" "ehaviors without resetting\n entire MAC state)\n\n2.01.d:\n-Renamed PHY Rx ports to match Rx PHY changes (RX_PARAM" "S -> RX_PHY_HDR)\n-Removed Rx PHY blocking latches asserted by RX_END\n-Added Rx PHY blocking latch asserted by RX_" "START\n-Updated STATUS register with new latch bits\n-Added new PHY_RX_RESET output, asserted during Tx\n-Moved Tx " "A/B/C state/result and post Tx/Rx timers running fields to new status register\n\n2.01.e:\n-Reduced RXERROR port to" " 3-bits, matching Rx PHY\n-Cleaned up unused control bits\n\n2.01.f:\n-Added RX_WRITING_PAYLOAD latch for status re" "g, good for HT40 Rx of high MCS where RX_END\n comes before DATA_DONE\n\n2.01.g:\n-Re-arranged all contolBits slic" "es for more sensible grouping of Tx FSM bits\n-Removed TX_C_PENDING from conditions for auto-pausing Tx A backoff; " "now only pausable from software\n-Added backoff pause control to Tx C\n-Added Tx D controller with same capabilitie" "s as Tx C (for simultaneous beacon and DTIM-mcast Tx)\n-Re-arranged STATUS and TX_CTRL_STATUS reg fields to fit Tx " "D status" Position [458, 637] HorizontalAlignment "left" BackgroundColor "[0.898039, 0.898039, 0.898039]" } Annotation { Name "2.01.h:\n-Added TX_D outputs to Tx PHY (bug in 2.01.g... oops)\n-Added TX_D PENDING to TX_CTRL_STATUS reg" "\n-Added TX_D backoff count register readback, renamed both backoff counter readback regs\n\n2.01.i:\n-Removed Tx_A" "_Controlling_PHY gate on Tx C/D IDLE_FOR_DIFS inputs; we trust software\n pausing and state readback to handle thi" "s race\n-Modified Tx A/C/D pause logic to handle pause asserted before Start and to handle pausing\n the FSM when " "IDLE_FOR_DIFS is true and num_slots = 0.\n-Better pipelining of mult/add-sub in NAV arith logic\n\n2.01.j:\n-Update" "d TU target processing to use un-truncated MAC time values; way easier than handling\n weird not-power-of-2 math i" "n software for tracking current_TU and TU_target with truncated times\n\n2.01.k:\n-Added CCA_FORCE_BUSY input\n-Add" "ed START_POSTRX_TIMER1 input\n-Added AUX_MAC_HW_STATUS[0,1] inputs\n\n2.01.l:\n-Replaced singel RESET_PHY_ACTIVE_LA" "TCHES control bit with separate\n RESET__PHY_ACTIVE_LATCHES. This will enable resetting the Rx PHY\n and M" "AC Rx latches without resetting the Tx PHY / MAC Tx latches.\n\n2.01.m:\n-Addex AUX_STATUS[3:2] inputs" Position [983, 247] HorizontalAlignment "left" BackgroundColor "[0.898039, 0.898039, 0.898039]" } } } Block { BlockType SubSystem Name "ChipScope" SID "1254" Ports [] Position [482, 346, 527, 394] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "ChipScope" Location [1209, 389, 1726, 892] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "4-bit Count" SID "1240" Ports [0, 1] Position [310, 30, 345, 50] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is" " implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "4" bin_pt "0" load_pin off rst off en off explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" sg_icon_stat "35,20,0,1,white,blue,0,7ac47ef5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 20 20 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([14.55 21.44 19.44 17.44 15.44 12.55 14.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');disp('{\\fontsize{14" "}\\bf++}','texmode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Trig Counter" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "ChipScope" SID "1167" Ports [15] Position [475, 31, 555, 539] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/ChipScope" SourceType "Xilinx ChipScope Block" infoedit "Enables run-time debugging and verification of signals by inserting ChipScope Pro ICON and ILA cores.<" "br>
Restrictions:
Only one ChipScope core can be instantiated in a System Generator design. A design or su" "bsystem containing a ChipScope block must have at least one output port." num_trig_ports "15" current_port "9" show_trig_port "0" match_units "1" match_type "Basic with edges" data_is_trigger on num_data_ports "1" data_depth "4096" SRL16s on add_bufg on match_type_t0 "2" match_type_t1 "2" match_type_t2 "2" match_type_t3 "2" match_type_t4 "2" match_type_t5 "2" match_type_t6 "2" match_type_t7 "2" match_type_t8 "2" match_type_t9 "2" match_type_t10 "1" match_type_t11 "1" match_type_t12 "1" match_type_t13 "1" match_type_t14 "1" match_type_t15 "1" match_units_t0 "1" match_units_t1 "1" match_units_t2 "1" match_units_t3 "1" match_units_t4 "1" match_units_t5 "1" match_units_t6 "1" match_units_t7 "1" match_units_t8 "1" match_units_t9 "1" match_units_t10 "1" match_units_t11 "1" match_units_t12 "1" match_units_t13 "1" match_units_t14 "1" match_units_t15 "1" dbl_ovrd "0" user_scan_chain "USER1" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "chipscope" sg_icon_stat "80,508,15,0,white,blue,0,de2e5829,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 80 80 0 0 ],[0 0 508 508 0 ],[0.77 0.82 0." "91 ]);\nplot([0 80 80 0 0 ],[0 0 508 508 0 ]);\npatch([15.525 31.42 42.42 53.42 64.42 42.42 26.525 15.525 ],[266.21" " 266.21 277.21 266.21 277.21 277.21 277.21 266.21 ],[1 1 1 ]);\npatch([26.525 42.42 31.42 15.525 26.525 ],[255.21 2" "55.21 266.21 266.21 255.21 ],[0.931 0.946 0.973 ]);\npatch([15.525 31.42 42.42 26.525 15.525 ],[244.21 244.21 255.2" "1 255.21 244.21 ],[1 1 1 ]);\npatch([26.525 64.42 53.42 42.42 31.42 15.525 26.525 ],[233.21 233.21 244.21 233.21 24" "4.21 244.21 233.21 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin " "icon text');\ncolor('black');port_label('input',1,'Trig_Counter');\ncolor('black');port_label('input',2,'New_Tx_PHY" "_Start');\ncolor('black');port_label('input',3,'Auto_Tx_PHY_Start');\ncolor('black');port_label('input',4,'Status_R" "eg');\ncolor('black');port_label('input',5,'Post_Rx_Timer_1_Done');\ncolor('black');port_label('input',6,'Tx_Backof" "f_Start');\ncolor('black');port_label('input',7,'FCS_Good');\ncolor('black');port_label('input',8,'PHY_Rx_Start');\n" "color('black');port_label('input',9,'PHY_Rx_End');\ncolor('black');port_label('input',10,'PHY_Rx_End_Error');\ncolo" "r('black');port_label('input',11,'PHY_CCA_Busy');\ncolor('black');port_label('input',12,'NAV_Busy');\ncolor('black'" ");port_label('input',13,'Tx_Active');\ncolor('black');port_label('input',14,'Rx_Byte_Ind');\ncolor('black');port_la" "bel('input',15,'Rx_Byte');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Disregard Subsystem" SID "1419" Tag "discardX" Ports [] Position [113, 554, 171, 612] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code generation" ". This block can be used in combination with the Simulation Multiplexer block to provide an alternative simulation " "model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" sg_icon_stat "58,58,-1,-1,darkgray,black,0,07734,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 0 ],[0 0 58 58 0 ],[0.1 0.1 0.1 ])" ";\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\npatch([11.2 22.76 30.76 38.76 46.76 30.76 19.2 11.2 ],[37.88 37.88 45.88 3" "7.88 45.88 45.88 45.88 37.88 ],[0.33 0.33 0.33 ]);\npatch([19.2 30.76 22.76 11.2 19.2 ],[29.88 29.88 37.88 37.88 29" ".88 ],[0.261 0.261 0.261 ]);\npatch([11.2 22.76 30.76 19.2 11.2 ],[21.88 21.88 29.88 29.88 21.88 ],[0.33 0.33 0.33 " "]);\npatch([19.2 46.76 38.76 30.76 22.76 11.2 19.2 ],[13.88 13.88 21.88 13.88 21.88 21.88 13.88 ],[0.261 0.261 0.26" "1 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end" " icon text');" } Block { BlockType From Name "From" SID "1194" Position [25, 312, 220, 328] ZOrder -9 ShowName off GotoTag "PHY_RX_END_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From1" SID "1174" Position [25, 102, 220, 118] ZOrder -9 ShowName off GotoTag "Tx_B_PHY_Start" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "1224" Position [25, 137, 220, 153] ZOrder -9 ShowName off GotoTag "reg_status" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From11" SID "2936" Position [25, 172, 220, 188] ZOrder -9 ShowName off GotoTag "PostRx_Timer1_Done" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From12" SID "1200" Position [25, 417, 220, 433] ZOrder -9 ShowName off GotoTag "MAC_NAV_BUSY" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From18" SID "1213" Position [25, 207, 220, 223] ZOrder -9 ShowName off GotoTag "Tx_A_Backoff_Start" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "1215" Position [25, 452, 215, 468] ZOrder -9 ShowName off GotoTag "Status_Tx_PHY_Active" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "1190" Position [25, 492, 220, 508] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTE_VALID" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "1176" Position [25, 67, 220, 83] ZOrder -9 ShowName off GotoTag "Tx_A_PHY_Start" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "1191" Position [25, 512, 220, 528] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTE" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "1192" Position [25, 477, 220, 493] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTENUM" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "1195" Position [25, 242, 220, 258] ZOrder -9 ShowName off GotoTag "PHY_RX_FCS_GOOD_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "1196" Position [25, 347, 220, 363] ZOrder -9 ShowName off GotoTag "PHY_RX_END_RXERROR" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "1193" Position [25, 277, 220, 293] ZOrder -9 ShowName off GotoTag "PHY_RX_START_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "1197" Position [25, 382, 220, 398] ZOrder -9 ShowName off GotoTag "PHY_CCA_IND_BUSY" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Register" SID "1225" Ports [2, 1] Position [315, 478, 345, 507] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,29,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Rx Byte Ind" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register1" SID "1226" Ports [2, 1] Position [315, 513, 345, 542] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,29,2,1,white,blue,0,6bd0930c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','tex" "mode','on');\nfprintf('','COMMENT: end icon text');" Port { PortNumber 1 Name "Rx Byte" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register10" SID "1235" Ports [1, 1] Position [315, 341, 345, 369] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "PHY Rx End Error" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register11" SID "1236" Ports [1, 1] Position [315, 376, 345, 404] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "PHY CCA Busy" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register12" SID "1237" Ports [1, 1] Position [315, 411, 345, 439] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "NAV Busy" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register13" SID "1238" Ports [1, 1] Position [315, 446, 345, 474] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "Tx Active" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register2" SID "1227" Ports [1, 1] Position [315, 61, 345, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "New Tx PHY Start" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register3" SID "1228" Ports [1, 1] Position [315, 96, 345, 124] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "Auto Tx PHY Start" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register4" SID "1229" Ports [1, 1] Position [315, 131, 345, 159] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "Status Reg" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register5" SID "1230" Ports [1, 1] Position [315, 166, 345, 194] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "Post Rx Timer 1 Done" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register6" SID "1231" Ports [1, 1] Position [315, 201, 345, 229] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "Tx Backoff Start" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register7" SID "1232" Ports [1, 1] Position [315, 236, 345, 264] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "FCS Good" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register8" SID "1233" Ports [1, 1] Position [315, 271, 345, 299] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "PHY Rx Start" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Register9" SID "1234" Ports [1, 1] Position [315, 306, 345, 334] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" Port { PortNumber 1 Name "PHY Rx End" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Line { SrcBlock "From3" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Register3" DstPort 1 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Register4" DstPort 1 } Line { SrcBlock "From11" SrcPort 1 DstBlock "Register5" DstPort 1 } Line { SrcBlock "From18" SrcPort 1 DstBlock "Register6" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Register7" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Register8" DstPort 1 } Line { SrcBlock "From" SrcPort 1 DstBlock "Register9" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Register10" DstPort 1 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Register11" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Register12" DstPort 1 } Line { SrcBlock "From19" SrcPort 1 DstBlock "Register13" DstPort 1 } Line { Name "Rx Byte Ind" Labels [0, 0] SrcBlock "Register" SrcPort 1 DstBlock "ChipScope" DstPort 14 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Register" DstPort 1 } Line { Name "Rx Byte" Labels [0, 0] SrcBlock "Register1" SrcPort 1 DstBlock "ChipScope" DstPort 15 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [60, 0] Branch { DstBlock "Register" DstPort 2 } Branch { Points [0, 35] DstBlock "Register1" DstPort 2 } } Line { Name "New Tx PHY Start" Labels [0, 0] SrcBlock "Register2" SrcPort 1 DstBlock "ChipScope" DstPort 2 } Line { Name "Auto Tx PHY Start" Labels [0, 0] SrcBlock "Register3" SrcPort 1 DstBlock "ChipScope" DstPort 3 } Line { Name "Status Reg" Labels [0, 0] SrcBlock "Register4" SrcPort 1 DstBlock "ChipScope" DstPort 4 } Line { Name "Post Rx Timer 1 Done" Labels [0, 0] SrcBlock "Register5" SrcPort 1 DstBlock "ChipScope" DstPort 5 } Line { Name "Tx Backoff Start" Labels [0, 0] SrcBlock "Register6" SrcPort 1 DstBlock "ChipScope" DstPort 6 } Line { Name "FCS Good" Labels [0, 0] SrcBlock "Register7" SrcPort 1 DstBlock "ChipScope" DstPort 7 } Line { Name "PHY Rx Start" Labels [0, 0] SrcBlock "Register8" SrcPort 1 DstBlock "ChipScope" DstPort 8 } Line { Name "PHY Rx End" Labels [0, 0] SrcBlock "Register9" SrcPort 1 DstBlock "ChipScope" DstPort 9 } Line { Name "PHY Rx End Error" Labels [0, 0] SrcBlock "Register10" SrcPort 1 DstBlock "ChipScope" DstPort 10 } Line { Name "PHY CCA Busy" Labels [0, 0] SrcBlock "Register11" SrcPort 1 DstBlock "ChipScope" DstPort 11 } Line { Name "NAV Busy" Labels [0, 0] SrcBlock "Register12" SrcPort 1 DstBlock "ChipScope" DstPort 12 } Line { Name "Tx Active" Labels [0, 0] SrcBlock "Register13" SrcPort 1 DstBlock "ChipScope" DstPort 13 } Line { Name "Trig Counter" Labels [0, 0] SrcBlock "4-bit Count" SrcPort 1 DstBlock "ChipScope" DstPort 1 } Annotation { Position [92, 78] } } } Block { BlockType SubSystem Name "EDK Processor" SID "4187" Ports [] Position [405, 349, 449, 396] CopyFcn "xlProcBlockCopyCallback(gcbh);xlBlockMoveCallback(gcbh);" DeleteFcn "xlDestroyGui(gcbh);" LoadFcn "xlBlockLoadCallback(gcbh);" ModelCloseFcn "xlDestroyGui(gcbh);" PreSaveFcn "xlBlockPreSaveCallback(gcbh);" PostSaveFcn "xlBlockPostSaveCallback(gcbh);" DestroyFcn "xlDestroyGui(gcbh);" OpenFcn "bh=gcbh;xlProcBlockCallbacks('populatesharedmemorylistbox',bh);xlOpenGui(bh, 'edkprocessor_gui.x" "ml', @xlProcBlockEnablement, @xlProcBlockAction);" CloseFcn "xlDestroyGui(gcbh);" MoveFcn "xlBlockMoveCallback(gcbh);" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Xilinx EDK Processor Block" MaskDescription "Xilinx EDK Processor" MaskHelp "eval('');xlDoc('-book','sysgen','-topic','EDK_Processor');" MaskPromptString "Configure Processor for|XPS Project| |Available Memories| | |Bus Type|Base Address| |Loc" "k| |Dual Clocks| |Register Read-Back|Constraint File| |Inherit Device Type|Initial Program| |Enable Co-Debug wit" "h Xilinx SDK (Beta)| | | | | | | | | | | | | | | | " MaskStyleString "popup(EDK pcore generation|HDL netlisting),edit,edit,edit,edit,edit,popup(AXI|PLB),edit,e" "dit,checkbox,edit,checkbox,edit,checkbox,edit,edit,checkbox,edit,edit,checkbox,edit,edit,edit,edit,edit,edit,edi" "t,edit,edit,edit,edit,edit,edit,edit,edit,edit" MaskVariables "mode=&1;xmp=&2;MemVisToProc=&3;AvailableMemories=&4;portInterfaceTable=&5;bus_type_sgadvanc" "ed=&6;bus_type=&7;baseaddr=&8;baseaddr_lock_sgadvanced=&9;baseaddr_lock=@10;dual_clock_sgadvanced=&11;dual_clock" "=@12;reg_readback_sgadvanced=&13;reg_readback=@14;ucf_file=&15;inheritDeviceType_sgadvanced=&16;inheritDeviceTyp" "e=@17;elf_file=&18;codebug_sgadvanced=&19;codebug=@20;clock_name=&21;internalPortList=&22;resetPolarity=&23;memx" "table=&24;procinfo=&25;memmapdirty=&26;blockname=&27;xpsintstyle=&28;has_advanced_control=@29;sggui_pos=&30;bloc" "k_type=&31;block_version=&32;sg_icon_stat=&33;sg_mask_display=&34;sg_list_contents=&35;sg_blockgui_xml=&36;" MaskTunableValueString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on," "on,on,on,on,on,on,on" MaskCallbackString "|||||||||||||||||||||||||||||||||||" MaskEnableString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,o" "n,on,on,on,on,on,on" MaskVisibilityString "on,on,off,on,on,off,on,on,off,on,off,on,off,on,on,off,on,on,off,on,off,off,off,off,off," "off,off,off,off,off,off,off,off,off,off,off" MaskToolTipString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on," "on,on,on,on,on,on,on" MaskInitialization "try\n tmp_gcb = gcb;\n tmp_gcbh = gcbh;\n if (strcmp('SysGenIndex',get_param(bdroot(" "tmp_gcbh),'tag')) && ~isempty(regexp(bdroot(tmp_gcb), '^xbs', 'once')))\n return;\n end;\n xlMungeMaskParam" "s;\n\n block_type='edkprocessor';\n\n serialized_declarations = '{''block_type''=>''String''}';\n xledkproces" "sor_init();\n ptable_ = xlblockprep(get_param(tmp_gcb, 'MaskWSVariables'));\n try\n xlBlockMoveCallback(tmp" "_gcbh);\n catch \n clear global xl_updateicon_recursion_guard;\n end;\ncatch\n global dbgsysgen;\n if(~i" "sempty(dbgsysgen) && dbgsysgen)\n e = regexprep(lasterr, '\\n', '\\nError: ');\n disp(['Error: While runni" "ng MaskInit code on block ' tmp_gcb ': ' e]);\n error(e);\n end\nend\n" MaskSelfModifiable on MaskDisplay "fprintf('','COMMENT: begin icon graphics');\npatch([0 44 44 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0" ".91 ]);\nplot([0 44 44 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29.66 29." "66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 29.66 29" ".66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ],[1 1 1" " ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.931 0.94" "6 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ndisp('');\n\nfp" "rintf('','COMMENT: end icon text');" MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" MaskValueString "EDK pcore generation||
<<TX_CTRL_D_PARAMS>>
<<TX_CTRL_D_GAINS>>
<<TX_CTRL_C_PARAMS>>
<<TX_CTRL_C_GAINS>>
<" "div> <<TX_CTRL_B_PARAMS>>" "
<<TX_CTRL_B_GAI" "NS>>
<<TX_" "CTRL_A_GAINS>>
&" "lt;<TX_CTRL_A_PARAMS>>
<<POST_RX_TIMERS>>
<<POST_TX_TIMERS>>
<<CALIB_TIMES>>
<<TU_TARGET_LSB>>
<<IFS_INTERVALS2>>
<<IFS_INTERVALS1>>
<<TX_START>>
<<TU_TARGET_MSB>>
<<Control>>
<<NAV_MATCH_ADDR_1>>
<<NAV_MATCH_ADDR_2>" ">
<<BACKOFF_C" "TRL>>
<<NA" "V_VALUE>>
<&l" "t;TX_A_BACKOFF_COUNTER>>
<<TX_CD_BACKOFF_COUNTERS>>
<<PHY_RX_PARAMS>>
<<LATEST_RX_BYTE>>
<<TX_START_TIMESTAMP_MSB>>
<<TX_START_TIMESTAMP_LSB>>
<<RX_START_TIMESTAMP_MSB>&" "gt;
<<RX_START_T" "IMESTAMP_LSB>>
&" "lt;<TXRX_START_TIMESTAMPS_FRAC>>
<<Tx_Ctrl_Status>>
<<Status>>
||{'exposed'=>[],'portdir'=>[],'portnam" "e'=>[],'shortname'=>[]}||AXI|0x80000000||off||on||on|||off|||on|plb|{}|0|{'mladdr'=>[0.00000000000000000,1.00000" "000000000000,2.00000000000000000,3.00000000000000000,4.00000000000000000,5.00000000000000000,6.00000000000000000" ",7.00000000000000000,8.00000000000000000,9.00000000000000000,10.00000000000000000,11.00000000000000000,12.000000" "00000000000,13.00000000000000000,14.00000000000000000,15.00000000000000000,16.00000000000000000,17.0000000000000" "0000,18.00000000000000000,19.00000000000000000,0.00000000000000000,1.00000000000000000,2.00000000000000000,3.000" "00000000000000,4.00000000000000000,5.00000000000000000,6.00000000000000000,7.00000000000000000,8.000000000000000" "00,9.00000000000000000,10.00000000000000000,11.00000000000000000],'mlist'=>['wlan_mac_hw/Registers/Tx Controller" "\nRegs/Tx D Regs/From Register4','wlan_mac_hw/Registers/Tx Controller\nRegs/Tx D Regs/From Register2','wlan_mac_" "hw/Registers/Tx Controller\nRegs/Tx C Regs/From Register4','wlan_mac_hw/Registers/Tx Controller\nRegs/Tx C Regs/" "From Register2','wlan_mac_hw/Registers/Tx Controller\nRegs/Tx B Regs/From Register9','wlan_mac_hw/Registers/Tx C" "ontroller\nRegs/Tx B Regs/From Register12','wlan_mac_hw/Registers/Tx Controller\nRegs/Tx A Regs/From Register7'," "'wlan_mac_hw/Registers/Tx Controller\nRegs/Tx A Regs/From Register3','wlan_mac_hw/Registers/Tx Controller\nRegs/" "From Register14','wlan_mac_hw/Registers/Tx Controller\nRegs/From Register1','wlan_mac_hw/Registers/From Register" "8','wlan_mac_hw/Registers/From Register7','wlan_mac_hw/Registers/From Register6','wlan_mac_hw/Registers/From Reg" "ister5','wlan_mac_hw/Registers/From Register4','wlan_mac_hw/Registers/From Register3','wlan_mac_hw/Registers/Fro" "m Register2','wlan_mac_hw/Registers/From Register16','wlan_mac_hw/Registers/From Register15','wlan_mac_hw/Regist" "ers/From Register1','wlan_mac_hw/Registers/To Register7','wlan_mac_hw/Registers/To Register4','wlan_mac_hw/Regis" "ters/To Register3','wlan_mac_hw/Registers/To Register2','wlan_mac_hw/Registers/To Register1','wlan_mac_hw/Regist" "ers/Timestamp\nRegs & IO/To Register9','wlan_mac_hw/Registers/Timestamp\nRegs & IO/To Register8','wlan_mac_hw/Re" "gisters/Timestamp\nRegs & IO/To Register6','wlan_mac_hw/Registers/Timestamp\nRegs & IO/To Register5','wlan_mac_h" "w/Registers/Timestamp\nRegs & IO/To Register1','wlan_mac_hw/Registers/Status Registers/To Register1','wlan_mac_h" "w/Registers/Status Registers/To Register'],'mlname'=>['\\\\'TX_CTRL_D_PARAMS\\\\'','\\\\'TX_CTRL_D_GAINS\\\\'','" "\\\\'TX_CTRL_C_PARAMS\\\\'','\\\\'TX_CTRL_C_GAINS\\\\'','\\\\'TX_CTRL_B_PARAMS\\\\'','\\\\'TX_CTRL_B_GAINS\\\\''" ",'\\\\'TX_CTRL_A_GAINS\\\\'','\\\\'TX_CTRL_A_PARAMS\\\\'','\\\\'POST_RX_TIMERS\\\\'','\\\\'POST_TX_TIMERS\\\\''," "'\\\\'CALIB_TIMES\\\\'','\\\\'TU_TARGET_LSB\\\\'','\\\\'IFS_INTERVALS2\\\\'','\\\\'IFS_INTERVALS1\\\\'','\\\\'TX" "_START\\\\'','\\\\'TU_TARGET_MSB\\\\'','\\\\'Control\\\\'','\\\\'NAV_MATCH_ADDR_1\\\\'','\\\\'NAV_MATCH_ADDR_2\\" "\\'','\\\\'BACKOFF_CTRL\\\\'','\\\\'NAV_VALUE\\\\'','\\\\'TX_A_BACKOFF_COUNTER\\\\'','\\\\'TX_CD_BACKOFF_COUNTER" "S\\\\'','\\\\'PHY_RX_PARAMS\\\\'','\\\\'LATEST_RX_BYTE\\\\'','\\\\'TX_START_TIMESTAMP_MSB\\\\'','\\\\'TX_START_T" "IMESTAMP_LSB\\\\'','\\\\'RX_START_TIMESTAMP_MSB\\\\'','\\\\'RX_START_TIMESTAMP_LSB\\\\'','\\\\'TXRX_START_TIMEST" "AMPS_FRAC\\\\'','\\\\'Tx_Ctrl_Status\\\\'','\\\\'Status\\\\''],'mlstate'=>[0.00000000000000000,0.000000000000000" "00,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.0000000" "0000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0" ".00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000" "000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.000" "00000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.00000000000000000,0.000000000000000" "00,0.00000000000000000,0.00000000000000000]}|{}|off||default|0|-1,-1,-1,-1|edkprocessor|2.7|44,47,-1,-1,white,bl" "ue,0,07734,right,,[ ],[ ]|fprintf('','COMMENT: begin icon graphics');\npatch([0 44 44 0 0 ],[0 0 47 47 0 ],[0.77" " 0.82 0.91 ]);\nplot([0 44 44 0 0 ],[0 0 47 47 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[29" ".66 29.66 35.66 29.66 35.66 35.66 35.66 29.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[23.66 23.66 2" "9.66 29.66 23.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[17.66 17.66 23.66 23.66 17.66 ]" ",[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[11.66 11.66 17.66 11.66 17.66 17.66 11.66 ],[0.9" "31 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf(" "'','COMMENT: end icon text');|{'table'=>{'AvailableMemories'=>'popup()'}}|" System { Name "EDK Processor" Location [514, 91, 900, 269] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" SIDHighWatermark "299" Block { BlockType Reference Name "AXI_ARESETN" SID "4187:229" Ports [1, 1] Position [145, 50, 210, 70] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Constant Name "Constant" SID "4187:228" Position [20, 50, 40, 70] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant1" SID "4187:230" Position [20, 120, 40, 140] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant10" SID "4187:248" Position [20, 730, 40, 750] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant11" SID "4187:250" Position [20, 800, 40, 820] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant12" SID "4187:252" Position [20, 865, 40, 885] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant13" SID "4187:254" Position [20, 935, 40, 955] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant14" SID "4187:256" Position [20, 1000, 40, 1020] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant15" SID "4187:258" Position [20, 1070, 40, 1090] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant16" SID "4187:260" Position [20, 1140, 40, 1160] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant17" SID "4187:262" Position [20, 1205, 40, 1225] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant18" SID "4187:264" Position [20, 1275, 40, 1295] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant19" SID "4187:266" Position [20, 1340, 40, 1360] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant2" SID "4187:232" Position [20, 185, 40, 205] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant20" SID "4187:268" Position [20, 1410, 40, 1430] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant21" SID "4187:270" Position [20, 1480, 40, 1500] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant22" SID "4187:272" Position [20, 1545, 40, 1565] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant23" SID "4187:274" Position [20, 1615, 40, 1635] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant24" SID "4187:276" Position [20, 1680, 40, 1700] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant3" SID "4187:234" Position [20, 255, 40, 275] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant4" SID "4187:236" Position [20, 320, 40, 340] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant5" SID "4187:238" Position [20, 390, 40, 410] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant6" SID "4187:240" Position [20, 460, 40, 480] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant7" SID "4187:242" Position [20, 525, 40, 545] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant8" SID "4187:244" Position [20, 595, 40, 615] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Constant Name "Constant9" SID "4187:246" Position [20, 660, 40, 680] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "From Register" SID "4187:196" Ports [0, 1] Position [145, 1752, 205, 1808] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'NAV_VALUE'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register1" SID "4187:197" Ports [0, 1] Position [145, 1857, 205, 1913] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_A_BACKOFF_COUNTER'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register10" SID "4187:206" Ports [0, 1] Position [145, 2802, 205, 2858] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Tx_Ctrl_Status'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register11" SID "4187:207" Ports [0, 1] Position [145, 2907, 205, 2963] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Status'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register2" SID "4187:198" Ports [0, 1] Position [145, 1962, 205, 2018] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_CD_BACKOFF_COUNTERS'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register3" SID "4187:199" Ports [0, 1] Position [145, 2067, 205, 2123] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'PHY_RX_PARAMS'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register4" SID "4187:200" Ports [0, 1] Position [145, 2172, 205, 2228] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'LATEST_RX_BYTE'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register5" SID "4187:201" Ports [0, 1] Position [145, 2277, 205, 2333] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_START_TIMESTAMP_MSB'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register6" SID "4187:202" Ports [0, 1] Position [145, 2382, 205, 2438] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_START_TIMESTAMP_LSB'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register7" SID "4187:203" Ports [0, 1] Position [145, 2487, 205, 2543] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'RX_START_TIMESTAMP_MSB'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register8" SID "4187:204" Ports [0, 1] Position [145, 2592, 205, 2648] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'RX_START_TIMESTAMP_LSB'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register9" SID "4187:205" Ports [0, 1] Position [145, 2697, 205, 2753] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TXRX_START_TIMESTAMPS_FRAC'" init "0" period "xlGetNormalizedPeriod()" ownership "Owned and initialized elsewhere" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "60,56,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'d" "out');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "S_AXI_ARADDR" SID "4187:231" Ports [1, 1] Position [145, 120, 210, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_ARBURST" SID "4187:233" Ports [1, 1] Position [145, 185, 210, 205] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_ARCACHE" SID "4187:235" Ports [1, 1] Position [145, 255, 210, 275] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_ARID" SID "4187:237" Ports [1, 1] Position [145, 320, 210, 340] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_ARLEN" SID "4187:239" Ports [1, 1] Position [145, 390, 210, 410] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_ARLOCK" SID "4187:241" Ports [1, 1] Position [145, 460, 210, 480] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_ARPROT" SID "4187:243" Ports [1, 1] Position [145, 525, 210, 545] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_ARREADY" SID "4187:279" Ports [1, 1] Position [660, 160, 720, 180] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "S_AXI_ARSIZE" SID "4187:245" Ports [1, 1] Position [145, 595, 210, 615] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_ARVALID" SID "4187:247" Ports [1, 1] Position [145, 660, 210, 680] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_AWADDR" SID "4187:249" Ports [1, 1] Position [145, 730, 210, 750] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_AWBURST" SID "4187:251" Ports [1, 1] Position [145, 800, 210, 820] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_AWCACHE" SID "4187:253" Ports [1, 1] Position [145, 865, 210, 885] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_AWID" SID "4187:255" Ports [1, 1] Position [145, 935, 210, 955] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_AWLEN" SID "4187:257" Ports [1, 1] Position [145, 1000, 210, 1020] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_AWLOCK" SID "4187:259" Ports [1, 1] Position [145, 1070, 210, 1090] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_AWPROT" SID "4187:261" Ports [1, 1] Position [145, 1140, 210, 1160] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_AWREADY" SID "4187:281" Ports [1, 1] Position [660, 225, 720, 245] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "S_AXI_AWSIZE" SID "4187:263" Ports [1, 1] Position [145, 1205, 210, 1225] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_AWVALID" SID "4187:265" Ports [1, 1] Position [145, 1275, 210, 1295] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_BID" SID "4187:283" Ports [1, 1] Position [660, 295, 720, 315] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "S_AXI_BREADY" SID "4187:267" Ports [1, 1] Position [145, 1340, 210, 1360] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_BRESP" SID "4187:285" Ports [1, 1] Position [660, 365, 720, 385] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "S_AXI_BVALID" SID "4187:287" Ports [1, 1] Position [660, 430, 720, 450] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "S_AXI_RDATA" SID "4187:289" Ports [1, 1] Position [660, 500, 720, 520] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "S_AXI_RID" SID "4187:291" Ports [1, 1] Position [660, 565, 720, 585] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "S_AXI_RLAST" SID "4187:293" Ports [1, 1] Position [660, 635, 720, 655] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "S_AXI_RREADY" SID "4187:269" Ports [1, 1] Position [145, 1410, 210, 1430] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_RRESP" SID "4187:295" Ports [1, 1] Position [660, 705, 720, 725] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "S_AXI_RVALID" SID "4187:297" Ports [1, 1] Position [660, 770, 720, 790] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "S_AXI_WDATA" SID "4187:271" Ports [1, 1] Position [145, 1480, 210, 1500] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_WLAST" SID "4187:273" Ports [1, 1] Position [145, 1545, 210, 1565] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_WREADY" SID "4187:299" Ports [1, 1] Position [660, 840, 720, 860] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "S_AXI_WSTRB" SID "4187:275" Ports [1, 1] Position [145, 1615, 210, 1635] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Reference Name "S_AXI_WVALID" SID "4187:277" Ports [1, 1] Position [145, 1680, 210, 1700] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Fixed-point" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetNormalizedPeriod()" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType Terminator Name "Terminator" SID "4187:278" Position [820, 160, 840, 180] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator1" SID "4187:280" Position [820, 225, 840, 245] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator10" SID "4187:298" Position [820, 840, 840, 860] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator2" SID "4187:282" Position [820, 295, 840, 315] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator3" SID "4187:284" Position [820, 365, 840, 385] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator4" SID "4187:286" Position [820, 430, 840, 450] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator5" SID "4187:288" Position [820, 500, 840, 520] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator6" SID "4187:290" Position [820, 565, 840, 585] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator7" SID "4187:292" Position [820, 635, 840, 655] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator8" SID "4187:294" Position [820, 705, 840, 725] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Terminator Name "Terminator9" SID "4187:296" Position [820, 770, 840, 790] ShowName off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "To Register" SID "4187:208" Ports [2, 1] Position [660, 907, 720, 963] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_CTRL_D_PARAMS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register1" SID "4187:209" Ports [2, 1] Position [660, 1012, 720, 1068] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_CTRL_D_GAINS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register10" SID "4187:218" Ports [2, 1] Position [660, 1962, 720, 2018] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'CALIB_TIMES'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register11" SID "4187:219" Ports [2, 1] Position [660, 2067, 720, 2123] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TU_TARGET_LSB'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register12" SID "4187:220" Ports [2, 1] Position [660, 2172, 720, 2228] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'IFS_INTERVALS2'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register13" SID "4187:221" Ports [2, 1] Position [660, 2277, 720, 2333] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'IFS_INTERVALS1'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register14" SID "4187:222" Ports [2, 1] Position [660, 2382, 720, 2438] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_START'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register15" SID "4187:223" Ports [2, 1] Position [660, 2487, 720, 2543] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TU_TARGET_MSB'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register16" SID "4187:224" Ports [2, 1] Position [660, 2592, 720, 2648] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'Control'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register17" SID "4187:225" Ports [2, 1] Position [660, 2697, 720, 2753] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'NAV_MATCH_ADDR_1'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register18" SID "4187:226" Ports [2, 1] Position [660, 2802, 720, 2858] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'NAV_MATCH_ADDR_2'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register19" SID "4187:227" Ports [2, 1] Position [660, 2907, 720, 2963] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'BACKOFF_CTRL'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register2" SID "4187:210" Ports [2, 1] Position [660, 1117, 720, 1173] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_CTRL_C_PARAMS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register3" SID "4187:211" Ports [2, 1] Position [660, 1222, 720, 1278] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_CTRL_C_GAINS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register4" SID "4187:212" Ports [2, 1] Position [660, 1327, 720, 1383] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_CTRL_B_PARAMS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register5" SID "4187:213" Ports [2, 1] Position [660, 1432, 720, 1488] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_CTRL_B_GAINS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register6" SID "4187:214" Ports [2, 1] Position [660, 1542, 720, 1598] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_CTRL_A_GAINS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register7" SID "4187:215" Ports [2, 1] Position [660, 1647, 720, 1703] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_CTRL_A_PARAMS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register8" SID "4187:216" Ports [2, 1] Position [660, 1752, 720, 1808] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'POST_RX_TIMERS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "To Register9" SID "4187:217" Ports [2, 1] Position [660, 1857, 720, 1913] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'POST_TX_TIMERS'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" sg_icon_stat "60,56,2,1,white,blue,0,10ab453e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44.8" "8 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'di" "n');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType Reference Name "memmap" SID "4187:195" Ports [57, 51] Position [310, 727, 560, 2443] LibraryVersion "1.2" SourceBlock "xbsEDKLib_r4/EDK Core" SourceType "Xilinx EDK Core Block" infoedit "For use with EDK Processor block." sim_method "Inactive" xl_use_area off xl_area "[0,0,0,0,0,0,0]" xmp "xmp" blockname "blockname" dual_clock "dual_clock" procinfo "procinfo" bus_type "bus_type" memxtable "memxtable" memmap_hdlcontent "library IEEE;\nuse IEEE.std_logic_1164.all;\nuse IEEE.numeric_std.all;\n\nentity axi_sgiface i" "s\n generic (\n -- AXI specific.\n -- TODO: need to figure out a way to pass these generics from o" "utside\n C_S_AXI_SUPPORT_BURST : integer := 0;\n -- TODO: fix the internal ID width to 8\n C" "_S_AXI_ID_WIDTH : integer := 8;\n C_S_AXI_DATA_WIDTH : integer := 32;\n C_S_AXI_ADDR_WIDT" "H : integer := 32;\n C_S_AXI_TOTAL_ADDR_LEN : integer := 12;\n C_S_AXI_LINEAR_ADDR_LEN : intege" "r := 8;\n C_S_AXI_BANK_ADDR_LEN : integer := 2;\n C_S_AXI_AWLEN_WIDTH : integer := 8;\n " "C_S_AXI_ARLEN_WIDTH : integer := 8\n );\n port (\n -- General.\n AXI_AClk : in std_lo" "gic;\n AXI_AResetN : in std_logic;\n -- not used\n AXI_Ce : in std_logic;\n \n " " -- AXI Port.\n S_AXI_AWADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);\n S_AXI_AWID" " : in std_logic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\n S_AXI_AWLEN : in std_logic_vector(C_S_AXI_AWLE" "N_WIDTH-1 downto 0);\n S_AXI_AWSIZE : in std_logic_vector(2 downto 0);\n S_AXI_AWBURST : in std_lo" "gic_vector(1 downto 0);\n S_AXI_AWLOCK : in std_logic_vector(1 downto 0);\n S_AXI_AWCACHE : in std" "_logic_vector(3 downto 0);\n S_AXI_AWPROT : in std_logic_vector(2 downto 0);\n S_AXI_AWVALID : in " "std_logic;\n S_AXI_AWREADY : out std_logic;\n \n S_AXI_WLAST : in std_logic;\n S_AXI" "_WDATA : in std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n S_AXI_WSTRB : in std_logic_vector((C_S_" "AXI_DATA_WIDTH/8)-1 downto 0);\n S_AXI_WVALID : in std_logic;\n S_AXI_WREADY : out std_logic;\n " " \n S_AXI_BRESP : out std_logic_vector(1 downto 0);\n S_AXI_BID : out std_logic_vector(C_S_" "AXI_ID_WIDTH-1 downto 0);\n S_AXI_BVALID : out std_logic;\n S_AXI_BREADY : in std_logic;\n " "\n S_AXI_ARADDR : in std_logic_vector(C_S_AXI_ADDR_WIDTH-1 downto 0);\n S_AXI_ARID : in std_log" "ic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\n S_AXI_ARLEN : in std_logic_vector(C_S_AXI_ARLEN_WIDTH-1 downto " "0);\n S_AXI_ARSIZE : in std_logic_vector(2 downto 0);\n S_AXI_ARBURST : in std_logic_vector(1 down" "to 0);\n S_AXI_ARLOCK : in std_logic_vector(1 downto 0);\n S_AXI_ARCACHE : in std_logic_vector(3 d" "ownto 0);\n S_AXI_ARPROT : in std_logic_vector(2 downto 0);\n S_AXI_ARVALID : in std_logic;\n " " S_AXI_ARREADY : out std_logic;\n \n -- 'From Register'\n -- 'NAV_VALUE'\n sm_NAV_VAL" "UE_dout : in std_logic_vector(32-1 downto 0);\n -- 'TX_A_BACKOFF_COUNTER'\n sm_TX_A_BACKOFF_COUNTER_d" "out : in std_logic_vector(32-1 downto 0);\n -- 'TX_CD_BACKOFF_COUNTERS'\n sm_TX_CD_BACKOFF_COUNTERS_d" "out : in std_logic_vector(32-1 downto 0);\n -- 'PHY_RX_PARAMS'\n sm_PHY_RX_PARAMS_dout : in std_logic" "_vector(32-1 downto 0);\n -- 'LATEST_RX_BYTE'\n sm_LATEST_RX_BYTE_dout : in std_logic_vector(32-1 dow" "nto 0);\n -- 'TX_START_TIMESTAMP_MSB'\n sm_TX_START_TIMESTAMP_MSB_dout : in std_logic_vector(32-1 dow" "nto 0);\n -- 'TX_START_TIMESTAMP_LSB'\n sm_TX_START_TIMESTAMP_LSB_dout : in std_logic_vector(32-1 dow" "nto 0);\n -- 'RX_START_TIMESTAMP_MSB'\n sm_RX_START_TIMESTAMP_MSB_dout : in std_logic_vector(32-1 dow" "nto 0);\n -- 'RX_START_TIMESTAMP_LSB'\n sm_RX_START_TIMESTAMP_LSB_dout : in std_logic_vector(32-1 dow" "nto 0);\n -- 'TXRX_START_TIMESTAMPS_FRAC'\n sm_TXRX_START_TIMESTAMPS_FRAC_dout : in std_logic_vector(" "32-1 downto 0);\n -- 'Tx_Ctrl_Status'\n sm_Tx_Ctrl_Status_dout : in std_logic_vector(32-1 downto 0);\n" " -- 'Status'\n sm_Status_dout : in std_logic_vector(32-1 downto 0);\n -- 'To Register'\n " " -- 'TX_CTRL_D_PARAMS'\n sm_TX_CTRL_D_PARAMS_dout : in std_logic_vector(32-1 downto 0);\n sm_TX_CTRL" "_D_PARAMS_din : out std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_D_PARAMS_en : out std_logic;\n -" "- 'TX_CTRL_D_GAINS'\n sm_TX_CTRL_D_GAINS_dout : in std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_D_GA" "INS_din : out std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_D_GAINS_en : out std_logic;\n -- 'TX_C" "TRL_C_PARAMS'\n sm_TX_CTRL_C_PARAMS_dout : in std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_C_PARAMS_" "din : out std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_C_PARAMS_en : out std_logic;\n -- 'TX_CTRL" "_C_GAINS'\n sm_TX_CTRL_C_GAINS_dout : in std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_C_GAINS_din :" " out std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_C_GAINS_en : out std_logic;\n -- 'TX_CTRL_B_PARA" "MS'\n sm_TX_CTRL_B_PARAMS_dout : in std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_B_PARAMS_din : out" " std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_B_PARAMS_en : out std_logic;\n -- 'TX_CTRL_B_GAINS'\n" " sm_TX_CTRL_B_GAINS_dout : in std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_B_GAINS_din : out std_lo" "gic_vector(32-1 downto 0);\n sm_TX_CTRL_B_GAINS_en : out std_logic;\n -- 'TX_CTRL_A_GAINS'\n " " sm_TX_CTRL_A_GAINS_dout : in std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_A_GAINS_din : out std_logic_vec" "tor(32-1 downto 0);\n sm_TX_CTRL_A_GAINS_en : out std_logic;\n -- 'TX_CTRL_A_PARAMS'\n sm_TX" "_CTRL_A_PARAMS_dout : in std_logic_vector(32-1 downto 0);\n sm_TX_CTRL_A_PARAMS_din : out std_logic_vector(" "32-1 downto 0);\n sm_TX_CTRL_A_PARAMS_en : out std_logic;\n -- 'POST_RX_TIMERS'\n sm_POST_RX" "_TIMERS_dout : in std_logic_vector(32-1 downto 0);\n sm_POST_RX_TIMERS_din : out std_logic_vector(32-1 down" "to 0);\n sm_POST_RX_TIMERS_en : out std_logic;\n -- 'POST_TX_TIMERS'\n sm_POST_TX_TIMERS_dou" "t : in std_logic_vector(32-1 downto 0);\n sm_POST_TX_TIMERS_din : out std_logic_vector(32-1 downto 0);\n " " sm_POST_TX_TIMERS_en : out std_logic;\n -- 'CALIB_TIMES'\n sm_CALIB_TIMES_dout : in std_logic_" "vector(32-1 downto 0);\n sm_CALIB_TIMES_din : out std_logic_vector(32-1 downto 0);\n sm_CALIB_TIMES_" "en : out std_logic;\n -- 'TU_TARGET_LSB'\n sm_TU_TARGET_LSB_dout : in std_logic_vector(32-1 downto " "0);\n sm_TU_TARGET_LSB_din : out std_logic_vector(32-1 downto 0);\n sm_TU_TARGET_LSB_en : out std_" "logic;\n -- 'IFS_INTERVALS2'\n sm_IFS_INTERVALS2_dout : in std_logic_vector(32-1 downto 0);\n " "sm_IFS_INTERVALS2_din : out std_logic_vector(32-1 downto 0);\n sm_IFS_INTERVALS2_en : out std_logic;\n " " -- 'IFS_INTERVALS1'\n sm_IFS_INTERVALS1_dout : in std_logic_vector(32-1 downto 0);\n sm_IFS_INTE" "RVALS1_din : out std_logic_vector(32-1 downto 0);\n sm_IFS_INTERVALS1_en : out std_logic;\n -- 'TX" "_START'\n sm_TX_START_dout : in std_logic_vector(32-1 downto 0);\n sm_TX_START_din : out std_logic_v" "ector(32-1 downto 0);\n sm_TX_START_en : out std_logic;\n -- 'TU_TARGET_MSB'\n sm_TU_TARGET_" "MSB_dout : in std_logic_vector(32-1 downto 0);\n sm_TU_TARGET_MSB_din : out std_logic_vector(32-1 downto 0)" ";\n sm_TU_TARGET_MSB_en : out std_logic;\n -- 'Control'\n sm_Control_dout : in std_logic_vec" "tor(32-1 downto 0);\n sm_Control_din : out std_logic_vector(32-1 downto 0);\n sm_Control_en : out " "std_logic;\n -- 'NAV_MATCH_ADDR_1'\n sm_NAV_MATCH_ADDR_1_dout : in std_logic_vector(32-1 downto 0);\n" " sm_NAV_MATCH_ADDR_1_din : out std_logic_vector(32-1 downto 0);\n sm_NAV_MATCH_ADDR_1_en : out std" "_logic;\n -- 'NAV_MATCH_ADDR_2'\n sm_NAV_MATCH_ADDR_2_dout : in std_logic_vector(32-1 downto 0);\n " " sm_NAV_MATCH_ADDR_2_din : out std_logic_vector(32-1 downto 0);\n sm_NAV_MATCH_ADDR_2_en : out std_lo" "gic;\n -- 'BACKOFF_CTRL'\n sm_BACKOFF_CTRL_dout : in std_logic_vector(32-1 downto 0);\n sm_BAC" "KOFF_CTRL_din : out std_logic_vector(32-1 downto 0);\n sm_BACKOFF_CTRL_en : out std_logic;\n -- 'F" "rom FIFO'\n -- 'To FIFO'\n -- 'Shared Memory'\n\n S_AXI_RLAST : out std_logic;\n S_AX" "I_RID : out std_logic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\n S_AXI_RDATA : out std_logic_vector(C_S_AX" "I_DATA_WIDTH-1 downto 0);\n S_AXI_RRESP : out std_logic_vector(1 downto 0);\n S_AXI_RVALID : out s" "td_logic;\n S_AXI_RREADY : in std_logic\n );\nend entity axi_sgiface;\n\narchitecture IMP of axi_sgifac" "e is\n\n-- Internal signals for write channel.\nsignal S_AXI_BVALID_i : std_logic;\nsignal S_AXI_BID_i " " : std_logic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\nsignal S_AXI_WREADY_i : std_logic;\n \n-- Internal sign" "als for read channels.\nsignal S_AXI_ARLEN_i : std_logic_vector(C_S_AXI_ARLEN_WIDTH-1 downto 0);\nsignal S_A" "XI_RLAST_i : std_logic;\nsignal S_AXI_RREADY_i : std_logic;\nsignal S_AXI_RVALID_i : std_logic;\n" "signal S_AXI_RDATA_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal S_AXI_RID_i : std_l" "ogic_vector(C_S_AXI_ID_WIDTH-1 downto 0);\n\n-- for read channel\nsignal read_bank_addr_i : std_logic_vector(C_" "S_AXI_BANK_ADDR_LEN-1 downto 0);\nsignal read_linear_addr_i : std_logic_vector(C_S_AXI_LINEAR_ADDR_LEN-1 downto 0" ");\n-- for write channel\nsignal write_bank_addr_i : std_logic_vector(C_S_AXI_BANK_ADDR_LEN-1 downto 0);\nsignal" " write_linear_addr_i : std_logic_vector(C_S_AXI_LINEAR_ADDR_LEN-1 downto 0);\n\nsignal reg_bank_out_i : std_" "logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal fifo_bank_out_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 d" "ownto 0);\nsignal shmem_bank_out_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n \n-- 'From Register'" "\n-- 'NAV_VALUE'\nsignal sm_NAV_VALUE_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TX_A_BACKOFF_" "COUNTER'\nsignal sm_TX_A_BACKOFF_COUNTER_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TX_CD_BACK" "OFF_COUNTERS'\nsignal sm_TX_CD_BACKOFF_COUNTERS_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'PHY" "_RX_PARAMS'\nsignal sm_PHY_RX_PARAMS_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'LATEST_RX_BYTE" "'\nsignal sm_LATEST_RX_BYTE_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TX_START_TIMESTAMP_MSB'" "\nsignal sm_TX_START_TIMESTAMP_MSB_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TX_START_TIMESTA" "MP_LSB'\nsignal sm_TX_START_TIMESTAMP_LSB_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'RX_START_" "TIMESTAMP_MSB'\nsignal sm_RX_START_TIMESTAMP_MSB_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'RX" "_START_TIMESTAMP_LSB'\nsignal sm_RX_START_TIMESTAMP_LSB_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n" "-- 'TXRX_START_TIMESTAMPS_FRAC'\nsignal sm_TXRX_START_TIMESTAMPS_FRAC_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH" "-1 downto 0);\n-- 'Tx_Ctrl_Status'\nsignal sm_Tx_Ctrl_Status_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto" " 0);\n-- 'Status'\nsignal sm_Status_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'To Register'\n-" "- 'TX_CTRL_D_PARAMS'\nsignal sm_TX_CTRL_D_PARAMS_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal" " sm_TX_CTRL_D_PARAMS_en_i : std_logic;\nsignal sm_TX_CTRL_D_PARAMS_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH" "-1 downto 0);\n-- 'TX_CTRL_D_GAINS'\nsignal sm_TX_CTRL_D_GAINS_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 down" "to 0);\nsignal sm_TX_CTRL_D_GAINS_en_i : std_logic;\nsignal sm_TX_CTRL_D_GAINS_dout_i : std_logic_vector(C_S_AX" "I_DATA_WIDTH-1 downto 0);\n-- 'TX_CTRL_C_PARAMS'\nsignal sm_TX_CTRL_C_PARAMS_din_i : std_logic_vector(C_S_AXI_DAT" "A_WIDTH-1 downto 0);\nsignal sm_TX_CTRL_C_PARAMS_en_i : std_logic;\nsignal sm_TX_CTRL_C_PARAMS_dout_i : std_log" "ic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TX_CTRL_C_GAINS'\nsignal sm_TX_CTRL_C_GAINS_din_i : std_logic_vect" "or(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TX_CTRL_C_GAINS_en_i : std_logic;\nsignal sm_TX_CTRL_C_GAINS_dout_" "i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TX_CTRL_B_PARAMS'\nsignal sm_TX_CTRL_B_PARAMS_din_i : " "std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TX_CTRL_B_PARAMS_en_i : std_logic;\nsignal sm_TX_CTR" "L_B_PARAMS_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TX_CTRL_B_GAINS'\nsignal sm_TX_CTRL_B_GA" "INS_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TX_CTRL_B_GAINS_en_i : std_logic;\nsig" "nal sm_TX_CTRL_B_GAINS_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TX_CTRL_A_GAINS'\nsignal sm_" "TX_CTRL_A_GAINS_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TX_CTRL_A_GAINS_en_i : std" "_logic;\nsignal sm_TX_CTRL_A_GAINS_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'TX_CTRL_A_PARAMS" "'\nsignal sm_TX_CTRL_A_PARAMS_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_TX_CTRL_A_PARAM" "S_en_i : std_logic;\nsignal sm_TX_CTRL_A_PARAMS_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- '" "POST_RX_TIMERS'\nsignal sm_POST_RX_TIMERS_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_POS" "T_RX_TIMERS_en_i : std_logic;\nsignal sm_POST_RX_TIMERS_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0" ");\n-- 'POST_TX_TIMERS'\nsignal sm_POST_TX_TIMERS_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsigna" "l sm_POST_TX_TIMERS_en_i : std_logic;\nsignal sm_POST_TX_TIMERS_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 " "downto 0);\n-- 'CALIB_TIMES'\nsignal sm_CALIB_TIMES_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsig" "nal sm_CALIB_TIMES_en_i : std_logic;\nsignal sm_CALIB_TIMES_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 down" "to 0);\n-- 'TU_TARGET_LSB'\nsignal sm_TU_TARGET_LSB_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsig" "nal sm_TU_TARGET_LSB_en_i : std_logic;\nsignal sm_TU_TARGET_LSB_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 " "downto 0);\n-- 'IFS_INTERVALS2'\nsignal sm_IFS_INTERVALS2_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0)" ";\nsignal sm_IFS_INTERVALS2_en_i : std_logic;\nsignal sm_IFS_INTERVALS2_dout_i : std_logic_vector(C_S_AXI_DATA_" "WIDTH-1 downto 0);\n-- 'IFS_INTERVALS1'\nsignal sm_IFS_INTERVALS1_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 d" "ownto 0);\nsignal sm_IFS_INTERVALS1_en_i : std_logic;\nsignal sm_IFS_INTERVALS1_dout_i : std_logic_vector(C_S_A" "XI_DATA_WIDTH-1 downto 0);\n-- 'TX_START'\nsignal sm_TX_START_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downt" "o 0);\nsignal sm_TX_START_en_i : std_logic;\nsignal sm_TX_START_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 " "downto 0);\n-- 'TU_TARGET_MSB'\nsignal sm_TU_TARGET_MSB_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n" "signal sm_TU_TARGET_MSB_en_i : std_logic;\nsignal sm_TU_TARGET_MSB_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH" "-1 downto 0);\n-- 'Control'\nsignal sm_Control_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal s" "m_Control_en_i : std_logic;\nsignal sm_Control_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\n-- 'N" "AV_MATCH_ADDR_1'\nsignal sm_NAV_MATCH_ADDR_1_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto 0);\nsignal sm_" "NAV_MATCH_ADDR_1_en_i : std_logic;\nsignal sm_NAV_MATCH_ADDR_1_dout_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 d" "ownto 0);\n-- 'NAV_MATCH_ADDR_2'\nsignal sm_NAV_MATCH_ADDR_2_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-1 downto" " 0);\nsignal sm_NAV_MATCH_ADDR_2_en_i : std_logic;\nsignal sm_NAV_MATCH_ADDR_2_dout_i : std_logic_vector(C_S_AX" "I_DATA_WIDTH-1 downto 0);\n-- 'BACKOFF_CTRL'\nsignal sm_BACKOFF_CTRL_din_i : std_logic_vector(C_S_AXI_DATA_WIDTH-" "1 downto 0);\nsignal sm_BACKOFF_CTRL_en_i : std_logic;\nsignal sm_BACKOFF_CTRL_dout_i : std_logic_vector(C_S_AX" "I_DATA_WIDTH-1 downto 0);\n-- 'From FIFO'\n-- 'To FIFO'\n-- 'Shared Memory'\n\ntype t_read_state is (IDLE, READ_PRE" "P, READ_DATA);\nsignal read_state : t_read_state;\n\ntype t_write_state is (IDLE, WRITE_DATA, WRITE_RESPONSE);\nsig" "nal write_state : t_write_state;\n\ntype t_memmap_state is (READ, WRITE);\nsignal memmap_state : t_memmap_state;\n\n" "constant C_READ_PREP_DELAY : std_logic_vector(1 downto 0) := \"11\";\n\nsignal read_prep_counter : std_logic_vector" "(1 downto 0);\nsignal read_addr_counter : std_logic_vector(C_S_AXI_ARLEN_WIDTH-1 downto 0);\nsignal read_data_count" "er : std_logic_vector(C_S_AXI_ARLEN_WIDTH-1 downto 0);\n\n-- enable of shared BRAMs\nsignal s_shram_en : std_logic;" "\n\nsignal write_addr_valid : std_logic;\nsignal write_ready : std_logic;\n\n-- 're' of From/To FIFOs\nsignal s_fif" "o_re : std_logic;\n-- 'we' of To FIFOs\nsignal s_fifo_we : std_logic;\n\nbegin\n\n-- enable for 'Shared Memory' blo" "cks\n\n-- conversion to match with the data bus width\n-- 'From Register'\n-- 'NAV_VALUE'\ngen_sm_NAV_VALUE_dout_i:" " if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_NAV_VALUE_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');" "\nend generate gen_sm_NAV_VALUE_dout_i;\nsm_NAV_VALUE_dout_i(32-1 downto 0) <= sm_NAV_VALUE_dout;\n-- 'TX_A_BACKOFF" "_COUNTER'\ngen_sm_TX_A_BACKOFF_COUNTER_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_TX_A_BACKOFF_COUNTER_d" "out_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TX_A_BACKOFF_COUNTER_dout_i;\nsm_TX_" "A_BACKOFF_COUNTER_dout_i(32-1 downto 0) <= sm_TX_A_BACKOFF_COUNTER_dout;\n-- 'TX_CD_BACKOFF_COUNTERS'\ngen_sm_TX_CD" "_BACKOFF_COUNTERS_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_TX_CD_BACKOFF_COUNTERS_dout_i(C_S_AXI_DATA_" "WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TX_CD_BACKOFF_COUNTERS_dout_i;\nsm_TX_CD_BACKOFF_COUNTE" "RS_dout_i(32-1 downto 0) <= sm_TX_CD_BACKOFF_COUNTERS_dout;\n-- 'PHY_RX_PARAMS'\ngen_sm_PHY_RX_PARAMS_dout_i: if (3" "2 < C_S_AXI_DATA_WIDTH) generate\n sm_PHY_RX_PARAMS_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\n" "end generate gen_sm_PHY_RX_PARAMS_dout_i;\nsm_PHY_RX_PARAMS_dout_i(32-1 downto 0) <= sm_PHY_RX_PARAMS_dout;\n-- 'LA" "TEST_RX_BYTE'\ngen_sm_LATEST_RX_BYTE_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_LATEST_RX_BYTE_dout_i(C_" "S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_LATEST_RX_BYTE_dout_i;\nsm_LATEST_RX_BYTE_do" "ut_i(32-1 downto 0) <= sm_LATEST_RX_BYTE_dout;\n-- 'TX_START_TIMESTAMP_MSB'\ngen_sm_TX_START_TIMESTAMP_MSB_dout_i: " "if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_TX_START_TIMESTAMP_MSB_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (oth" "ers => '0');\nend generate gen_sm_TX_START_TIMESTAMP_MSB_dout_i;\nsm_TX_START_TIMESTAMP_MSB_dout_i(32-1 downto 0) <" "= sm_TX_START_TIMESTAMP_MSB_dout;\n-- 'TX_START_TIMESTAMP_LSB'\ngen_sm_TX_START_TIMESTAMP_LSB_dout_i: if (32 < C_S_" "AXI_DATA_WIDTH) generate\n sm_TX_START_TIMESTAMP_LSB_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\n" "end generate gen_sm_TX_START_TIMESTAMP_LSB_dout_i;\nsm_TX_START_TIMESTAMP_LSB_dout_i(32-1 downto 0) <= sm_TX_START_" "TIMESTAMP_LSB_dout;\n-- 'RX_START_TIMESTAMP_MSB'\ngen_sm_RX_START_TIMESTAMP_MSB_dout_i: if (32 < C_S_AXI_DATA_WIDTH" ") generate\n sm_RX_START_TIMESTAMP_MSB_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate " "gen_sm_RX_START_TIMESTAMP_MSB_dout_i;\nsm_RX_START_TIMESTAMP_MSB_dout_i(32-1 downto 0) <= sm_RX_START_TIMESTAMP_MSB" "_dout;\n-- 'RX_START_TIMESTAMP_LSB'\ngen_sm_RX_START_TIMESTAMP_LSB_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n " " sm_RX_START_TIMESTAMP_LSB_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_RX_STA" "RT_TIMESTAMP_LSB_dout_i;\nsm_RX_START_TIMESTAMP_LSB_dout_i(32-1 downto 0) <= sm_RX_START_TIMESTAMP_LSB_dout;\n-- 'T" "XRX_START_TIMESTAMPS_FRAC'\ngen_sm_TXRX_START_TIMESTAMPS_FRAC_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm" "_TXRX_START_TIMESTAMPS_FRAC_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TXRX_ST" "ART_TIMESTAMPS_FRAC_dout_i;\nsm_TXRX_START_TIMESTAMPS_FRAC_dout_i(32-1 downto 0) <= sm_TXRX_START_TIMESTAMPS_FRAC_d" "out;\n-- 'Tx_Ctrl_Status'\ngen_sm_Tx_Ctrl_Status_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_Tx_Ctrl_Stat" "us_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_Tx_Ctrl_Status_dout_i;\nsm_Tx_Ct" "rl_Status_dout_i(32-1 downto 0) <= sm_Tx_Ctrl_Status_dout;\n-- 'Status'\ngen_sm_Status_dout_i: if (32 < C_S_AXI_DAT" "A_WIDTH) generate\n sm_Status_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_St" "atus_dout_i;\nsm_Status_dout_i(32-1 downto 0) <= sm_Status_dout;\n-- 'To Register'\n-- 'TX_CTRL_D_PARAMS'\nsm_TX_CT" "RL_D_PARAMS_din <= sm_TX_CTRL_D_PARAMS_din_i(32-1 downto 0);\nsm_TX_CTRL_D_PARAMS_en <= sm_TX_CTRL_D_PARAM" "S_en_i;\ngen_sm_TX_CTRL_D_PARAMS_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_TX_CTRL_D_PARAMS_dout_i(C_S_" "AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TX_CTRL_D_PARAMS_dout_i;\nsm_TX_CTRL_D_PARAMS_" "dout_i(32-1 downto 0) <= sm_TX_CTRL_D_PARAMS_dout;\n-- 'TX_CTRL_D_GAINS'\nsm_TX_CTRL_D_GAINS_din <= sm_TX_CTRL_" "D_GAINS_din_i(32-1 downto 0);\nsm_TX_CTRL_D_GAINS_en <= sm_TX_CTRL_D_GAINS_en_i;\ngen_sm_TX_CTRL_D_GAINS_dout_" "i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_TX_CTRL_D_GAINS_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others " "=> '0');\nend generate gen_sm_TX_CTRL_D_GAINS_dout_i;\nsm_TX_CTRL_D_GAINS_dout_i(32-1 downto 0) <= sm_TX_CTRL_D_GAI" "NS_dout;\n-- 'TX_CTRL_C_PARAMS'\nsm_TX_CTRL_C_PARAMS_din <= sm_TX_CTRL_C_PARAMS_din_i(32-1 downto 0);\nsm_TX_CT" "RL_C_PARAMS_en <= sm_TX_CTRL_C_PARAMS_en_i;\ngen_sm_TX_CTRL_C_PARAMS_dout_i: if (32 < C_S_AXI_DATA_WIDTH) gene" "rate\n sm_TX_CTRL_C_PARAMS_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TX_CT" "RL_C_PARAMS_dout_i;\nsm_TX_CTRL_C_PARAMS_dout_i(32-1 downto 0) <= sm_TX_CTRL_C_PARAMS_dout;\n-- 'TX_CTRL_C_GAINS'\n" "sm_TX_CTRL_C_GAINS_din <= sm_TX_CTRL_C_GAINS_din_i(32-1 downto 0);\nsm_TX_CTRL_C_GAINS_en <= sm_TX_CTRL_C_" "GAINS_en_i;\ngen_sm_TX_CTRL_C_GAINS_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_TX_CTRL_C_GAINS_dout_i(C_" "S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TX_CTRL_C_GAINS_dout_i;\nsm_TX_CTRL_C_GAINS_" "dout_i(32-1 downto 0) <= sm_TX_CTRL_C_GAINS_dout;\n-- 'TX_CTRL_B_PARAMS'\nsm_TX_CTRL_B_PARAMS_din <= sm_TX_CTRL" "_B_PARAMS_din_i(32-1 downto 0);\nsm_TX_CTRL_B_PARAMS_en <= sm_TX_CTRL_B_PARAMS_en_i;\ngen_sm_TX_CTRL_B_PARAMS_" "dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_TX_CTRL_B_PARAMS_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (o" "thers => '0');\nend generate gen_sm_TX_CTRL_B_PARAMS_dout_i;\nsm_TX_CTRL_B_PARAMS_dout_i(32-1 downto 0) <= sm_TX_CT" "RL_B_PARAMS_dout;\n-- 'TX_CTRL_B_GAINS'\nsm_TX_CTRL_B_GAINS_din <= sm_TX_CTRL_B_GAINS_din_i(32-1 downto 0);\nsm" "_TX_CTRL_B_GAINS_en <= sm_TX_CTRL_B_GAINS_en_i;\ngen_sm_TX_CTRL_B_GAINS_dout_i: if (32 < C_S_AXI_DATA_WIDTH) g" "enerate\n sm_TX_CTRL_B_GAINS_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TX_" "CTRL_B_GAINS_dout_i;\nsm_TX_CTRL_B_GAINS_dout_i(32-1 downto 0) <= sm_TX_CTRL_B_GAINS_dout;\n-- 'TX_CTRL_A_GAINS'\ns" "m_TX_CTRL_A_GAINS_din <= sm_TX_CTRL_A_GAINS_din_i(32-1 downto 0);\nsm_TX_CTRL_A_GAINS_en <= sm_TX_CTRL_A_G" "AINS_en_i;\ngen_sm_TX_CTRL_A_GAINS_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_TX_CTRL_A_GAINS_dout_i(C_S" "_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TX_CTRL_A_GAINS_dout_i;\nsm_TX_CTRL_A_GAINS_d" "out_i(32-1 downto 0) <= sm_TX_CTRL_A_GAINS_dout;\n-- 'TX_CTRL_A_PARAMS'\nsm_TX_CTRL_A_PARAMS_din <= sm_TX_CTRL_" "A_PARAMS_din_i(32-1 downto 0);\nsm_TX_CTRL_A_PARAMS_en <= sm_TX_CTRL_A_PARAMS_en_i;\ngen_sm_TX_CTRL_A_PARAMS_d" "out_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_TX_CTRL_A_PARAMS_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (ot" "hers => '0');\nend generate gen_sm_TX_CTRL_A_PARAMS_dout_i;\nsm_TX_CTRL_A_PARAMS_dout_i(32-1 downto 0) <= sm_TX_CTR" "L_A_PARAMS_dout;\n-- 'POST_RX_TIMERS'\nsm_POST_RX_TIMERS_din <= sm_POST_RX_TIMERS_din_i(32-1 downto 0);\nsm_POS" "T_RX_TIMERS_en <= sm_POST_RX_TIMERS_en_i;\ngen_sm_POST_RX_TIMERS_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate" "\n sm_POST_RX_TIMERS_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_POST_RX_TIM" "ERS_dout_i;\nsm_POST_RX_TIMERS_dout_i(32-1 downto 0) <= sm_POST_RX_TIMERS_dout;\n-- 'POST_TX_TIMERS'\nsm_POST_TX_TI" "MERS_din <= sm_POST_TX_TIMERS_din_i(32-1 downto 0);\nsm_POST_TX_TIMERS_en <= sm_POST_TX_TIMERS_en_i;\ngen_" "sm_POST_TX_TIMERS_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_POST_TX_TIMERS_dout_i(C_S_AXI_DATA_WIDTH-1 " "downto 32) <= (others => '0');\nend generate gen_sm_POST_TX_TIMERS_dout_i;\nsm_POST_TX_TIMERS_dout_i(32-1 downto 0)" " <= sm_POST_TX_TIMERS_dout;\n-- 'CALIB_TIMES'\nsm_CALIB_TIMES_din <= sm_CALIB_TIMES_din_i(32-1 downto 0);\nsm_C" "ALIB_TIMES_en <= sm_CALIB_TIMES_en_i;\ngen_sm_CALIB_TIMES_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n s" "m_CALIB_TIMES_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_CALIB_TIMES_dout_i;\n" "sm_CALIB_TIMES_dout_i(32-1 downto 0) <= sm_CALIB_TIMES_dout;\n-- 'TU_TARGET_LSB'\nsm_TU_TARGET_LSB_din <= sm_TU" "_TARGET_LSB_din_i(32-1 downto 0);\nsm_TU_TARGET_LSB_en <= sm_TU_TARGET_LSB_en_i;\ngen_sm_TU_TARGET_LSB_dout_i:" " if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_TU_TARGET_LSB_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '" "0');\nend generate gen_sm_TU_TARGET_LSB_dout_i;\nsm_TU_TARGET_LSB_dout_i(32-1 downto 0) <= sm_TU_TARGET_LSB_dout;\n" "-- 'IFS_INTERVALS2'\nsm_IFS_INTERVALS2_din <= sm_IFS_INTERVALS2_din_i(32-1 downto 0);\nsm_IFS_INTERVALS2_en " " <= sm_IFS_INTERVALS2_en_i;\ngen_sm_IFS_INTERVALS2_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_IFS_INTER" "VALS2_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_IFS_INTERVALS2_dout_i;\nsm_IF" "S_INTERVALS2_dout_i(32-1 downto 0) <= sm_IFS_INTERVALS2_dout;\n-- 'IFS_INTERVALS1'\nsm_IFS_INTERVALS1_din <= sm" "_IFS_INTERVALS1_din_i(32-1 downto 0);\nsm_IFS_INTERVALS1_en <= sm_IFS_INTERVALS1_en_i;\ngen_sm_IFS_INTERVALS1_" "dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_IFS_INTERVALS1_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (oth" "ers => '0');\nend generate gen_sm_IFS_INTERVALS1_dout_i;\nsm_IFS_INTERVALS1_dout_i(32-1 downto 0) <= sm_IFS_INTERVA" "LS1_dout;\n-- 'TX_START'\nsm_TX_START_din <= sm_TX_START_din_i(32-1 downto 0);\nsm_TX_START_en <= sm_TX_ST" "ART_en_i;\ngen_sm_TX_START_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_TX_START_dout_i(C_S_AXI_DATA_WIDTH" "-1 downto 32) <= (others => '0');\nend generate gen_sm_TX_START_dout_i;\nsm_TX_START_dout_i(32-1 downto 0) <= sm_TX" "_START_dout;\n-- 'TU_TARGET_MSB'\nsm_TU_TARGET_MSB_din <= sm_TU_TARGET_MSB_din_i(32-1 downto 0);\nsm_TU_TARGET_" "MSB_en <= sm_TU_TARGET_MSB_en_i;\ngen_sm_TU_TARGET_MSB_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_T" "U_TARGET_MSB_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_TU_TARGET_MSB_dout_i;\n" "sm_TU_TARGET_MSB_dout_i(32-1 downto 0) <= sm_TU_TARGET_MSB_dout;\n-- 'Control'\nsm_Control_din <= sm_Control_di" "n_i(32-1 downto 0);\nsm_Control_en <= sm_Control_en_i;\ngen_sm_Control_dout_i: if (32 < C_S_AXI_DATA_WIDTH) ge" "nerate\n sm_Control_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_Control_dout" "_i;\nsm_Control_dout_i(32-1 downto 0) <= sm_Control_dout;\n-- 'NAV_MATCH_ADDR_1'\nsm_NAV_MATCH_ADDR_1_din <= sm" "_NAV_MATCH_ADDR_1_din_i(32-1 downto 0);\nsm_NAV_MATCH_ADDR_1_en <= sm_NAV_MATCH_ADDR_1_en_i;\ngen_sm_NAV_MATCH" "_ADDR_1_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_NAV_MATCH_ADDR_1_dout_i(C_S_AXI_DATA_WIDTH-1 downto 3" "2) <= (others => '0');\nend generate gen_sm_NAV_MATCH_ADDR_1_dout_i;\nsm_NAV_MATCH_ADDR_1_dout_i(32-1 downto 0) <= " "sm_NAV_MATCH_ADDR_1_dout;\n-- 'NAV_MATCH_ADDR_2'\nsm_NAV_MATCH_ADDR_2_din <= sm_NAV_MATCH_ADDR_2_din_i(32-1 dow" "nto 0);\nsm_NAV_MATCH_ADDR_2_en <= sm_NAV_MATCH_ADDR_2_en_i;\ngen_sm_NAV_MATCH_ADDR_2_dout_i: if (32 < C_S_AXI" "_DATA_WIDTH) generate\n sm_NAV_MATCH_ADDR_2_dout_i(C_S_AXI_DATA_WIDTH-1 downto 32) <= (others => '0');\nend gene" "rate gen_sm_NAV_MATCH_ADDR_2_dout_i;\nsm_NAV_MATCH_ADDR_2_dout_i(32-1 downto 0) <= sm_NAV_MATCH_ADDR_2_dout;\n-- 'B" "ACKOFF_CTRL'\nsm_BACKOFF_CTRL_din <= sm_BACKOFF_CTRL_din_i(32-1 downto 0);\nsm_BACKOFF_CTRL_en <= sm_BACKO" "FF_CTRL_en_i;\ngen_sm_BACKOFF_CTRL_dout_i: if (32 < C_S_AXI_DATA_WIDTH) generate\n sm_BACKOFF_CTRL_dout_i(C_S_AX" "I_DATA_WIDTH-1 downto 32) <= (others => '0');\nend generate gen_sm_BACKOFF_CTRL_dout_i;\nsm_BACKOFF_CTRL_dout_i(32-" "1 downto 0) <= sm_BACKOFF_CTRL_dout;\n-- 'From FIFO'\n-- 'To FIFO'\n-- 'Shared Memory'\n\nReadWriteSelect: process(" "memmap_state) is begin\n if (memmap_state = READ) then\n else\n end if;\nend process ReadWriteSelect;\n\n-" "----------------------------------------------------------------------------\n-- address for 'Shared Memory'\n-----" "------------------------------------------------------------------------\nSharedMemory_Addr_ResetN : process(AXI_AC" "lk) is begin\n if (AXI_AClk'event and AXI_AClk = '1') then\n if (AXI_AResetN = '0') then\n mem" "map_state <= READ;\n else\n if (S_AXI_AWVALID = '1') then\n -- write operation\n " " memmap_state <= WRITE;\n elsif (S_AXI_ARVALID = '1') then\n -- read operati" "on\n memmap_state <= READ;\n end if;\n end if;\n end if;\nend process SharedMem" "ory_Addr_ResetN;\n\n-----------------------------------------------------------------------------\n-- WRITE Command" " Control\n-----------------------------------------------------------------------------\nS_AXI_BID <= S_AXI_BID" "_i;\nS_AXI_BVALID <= S_AXI_BVALID_i;\nS_AXI_WREADY <= S_AXI_WREADY_i;\n-- No error checking\nS_AXI_BRESP <= (oth" "ers=>'0');\n\nPROC_AWREADY_ACK: process(read_state, write_state, S_AXI_ARVALID, S_AXI_AWVALID) is begin\n if (wr" "ite_state = IDLE and S_AXI_AWVALID = '1' and read_state = IDLE) then\n S_AXI_AWREADY <= S_AXI_AWVALID;\n " "else\n S_AXI_AWREADY <= '0';\n end if;\nend process PROC_AWREADY_ACK;\n\nCmd_Decode_Write: process(AXI_AC" "lk) is begin\n if (AXI_AClk'event and AXI_AClk = '1') then\n if (AXI_AResetN = '0') then\n wri" "te_addr_valid <= '0';\n write_ready <= '0';\n s_fifo_we <= '0';\n " " S_AXI_BVALID_i <= '0';\n S_AXI_BID_i <= (others => '0');\n write_bank_addr_" "i <= (others => '0');\n write_linear_addr_i <= (others => '0');\n else\n if (write_s" "tate = IDLE) then\n if (S_AXI_AWVALID = '1' and read_state = IDLE) then\n -- refl" "ect awid\n S_AXI_BID_i <= S_AXI_AWID;\n\n -- latch bank and linear addresses\n" " write_bank_addr_i <= S_AXI_AWADDR(C_S_AXI_TOTAL_ADDR_LEN-1 downto C_S_AXI_LINEAR_ADDR_LEN+2);" "\n write_linear_addr_i <= S_AXI_AWADDR(C_S_AXI_LINEAR_ADDR_LEN+1 downto 2);\n " " write_addr_valid <= '1';\n s_fifo_we <= '1';\n\n -- write state transition\n" " write_state <= WRITE_DATA;\n end if;\n elsif (write_state = WRITE_DAT" "A) then\n write_ready <= '1';\n s_fifo_we <= '0';\n write_addr_valid <" "= S_AXI_WVALID;\n \n if (S_AXI_WVALID = '1' and write_ready = '1') then\n " " write_linear_addr_i <= Std_Logic_Vector(unsigned(write_linear_addr_i) + 1);\n end if;\n\n " " if (S_AXI_WLAST = '1' and write_ready = '1') then\n -- start responding through B c" "hannel upon the last write data sample\n S_AXI_BVALID_i <= '1';\n -- write da" "ta is over\n write_addr_valid <= '0';\n write_ready <= '0';\n " " -- write state transition\n write_state <= WRITE_RESPONSE;\n end if;\n " " elsif (write_state = WRITE_RESPONSE) then\n\n if (S_AXI_BREADY = '1') then\n " " -- write respond is over\n S_AXI_BVALID_i <= '0';\n S_AXI_BID_i <= (others =" "> '0');\n\n -- write state transition\n write_state <= IDLE;\n " " end if;\n end if;\n end if;\n end if;\nend process Cmd_Decode_Write;\n\nWrite_Linear_Addr_Dec" "ode : process(AXI_AClk) is \n\nbegin\n if (AXI_AClk'event and AXI_AClk = '1') then\n if (AXI_AResetN = '0" "') then\n -- 'To Register'\n -- TX_CTRL_D_PARAMS din/en\n sm_TX_CTRL_D_PARAMS_din_" "i <= (others => '0');\n sm_TX_CTRL_D_PARAMS_en_i <= '0';\n -- TX_CTRL_D_GAINS din/en\n " " sm_TX_CTRL_D_GAINS_din_i <= (others => '0');\n sm_TX_CTRL_D_GAINS_en_i <= '0';\n -- TX_C" "TRL_C_PARAMS din/en\n sm_TX_CTRL_C_PARAMS_din_i <= (others => '0');\n sm_TX_CTRL_C_PARAMS_en_" "i <= '0';\n -- TX_CTRL_C_GAINS din/en\n sm_TX_CTRL_C_GAINS_din_i <= (others => '0');\n " " sm_TX_CTRL_C_GAINS_en_i <= '0';\n -- TX_CTRL_B_PARAMS din/en\n sm_TX_CTRL_B_PARAMS_din_i" " <= (others => '0');\n sm_TX_CTRL_B_PARAMS_en_i <= '0';\n -- TX_CTRL_B_GAINS din/en\n " " sm_TX_CTRL_B_GAINS_din_i <= (others => '0');\n sm_TX_CTRL_B_GAINS_en_i <= '0';\n -- TX_CT" "RL_A_GAINS din/en\n sm_TX_CTRL_A_GAINS_din_i <= (others => '0');\n sm_TX_CTRL_A_GAINS_en_i <=" " '0';\n -- TX_CTRL_A_PARAMS din/en\n sm_TX_CTRL_A_PARAMS_din_i <= (others => '0');\n " " sm_TX_CTRL_A_PARAMS_en_i <= '0';\n -- POST_RX_TIMERS din/en\n sm_POST_RX_TIMERS_din_i <= (" "others => '0');\n sm_POST_RX_TIMERS_en_i <= '0';\n -- POST_TX_TIMERS din/en\n sm_P" "OST_TX_TIMERS_din_i <= (others => '0');\n sm_POST_TX_TIMERS_en_i <= '0';\n -- CALIB_TIMES din" "/en\n sm_CALIB_TIMES_din_i <= (others => '0');\n sm_CALIB_TIMES_en_i <= '0';\n -- " "TU_TARGET_LSB din/en\n sm_TU_TARGET_LSB_din_i <= (others => '0');\n sm_TU_TARGET_LSB_en_i <= " "'0';\n -- IFS_INTERVALS2 din/en\n sm_IFS_INTERVALS2_din_i <= (others => '0');\n sm" "_IFS_INTERVALS2_en_i <= '0';\n -- IFS_INTERVALS1 din/en\n sm_IFS_INTERVALS1_din_i <= (others " "=> '0');\n sm_IFS_INTERVALS1_en_i <= '0';\n -- TX_START din/en\n sm_TX_START_din_i" " <= (others => '0');\n sm_TX_START_en_i <= '0';\n -- TU_TARGET_MSB din/en\n sm_TU_" "TARGET_MSB_din_i <= (others => '0');\n sm_TU_TARGET_MSB_en_i <= '0';\n -- Control din/en\n " " sm_Control_din_i <= (others => '0');\n sm_Control_en_i <= '0';\n -- NAV_MATCH_ADDR_1" " din/en\n sm_NAV_MATCH_ADDR_1_din_i <= (others => '0');\n sm_NAV_MATCH_ADDR_1_en_i <= '0';\n " " -- NAV_MATCH_ADDR_2 din/en\n sm_NAV_MATCH_ADDR_2_din_i <= (others => '0');\n sm_NA" "V_MATCH_ADDR_2_en_i <= '0';\n -- BACKOFF_CTRL din/en\n sm_BACKOFF_CTRL_din_i <= (others => '0" "');\n sm_BACKOFF_CTRL_en_i <= '0';\n -- 'To FIFO'\n -- 'Shared Memory'\n el" "se\n -- default assignments\n\n -- 'To Register'\n if (unsigned(write_bank_addr_i)" " = 2) then\n if (unsigned(write_linear_addr_i) = 0) then\n -- TX_CTRL_D_PARAMS di" "n/en\n sm_TX_CTRL_D_PARAMS_din_i <= S_AXI_WDATA;\n sm_TX_CTRL_D_PARAMS_en_i " "<= write_addr_valid;\n elsif (unsigned(write_linear_addr_i) = 1) then\n -- TX_CTR" "L_D_GAINS din/en\n sm_TX_CTRL_D_GAINS_din_i <= S_AXI_WDATA;\n sm_TX_CTRL_D_GA" "INS_en_i <= write_addr_valid;\n elsif (unsigned(write_linear_addr_i) = 2) then\n " " -- TX_CTRL_C_PARAMS din/en\n sm_TX_CTRL_C_PARAMS_din_i <= S_AXI_WDATA;\n sm_" "TX_CTRL_C_PARAMS_en_i <= write_addr_valid;\n elsif (unsigned(write_linear_addr_i) = 3) then\n " " -- TX_CTRL_C_GAINS din/en\n sm_TX_CTRL_C_GAINS_din_i <= S_AXI_WDATA;\n " " sm_TX_CTRL_C_GAINS_en_i <= write_addr_valid;\n elsif (unsigned(write_linear_addr_i) = 4) th" "en\n -- TX_CTRL_B_PARAMS din/en\n sm_TX_CTRL_B_PARAMS_din_i <= S_AXI_WDATA;\n" " sm_TX_CTRL_B_PARAMS_en_i <= write_addr_valid;\n elsif (unsigned(write_linear_ad" "dr_i) = 5) then\n -- TX_CTRL_B_GAINS din/en\n sm_TX_CTRL_B_GAINS_din_i <= S_A" "XI_WDATA;\n sm_TX_CTRL_B_GAINS_en_i <= write_addr_valid;\n elsif (unsigned(write" "_linear_addr_i) = 6) then\n -- TX_CTRL_A_GAINS din/en\n sm_TX_CTRL_A_GAINS_di" "n_i <= S_AXI_WDATA;\n sm_TX_CTRL_A_GAINS_en_i <= write_addr_valid;\n elsif (unsi" "gned(write_linear_addr_i) = 7) then\n -- TX_CTRL_A_PARAMS din/en\n sm_TX_CTRL" "_A_PARAMS_din_i <= S_AXI_WDATA;\n sm_TX_CTRL_A_PARAMS_en_i <= write_addr_valid;\n " " elsif (unsigned(write_linear_addr_i) = 8) then\n -- POST_RX_TIMERS din/en\n " " sm_POST_RX_TIMERS_din_i <= S_AXI_WDATA;\n sm_POST_RX_TIMERS_en_i <= write_addr_valid;\n " " elsif (unsigned(write_linear_addr_i) = 9) then\n -- POST_TX_TIMERS din/en\n " " sm_POST_TX_TIMERS_din_i <= S_AXI_WDATA;\n sm_POST_TX_TIMERS_en_i <= write_addr_valid;\n" " elsif (unsigned(write_linear_addr_i) = 10) then\n -- CALIB_TIMES din/en\n " " sm_CALIB_TIMES_din_i <= S_AXI_WDATA;\n sm_CALIB_TIMES_en_i <= write_addr_valid;\n " " elsif (unsigned(write_linear_addr_i) = 11) then\n -- TU_TARGET_LSB din/en\n " " sm_TU_TARGET_LSB_din_i <= S_AXI_WDATA;\n sm_TU_TARGET_LSB_en_i <= write_addr_vali" "d;\n elsif (unsigned(write_linear_addr_i) = 12) then\n -- IFS_INTERVALS2 din/en\n" " sm_IFS_INTERVALS2_din_i <= S_AXI_WDATA;\n sm_IFS_INTERVALS2_en_i <= write_a" "ddr_valid;\n elsif (unsigned(write_linear_addr_i) = 13) then\n -- IFS_INTERVALS1 " "din/en\n sm_IFS_INTERVALS1_din_i <= S_AXI_WDATA;\n sm_IFS_INTERVALS1_en_i <=" " write_addr_valid;\n elsif (unsigned(write_linear_addr_i) = 14) then\n -- TX_STAR" "T din/en\n sm_TX_START_din_i <= S_AXI_WDATA;\n sm_TX_START_en_i <= write_add" "r_valid;\n elsif (unsigned(write_linear_addr_i) = 15) then\n -- TU_TARGET_MSB din" "/en\n sm_TU_TARGET_MSB_din_i <= S_AXI_WDATA;\n sm_TU_TARGET_MSB_en_i <= writ" "e_addr_valid;\n elsif (unsigned(write_linear_addr_i) = 16) then\n -- Control din/" "en\n sm_Control_din_i <= S_AXI_WDATA;\n sm_Control_en_i <= write_addr_valid;" "\n elsif (unsigned(write_linear_addr_i) = 17) then\n -- NAV_MATCH_ADDR_1 din/en\n" " sm_NAV_MATCH_ADDR_1_din_i <= S_AXI_WDATA;\n sm_NAV_MATCH_ADDR_1_en_i <= wri" "te_addr_valid;\n elsif (unsigned(write_linear_addr_i) = 18) then\n -- NAV_MATCH_A" "DDR_2 din/en\n sm_NAV_MATCH_ADDR_2_din_i <= S_AXI_WDATA;\n sm_NAV_MATCH_ADDR_" "2_en_i <= write_addr_valid;\n elsif (unsigned(write_linear_addr_i) = 19) then\n " "-- BACKOFF_CTRL din/en\n sm_BACKOFF_CTRL_din_i <= S_AXI_WDATA;\n sm_BACKOFF_C" "TRL_en_i <= write_addr_valid;\n end if;\n end if; \n \n \n e" "nd if;\n end if;\nend process Write_Linear_Addr_Decode;\n \n----------------------------------------------------" "-------------------------\n-- READ Control\n-----------------------------------------------------------------------" "------\n\nS_AXI_RDATA <= S_AXI_RDATA_i;\nS_AXI_RVALID <= S_AXI_RVALID_i;\nS_AXI_RLAST <= S_AXI_RLAST_i;\nS_AXI_" "RID <= S_AXI_RID_i;\n-- TODO: no error checking\nS_AXI_RRESP <= (others=>'0');\n\nPROC_ARREADY_ACK: process(rea" "d_state, S_AXI_ARVALID, write_state, S_AXI_AWVALID) is begin\n -- Note: WRITE has higher priority than READ\n " " if (read_state = IDLE and S_AXI_ARVALID = '1' and write_state = IDLE and S_AXI_AWVALID /= '1') then\n S_AXI" "_ARREADY <= S_AXI_ARVALID;\n else\n S_AXI_ARREADY <= '0';\n end if;\nend process PROC_ARREADY_ACK;\n\n" "S_AXI_WREADY_i <= write_ready;\n\nProcess_Sideband: process(write_state, read_state) is begin\n if (read_state =" " READ_PREP) then\n s_shram_en <= '1';\n elsif (read_state = READ_DATA) then\n s_shram_en <= S_AXI_" "RREADY;\n elsif (write_state = WRITE_DATA) then\n s_shram_en <= S_AXI_WVALID;\n else\n s_shram_" "en <= '0';\n end if;\nend process Process_Sideband;\n\nCmd_Decode_Read: process(AXI_AClk) is begin\n if (AXI_" "AClk'event and AXI_AClk = '1') then\n if (AXI_AResetN = '0') then\n S_AXI_RVALID_i <= '0';\n " " read_bank_addr_i <= (others => '0');\n read_linear_addr_i <= (others => '0');\n S_" "AXI_ARLEN_i <= (others => '0');\n S_AXI_RLAST_i <= '0';\n S_AXI_RID_i <= " "(others => '0');\n read_state <= IDLE;\n read_prep_counter <= (others => '0');\n " " read_addr_counter <= (others => '0');\n read_data_counter <= (others => '0');\n els" "e\n -- default assignments\n s_fifo_re <= '0';\n\n if (read_state = IDLE) then\n " " -- Note WRITE has higher priority than READ\n if (S_AXI_ARVALID = '1' and write_state " "= IDLE and S_AXI_AWVALID /= '1') then\n -- extract bank and linear addresses\n " " read_bank_addr_i <= S_AXI_ARADDR(C_S_AXI_TOTAL_ADDR_LEN-1 downto C_S_AXI_LINEAR_ADDR_LEN+2);\n " " read_linear_addr_i <= S_AXI_ARADDR(C_S_AXI_LINEAR_ADDR_LEN+1 downto 2);\n s_fifo_re <= '1';" "\n\n -- reflect arid\n S_AXI_RID_i <= S_AXI_ARID;\n\n -- l" "oad read liner address and data counter\n read_addr_counter <= S_AXI_ARLEN;\n " " read_data_counter <= S_AXI_ARLEN;\n\n -- load read preparation counter\n rea" "d_prep_counter <= C_READ_PREP_DELAY;\n -- read state transition\n read_state " "<= READ_PREP;\n end if;\n elsif (read_state = READ_PREP) then\n if (unsign" "ed(read_prep_counter) = 0) then\n if (unsigned(read_data_counter) = 0) then\n " " -- tag the last data generated by the slave\n S_AXI_RLAST_i <= '1';\n " " end if;\n -- valid data appears\n S_AXI_RVALID_i <= '1';\n " " -- read state transition\n read_state <= READ_DATA;\n else\n " " -- decrease read preparation counter\n read_prep_counter <= Std_Logic_Vector(unsigned(read_pre" "p_counter) - 1);\n end if;\n\n if (unsigned(read_prep_counter) /= 3 and unsigned(read" "_addr_counter) /= 0) then\n -- decrease address counter\n read_addr_counter <" "= Std_Logic_Vector(unsigned(read_addr_counter) - 1);\n -- increase linear address (no band cross" "ing)\n read_linear_addr_i <= Std_Logic_Vector(unsigned(read_linear_addr_i) + 1);\n " " end if;\n elsif (read_state = READ_DATA) then\n if (S_AXI_RREADY = '1') then\n " " if (unsigned(read_data_counter) = 1) then\n -- tag the last data generated by the" " slave\n S_AXI_RLAST_i <= '1';\n end if;\n\n if (unsig" "ned(read_data_counter) = 0) then\n -- arid\n S_AXI_RID_i <= (others =" "> '0');\n -- rlast\n S_AXI_RLAST_i <= '0';\n -" "- no more valid data\n S_AXI_RVALID_i <= '0';\n -- read state transit" "ion\n read_state <= IDLE;\n else\n -- decrease rea" "d preparation counter\n read_data_counter <= Std_Logic_Vector(unsigned(read_data_counter) - " "1);\n\n if (unsigned(read_addr_counter) /= 0) then\n -- decrease " "address counter\n read_addr_counter <= Std_Logic_Vector(unsigned(read_addr_counter) - 1)" ";\n -- increase linear address (no band crossing)\n read_line" "ar_addr_i <= Std_Logic_Vector(unsigned(read_linear_addr_i) + 1);\n end if;\n " " end if;\n end if;\n end if;\n\n end if;\n end if;\nend process Cmd_Decode_R" "ead;\n\nRead_Linear_Addr_Decode : process(AXI_AClk) is begin\n if (AXI_AClk'event and AXI_AClk = '1') then\n " " if (AXI_AResetN = '0') then\n reg_bank_out_i <= (others => '0');\n fifo_bank_out_i <= " "(others => '0');\n shmem_bank_out_i <= (others => '0');\n S_AXI_RDATA_i <= (others => '0')" ";\n else\n if (unsigned(read_bank_addr_i) = 2) then\n -- 'From Register'\n " " if (unsigned(read_linear_addr_i) = 20) then\n -- 'NAV_VALUE' dout\n r" "eg_bank_out_i <= sm_NAV_VALUE_dout_i;\n elsif (unsigned(read_linear_addr_i) = 21) then\n " " -- 'TX_A_BACKOFF_COUNTER' dout\n reg_bank_out_i <= sm_TX_A_BACKOFF_COUNTER_dout_i;\n " " elsif (unsigned(read_linear_addr_i) = 22) then\n -- 'TX_CD_BACKOFF_COUNTERS' dout\n " " reg_bank_out_i <= sm_TX_CD_BACKOFF_COUNTERS_dout_i;\n elsif (unsigned(read_linear" "_addr_i) = 23) then\n -- 'PHY_RX_PARAMS' dout\n reg_bank_out_i <= sm_PHY_RX_P" "ARAMS_dout_i;\n elsif (unsigned(read_linear_addr_i) = 24) then\n -- 'LATEST_RX_BY" "TE' dout\n reg_bank_out_i <= sm_LATEST_RX_BYTE_dout_i;\n elsif (unsigned(read_lin" "ear_addr_i) = 25) then\n -- 'TX_START_TIMESTAMP_MSB' dout\n reg_bank_out_i <=" " sm_TX_START_TIMESTAMP_MSB_dout_i;\n elsif (unsigned(read_linear_addr_i) = 26) then\n " " -- 'TX_START_TIMESTAMP_LSB' dout\n reg_bank_out_i <= sm_TX_START_TIMESTAMP_LSB_dout_i;\n " " elsif (unsigned(read_linear_addr_i) = 27) then\n -- 'RX_START_TIMESTAMP_MSB' dout\n" " reg_bank_out_i <= sm_RX_START_TIMESTAMP_MSB_dout_i;\n elsif (unsigned(read_linea" "r_addr_i) = 28) then\n -- 'RX_START_TIMESTAMP_LSB' dout\n reg_bank_out_i <= s" "m_RX_START_TIMESTAMP_LSB_dout_i;\n elsif (unsigned(read_linear_addr_i) = 29) then\n " " -- 'TXRX_START_TIMESTAMPS_FRAC' dout\n reg_bank_out_i <= sm_TXRX_START_TIMESTAMPS_FRAC_dout_i" ";\n elsif (unsigned(read_linear_addr_i) = 30) then\n -- 'Tx_Ctrl_Status' dout\n " " reg_bank_out_i <= sm_Tx_Ctrl_Status_dout_i;\n elsif (unsigned(read_linear_addr_i) " "= 31) then\n -- 'Status' dout\n reg_bank_out_i <= sm_Status_dout_i;\n " " end if;\n -- 'To Register' (with register readback)\n if (unsigned(read_linea" "r_addr_i) = 0) then\n -- 'TX_CTRL_D_PARAMS' dout\n reg_bank_out_i <= sm_TX_CT" "RL_D_PARAMS_dout_i;\n elsif (unsigned(read_linear_addr_i) = 1) then\n -- 'TX_CTRL" "_D_GAINS' dout\n reg_bank_out_i <= sm_TX_CTRL_D_GAINS_dout_i;\n elsif (unsigned(r" "ead_linear_addr_i) = 2) then\n -- 'TX_CTRL_C_PARAMS' dout\n reg_bank_out_i <=" " sm_TX_CTRL_C_PARAMS_dout_i;\n elsif (unsigned(read_linear_addr_i) = 3) then\n --" " 'TX_CTRL_C_GAINS' dout\n reg_bank_out_i <= sm_TX_CTRL_C_GAINS_dout_i;\n elsif (u" "nsigned(read_linear_addr_i) = 4) then\n -- 'TX_CTRL_B_PARAMS' dout\n reg_bank" "_out_i <= sm_TX_CTRL_B_PARAMS_dout_i;\n elsif (unsigned(read_linear_addr_i) = 5) then\n " " -- 'TX_CTRL_B_GAINS' dout\n reg_bank_out_i <= sm_TX_CTRL_B_GAINS_dout_i;\n " " elsif (unsigned(read_linear_addr_i) = 6) then\n -- 'TX_CTRL_A_GAINS' dout\n " "reg_bank_out_i <= sm_TX_CTRL_A_GAINS_dout_i;\n elsif (unsigned(read_linear_addr_i) = 7) then\n " " -- 'TX_CTRL_A_PARAMS' dout\n reg_bank_out_i <= sm_TX_CTRL_A_PARAMS_dout_i;\n " " elsif (unsigned(read_linear_addr_i) = 8) then\n -- 'POST_RX_TIMERS' dout\n " " reg_bank_out_i <= sm_POST_RX_TIMERS_dout_i;\n elsif (unsigned(read_linear_addr_i) = 9) then\n" " -- 'POST_TX_TIMERS' dout\n reg_bank_out_i <= sm_POST_TX_TIMERS_dout_i;\n " " elsif (unsigned(read_linear_addr_i) = 10) then\n -- 'CALIB_TIMES' dout\n " " reg_bank_out_i <= sm_CALIB_TIMES_dout_i;\n elsif (unsigned(read_linear_addr_i) = 11) then\n " " -- 'TU_TARGET_LSB' dout\n reg_bank_out_i <= sm_TU_TARGET_LSB_dout_i;\n " " elsif (unsigned(read_linear_addr_i) = 12) then\n -- 'IFS_INTERVALS2' dout\n " " reg_bank_out_i <= sm_IFS_INTERVALS2_dout_i;\n elsif (unsigned(read_linear_addr_i) = 13) then" "\n -- 'IFS_INTERVALS1' dout\n reg_bank_out_i <= sm_IFS_INTERVALS1_dout_i;\n " " elsif (unsigned(read_linear_addr_i) = 14) then\n -- 'TX_START' dout\n " " reg_bank_out_i <= sm_TX_START_dout_i;\n elsif (unsigned(read_linear_addr_i) = 15) then\n " " -- 'TU_TARGET_MSB' dout\n reg_bank_out_i <= sm_TU_TARGET_MSB_dout_i;\n " " elsif (unsigned(read_linear_addr_i) = 16) then\n -- 'Control' dout\n reg" "_bank_out_i <= sm_Control_dout_i;\n elsif (unsigned(read_linear_addr_i) = 17) then\n " " -- 'NAV_MATCH_ADDR_1' dout\n reg_bank_out_i <= sm_NAV_MATCH_ADDR_1_dout_i;\n " "elsif (unsigned(read_linear_addr_i) = 18) then\n -- 'NAV_MATCH_ADDR_2' dout\n " " reg_bank_out_i <= sm_NAV_MATCH_ADDR_2_dout_i;\n elsif (unsigned(read_linear_addr_i) = 19) then\n " " -- 'BACKOFF_CTRL' dout\n reg_bank_out_i <= sm_BACKOFF_CTRL_dout_i;\n " " end if;\n\n S_AXI_RDATA_i <= reg_bank_out_i;\n elsif (unsigned(read_bank_addr_i) = 1" ") then\n -- 'From FIFO'\n -- 'To FIFO'\n\n S_AXI_RDATA_i <= fifo_bank_" "out_i;\n elsif (unsigned(read_bank_addr_i) = 0 and s_shram_en = '1') then\n -- 'Shared Me" "mory'\n\n S_AXI_RDATA_i <= shmem_bank_out_i;\n end if;\n end if;\n end if;\nend" " process Read_Linear_Addr_Decode;\n\nend architecture IMP;\n" config "{'inports'=>[{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'AXI_ARESETN','wid" "th'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARADDR','width'=>32},{'arit" "h_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARBURST','width'=>2},{'arith_type'=>2.000" "00000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARCACHE','width'=>4},{'arith_type'=>2.00000000000000000" ",'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARID','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.0000" "0000000000000,'name'=>'S_AXI_ARLEN','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'n" "ame'=>'S_AXI_ARLOCK','width'=>2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AR" "PROT','width'=>3},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARSIZE','width'=>" "3},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARVALID','width'=>0},{'arith_typ" "e'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWADDR','width'=>32},{'arith_type'=>2.00000000" "000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWBURST','width'=>2},{'arith_type'=>2.00000000000000000,'bin" "_pt'=>0.00000000000000000,'name'=>'S_AXI_AWCACHE','width'=>4},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.000000" "00000000000,'name'=>'S_AXI_AWID','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name" "'=>'S_AXI_AWLEN','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWLOCK" "','width'=>2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWPROT','width'=>3},{" "'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWSIZE','width'=>3},{'arith_type'=>2" ".00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWVALID','width'=>0},{'arith_type'=>2.0000000000000" "0000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_BREADY','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>" "0.00000000000000000,'name'=>'S_AXI_RREADY','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.0000000000000" "0000,'name'=>'S_AXI_WDATA','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S" "_AXI_WLAST','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_WSTRB','wid" "th'=>4},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_WVALID','width'=>0},{'arith" "_type'=>2,'bin_pt'=>0,'name'=>'sm_NAV_VALUE_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_A_BACKOF" "F_COUNTER_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_CD_BACKOFF_COUNTERS_dout','width'=>32},{'a" "rith_type'=>2,'bin_pt'=>0,'name'=>'sm_PHY_RX_PARAMS_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_LAT" "EST_RX_BYTE_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_START_TIMESTAMP_MSB_dout','width'=>32},{" "'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_START_TIMESTAMP_LSB_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'nam" "e'=>'sm_RX_START_TIMESTAMP_MSB_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_RX_START_TIMESTAMP_LSB_d" "out','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TXRX_START_TIMESTAMPS_FRAC_dout','width'=>32},{'arith_ty" "pe'=>2,'bin_pt'=>0,'name'=>'sm_Tx_Ctrl_Status_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_Status_do" "ut','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_CTRL_D_PARAMS_dout','width'=>32},{'arith_type'=>2,'bin" "_pt'=>0,'name'=>'sm_TX_CTRL_D_GAINS_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_CTRL_C_PARAMS_do" "ut','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_CTRL_C_GAINS_dout','width'=>32},{'arith_type'=>2,'bin_" "pt'=>0,'name'=>'sm_TX_CTRL_B_PARAMS_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_CTRL_B_GAINS_dou" "t','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_CTRL_A_GAINS_dout','width'=>32},{'arith_type'=>2,'bin_p" "t'=>0,'name'=>'sm_TX_CTRL_A_PARAMS_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_POST_RX_TIMERS_dout'" ",'width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_POST_TX_TIMERS_dout','width'=>32},{'arith_type'=>2,'bin_pt'=" ">0,'name'=>'sm_CALIB_TIMES_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TU_TARGET_LSB_dout','width'=" ">32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_IFS_INTERVALS2_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'" "=>'sm_IFS_INTERVALS1_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_START_dout','width'=>32},{'arit" "h_type'=>2,'bin_pt'=>0,'name'=>'sm_TU_TARGET_MSB_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_Contro" "l_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_NAV_MATCH_ADDR_1_dout','width'=>32},{'arith_type'=>2," "'bin_pt'=>0,'name'=>'sm_NAV_MATCH_ADDR_2_dout','width'=>32},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_BACKOFF_CTRL_d" "out','width'=>32}],'outports'=>[{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_ARR" "EADY','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_AWREADY','width'=" ">0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_BID','width'=>8},{'arith_type'=" ">2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_BRESP','width'=>2},{'arith_type'=>2.0000000000000" "0000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_BVALID','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>" "0.00000000000000000,'name'=>'S_AXI_RDATA','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.0000000000000" "0000,'name'=>'S_AXI_RID','width'=>8},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AX" "I_RLAST','width'=>0},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_RRESP','width'" "=>2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_RVALID','width'=>0},{'arith_ty" "pe'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'S_AXI_WREADY','width'=>0},{'arith_type'=>2,'bin_pt'" "=>0,'name'=>'sm_TX_CTRL_D_PARAMS_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000" ",'name'=>'sm_TX_CTRL_D_PARAMS_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_CTRL_D_" "GAINS_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TX_CTRL_D_GAIN" "S_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_CTRL_C_PARAMS_din','width'=>32},{'a" "rith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TX_CTRL_C_PARAMS_en','width'=>0.000000000" "00000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_CTRL_C_GAINS_din','width'=>32},{'arith_type'=>2.0000000000000" "0000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TX_CTRL_C_GAINS_en','width'=>0.00000000000000000},{'arith_type'=>2,'" "bin_pt'=>0,'name'=>'sm_TX_CTRL_B_PARAMS_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.0000000000" "0000000,'name'=>'sm_TX_CTRL_B_PARAMS_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_" "CTRL_B_GAINS_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TX_CTRL" "_B_GAINS_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_CTRL_A_GAINS_din','width'=>3" "2},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TX_CTRL_A_GAINS_en','width'=>0.0000" "0000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_CTRL_A_PARAMS_din','width'=>32},{'arith_type'=>2.0000000" "0000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TX_CTRL_A_PARAMS_en','width'=>0.00000000000000000},{'arith_typ" "e'=>2,'bin_pt'=>0,'name'=>'sm_POST_RX_TIMERS_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000" "000000000000,'name'=>'sm_POST_RX_TIMERS_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_" "POST_TX_TIMERS_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_POST_" "TX_TIMERS_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_CALIB_TIMES_din','width'=>32}," "{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_CALIB_TIMES_en','width'=>0.00000000000" "000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TU_TARGET_LSB_din','width'=>32},{'arith_type'=>2.00000000000000000" ",'bin_pt'=>0.00000000000000000,'name'=>'sm_TU_TARGET_LSB_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt" "'=>0,'name'=>'sm_IFS_INTERVALS2_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000," "'name'=>'sm_IFS_INTERVALS2_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_IFS_INTERVALS" "1_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_IFS_INTERVALS1_en'" ",'width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_TX_START_din','width'=>32},{'arith_type'=>2" ".00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_TX_START_en','width'=>0.00000000000000000},{'arith_typ" "e'=>2,'bin_pt'=>0,'name'=>'sm_TU_TARGET_MSB_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.000000" "00000000000,'name'=>'sm_TU_TARGET_MSB_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_Co" "ntrol_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_Control_en','w" "idth'=>0.00000000000000000},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_NAV_MATCH_ADDR_1_din','width'=>32},{'arith_typ" "e'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'name'=>'sm_NAV_MATCH_ADDR_1_en','width'=>0.00000000000000000" "},{'arith_type'=>2,'bin_pt'=>0,'name'=>'sm_NAV_MATCH_ADDR_2_din','width'=>32},{'arith_type'=>2.00000000000000000,'b" "in_pt'=>0.00000000000000000,'name'=>'sm_NAV_MATCH_ADDR_2_en','width'=>0.00000000000000000},{'arith_type'=>2,'bin_pt" "'=>0,'name'=>'sm_BACKOFF_CTRL_din','width'=>32},{'arith_type'=>2.00000000000000000,'bin_pt'=>0.00000000000000000,'n" "ame'=>'sm_BACKOFF_CTRL_en','width'=>0.00000000000000000}]}" inheritDeviceType "inheritDeviceType" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "edkcore" sg_icon_stat "250,1716,57,51,white,blue,0,b275631f,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 250 250 0 0 ],[0 0 1716 1716 0 ],[0.77 0.8" "2 0.91 ]);\nplot([0 250 250 0 0 ],[0 0 1716 1716 0 ]);\npatch([47.125 97.7 132.7 167.7 202.7 132.7 82.125 47.125 ]," "[896.85 896.85 931.85 896.85 931.85 931.85 931.85 896.85 ],[1 1 1 ]);\npatch([82.125 132.7 97.7 47.125 82.125 ],[86" "1.85 861.85 896.85 896.85 861.85 ],[0.931 0.946 0.973 ]);\npatch([47.125 97.7 132.7 82.125 47.125 ],[826.85 826.85 " "861.85 861.85 826.85 ],[1 1 1 ]);\npatch([82.125 202.7 167.7 132.7 97.7 47.125 82.125 ],[791.85 791.85 826.85 791.8" "5 826.85 826.85 791.85 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be" "gin icon text');\ncolor('black');port_label('input',1,'AXI_ARESETN');\ncolor('black');port_label('input',2,'S_AXI_A" "RADDR');\ncolor('black');port_label('input',3,'S_AXI_ARBURST');\ncolor('black');port_label('input',4,'S_AXI_ARCACHE" "');\ncolor('black');port_label('input',5,'S_AXI_ARID');\ncolor('black');port_label('input',6,'S_AXI_ARLEN');\ncolor" "('black');port_label('input',7,'S_AXI_ARLOCK');\ncolor('black');port_label('input',8,'S_AXI_ARPROT');\ncolor('black" "');port_label('input',9,'S_AXI_ARSIZE');\ncolor('black');port_label('input',10,'S_AXI_ARVALID');\ncolor('black');po" "rt_label('input',11,'S_AXI_AWADDR');\ncolor('black');port_label('input',12,'S_AXI_AWBURST');\ncolor('black');port_l" "abel('input',13,'S_AXI_AWCACHE');\ncolor('black');port_label('input',14,'S_AXI_AWID');\ncolor('black');port_label('" "input',15,'S_AXI_AWLEN');\ncolor('black');port_label('input',16,'S_AXI_AWLOCK');\ncolor('black');port_label('input'" ",17,'S_AXI_AWPROT');\ncolor('black');port_label('input',18,'S_AXI_AWSIZE');\ncolor('black');port_label('input',19,'" "S_AXI_AWVALID');\ncolor('black');port_label('input',20,'S_AXI_BREADY');\ncolor('black');port_label('input',21,'S_AX" "I_RREADY');\ncolor('black');port_label('input',22,'S_AXI_WDATA');\ncolor('black');port_label('input',23,'S_AXI_WLAS" "T');\ncolor('black');port_label('input',24,'S_AXI_WSTRB');\ncolor('black');port_label('input',25,'S_AXI_WVALID');\n" "color('black');port_label('input',26,'sm_NAV_VALUE_dout');\ncolor('black');port_label('input',27,'sm_TX_A_BACKOFF_C" "OUNTER_dout');\ncolor('black');port_label('input',28,'sm_TX_CD_BACKOFF_COUNTERS_dout');\ncolor('black');port_label(" "'input',29,'sm_PHY_RX_PARAMS_dout');\ncolor('black');port_label('input',30,'sm_LATEST_RX_BYTE_dout');\ncolor('black" "');port_label('input',31,'sm_TX_START_TIMESTAMP_MSB_dout');\ncolor('black');port_label('input',32,'sm_TX_START_TIME" "STAMP_LSB_dout');\ncolor('black');port_label('input',33,'sm_RX_START_TIMESTAMP_MSB_dout');\ncolor('black');port_lab" "el('input',34,'sm_RX_START_TIMESTAMP_LSB_dout');\ncolor('black');port_label('input',35,'sm_TXRX_START_TIMESTAMPS_FR" "AC_dout');\ncolor('black');port_label('input',36,'sm_Tx_Ctrl_Status_dout');\ncolor('black');port_label('input',37,'" "sm_Status_dout');\ncolor('black');port_label('input',38,'sm_TX_CTRL_D_PARAMS_dout');\ncolor('black');port_label('in" "put',39,'sm_TX_CTRL_D_GAINS_dout');\ncolor('black');port_label('input',40,'sm_TX_CTRL_C_PARAMS_dout');\ncolor('blac" "k');port_label('input',41,'sm_TX_CTRL_C_GAINS_dout');\ncolor('black');port_label('input',42,'sm_TX_CTRL_B_PARAMS_do" "ut');\ncolor('black');port_label('input',43,'sm_TX_CTRL_B_GAINS_dout');\ncolor('black');port_label('input',44,'sm_T" "X_CTRL_A_GAINS_dout');\ncolor('black');port_label('input',45,'sm_TX_CTRL_A_PARAMS_dout');\ncolor('black');port_labe" "l('input',46,'sm_POST_RX_TIMERS_dout');\ncolor('black');port_label('input',47,'sm_POST_TX_TIMERS_dout');\ncolor('bl" "ack');port_label('input',48,'sm_CALIB_TIMES_dout');\ncolor('black');port_label('input',49,'sm_TU_TARGET_LSB_dout');" "\ncolor('black');port_label('input',50,'sm_IFS_INTERVALS2_dout');\ncolor('black');port_label('input',51,'sm_IFS_INT" "ERVALS1_dout');\ncolor('black');port_label('input',52,'sm_TX_START_dout');\ncolor('black');port_label('input',53,'s" "m_TU_TARGET_MSB_dout');\ncolor('black');port_label('input',54,'sm_Control_dout');\ncolor('black');port_label('input" "',55,'sm_NAV_MATCH_ADDR_1_dout');\ncolor('black');port_label('input',56,'sm_NAV_MATCH_ADDR_2_dout');\ncolor('black'" ");port_label('input',57,'sm_BACKOFF_CTRL_dout');\ncolor('black');port_label('output',1,'S_AXI_ARREADY');\ncolor('bl" "ack');port_label('output',2,'S_AXI_AWREADY');\ncolor('black');port_label('output',3,'S_AXI_BID');\ncolor('black');p" "ort_label('output',4,'S_AXI_BRESP');\ncolor('black');port_label('output',5,'S_AXI_BVALID');\ncolor('black');port_la" "bel('output',6,'S_AXI_RDATA');\ncolor('black');port_label('output',7,'S_AXI_RID');\ncolor('black');port_label('outp" "ut',8,'S_AXI_RLAST');\ncolor('black');port_label('output',9,'S_AXI_RRESP');\ncolor('black');port_label('output',10," "'S_AXI_RVALID');\ncolor('black');port_label('output',11,'S_AXI_WREADY');\ncolor('black');port_label('output',12,'sm" "_TX_CTRL_D_PARAMS_din');\ncolor('black');port_label('output',13,'sm_TX_CTRL_D_PARAMS_en');\ncolor('black');port_lab" "el('output',14,'sm_TX_CTRL_D_GAINS_din');\ncolor('black');port_label('output',15,'sm_TX_CTRL_D_GAINS_en');\ncolor('" "black');port_label('output',16,'sm_TX_CTRL_C_PARAMS_din');\ncolor('black');port_label('output',17,'sm_TX_CTRL_C_PAR" "AMS_en');\ncolor('black');port_label('output',18,'sm_TX_CTRL_C_GAINS_din');\ncolor('black');port_label('output',19," "'sm_TX_CTRL_C_GAINS_en');\ncolor('black');port_label('output',20,'sm_TX_CTRL_B_PARAMS_din');\ncolor('black');port_l" "abel('output',21,'sm_TX_CTRL_B_PARAMS_en');\ncolor('black');port_label('output',22,'sm_TX_CTRL_B_GAINS_din');\ncolo" "r('black');port_label('output',23,'sm_TX_CTRL_B_GAINS_en');\ncolor('black');port_label('output',24,'sm_TX_CTRL_A_GA" "INS_din');\ncolor('black');port_label('output',25,'sm_TX_CTRL_A_GAINS_en');\ncolor('black');port_label('output',26," "'sm_TX_CTRL_A_PARAMS_din');\ncolor('black');port_label('output',27,'sm_TX_CTRL_A_PARAMS_en');\ncolor('black');port_" "label('output',28,'sm_POST_RX_TIMERS_din');\ncolor('black');port_label('output',29,'sm_POST_RX_TIMERS_en');\ncolor(" "'black');port_label('output',30,'sm_POST_TX_TIMERS_din');\ncolor('black');port_label('output',31,'sm_POST_TX_TIMERS" "_en');\ncolor('black');port_label('output',32,'sm_CALIB_TIMES_din');\ncolor('black');port_label('output',33,'sm_CAL" "IB_TIMES_en');\ncolor('black');port_label('output',34,'sm_TU_TARGET_LSB_din');\ncolor('black');port_label('output'," "35,'sm_TU_TARGET_LSB_en');\ncolor('black');port_label('output',36,'sm_IFS_INTERVALS2_din');\ncolor('black');port_la" "bel('output',37,'sm_IFS_INTERVALS2_en');\ncolor('black');port_label('output',38,'sm_IFS_INTERVALS1_din');\ncolor('b" "lack');port_label('output',39,'sm_IFS_INTERVALS1_en');\ncolor('black');port_label('output',40,'sm_TX_START_din');\n" "color('black');port_label('output',41,'sm_TX_START_en');\ncolor('black');port_label('output',42,'sm_TU_TARGET_MSB_d" "in');\ncolor('black');port_label('output',43,'sm_TU_TARGET_MSB_en');\ncolor('black');port_label('output',44,'sm_Con" "trol_din');\ncolor('black');port_label('output',45,'sm_Control_en');\ncolor('black');port_label('output',46,'sm_NAV" "_MATCH_ADDR_1_din');\ncolor('black');port_label('output',47,'sm_NAV_MATCH_ADDR_1_en');\ncolor('black');port_label('" "output',48,'sm_NAV_MATCH_ADDR_2_din');\ncolor('black');port_label('output',49,'sm_NAV_MATCH_ADDR_2_en');\ncolor('bl" "ack');port_label('output',50,'sm_BACKOFF_CTRL_din');\ncolor('black');port_label('output',51,'sm_BACKOFF_CTRL_en');\n" "fprintf('','COMMENT: end icon text');" } Line { SrcBlock "memmap" SrcPort 41 DstBlock "To Register14" DstPort 2 } Line { SrcBlock "memmap" SrcPort 40 DstBlock "To Register14" DstPort 1 } Line { SrcBlock "memmap" SrcPort 13 DstBlock "To Register" DstPort 2 } Line { SrcBlock "memmap" SrcPort 12 DstBlock "To Register" DstPort 1 } Line { SrcBlock "memmap" SrcPort 15 DstBlock "To Register1" DstPort 2 } Line { SrcBlock "memmap" SrcPort 14 DstBlock "To Register1" DstPort 1 } Line { SrcBlock "memmap" SrcPort 17 DstBlock "To Register2" DstPort 2 } Line { SrcBlock "memmap" SrcPort 16 DstBlock "To Register2" DstPort 1 } Line { SrcBlock "memmap" SrcPort 19 DstBlock "To Register3" DstPort 2 } Line { SrcBlock "memmap" SrcPort 18 DstBlock "To Register3" DstPort 1 } Line { SrcBlock "memmap" SrcPort 21 DstBlock "To Register4" DstPort 2 } Line { SrcBlock "memmap" SrcPort 20 DstBlock "To Register4" DstPort 1 } Line { SrcBlock "memmap" SrcPort 23 DstBlock "To Register5" DstPort 2 } Line { SrcBlock "memmap" SrcPort 22 DstBlock "To Register5" DstPort 1 } Line { SrcBlock "memmap" SrcPort 27 DstBlock "To Register7" DstPort 2 } Line { SrcBlock "memmap" SrcPort 26 DstBlock "To Register7" DstPort 1 } Line { SrcBlock "memmap" SrcPort 25 DstBlock "To Register6" DstPort 2 } Line { SrcBlock "memmap" SrcPort 24 DstBlock "To Register6" DstPort 1 } Line { SrcBlock "memmap" SrcPort 43 DstBlock "To Register15" DstPort 2 } Line { SrcBlock "memmap" SrcPort 42 DstBlock "To Register15" DstPort 1 } Line { SrcBlock "memmap" SrcPort 35 DstBlock "To Register11" DstPort 2 } Line { SrcBlock "memmap" SrcPort 34 DstBlock "To Register11" DstPort 1 } Line { SrcBlock "memmap" SrcPort 31 DstBlock "To Register9" DstPort 2 } Line { SrcBlock "memmap" SrcPort 30 DstBlock "To Register9" DstPort 1 } Line { SrcBlock "memmap" SrcPort 29 DstBlock "To Register8" DstPort 2 } Line { SrcBlock "memmap" SrcPort 28 DstBlock "To Register8" DstPort 1 } Line { SrcBlock "memmap" SrcPort 49 DstBlock "To Register18" DstPort 2 } Line { SrcBlock "memmap" SrcPort 48 DstBlock "To Register18" DstPort 1 } Line { SrcBlock "memmap" SrcPort 47 DstBlock "To Register17" DstPort 2 } Line { SrcBlock "memmap" SrcPort 46 DstBlock "To Register17" DstPort 1 } Line { SrcBlock "memmap" SrcPort 37 DstBlock "To Register12" DstPort 2 } Line { SrcBlock "memmap" SrcPort 36 DstBlock "To Register12" DstPort 1 } Line { SrcBlock "memmap" SrcPort 39 DstBlock "To Register13" DstPort 2 } Line { SrcBlock "memmap" SrcPort 38 DstBlock "To Register13" DstPort 1 } Line { SrcBlock "memmap" SrcPort 45 DstBlock "To Register16" DstPort 2 } Line { SrcBlock "memmap" SrcPort 44 DstBlock "To Register16" DstPort 1 } Line { SrcBlock "memmap" SrcPort 33 DstBlock "To Register10" DstPort 2 } Line { SrcBlock "memmap" SrcPort 32 DstBlock "To Register10" DstPort 1 } Line { SrcBlock "memmap" SrcPort 51 DstBlock "To Register19" DstPort 2 } Line { SrcBlock "memmap" SrcPort 50 DstBlock "To Register19" DstPort 1 } Line { SrcBlock "memmap" SrcPort 11 DstBlock "S_AXI_WREADY" DstPort 1 } Line { SrcBlock "memmap" SrcPort 10 DstBlock "S_AXI_RVALID" DstPort 1 } Line { SrcBlock "memmap" SrcPort 9 DstBlock "S_AXI_RRESP" DstPort 1 } Line { SrcBlock "memmap" SrcPort 8 DstBlock "S_AXI_RLAST" DstPort 1 } Line { SrcBlock "memmap" SrcPort 7 DstBlock "S_AXI_RID" DstPort 1 } Line { SrcBlock "memmap" SrcPort 6 DstBlock "S_AXI_RDATA" DstPort 1 } Line { SrcBlock "memmap" SrcPort 5 DstBlock "S_AXI_BVALID" DstPort 1 } Line { SrcBlock "memmap" SrcPort 4 DstBlock "S_AXI_BRESP" DstPort 1 } Line { SrcBlock "memmap" SrcPort 3 DstBlock "S_AXI_BID" DstPort 1 } Line { SrcBlock "memmap" SrcPort 2 DstBlock "S_AXI_AWREADY" DstPort 1 } Line { SrcBlock "memmap" SrcPort 1 DstBlock "S_AXI_ARREADY" DstPort 1 } Line { SrcBlock "S_AXI_WVALID" SrcPort 1 DstBlock "memmap" DstPort 25 } Line { SrcBlock "S_AXI_WSTRB" SrcPort 1 DstBlock "memmap" DstPort 24 } Line { SrcBlock "S_AXI_WLAST" SrcPort 1 DstBlock "memmap" DstPort 23 } Line { SrcBlock "S_AXI_WDATA" SrcPort 1 DstBlock "memmap" DstPort 22 } Line { SrcBlock "S_AXI_RREADY" SrcPort 1 DstBlock "memmap" DstPort 21 } Line { SrcBlock "S_AXI_BREADY" SrcPort 1 DstBlock "memmap" DstPort 20 } Line { SrcBlock "S_AXI_AWVALID" SrcPort 1 DstBlock "memmap" DstPort 19 } Line { SrcBlock "S_AXI_AWSIZE" SrcPort 1 DstBlock "memmap" DstPort 18 } Line { SrcBlock "S_AXI_AWPROT" SrcPort 1 DstBlock "memmap" DstPort 17 } Line { SrcBlock "S_AXI_AWLOCK" SrcPort 1 DstBlock "memmap" DstPort 16 } Line { SrcBlock "S_AXI_AWLEN" SrcPort 1 DstBlock "memmap" DstPort 15 } Line { SrcBlock "S_AXI_AWID" SrcPort 1 DstBlock "memmap" DstPort 14 } Line { SrcBlock "S_AXI_AWCACHE" SrcPort 1 DstBlock "memmap" DstPort 13 } Line { SrcBlock "S_AXI_AWBURST" SrcPort 1 DstBlock "memmap" DstPort 12 } Line { SrcBlock "S_AXI_AWADDR" SrcPort 1 DstBlock "memmap" DstPort 11 } Line { SrcBlock "S_AXI_ARVALID" SrcPort 1 DstBlock "memmap" DstPort 10 } Line { SrcBlock "S_AXI_ARSIZE" SrcPort 1 DstBlock "memmap" DstPort 9 } Line { SrcBlock "S_AXI_ARPROT" SrcPort 1 DstBlock "memmap" DstPort 8 } Line { SrcBlock "S_AXI_ARLOCK" SrcPort 1 DstBlock "memmap" DstPort 7 } Line { SrcBlock "S_AXI_ARLEN" SrcPort 1 DstBlock "memmap" DstPort 6 } Line { SrcBlock "S_AXI_ARID" SrcPort 1 DstBlock "memmap" DstPort 5 } Line { SrcBlock "S_AXI_ARCACHE" SrcPort 1 DstBlock "memmap" DstPort 4 } Line { SrcBlock "S_AXI_ARBURST" SrcPort 1 DstBlock "memmap" DstPort 3 } Line { SrcBlock "S_AXI_ARADDR" SrcPort 1 DstBlock "memmap" DstPort 2 } Line { SrcBlock "AXI_ARESETN" SrcPort 1 DstBlock "memmap" DstPort 1 } Line { SrcBlock "From Register10" SrcPort 1 DstBlock "memmap" DstPort 36 } Line { SrcBlock "To Register14" SrcPort 1 DstBlock "memmap" DstPort 52 } Line { SrcBlock "From Register5" SrcPort 1 DstBlock "memmap" DstPort 31 } Line { SrcBlock "From Register6" SrcPort 1 DstBlock "memmap" DstPort 32 } Line { SrcBlock "To Register" SrcPort 1 DstBlock "memmap" DstPort 38 } Line { SrcBlock "To Register1" SrcPort 1 DstBlock "memmap" DstPort 39 } Line { SrcBlock "To Register2" SrcPort 1 DstBlock "memmap" DstPort 40 } Line { SrcBlock "To Register3" SrcPort 1 DstBlock "memmap" DstPort 41 } Line { SrcBlock "To Register4" SrcPort 1 DstBlock "memmap" DstPort 42 } Line { SrcBlock "To Register5" SrcPort 1 DstBlock "memmap" DstPort 43 } Line { SrcBlock "To Register7" SrcPort 1 DstBlock "memmap" DstPort 45 } Line { SrcBlock "To Register6" SrcPort 1 DstBlock "memmap" DstPort 44 } Line { SrcBlock "From Register2" SrcPort 1 DstBlock "memmap" DstPort 28 } Line { SrcBlock "From Register1" SrcPort 1 DstBlock "memmap" DstPort 27 } Line { SrcBlock "From Register9" SrcPort 1 DstBlock "memmap" DstPort 35 } Line { SrcBlock "To Register15" SrcPort 1 DstBlock "memmap" DstPort 53 } Line { SrcBlock "To Register11" SrcPort 1 DstBlock "memmap" DstPort 49 } Line { SrcBlock "From Register11" SrcPort 1 DstBlock "memmap" DstPort 37 } Line { SrcBlock "From Register7" SrcPort 1 DstBlock "memmap" DstPort 33 } Line { SrcBlock "From Register8" SrcPort 1 DstBlock "memmap" DstPort 34 } Line { SrcBlock "To Register9" SrcPort 1 DstBlock "memmap" DstPort 47 } Line { SrcBlock "To Register8" SrcPort 1 DstBlock "memmap" DstPort 46 } Line { SrcBlock "From Register3" SrcPort 1 DstBlock "memmap" DstPort 29 } Line { SrcBlock "From Register" SrcPort 1 DstBlock "memmap" DstPort 26 } Line { SrcBlock "To Register18" SrcPort 1 DstBlock "memmap" DstPort 56 } Line { SrcBlock "To Register17" SrcPort 1 DstBlock "memmap" DstPort 55 } Line { SrcBlock "From Register4" SrcPort 1 DstBlock "memmap" DstPort 30 } Line { SrcBlock "To Register12" SrcPort 1 DstBlock "memmap" DstPort 50 } Line { SrcBlock "To Register13" SrcPort 1 DstBlock "memmap" DstPort 51 } Line { SrcBlock "To Register16" SrcPort 1 DstBlock "memmap" DstPort 54 } Line { SrcBlock "To Register10" SrcPort 1 DstBlock "memmap" DstPort 48 } Line { SrcBlock "To Register19" SrcPort 1 DstBlock "memmap" DstPort 57 } Line { SrcBlock "S_AXI_WREADY" SrcPort 1 DstBlock "Terminator10" DstPort 1 } Line { SrcBlock "S_AXI_RVALID" SrcPort 1 DstBlock "Terminator9" DstPort 1 } Line { SrcBlock "S_AXI_RRESP" SrcPort 1 DstBlock "Terminator8" DstPort 1 } Line { SrcBlock "S_AXI_RLAST" SrcPort 1 DstBlock "Terminator7" DstPort 1 } Line { SrcBlock "S_AXI_RID" SrcPort 1 DstBlock "Terminator6" DstPort 1 } Line { SrcBlock "S_AXI_RDATA" SrcPort 1 DstBlock "Terminator5" DstPort 1 } Line { SrcBlock "S_AXI_BVALID" SrcPort 1 DstBlock "Terminator4" DstPort 1 } Line { SrcBlock "S_AXI_BRESP" SrcPort 1 DstBlock "Terminator3" DstPort 1 } Line { SrcBlock "S_AXI_BID" SrcPort 1 DstBlock "Terminator2" DstPort 1 } Line { SrcBlock "S_AXI_AWREADY" SrcPort 1 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "S_AXI_ARREADY" SrcPort 1 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "Constant24" SrcPort 1 DstBlock "S_AXI_WVALID" DstPort 1 } Line { SrcBlock "Constant23" SrcPort 1 DstBlock "S_AXI_WSTRB" DstPort 1 } Line { SrcBlock "Constant22" SrcPort 1 DstBlock "S_AXI_WLAST" DstPort 1 } Line { SrcBlock "Constant21" SrcPort 1 DstBlock "S_AXI_WDATA" DstPort 1 } Line { SrcBlock "Constant20" SrcPort 1 DstBlock "S_AXI_RREADY" DstPort 1 } Line { SrcBlock "Constant19" SrcPort 1 DstBlock "S_AXI_BREADY" DstPort 1 } Line { SrcBlock "Constant18" SrcPort 1 DstBlock "S_AXI_AWVALID" DstPort 1 } Line { SrcBlock "Constant17" SrcPort 1 DstBlock "S_AXI_AWSIZE" DstPort 1 } Line { SrcBlock "Constant16" SrcPort 1 DstBlock "S_AXI_AWPROT" DstPort 1 } Line { SrcBlock "Constant15" SrcPort 1 DstBlock "S_AXI_AWLOCK" DstPort 1 } Line { SrcBlock "Constant14" SrcPort 1 DstBlock "S_AXI_AWLEN" DstPort 1 } Line { SrcBlock "Constant13" SrcPort 1 DstBlock "S_AXI_AWID" DstPort 1 } Line { SrcBlock "Constant12" SrcPort 1 DstBlock "S_AXI_AWCACHE" DstPort 1 } Line { SrcBlock "Constant11" SrcPort 1 DstBlock "S_AXI_AWBURST" DstPort 1 } Line { SrcBlock "Constant10" SrcPort 1 DstBlock "S_AXI_AWADDR" DstPort 1 } Line { SrcBlock "Constant9" SrcPort 1 DstBlock "S_AXI_ARVALID" DstPort 1 } Line { SrcBlock "Constant8" SrcPort 1 DstBlock "S_AXI_ARSIZE" DstPort 1 } Line { SrcBlock "Constant7" SrcPort 1 DstBlock "S_AXI_ARPROT" DstPort 1 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "S_AXI_ARLOCK" DstPort 1 } Line { SrcBlock "Constant5" SrcPort 1 DstBlock "S_AXI_ARLEN" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "S_AXI_ARID" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "S_AXI_ARCACHE" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "S_AXI_ARBURST" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "S_AXI_ARADDR" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "AXI_ARESETN" DstPort 1 } } } Block { BlockType Goto Name "Goto1" SID "1016" Position [300, 56, 445, 74] ZOrder -10 ShowName off GotoTag "IDLE_FOR_TXDIFS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto17" SID "457" Position [590, 46, 735, 64] ZOrder -10 ShowName off GotoTag "MAC_NAV_BUSY" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto19" SID "513" Position [300, 36, 445, 54] ZOrder -10 ShowName off GotoTag "IDLE_FOR_DIFS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto2" SID "2284" Position [300, 191, 445, 209] ZOrder -10 ShowName off GotoTag "PostRx_Timer2_Done" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto3" SID "2282" Position [300, 176, 445, 194] ZOrder -10 ShowName off GotoTag "PostRx_Timer1_Done" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto4" SID "2667" Position [300, 206, 445, 224] ZOrder -10 ShowName off GotoTag "PostTx_Timer1_Done" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto5" SID "2668" Position [300, 221, 445, 239] ZOrder -10 ShowName off GotoTag "PostTx_Timer2_Done" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto6" SID "472" Position [300, 131, 445, 149] ZOrder -10 ShowName off GotoTag "MEDIUM_IDLE" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto7" SID "458" Position [300, 111, 445, 129] ZOrder -10 ShowName off GotoTag "MEDIUM_BUSY" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto8" SID "3605" Position [595, 111, 735, 129] ZOrder -10 ShowName off GotoTag "Slot_Done" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType SubSystem Name "Idle for DIFS-EIFS" SID "483" Ports [0, 2] Position [175, 36, 255, 74] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Idle for DIFS-EIFS" Location [352, 168, 2136, 1512] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "111" Block { BlockType SubSystem Name "Bad Rx" SID "604" Ports [0, 1] Position [145, 355, 195, 375] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Bad Rx" Location [402, 757, 917, 971] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Constant1" SID "600" Ports [0, 1] Position [160, 171, 185, 189] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2" "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);" "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From7" SID "594" Position [135, 54, 270, 76] ZOrder -9 ShowName off GotoTag "PHY_RX_END_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "597" Position [70, 104, 205, 126] ZOrder -9 ShowName off GotoTag "PHY_RX_FCS_GOOD_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "601" Position [25, 149, 160, 171] ZOrder -9 ShowName off GotoTag "PHY_RX_END_RXERROR" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter1" SID "599" Ports [1, 1] Position [255, 106, 280, 124] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2" "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);" "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no" "t');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "595" Ports [2, 1] Position [400, 45, 435, 125] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,80,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 80 80 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 80 80 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[45.55" " 45.55 50.55 45.55 50.55 50.55 50.55 45.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[40.55 40.55 45" ".55 45.55 40.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[35.55 35.55 40.55 40.55 35.55 " "],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[30.55 30.55 35.55 30.55 35.55 35.55 30.55 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "598" Ports [2, 1] Position [315, 95, 350, 175] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,80,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 80 80 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 80 80 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[45.55" " 45.55 50.55 45.55 50.55 50.55 50.55 45.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[40.55 40.55 45" ".55 45.55 40.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[35.55 35.55 40.55 40.55 35.55 " "],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[30.55 30.55 35.55 30.55 35.55 35.55 30.55 ],[0." "931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge1" SID "608" Ports [1, 1] Position [480, 76, 525, 94] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Posedge1" Location [352, 168, 2136, 1512] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "609" Position [200, 253, 230, 267] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Delay" SID "610" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15" ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "611" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "612" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 32.66 3" "8.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 32.66 26" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "613" Position [610, 173, 640, 187] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [150, 0; 0, -70] Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType Reference Name "Relational1" SID "602" Ports [2, 1] Position [215, 149, 245, 191] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a!=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "30,42,2,1,white,blue,0,850de6e7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 " "25.44 29.44 25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 2" "5.44 21.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "a \\neq b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Rx" SID "605" Position [565, 78, 595, 92] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From7" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Inverter1" DstPort 1 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 Points [15, 0; 0, -30] DstBlock "Logical3" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Relational1" DstPort 1 } Line { SrcBlock "Relational1" SrcPort 1 Points [25, 0; 0, -15] DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Posedge1" DstPort 1 } Line { SrcBlock "Posedge1" SrcPort 1 DstBlock "Rx" DstPort 1 } Annotation { Name "Reception with Errors" Position [253, 29] } } } Block { BlockType Reference Name "DIFS" SID "508" Ports [2, 1] Position [770, 190, 830, 250] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is" " implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "NB_CNTR_DIFS" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" sg_icon_stat "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8" "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs" "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "510" Position [490, 202, 625, 218] ZOrder -9 ShowName off GotoTag "MEDIUM_BUSY" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "1377" Position [145, 449, 280, 471] ZOrder -9 ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "568" Position [515, 434, 650, 456] ZOrder -9 ShowName off GotoTag "reg_Interval_EIFS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "489" Position [490, 217, 625, 233] ZOrder -9 ShowName off GotoTag "MEDIUM_IDLE" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "490" Position [515, 399, 650, 421] ZOrder -9 ShowName off GotoTag "reg_Interval_DIFS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "616" Position [145, 424, 280, 446] ZOrder -9 ShowName off GotoTag "MEDIUM_BUSY" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "1010" Position [515, 589, 650, 611] ZOrder -9 ShowName off GotoTag "reg_Interval_EIFS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "1011" Position [515, 554, 650, 576] ZOrder -9 ShowName off GotoTag "reg_CalibTime_TxDIFS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "1380" Position [490, 187, 625, 203] ZOrder -9 ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Gateway Out" SID "1329" Ports [1, 1] Position [1085, 19, 1120, 31] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.11 " "8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "Gateway Out4" SID "1333" Ports [1, 1] Position [1085, 79, 1120, 91] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.11 " "8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "Gateway Out5" SID "1334" Ports [1, 1] Position [1085, 94, 1120, 106] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.11 " "8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "Gateway Out6" SID "1335" Ports [1, 1] Position [1085, 109, 1120, 121] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.11 " "8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Scope Name "IDLE for DIFS" SID "1336" Ports [7] Position [1170, 12, 1210, 128] ZOrder -3 Floating off Location [745, 72, 1686, 1466] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } YMin "-5~-5~-5~-5~-5~-5~-5" YMax "5~5~5~5~5~5~5" SaveName "ScopeData4" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter" SID "512" Ports [1, 1] Position [641, 265, 659, 290] BlockRotation 270 NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "18,25,1,1,white,blue,0,267846e5,up,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 18 18 0 0 ],[0 0 25 25 0 ],[0.77 0.82 0.91" " ]);\nplot([0 18 18 0 0 ],[0 0 25 25 0 ]);\npatch([4.55 7.44 9.44 11.44 13.44 9.44 6.55 4.55 ],[14.22 14.22 16.22 1" "4.22 16.22 16.22 16.22 14.22 ],[1 1 1 ]);\npatch([6.55 9.44 7.44 4.55 6.55 ],[12.22 12.22 14.22 14.22 12.22 ],[0.93" "1 0.946 0.973 ]);\npatch([4.55 7.44 9.44 6.55 4.55 ],[10.22 10.22 12.22 12.22 10.22 ],[1 1 1 ]);\npatch([6.55 13.44" " 11.44 9.44 7.44 4.55 6.55 ],[8.22 8.22 10.22 8.22 10.22 10.22 8.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: " "end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Logical1" SID "511" Ports [2, 1] Position [675, 218, 715, 247] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "40,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 29 29 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 29 29 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(" "'','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "1381" Ports [2, 1] Position [675, 188, 705, 217] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "603" Ports [3, 1] Position [340, 373, 375, 477] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,104,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 104 104 0 ],[0.77 0.82 0." "91 ]);\nplot([0 35 35 0 0 ],[0 0 104 104 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[57.55 57.55 6" "2.55 57.55 62.55 62.55 62.55 57.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[52.55 52.55 57.55 57.55 52" ".55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[47.55 47.55 52.55 52.55 47.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[42.55 42.55 47.55 42.55 47.55 47.55 42.55 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('or" "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "567" Ports [3, 1] Position [700, 358, 745, 462] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0." "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65" " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66" " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46" ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3" ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "1012" Ports [3, 1] Position [700, 513, 745, 617] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "45,104,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ],[0." "77 0.82 0.91 ]);\nplot([0 45 45 0 0 ],[0 14.8571 89.1429 104 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65" " 8.65 ],[58.66 58.66 64.66 58.66 64.66 64.66 64.66 58.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[52.66" " 52.66 58.66 58.66 52.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[46.66 46.66 52.66 52.66 46" ".66 ],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[40.66 40.66 46.66 40.66 46.66 46.66 40.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3" ",'d1');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "1579" Ports [1, 1] Position [1080, 700, 1110, 730] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 " "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" } Block { BlockType Reference Name "Register1" SID "1580" Ports [1, 1] Position [1135, 700, 1165, 730] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 " "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" } Block { BlockType Reference Name "Register2" SID "1582" Ports [1, 1] Position [1085, 760, 1115, 790] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 " "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" } Block { BlockType Reference Name "Register3" SID "1583" Ports [1, 1] Position [1140, 760, 1170, 790] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 " "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" } Block { BlockType Reference Name "Relational1" SID "1013" Ports [2, 1] Position [930, 534, 960, 576] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "30,42,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 25.44 29.44 " "25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 25.44 21.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\geq b','texmode','on');\ncol" "or('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "501" Ports [2, 1] Position [915, 209, 945, 251] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "30,42,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 25.44 29.44 " "25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 25.44 21.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\geq b','texmode','on');\ncol" "or('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch1" SID "588" Ports [2, 1] Position [445, 355, 485, 395] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch1" Location [379, 291, 1877, 1167] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "589" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "590" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "591" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "592" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "593" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType Reference Name "dbg_EIFS_sel" SID "1584" Ports [1, 1] Position [1215, 765, 1275, 785] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "dbg_Idle_for_difs" SID "1581" Ports [1, 1] Position [1210, 705, 1270, 725] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Outport Name "Idle for DIFS" SID "509" Position [1050, 223, 1080, 237] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Idle for TxDIFS" SID "1014" Position [1050, 548, 1080, 562] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Relational3" SrcPort 1 Points [15, 0] Branch { DstBlock "Idle for DIFS" DstPort 1 } Branch { Points [0, 90; -315, 0] Branch { DstBlock "Inverter" DstPort 1 } Branch { Points [-325, 0] DstBlock "Logical5" DstPort 1 } } Branch { Points [0, -115] DstBlock "Gateway Out6" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 Points [120, 0; 0, -170] DstBlock "Relational3" DstPort 2 } Line { SrcBlock "DIFS" SrcPort 1 Points [25, 0] Branch { DstBlock "Relational3" DstPort 1 } Branch { Points [0, 325] DstBlock "Relational1" DstPort 1 } Branch { Points [0, -120] DstBlock "Gateway Out5" DstPort 1 } } Line { SrcBlock "Logical2" SrcPort 1 Points [35, 0] Branch { DstBlock "DIFS" DstPort 1 } Branch { Points [0, -120] DstBlock "Gateway Out4" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 Points [20, 0] Branch { DstBlock "DIFS" DstPort 2 } Branch { Points [0, -210] DstBlock "Gateway Out" DstPort 1 } } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "S-R Latch1" SrcPort 1 Points [175, 0] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, 155] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, 245] DstBlock "Register2" DstPort 1 } } } Line { SrcBlock "Bad Rx" SrcPort 1 DstBlock "S-R Latch1" DstPort 1 } Line { SrcBlock "Logical5" SrcPort 1 Points [0, -40] DstBlock "S-R Latch1" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 Points [40, 0] DstBlock "Logical5" DstPort 2 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Relational1" SrcPort 1 Points [30, 0] Branch { DstBlock "Idle for TxDIFS" DstPort 1 } Branch { Points [0, 160] DstBlock "Register" DstPort 1 } } Line { SrcBlock "Inverter" SrcPort 1 Points [0, -20] DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Gateway Out" SrcPort 1 DstBlock "IDLE for DIFS" DstPort 1 } Line { SrcBlock "Gateway Out4" SrcPort 1 DstBlock "IDLE for DIFS" DstPort 5 } Line { SrcBlock "Gateway Out5" SrcPort 1 DstBlock "IDLE for DIFS" DstPort 6 } Line { SrcBlock "Gateway Out6" SrcPort 1 DstBlock "IDLE for DIFS" DstPort 7 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Logical5" DstPort 3 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "dbg_Idle_for_difs" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Register3" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 DstBlock "dbg_EIFS_sel" DstPort 1 } Annotation { Name "IEEE 802.11-2012 9.3.4.2:\n\"medium is idle for a DIFS period...or an EIFS period if the immediately prec" "eding medium-busy\nevent was caused by detection of a frame that was not received...with correct FCS\".\n\nThis log" "ic reverts to DIFS on every new busy event, then\nselects EIFS if there is an RX_END with errors." Position [216, 562] } Annotation { Name "Counter stops after IDLE=1 longer than DIFS\nIDLE_FOR_DIFS stays asserted until\nthe next medium busy eve" "nt" Position [790, 30] } } } Block { BlockType SubSystem Name "NAV" SID "540" Ports [0, 1] Position [480, 36, 550, 74] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "NAV" Location [1132, 646, 1764, 942] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "BitsM:4" SID "1912" Ports [1, 1] Position [730, 131, 780, 149] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type " "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "NB_CNTR_NAV-4" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "50,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 50 50 0 0 ],[0 0 18 18 0 ]);\npatch([20.55 23.44 25.44 27.44 29.44 25.44 22.55 20.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([22.55 25.44 23.44 20.55 22.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([20.55 23.44 25.44 22.55 20.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([22" ".55 29.44 27.44 25.44 23.44 20.55 22.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "539" Ports [0, 1] Position [590, 265, 615, 285] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,20,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2" "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1" "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "876" Ports [1, 1] Position [365, 226, 400, 244] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "NB_CNTR_NAV" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "35,18,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14" ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'ca" "st');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "536" Position [35, 254, 170, 276] ZOrder -9 ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "1561" Position [610, 179, 745, 201] ZOrder -9 ShowName off GotoTag "reg_Disable_NAV" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "2034" Position [35, 269, 170, 291] ZOrder -9 ShowName off GotoTag "reg_Force_Reset_NAV" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Gateway Out" SID "1320" Ports [1, 1] Position [825, 574, 860, 586] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.11 " "8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "Gateway Out1" SID "1321" Ports [1, 1] Position [825, 589, 860, 601] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.11 " "8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "Gateway Out2" SID "1322" Ports [1, 1] Position [825, 604, 860, 616] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.11 " "8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Reference Name "Gateway Out3" SID "1323" Ports [1, 1] Position [825, 619, 860, 631] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.88" " ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.11 " "8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 ],[" "0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch([15." "775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfprintf('" "','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ')" ";\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon tex" "t');" } Block { BlockType Goto Name "Goto1" SID "2956" Position [1000, 456, 1145, 474] ZOrder -10 ShowName off GotoTag "NAV_Zero" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto17" SID "1911" Position [985, 131, 1130, 149] ZOrder -10 ShowName off GotoTag "NAV_VALUE_100NSEC" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter" SID "1562" Ports [1, 1] Position [770, 181, 795, 199] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Inverter1" SID "2957" Ports [1, 1] Position [930, 456, 955, 474] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Logical1" SID "527" Ports [2, 1] Position [280, 164, 310, 226] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,62,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 62 62 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 62 62 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[35.44 35.44 39.44 " "35.44 39.44 39.44 39.44 35.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[31.44 31.44 35.44 35.44 31.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[27.44 27.44 31.44 31.44 27.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[23.44 23.44 27.44 23.44 27.44 27.44 23.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "1328" Ports [2, 1] Position [400, 296, 430, 329] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.44 " "20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "1560" Ports [2, 1] Position [830, 241, 860, 274] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,33,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.44 " "20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\nfprintf('','CO" "MMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2041" Ports [2, 1] Position [240, 256, 270, 289] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,33,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 33 33 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 33 33 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[20.44 20.44 24.44 " "20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 20.44 16.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Scope Name "NAV" SID "1327" Ports [7] Position [910, 567, 950, 683] ZOrder -3 Floating off Location [6, 45, 814, 1319] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } YMin "-5~-5~-5~-5~-5~-5~-5" YMax "5~5~5~5~5~5~5" SaveName "ScopeData3" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "NAV Counter" SID "531" Ports [4, 1] Position [475, 172, 540, 338] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is" " implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Down" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "NB_CNTR_NAV" bin_pt "0" load_pin on rst on en on explicit_period "on" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" sg_icon_stat "65,166,4,1,white,blue,0,d5a63658,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 166 166 0 ],[0.77 0.82 0." "91 ]);\nplot([0 65 65 0 0 ],[0 0 166 166 0 ]);\npatch([11.975 24.98 33.98 42.98 51.98 33.98 20.975 11.975 ],[92.99 " "92.99 101.99 92.99 101.99 101.99 101.99 92.99 ],[1 1 1 ]);\npatch([20.975 33.98 24.98 11.975 20.975 ],[83.99 83.99 " "92.99 92.99 83.99 ],[0.931 0.946 0.973 ]);\npatch([11.975 24.98 33.98 20.975 11.975 ],[74.99 74.99 83.99 83.99 74.9" "9 ],[1 1 1 ]);\npatch([20.975 51.98 42.98 33.98 24.98 11.975 20.975 ],[65.99 65.99 74.99 65.99 74.99 74.99 65.99 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('" "black');port_label('input',1,'load');\ncolor('black');port_label('input',2,'din');\ncolor('black');port_label('inpu" "t',3,'rst');\ncolor('black');port_label('input',4,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf--}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "New Duration" SID "278" Ports [0, 2] Position [35, 171, 130, 224] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "New Duration" Location [696, 388, 1729, 667] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "AddSub" SID "545" Ports [2, 1] Position [950, 401, 1010, 459] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtracter Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "User Defined" arith_type "Unsigned" n_bits "21" bin_pt "0" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off hw_selection "Fabric" pipelined off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" sg_icon_stat "60,58,2,1,white,blue,0,e85d8a90,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 58 58 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[37.8" "8 37.88 45.88 37.88 45.88 45.88 45.88 37.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[29.88 29.88 37.8" "8 37.88 29.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[21.88 21.88 29.88 29.88 21.88 ],[1" " 1 1 ]);\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[13.88 13.88 21.88 13.88 21.88 21.88 13.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1" ",'\\bf{a + b}','texmode','on');\ncolor('black');disp('z^{-1}\\newline ','texmode','on');\ncolor('black');disp('" " \\newline\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Capture Rx Pkt\nDuration Field" SID "542" Ports [0, 1] Position [285, 386, 360, 424] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Capture Rx Pkt\nDuration Field" Location [707, 602, 1707, 879] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Concat" SID "266" Ports [2, 1] Position [610, 90, 670, 150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" sg_icon_stat "60,60,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46" ".88 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88" " ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch(" "[20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "263" Ports [0, 1] Position [235, 131, 260, 149] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "2" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,18,0,1,white,blue,0,fca86624,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'2');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "269" Ports [0, 1] Position [235, 236, 260, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "3" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,18,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'3');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "301" Ports [0, 1] Position [755, 171, 780, 189] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "2" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "514" Position [25, 99, 160, 121] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTE_VALID" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "515" Position [25, 74, 160, 96] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTE" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "516" Position [25, 219, 160, 241] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTENUM" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "517" Position [25, 29, 160, 51] ZOrder -9 ShowName off GotoTag "PHY_RX_START_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "265" Ports [2, 1] Position [355, 99, 395, 146] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "40,47,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 47 47 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[28.55 28.55 33." "55 28.55 33.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[23.55 23.55 28.55 28.55 23." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[18.55 18.55 23.55 23.55 18.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[13.55 13.55 18.55 13.55 18.55 18.55 13.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "270" Ports [2, 1] Position [355, 204, 395, 251] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "40,47,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 47 47 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[28.55 28.55 33." "55 28.55 33.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[23.55 23.55 28.55 28.55 23." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[18.55 18.55 23.55 23.55 18.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[13.55 13.55 18.55 13.55 18.55 18.55 13.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "MSB" SID "273" Ports [1, 1] Position [745, 111, 795, 129] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardw" "are notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Upper Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "50,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 50 50 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 50 50 0 0 ],[0 0 18 18 0 ]);\npatch([20.55 23.44 25.44 27.44 29.44 25.44 22.55 20.55 ],[11.22 11.22" " 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([22.55 25.44 23.44 20.55 22.55 ],[9.22 9.22 11.22 11.22 9" ".22 ],[0.931 0.946 0.973 ]);\npatch([20.55 23.44 25.44 22.55 20.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch" "([22.55 29.44 27.44 25.44 23.44 20.55 22.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'" ",1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "300" Ports [3, 1] Position [895, 108, 920, 192] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "25,84,3,1,white,blue,3,eb98d690,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 12 72 84 0 ],[0.77 0.82 0." "91 ]);\nplot([0 25 25 0 0 ],[0 12 72 84 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[45.33 45.3" "3 48.33 45.33 48.33 48.33 48.33 45.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[42.33 42.33 45.33 45.33" " 42.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[39.33 39.33 42.33 42.33 39.33 ],[1 1 1 ]);" "\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[36.33 36.33 39.33 36.33 39.33 39.33 36.33 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_lab" "el('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');port_label('input',3,'d1');\n\nco" "lor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "264" Ports [3, 1] Position [470, 77, 530, 133] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44" ".88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88" " ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch(" "[20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');" "port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "271" Ports [3, 1] Position [470, 182, 530, 238] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44" ".88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88" " ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch(" "[20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');" "port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "262" Ports [2, 1] Position [290, 118, 320, 147] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "30,29,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\n" "color('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmode','on');\ncolo" "r('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "272" Ports [2, 1] Position [290, 223, 320, 252] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "30,29,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\n" "color('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmode','on');\ncolo" "r('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Duration" SID "543" Position [985, 143, 1015, 157] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 Points [170, 0] Branch { DstBlock "Logical" DstPort 1 } Branch { Points [0, 105] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "Logical" SrcPort 1 DstBlock "Register" DstPort 3 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "From2" SrcPort 1 Points [265, 0] Branch { DstBlock "Register" DstPort 1 } Branch { Points [0, 105] DstBlock "Register1" DstPort 1 } } Line { SrcBlock "From4" SrcPort 1 Points [275, 0; 0, 65] Branch { DstBlock "Register" DstPort 2 } Branch { Points [0, 105] DstBlock "Register1" DstPort 2 } } Line { SrcBlock "Concat" SrcPort 1 Points [40, 0] Branch { DstBlock "MSB" DstPort 1 } Branch { Points [0, 30] DstBlock "Mux" DstPort 2 } } Line { SrcBlock "MSB" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "From3" SrcPort 1 Points [45, 0] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, -105] DstBlock "Relational1" DstPort 1 } } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Duration" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 Points [20, 0; 0, 30] DstBlock "Concat" DstPort 2 } Line { SrcBlock "Register1" SrcPort 1 Points [45, 0; 0, -105] DstBlock "Concat" DstPort 1 } Annotation { Name "DURATION / ID field is duration if MSB is 0" Position [810, 50] } } } Block { BlockType SubSystem Name "Check Dest Addr" SID "2535" Ports [0, 1] Position [255, 586, 330, 624] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Check Dest Addr" Location [-1678, 70, -2, 1030] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "125" Block { BlockType Reference Name "B[0]" SID "2593" Ports [1, 1] Position [680, 318, 715, 332] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardw" "are notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "B[0] " SID "2594" Ports [1, 1] Position [680, 458, 715, 472] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardw" "are notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "B[1]" SID "2589" Ports [1, 1] Position [680, 353, 715, 367] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardw" "are notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "B[1] " SID "2595" Ports [1, 1] Position [680, 493, 715, 507] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardw" "are notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "B[2]" SID "2590" Ports [1, 1] Position [680, 388, 715, 402] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardw" "are notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "B[3]" SID "2591" Ports [1, 1] Position [680, 423, 715, 437] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardw" "are notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat" SID "2598" Ports [2, 1] Position [620, 262, 645, 313] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" sg_icon_stat "25,51,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 51 51 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[28.33 28.33 " "31.33 28.33 31.33 31.33 31.33 28.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[25.33 25.33 28.33 28.33 2" "5.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[22.33 22.33 25.33 25.33 22.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[19.33 19.33 22.33 19.33 22.33 22.33 19.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label" "('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode'" ",'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant" SID "2610" Ports [0, 1] Position [685, 524, 710, 546] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,22,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 14.33 " "17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33 14.33 1" "1.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'," "1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant1" SID "2612" Ports [0, 1] Position [635, 609, 660, 631] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "3" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,22,0,1,white,blue,0,279a71c8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 14.33 " "17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33 14.33 1" "1.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'," "1,'3');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "2615" Ports [0, 1] Position [640, 714, 665, 736] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "8" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,22,0,1,white,blue,0,7a8c02d8,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 22 22 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 22 22 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[14.33 14.33 " "17.33 14.33 17.33 17.33 17.33 14.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[11.33 11.33 14.33 14.33 1" "1.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[8.33 8.33 11.33 11.33 8.33 ],[1 1 1 ]);\npat" "ch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[5.33 5.33 8.33 5.33 8.33 8.33 5.33 ],[0.931 0.946 0.973 ]);\nfprin" "tf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output'," "1,'8');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "2616" Ports [1, 1] Position [780, 701, 815, 729] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" sg_icon_stat "35,28,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 28 28 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([12.1" " 25.88 21.88 17.88 13.88 8.1 12.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-1}','texmode'," "'on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From3" SID "2542" Position [140, 264, 275, 286] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTENUM" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "2569" Position [430, 421, 625, 439] ZOrder -9 ShowName off GotoTag "reg_NAV_Check_Addr_1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "2570" Position [430, 491, 625, 509] ZOrder -9 ShowName off GotoTag "reg_NAV_Check_Addr_2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "2603" Position [145, 644, 280, 666] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTE_VALID" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "2608" Position [140, 214, 275, 236] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTE" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Gateway Out" SID "3015" Ports [1, 1] Position [1145, 79, 1180, 91] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Sim" "ulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level o" "utput ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Byte" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out1" SID "3016" Ports [1, 1] Position [1145, 99, 1180, 111] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Sim" "ulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level o" "utput ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Addr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out2" SID "3017" Ports [1, 1] Position [1145, 119, 1180, 131] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Sim" "ulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level o" "utput ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Valid" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out3" SID "3018" Ports [1, 1] Position [1145, 139, 1180, 151] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Sim" "ulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level o" "utput ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Mux sel" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out4" SID "3020" Ports [1, 1] Position [1145, 159, 1180, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Sim" "ulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level o" "utput ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Byte Match" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out5" SID "3021" Ports [1, 1] Position [1145, 199, 1180, 211] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Sim" "ulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level o" "utput ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Final Match" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Gateway Out6" SID "3022" Ports [1, 1] Position [1145, 179, 1180, 191] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Sim" "ulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level o" "utput ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port off timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "35,12,1,1,white,grey,1,632ec840,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 12 12 0 ],[0.88 0.88 0.8" "8 ]);\nplot([0 35 35 0 0 ],[0 0 12 12 0 ]);\npatch([14.775 16.22 17.22 18.22 19.22 17.22 15.775 14.775 ],[7.11 7.1" "1 8.11 7.11 8.11 8.11 8.11 7.11 ],[1 1 1 ]);\npatch([15.775 17.22 16.22 14.775 15.775 ],[6.11 6.11 7.11 7.11 6.11 " "],[0.964 0.964 0.964 ]);\npatch([14.775 16.22 17.22 15.775 14.775 ],[5.11 5.11 6.11 6.11 5.11 ],[1 1 1 ]);\npatch(" "[15.775 19.22 18.22 17.22 16.22 14.775 15.775 ],[4.11 4.11 5.11 4.11 5.11 5.11 4.11 ],[0.964 0.964 0.964 ]);\nfpri" "ntf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" Port { PortNumber 1 Name "Accum Match" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Goto Name "Goto17" SID "3149" Position [1205, 761, 1405, 779] ZOrder -10 ShowName off GotoTag "Status_NAV_ADDR_MATCH" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical1" SID "2617" Ports [2, 1] Position [815, 598, 840, 642] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "25,44,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 44 44 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[25.33 25.33 " "28.33 25.33 28.33 28.33 28.33 25.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[22.33 22.33 25.33 25.33 2" "2.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[19.33 19.33 22.33 22.33 19.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[16.33 16.33 19.33 16.33 19.33 19.33 16.33 ],[0.931 0.946 0.973 " "]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp" "('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2600" Ports [2, 1] Position [950, 524, 990, 571] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "40,47,2,1,white,blue,0,83a4b621,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 47 47 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 47 47 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[28.55 28.55 33." "55 28.55 33.55 33.55 33.55 28.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[23.55 23.55 28.55 28.55 23." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[18.55 18.55 23.55 23.55 18.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[13.55 13.55 18.55 13.55 18.55 18.55 13.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('a" "nd');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "2588" Ports [9, 1] Position [765, 272, 800, 588] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "8" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "35,316,9,1,white,blue,3,9717d9a5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 45.1429 270.857 316 0 ],[0" ".77 0.82 0.91 ]);\nplot([0 35 35 0 0 ],[0 45.1429 270.857 316 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 " "5.875 ],[163.55 163.55 168.55 163.55 168.55 168.55 168.55 163.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.87" "5 ],[158.55 158.55 163.55 163.55 158.55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[153.55 15" "3.55 158.55 158.55 153.55 ],[1 1 1 ]);\npatch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[148.55 148.55 153.55 148" ".55 153.55 153.55 148.55 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolo" "r('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_label('inp" "ut',5,'d3');\ncolor('black');port_label('input',6,'d4');\ncolor('black');port_label('input',7,'d5');\ncolor('black" "');port_label('input',8,'d6');\ncolor('black');port_label('input',9,'d7');\n\ncolor('black');disp('\\bf{}','texmod" "e','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Scope Name "NAV Address Check" SID "3019" Ports [7] Position [1275, 66, 1325, 224] ZOrder -3 Floating off Location [6, 52, 814, 1045] Open off NumInputPorts "7" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" } List { ListType ScopeGraphics FigureColor "[0.5 0.5 0.5]" AxesColor "[0 0 0]" AxesTickColor "[1 1 1]" LineColors "[1 1 0;1 0 1;0 1 1;1 0 0;0 1 0;0 0 1]" LineStyles "-|-|-|-|-|-" LineWidths "[0.5 0.5 0.5 0.5 0.5 0.5]" MarkerStyles "none|none|none|none|none|none" } YMin "-5~-5~-5~-5~-5~-5~-5" YMax "5~5~5~5~5~5~5" SaveName "ScopeData2" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Register1" SID "2602" Ports [1, 1] Position [325, 261, 355, 289] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Register2" SID "2604" Ports [1, 1] Position [325, 641, 355, 669] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Register3" SID "2609" Ports [1, 1] Position [325, 211, 355, 239] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.4" "4 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ]," "[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','C" "OMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\n" "color('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: en" "d icon text');" } Block { BlockType Reference Name "Register4" SID "2613" Ports [3, 1] Position [1035, 667, 1095, 723] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44" ".88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88" " ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch(" "[20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');" "port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register6" SID "2599" Ports [3, 1] Position [940, 592, 1000, 648] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "1" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.88 36.88 44" ".88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.88 36.88 28.88" " ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1 1 1 ]);\npatch(" "[20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');" "port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational1" SID "2611" Ports [2, 1] Position [700, 592, 740, 628] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "40,36,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input" "',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmode','" "on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2614" Ports [2, 1] Position [700, 697, 740, 733] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "40,36,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 36 36 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 36 36 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[23.55 23.55 28." "55 23.55 28.55 28.55 28.55 23.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[18.55 18.55 23.55 23.55 18." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[13.55 13.55 18.55 18.55 13.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[8.55 8.55 13.55 8.55 13.55 13.55 8.55 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input" "',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmode','" "on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational9" SID "2607" Ports [2, 1] Position [950, 392, 990, 443] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "40,51,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 51 51 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 40 40 0 0 ],[0 0 51 51 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[30.55 30.55 35." "55 30.55 35.55 35.55 35.55 30.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[25.55 25.55 30.55 30.55 25." "55 ],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[20.55 20.55 25.55 25.55 20.55 ],[1 1 1 ]);\npa" "tch([13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[15.55 15.55 20.55 15.55 20.55 20.55 15.55 ],[0.931 0.946 0.973 ]);" "\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('i" "nput',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmod" "e','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[1:0]" SID "2596" Ports [1, 1] Position [545, 293, 580, 307] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardw" "are notes: In hardware this block costs nothing." nbits "2" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[3]" SID "2597" Ports [1, 1] Position [545, 268, 580, 282] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type" " is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardw" "are notes: In hardware this block costs nothing." nbits "1" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "slice" sg_icon_stat "35,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 14 14 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 14 14 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([14.5" "5 21.44 19.44 17.44 15.44 12.55 14.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Addr Match" SID "2552" Position [1155, 688, 1185, 702] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "B[0]" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "B[1]" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "B[2]" SrcPort 1 DstBlock "Mux" DstPort 4 } Line { SrcBlock "B[3]" SrcPort 1 DstBlock "Mux" DstPort 5 } Line { SrcBlock "B[0] " SrcPort 1 DstBlock "Mux" DstPort 6 } Line { SrcBlock "B[1] " SrcPort 1 DstBlock "Mux" DstPort 7 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Mux" DstPort 1 } Line { SrcBlock "b[3]" SrcPort 1 DstBlock "Concat" DstPort 1 } Line { SrcBlock "b[1:0]" SrcPort 1 DstBlock "Concat" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 Points [25, 0] Branch { DstBlock "B[3]" DstPort 1 } Branch { Points [0, -35] Branch { DstBlock "B[2]" DstPort 1 } Branch { Points [0, -35] Branch { Points [0, -35] DstBlock "B[0]" DstPort 1 } Branch { DstBlock "B[1]" DstPort 1 } } } } Line { SrcBlock "From6" SrcPort 1 Points [25, 0] Branch { DstBlock "B[1] " DstPort 1 } Branch { Points [0, -35] DstBlock "B[0] " DstPort 1 } } Line { SrcBlock "From3" SrcPort 1 Points [20, 0] Branch { DstBlock "Register1" DstPort 1 } Branch { Points [0, -170] DstBlock "Gateway Out1" DstPort 1 } } Line { SrcBlock "Register1" SrcPort 1 Points [45, 0] Branch { Points [115, 0] Branch { DstBlock "b[3]" DstPort 1 } Branch { Points [0, 25] DstBlock "b[1:0]" DstPort 1 } } Branch { Points [0, 325] Branch { DstBlock "Relational1" DstPort 1 } Branch { Points [0, 105] DstBlock "Relational2" DstPort 1 } } } Line { SrcBlock "From7" SrcPort 1 Points [20, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, -530] DstBlock "Gateway Out2" DstPort 1 } } Line { SrcBlock "Register6" SrcPort 1 Points [10, 0] Branch { Points [0, 55] DstBlock "Register4" DstPort 1 } Branch { Points [0, -60] Branch { DstBlock "Logical6" DstPort 2 } Branch { Points [20, 0; 0, -375] DstBlock "Gateway Out6" DstPort 1 } } } Line { SrcBlock "Logical6" SrcPort 1 Points [-55, 0; 0, 50] DstBlock "Register6" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 Points [405, 0] Branch { Points [160, 0] DstBlock "Register6" DstPort 3 } Branch { Points [0, -25] DstBlock "Logical1" DstPort 2 } } Line { SrcBlock "From9" SrcPort 1 Points [15, 0] Branch { DstBlock "Register3" DstPort 1 } Branch { Points [0, -140] DstBlock "Gateway Out" DstPort 1 } } Line { SrcBlock "Register3" SrcPort 1 Points [510, 0; 0, 180] DstBlock "Relational9" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 Points [105, 0] Branch { DstBlock "Relational9" DstPort 2 } Branch { Points [0, -285] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Relational9" SrcPort 1 Points [20, 0] Branch { Points [0, 115] DstBlock "Logical6" DstPort 1 } Branch { Points [0, -255] DstBlock "Gateway Out4" DstPort 1 } } Line { SrcBlock "Constant" SrcPort 1 Points [20, 0] Branch { DstBlock "Mux" DstPort 8 } Branch { Points [0, 35] DstBlock "Mux" DstPort 9 } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Register4" DstPort 3 } Line { SrcBlock "Register4" SrcPort 1 Points [20, 0] Branch { DstBlock "Addr Match" DstPort 1 } Branch { Points [0, -490] DstBlock "Gateway Out5" DstPort 1 } Branch { Points [0, 75] DstBlock "Goto17" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 Points [50, 0] Branch { DstBlock "Register6" DstPort 2 } Branch { Points [0, 75] DstBlock "Register4" DstPort 2 } } Line { Name "Byte" Labels [0, 0] SrcBlock "Gateway Out" SrcPort 1 DstBlock "NAV Address Check" DstPort 1 } Line { Name "Addr" Labels [0, 0] SrcBlock "Gateway Out1" SrcPort 1 DstBlock "NAV Address Check" DstPort 2 } Line { Name "Valid" Labels [0, 0] SrcBlock "Gateway Out2" SrcPort 1 DstBlock "NAV Address Check" DstPort 3 } Line { Name "Mux sel" Labels [0, 0] SrcBlock "Gateway Out3" SrcPort 1 DstBlock "NAV Address Check" DstPort 4 } Line { Name "Byte Match" Labels [0, 0] SrcBlock "Gateway Out4" SrcPort 1 DstBlock "NAV Address Check" DstPort 5 } Line { Name "Final Match" Labels [0, 0] SrcBlock "Gateway Out5" SrcPort 1 DstBlock "NAV Address Check" DstPort 7 } Line { Name "Accum Match" Labels [0, 0] SrcBlock "Gateway Out6" SrcPort 1 DstBlock "NAV Address Check" DstPort 6 } Annotation { Name "Dest addr is addr1 field - bytes[4 5 6 7 8 9]" Position [695, 770] } Annotation { Name "Cheap circuit to subtract 4" Position [538, 340] } } } Block { BlockType Reference Name "Constant1" SID "547" Ports [0, 1] Position [765, 391, 790, 409] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "ticks_per_usec" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "ceil(log2(ticks_per_usec))" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,18,0,1,white,blue,0,46ffeebb,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2" "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);" "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "output',1,'10');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "518" Ports [0, 1] Position [380, 566, 405, 584] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2" "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);" "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "output',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay" SID "534" Ports [1, 1] Position [665, 530, 700, 560] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" sg_icon_stat "35,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 30 30 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "556" Ports [1, 1] Position [850, 530, 885, 560] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "3" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" sg_icon_stat "35,30,1,1,white,blue,0,83e6bb61,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 30 30 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-3}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay2" SID "4120" Ports [1, 1] Position [960, 530, 995, 560] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" sg_icon_stat "35,30,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 30 30 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 30 30 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[19.44 " "19.44 23.44 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[15.44 15.44 19.44 1" "9.44 15.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 " "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');di" "sp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From" SID "519" Position [255, 514, 390, 536] ZOrder -9 ShowName off GotoTag "PHY_RX_END_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From1" SID "548" Position [750, 464, 885, 486] ZOrder -9 ShowName off GotoTag "reg_NAV_TIME_ADJ" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "1572" Position [255, 474, 390, 496] ZOrder -9 ShowName off GotoTag "Status_Rx_FCS_Good" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "521" Position [255, 544, 390, 566] ZOrder -9 ShowName off GotoTag "PHY_RX_END_RXERROR" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "524" Position [425, 414, 560, 436] ZOrder -9 ShowName off GotoTag "PHY_RX_START_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter" SID "2618" Ports [1, 1] Position [380, 596, 405, 614] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2" "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);" "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no" "t');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "522" Ports [4, 1] Position [525, 463, 555, 627] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "30,164,4,1,white,blue,0,50b60d37,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 164 164 0 ],[0.77" " 0.82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 164 164 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[86" ".44 86.44 90.44 86.44 90.44 90.44 90.44 86.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[82.44 82.44 86." "44 86.44 82.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[78.44 78.44 82.44 82.44 78.44 ],[1 " "1 1 ]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[74.44 74.44 78.44 74.44 78.44 78.44 74.44 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\n\ncol" "or('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mult" SID "546" Ports [2, 1] Position [830, 385, 885, 440] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To check for the optimum internal pipeline stages of the dedicated multiplier " "you must select 'Test for optimum pipelining'.

Optimization Goal: For implementation into device fabric " "(LUTs), the Speed or Area optimization will take effect only if it's supported by IP for the particular device " "family. Otherwise, the results will be identical regardless of the selection." precision "Full" arith_type "Signed (2's comp)" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" en off latency "3" dbl_ovrd off use_behavioral_HDL off opt "Speed" use_embedded on optimum_pipeline on xl_use_area off xl_area "[0,0,0,0,0,0,0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mult" sg_icon_stat "55,55,2,1,white,blue,0,7028354c,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 0 ],[0 0 55 55 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\npatch([11.425 21.54 28.54 35.54 42.54 28.54 18.425 11.425 ]" ",[34.77 34.77 41.77 34.77 41.77 41.77 41.77 34.77 ],[1 1 1 ]);\npatch([18.425 28.54 21.54 11.425 18.425 ],[27.7" "7 27.77 34.77 34.77 27.77 ],[0.931 0.946 0.973 ]);\npatch([11.425 21.54 28.54 18.425 11.425 ],[20.77 20.77 27.7" "7 27.77 20.77 ],[1 1 1 ]);\npatch([18.425 42.54 35.54 28.54 21.54 11.425 18.425 ],[13.77 13.77 20.77 13.77 20.7" "7 20.77 13.77 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin i" "con text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black" "');port_label('output',1,'\\bfa \\times b','texmode','on');\ncolor('black');disp('z^{-3}\\newline ','texmode','" "on');\ncolor('black');disp(' \\n ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge1" SID "557" Ports [1, 1] Position [1025, 536, 1070, 554] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Posedge1" Location [352, 168, 2136, 1512] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "558" Position [200, 253, 230, 267] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Delay" SID "559" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop. If r" "egister retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ],[15.33 15" ".33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.33 12.33 15.33" " 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 " "1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 " "0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');" "disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "560" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13" ".22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16" ".44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COM" "MENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "561" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32.66 32.66 3" "8.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 32.66 32.66 26" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('" "and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "562" Position [610, 173, 640, 187] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [150, 0; 0, -70] Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType Reference Name "Register2" SID "303" Ports [3, 1] Position [650, 397, 710, 453] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "60,56,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 56 56 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[36.8" "8 36.88 44.88 36.88 44.88 44.88 44.88 36.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[28.88 28.88 36.8" "8 36.88 28.88 ],[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[20.88 20.88 28.88 28.88 20.88 ],[1" " 1 1 ]);\npatch([20.2 47.76 39.76 31.76 23.76 12.2 20.2 ],[12.88 12.88 20.88 12.88 20.88 20.88 12.88 ],[0.931 0" ".946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('blac" "k');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input'," "3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "Relational3" SID "523" Ports [2, 1] Position [445, 544, 475, 586] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "30,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 " "25.44 29.44 25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 2" "5.44 21.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0" ".973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');po" "rt_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf" "a = b','texmode','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "x16" SID "549" Ports [1, 1] Position [1060, 421, 1100, 439] ShowName off MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "x16" Location [866, 294, 2434, 1574] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "A" SID "550" Position [230, 218, 260, 232] NamePlacement "alternate" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Concat1" SID "551" Ports [2, 1] Position [285, 209, 330, 271] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at z" "ero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" sg_icon_stat "45,62,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 62 62 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 45 45 0 0 ],[0 0 62 62 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[37.66 37.66 4" "3.66 37.66 43.66 43.66 43.66 37.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[31.66 31.66 37.66 37.66 31" ".66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[25.66 25.66 31.66 31.66 25.66 ],[1 1 1 ]);\npa" "tch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[19.66 19.66 25.66 19.66 25.66 25.66 19.66 ],[0.931 0.946 0.973 ])" ";\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('" "input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','" "on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant9" SID "552" Ports [0, 1] Position [230, 242, 255, 268] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "4" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,26,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 26 26 0 ],[0.77 0.82 0.9" "1 ]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[16.33 16.33 " "19.33 16.33 19.33 19.33 19.33 16.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[13.33 13.33 16.33 16.33 1" "3.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[10.33 10.33 13.33 13.33 10.33 ],[1 1 1 ]);\n" "patch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[7.33 7.33 10.33 7.33 10.33 10.33 7.33 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('out" "put',1,'0');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Ax16" SID "553" Position [355, 233, 385, 247] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant9" SrcPort 1 DstBlock "Concat1" DstPort 2 } Line { SrcBlock "A" SrcPort 1 DstBlock "Concat1" DstPort 1 } Line { SrcBlock "Concat1" SrcPort 1 DstBlock "Ax16" DstPort 1 } } } Block { BlockType Outport Name "Duration" SID "532" Position [1165, 423, 1195, 437] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name "Valid" SID "533" Position [1165, 538, 1195, 552] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Capture Rx Pkt\nDuration Field" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Relational3" SrcPort 1 DstBlock "Logical2" DstPort 3 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "Relational3" DstPort 2 } Line { SrcBlock "From" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Relational3" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "Logical2" SrcPort 1 Points [45, 0] Branch { Points [0, -100] DstBlock "Register2" DstPort 3 } Branch { DstBlock "Delay" DstPort 1 } } Line { SrcBlock "From7" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Mult" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Delay1" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Mult" DstPort 1 } Line { SrcBlock "Mult" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 DstBlock "x16" DstPort 1 } Line { SrcBlock "x16" SrcPort 1 DstBlock "Duration" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Delay2" DstPort 1 } Line { SrcBlock "Posedge1" SrcPort 1 DstBlock "Valid" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 Points [20, 0; 0, -30] DstBlock "AddSub" DstPort 2 } Line { SrcBlock "Check Dest Addr" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical2" DstPort 4 } Line { SrcBlock "Delay2" SrcPort 1 DstBlock "Posedge1" DstPort 1 } Annotation { Name "Only trust DURATION values from\npackets received with no errors.\nRX_END_IND always follows last " "byte\nand FCS assertion.\nSkip NAV update on packets addressed\nto me (handles case of receiving RTS with\nlarg" "e DURATION that somehow doesn't lead\nto CTS/DATA/ACK)" Position [404, 765] HorizontalAlignment "left" } Annotation { Name "usec" Position [543, 389] } Annotation { Name "usec/10" Position [860, 371] } Annotation { Name "clock ticks" Position [1090, 393] } } } Block { BlockType Reference Name "Register" SID "1574" Ports [1, 1] Position [970, 370, 1000, 400] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 " "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" } Block { BlockType Reference Name "Register1" SID "1575" Ports [1, 1] Position [1025, 370, 1055, 400] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,30,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 " "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" } Block { BlockType Reference Name "Register2" SID "4121" Ports [1, 1] Position [475, 123, 510, 157] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "35,34,1,1,white,blue,0,c80657c5,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 34 34 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 34 34 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[21.44 21.44 25.44 " "21.44 25.44 25.44 25.44 21.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[17.44 17.44 21.44 21.44 17.44 ],[0." "931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[13.44 13.44 17.44 17.44 13.44 ],[1 1 1 ]);\npatch([12.1 25." "88 21.88 17.88 13.88 8.1 12.1 ],[9.44 9.44 13.44 9.44 13.44 13.44 9.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" } Block { BlockType Reference Name "Relational1" SID "614" Ports [2, 1] Position [195, 164, 235, 191] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "ab" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "40,40,2,1,white,blue,0,b5131c97,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 40 40 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 40 40 0 ]);\npatch([8.875 16.1 21.1 26.1 31.1 21.1 13.875 8.875 ],[25.55 25.55 30.55" " 25.55 30.55 30.55 30.55 25.55 ],[1 1 1 ]);\npatch([13.875 21.1 16.1 8.875 13.875 ],[20.55 20.55 25.55 25.55 20.55 " "],[0.931 0.946 0.973 ]);\npatch([8.875 16.1 21.1 13.875 8.875 ],[15.55 15.55 20.55 20.55 15.55 ],[1 1 1 ]);\npatch(" "[13.875 31.1 26.1 21.1 16.1 8.875 13.875 ],[10.55 10.55 15.55 10.55 15.55 15.55 10.55 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'," "1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa > b','texmode','on'" ");\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "dbg_NAV_Active" SID "1573" Ports [1, 1] Position [1100, 375, 1160, 395] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Outport Name "NAV Busy" SID "541" Position [1000, 253, 1030, 267] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Logical1" SrcPort 1 Points [30, 0] Branch { DstBlock "NAV Counter" DstPort 1 } Branch { Points [0, 110] Branch { DstBlock "Logical2" DstPort 1 } Branch { Points [0, 305] DstBlock "Gateway Out2" DstPort 1 } } } Line { SrcBlock "New Duration" SrcPort 2 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "NAV Counter" SrcPort 1 Points [25, 0] Branch { DstBlock "Relational2" DstPort 1 } Branch { Points [0, -115] Branch { DstBlock "BitsM:4" DstPort 1 } Branch { DstBlock "Register2" DstPort 1 } } Branch { Points [0, 370] DstBlock "Gateway Out3" DstPort 1 } } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "NAV Counter" DstPort 3 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [25, 0] Branch { Points [0, 110] Branch { Points [0, 205] DstBlock "Gateway Out" DstPort 1 } Branch { Points [-360, 0; 0, -55] DstBlock "Logical2" DstPort 2 } } Branch { DstBlock "Logical3" DstPort 2 } } Line { SrcBlock "New Duration" SrcPort 1 Points [30, 0] Branch { DstBlock "Relational1" DstPort 2 } Branch { Points [0, 50] Branch { DstBlock "Convert" DstPort 1 } Branch { Points [0, 360] DstBlock "Gateway Out1" DstPort 1 } } } Line { SrcBlock "Relational1" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "NAV Counter" DstPort 2 } Line { SrcBlock "Gateway Out" SrcPort 1 DstBlock "NAV" DstPort 1 } Line { SrcBlock "Gateway Out1" SrcPort 1 DstBlock "NAV" DstPort 2 } Line { SrcBlock "Gateway Out2" SrcPort 1 DstBlock "NAV" DstPort 3 } Line { SrcBlock "Gateway Out3" SrcPort 1 DstBlock "NAV" DstPort 4 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "NAV Counter" DstPort 4 } Line { SrcBlock "Logical3" SrcPort 1 Points [20, 0] Branch { Points [70, 0] Branch { DstBlock "NAV Busy" DstPort 1 } Branch { DstBlock "Register" DstPort 1 } } Branch { Points [0, 205] DstBlock "Inverter1" DstPort 1 } } Line { SrcBlock "From2" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 Points [10, 0; 0, 60] DstBlock "Logical3" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "dbg_NAV_Active" DstPort 1 } Line { SrcBlock "BitsM:4" SrcPort 1 DstBlock "Goto17" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { Labels [2, 0] SrcBlock "Register2" SrcPort 1 Points [-310, 0; 0, 30] DstBlock "Relational1" DstPort 1 } Annotation { Name "NAV counter runs at core clock rate. Duration\nvalues are scaled up from usec to core clock\n(DURATION * " "160 in ref design)\n\nNAV counter runs independent of any\nother state (PHY CS, Tx state, etc.)" Position [536, 63] } Annotation { Name "Only use DURATION values greater\nthan current NAV value" Position [213, 111] } Annotation { Name "TODO: add NAV reset post-RTS when no RXSTART occurs\nwithin a programmed time" Position [52, 568] HorizontalAlignment "left" } } } Block { BlockType SubSystem Name "PHY I/O" SID "898" Ports [] Position [241, 264, 285, 311] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "PHY I/O" Location [352, 168, 1895, 1478] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "125" Block { BlockType Reference Name "Delay" SID "1589" Ports [1, 1] Position [735, 245, 765, 275] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "3" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" sg_icon_stat "30,30,1,1,white,blue,0,83e6bb61,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 " "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Delay1" SID "3804" Ports [1, 1] Position [740, 450, 770, 480] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "3" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" sg_icon_stat "30,30,1,1,white,blue,0,83e6bb61,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[19.44 19.44 23.44 " "19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[15.44 15.44 19.44 19.44 15.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('z^{-3}','texmode','on');" "\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "3788" Position [310, 281, 485, 299] ZOrder -9 ShowName off GotoTag "reg_Reset_Rx_PHY_Active_Latches" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "3802" Position [315, 481, 490, 499] ZOrder -9 ShowName off GotoTag "reg_Reset_RX_STARTED" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From11" SID "1423" Position [310, 251, 485, 269] ZOrder -9 ShowName off GotoTag "PHY_RX_END_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From12" SID "3816" Position [325, 856, 500, 874] ZOrder -9 ShowName off GotoTag "PHY_RX_END_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From13" SID "3812" Position [325, 816, 500, 834] ZOrder -9 ShowName off GotoTag "PHY_RX_END_RXERROR" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From14" SID "3813" Position [325, 836, 505, 854] ZOrder -9 ShowName off GotoTag "PHY_RX_START_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From15" SID "3859" Position [315, 381, 490, 399] ZOrder -9 ShowName off GotoTag "reg_Reset_Rx_PHY_Active_Latches" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From16" SID "1517" Position [325, 756, 500, 774] ZOrder -9 ShowName off GotoTag "PHY_RX_DATA_DONE_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From17" SID "1518" Position [325, 716, 500, 734] ZOrder -9 ShowName off GotoTag "PHY_RX_FCS_GOOD_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From18" SID "1571" Position [325, 736, 505, 754] ZOrder -9 ShowName off GotoTag "PHY_RX_START_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "3871" Position [315, 351, 490, 369] ZOrder -9 ShowName off GotoTag "PHY_RX_DATA_DONE_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "3789" Position [310, 126, 485, 144] ZOrder -9 ShowName off GotoTag "reg_Reset_Tx_PHY_Active_Latches" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From20" SID "3861" Position [315, 366, 490, 384] ZOrder -9 ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From21" SID "3862" Position [315, 336, 495, 354] ZOrder -9 ShowName off GotoTag "PHY_RX_START_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "3790" Position [310, 111, 485, 129] ZOrder -9 ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "3799" Position [315, 441, 495, 459] ZOrder -9 ShowName off GotoTag "PHY_RX_START_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "3800" Position [315, 461, 490, 479] ZOrder -9 ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "453" Position [310, 81, 490, 99] ZOrder -9 ShowName off GotoTag "PHY_TX_START_CONFIRM" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "454" Position [310, 96, 485, 114] ZOrder -9 ShowName off GotoTag "PHY_TX_END_CONFIRM" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "1421" Position [310, 266, 485, 284] ZOrder -9 ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "1422" Position [310, 236, 490, 254] ZOrder -9 ShowName off GotoTag "PHY_RX_START_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto1" SID "3803" Position [825, 456, 1000, 474] ZOrder -10 ShowName off GotoTag "Status_RX_STARTED" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto17" SID "1214" Position [820, 96, 995, 114] ZOrder -10 ShowName off GotoTag "Status_Tx_PHY_Active" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto18" SID "1519" Position [830, 736, 1005, 754] ZOrder -10 ShowName off GotoTag "Status_Rx_FCS_Good" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto2" SID "3814" Position [830, 836, 1005, 854] ZOrder -10 ShowName off GotoTag "Status_Rx_End_Error" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto3" SID "3863" Position [825, 351, 1000, 369] ZOrder -10 ShowName off GotoTag "Status_RX_WRITING_PAYLOAD" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto6" SID "1247" Position [820, 251, 995, 269] ZOrder -10 ShowName off GotoTag "Status_Rx_PHY_Active" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical1" SID "3791" Ports [3, 1] Position [550, 99, 580, 141] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,42,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 25.44 29.44 " "25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 25.44 21.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('or');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "3801" Ports [2, 1] Position [555, 459, 585, 501] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,42,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 25.44 29.44 " "25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 25.44 21.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfprintf(''," "'COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "3864" Ports [3, 1] Position [555, 354, 585, 396] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,42,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 25.44 29.44 " "25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 25.44 21.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('or');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "1425" Ports [3, 1] Position [550, 254, 580, 296] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,42,3,1,white,blue,0,a2abe52d,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 25.44 29.44 " "25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 25.44 21.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('or');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType SubSystem Name "PHY Rx Ports" SID "2428" Ports [] Position [120, 205, 204, 290] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "PHY Rx Ports" Location [2, 70, 1840, 1180] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType FromWorkspace Name "From\nWorkspace" SID "3012" Position [120, 143, 235, 167] ZOrder -10 ShowName off VariableName "mac_sim_rx_data_b" SampleTime "1" Interpolate off ZeroCross on OutputAfterFinalValue "Cyclic repetition" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType FromWorkspace Name "From\nWorkspace1" SID "3013" Position [120, 103, 235, 127] ZOrder -10 ShowName off VariableName "mac_sim_rx_data_valid" SampleTime "1" Interpolate off ZeroCross on OutputAfterFinalValue "Cyclic repetition" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType FromWorkspace Name "From\nWorkspace2" SID "3014" Position [120, 183, 235, 207] ZOrder -10 ShowName off VariableName "mac_sim_rx_data_addr" SampleTime "1" Interpolate off ZeroCross on OutputAfterFinalValue "Cyclic repetition" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "1434" Position [845, 51, 990, 69] ZOrder -9 ShowName off GotoTag "Status_Tx_PHY_Active" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "1586" Position [845, 66, 1020, 84] ZOrder -9 ShowName off GotoTag "reg_Block_Rx_On_Tx" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto1" SID "2462" Position [480, 696, 695, 714] ZOrder -10 ShowName off GotoTag "PHY_RX_DATA_DONE_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto10" SID "2463" Position [480, 876, 695, 894] ZOrder -10 ShowName off GotoTag "PHY_RX_END_RXERROR" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto11" SID "2464" Position [480, 51, 695, 69] ZOrder -10 ShowName off GotoTag "PHY_CCA_IND_BUSY" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto12" SID "2465" Position [480, 106, 695, 124] ZOrder -10 ShowName off GotoTag "PHY_RX_BYTE_VALID" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto13" SID "2466" Position [480, 146, 695, 164] ZOrder -10 ShowName off GotoTag "PHY_RX_BYTE" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto14" SID "2467" Position [480, 186, 695, 204] ZOrder -10 ShowName off GotoTag "PHY_RX_BYTENUM" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto19" SID "2468" Position [480, 361, 695, 379] ZOrder -10 ShowName off GotoTag "PHY_RX_PARAMS_VALID" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto2" SID "2469" Position [480, 766, 695, 784] ZOrder -10 ShowName off GotoTag "PHY_RX_FCS_GOOD_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto20" SID "2470" Position [480, 561, 695, 579] ZOrder -10 ShowName off GotoTag "PHY_RX_PARAMS_UNSUPPORTED" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto3" SID "2471" Position [480, 251, 695, 269] ZOrder -10 ShowName off GotoTag "PHY_RX_START_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto4" SID "2472" Position [480, 461, 695, 479] ZOrder -10 ShowName off GotoTag "PHY_RX_PARAMS_MCS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto5" SID "2473" Position [480, 831, 695, 849] ZOrder -10 ShowName off GotoTag "PHY_RX_END_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto7" SID "2474" Position [480, 506, 695, 524] ZOrder -10 ShowName off GotoTag "PHY_RX_PARAMS_PHY_MODE" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto8" SID "2475" Position [480, 416, 695, 434] ZOrder -10 ShowName off GotoTag "PHY_RX_PARAMS_LENGTH" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto9" SID "2476" Position [480, 301, 695, 319] ZOrder -10 ShowName off GotoTag "PHY_RX_START_PHY_SEL" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical6" SID "1585" Ports [2, 1] Position [1065, 53, 1095, 82] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,29,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 29 29 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 30 30 0 0 ],[0 0 29 29 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 " "18.44 22.44 18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 1" "8.44 14.44 ],[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 " "]);\npatch([10.1 23.88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');" "disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_CCA.IND_BUSY" SID "2477" Ports [1, 1] Position [355, 50, 420, 70] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_DATA.BYTE" SID "2478" Ports [1, 1] Position [355, 145, 420, 165] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "8" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_DATA.BYTENUM" SID "2479" Ports [1, 1] Position [355, 185, 420, 205] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_DATA.IND" SID "2480" Ports [1, 1] Position [355, 105, 420, 125] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_DATA_DONE.IND" SID "2481" Ports [1, 1] Position [355, 695, 420, 715] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_END.IND" SID "2482" Ports [1, 1] Position [355, 830, 420, 850] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_END.RXERROR" SID "2483" Ports [1, 1] Position [355, 875, 420, 895] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_FCS_GOOD.IND" SID "2484" Ports [1, 1] Position [355, 765, 420, 785] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_PHY_HDR.IND" SID "2485" Ports [1, 1] Position [355, 360, 420, 380] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_PHY_HDR.LENGTH" SID "2486" Ports [1, 1] Position [355, 415, 420, 435] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "16" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_PHY_HDR.MCS" SID "2487" Ports [1, 1] Position [355, 460, 420, 480] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "7" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_PHY_HDR.PHY_MODE" SID "2488" Ports [1, 1] Position [355, 505, 420, 525] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "3" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_PHY_HDR.UNSUPPORTED" SID "2489" Ports [1, 1] Position [355, 560, 420, 580] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_RESET" SID "1432" Ports [1, 1] Position [1250, 60, 1310, 80] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_START.IND" SID "2490" Ports [1, 1] Position [355, 250, 420, 270] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_RX_START.PHY_SEL" SID "2491" Ports [1, 1] Position [355, 300, 420, 320] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "1433" Ports [1, 1] Position [1165, 58, 1190, 82] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "25,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode" "','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Step Name "Step" SID "2492" Position [240, 45, 270, 75] ZOrder -22 Time "6e3" Before "1" After "0" SampleTime "1" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "PHY_RX_DATA_DONE.IND" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "PHY_RX_FCS_GOOD.IND" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "PHY_RX_START.IND" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "PHY_RX_PHY_HDR.MCS" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "PHY_RX_END.IND" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "PHY_RX_END.RXERROR" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "PHY_CCA.IND_BUSY" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "PHY_RX_DATA.IND" SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "PHY_RX_DATA.BYTE" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "PHY_RX_DATA.BYTENUM" SrcPort 1 DstBlock "Goto14" DstPort 1 } Line { SrcBlock "PHY_RX_START.PHY_SEL" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "Step" SrcPort 1 DstBlock "PHY_CCA.IND_BUSY" DstPort 1 } Line { SrcBlock "PHY_RX_PHY_HDR.LENGTH" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "PHY_RX_PHY_HDR.IND" SrcPort 1 DstBlock "Goto19" DstPort 1 } Line { SrcBlock "PHY_RX_PHY_HDR.PHY_MODE" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "PHY_RX_PHY_HDR.UNSUPPORTED" SrcPort 1 DstBlock "Goto20" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "PHY_RX_RESET" DstPort 1 } Line { SrcBlock "Logical6" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Logical6" DstPort 1 } Line { SrcBlock "From19" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "From\nWorkspace" SrcPort 1 DstBlock "PHY_RX_DATA.BYTE" DstPort 1 } Line { SrcBlock "From\nWorkspace1" SrcPort 1 DstBlock "PHY_RX_DATA.IND" DstPort 1 } Line { SrcBlock "From\nWorkspace2" SrcPort 1 DstBlock "PHY_RX_DATA.BYTENUM" DstPort 1 } } } Block { BlockType SubSystem Name "PHY Tx Ports" SID "2503" Ports [] Position [120, 85, 204, 170] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "PHY Tx Ports" Location [-1678, 70, -2, 1030] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Concat" SID "3266" Ports [2, 1] Position [875, 181, 910, 214] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary poi" "nt at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" sg_icon_stat "35,33,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 " "20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 2" "0.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 " "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat2" SID "4093" Ports [2, 1] Position [875, 221, 910, 254] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary poi" "nt at zero." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" sg_icon_stat "35,33,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 33 33 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 33 33 0 ]);\npatch([8.1 13.88 17.88 21.88 25.88 17.88 12.1 8.1 ],[20.44 " "20.44 24.44 20.44 24.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([12.1 17.88 13.88 8.1 12.1 ],[16.44 16.44 20.44 2" "0.44 16.44 ],[0.931 0.946 0.973 ]);\npatch([8.1 13.88 17.88 12.1 8.1 ],[12.44 12.44 16.44 16.44 12.44 ],[1 1 1 " "]);\npatch([12.1 25.88 21.88 17.88 13.88 8.1 12.1 ],[8.44 8.44 12.44 8.44 12.44 12.44 8.44 ],[0.931 0.946 0.973" " ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_l" "abel('input',1,'hi');\ncolor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','t" "exmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Constant Name "Constant" SID "3246" Position [150, 120, 175, 140] ZOrder -4 ShowName off Value "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From1" SID "872" Position [630, 91, 775, 109] ZOrder -9 ShowName off GotoTag "Tx_B_PHY_Start" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "1980" Position [855, 476, 1000, 494] ZOrder -9 ShowName off GotoTag "Tx_A_Param_TxGain_A" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From11" SID "3247" Position [855, 1196, 1040, 1214] ZOrder -9 ShowName off GotoTag "Tx_A_Param_Tx_PHY_Mode" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From12" SID "3263" Position [855, 1221, 1040, 1239] ZOrder -9 ShowName off GotoTag "Tx_B_Param_Tx_PHY_Mode" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From13" SID "2054" Position [855, 1051, 1000, 1069] ZOrder -9 ShowName off GotoTag "Tx_A_Param_TxAntMask" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From14" SID "3252" Position [855, 381, 1000, 399] ZOrder -9 ShowName off GotoTag "Tx_C_PktBuf" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From15" SID "2098" Position [855, 616, 1000, 634] ZOrder -9 ShowName off GotoTag "Tx_A_Param_TxGain_B" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From16" SID "3254" Position [855, 526, 1000, 544] ZOrder -9 ShowName off GotoTag "Tx_C_Param_TxGain_A" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From17" SID "3256" Position [855, 666, 1000, 684] ZOrder -9 ShowName off GotoTag "Tx_C_Param_TxGain_B" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From18" SID "3258" Position [855, 811, 1000, 829] ZOrder -9 ShowName off GotoTag "Tx_C_Param_TxGain_C" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "2099" Position [855, 761, 1000, 779] ZOrder -9 ShowName off GotoTag "Tx_A_Param_TxGain_C" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "969" Position [855, 331, 1000, 349] ZOrder -9 ShowName off GotoTag "Tx_A_PktBuf" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From20" SID "2100" Position [855, 906, 1000, 924] ZOrder -9 ShowName off GotoTag "Tx_A_Param_TxGain_D" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From21" SID "3260" Position [855, 956, 1000, 974] ZOrder -9 ShowName off GotoTag "Tx_C_Param_TxGain_D" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From22" SID "3262" Position [855, 1101, 1000, 1119] ZOrder -9 ShowName off GotoTag "Tx_C_Param_TxAntMask" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From23" SID "3264" Position [855, 1246, 1040, 1264] ZOrder -9 ShowName off GotoTag "Tx_C_Param_Tx_PHY_Mode" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From24" SID "3267" Position [630, 111, 775, 129] ZOrder -9 ShowName off GotoTag "Tx_C_PHY_Start" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From25" SID "4089" Position [630, 131, 775, 149] ZOrder -9 ShowName off GotoTag "Tx_D_PHY_Start" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From26" SID "4090" Position [855, 406, 1000, 424] ZOrder -9 ShowName off GotoTag "Tx_D_PktBuf" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From27" SID "4096" Position [855, 551, 1000, 569] ZOrder -9 ShowName off GotoTag "Tx_D_Param_TxGain_A" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From28" SID "4098" Position [855, 691, 1000, 709] ZOrder -9 ShowName off GotoTag "Tx_D_Param_TxGain_B" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From29" SID "4100" Position [855, 836, 1000, 854] ZOrder -9 ShowName off GotoTag "Tx_D_Param_TxGain_C" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "692" Position [630, 71, 775, 89] ZOrder -9 ShowName off GotoTag "Tx_A_PHY_Start" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From30" SID "4102" Position [855, 981, 1000, 999] ZOrder -9 ShowName off GotoTag "Tx_D_Param_TxGain_D" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From31" SID "4104" Position [855, 1126, 1000, 1144] ZOrder -9 ShowName off GotoTag "Tx_D_Param_TxAntMask" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From32" SID "4106" Position [855, 1271, 1040, 1289] ZOrder -9 ShowName off GotoTag "Tx_D_Param_Tx_PHY_Mode" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "2774" Position [855, 356, 1000, 374] ZOrder -9 ShowName off GotoTag "Tx_B_PktBuf" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "2775" Position [855, 501, 1000, 519] ZOrder -9 ShowName off GotoTag "Tx_B_Param_TxGain_A" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "2776" Position [855, 641, 1000, 659] ZOrder -9 ShowName off GotoTag "Tx_B_Param_TxGain_B" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "2777" Position [855, 786, 1000, 804] ZOrder -9 ShowName off GotoTag "Tx_B_Param_TxGain_C" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "2778" Position [855, 931, 1000, 949] ZOrder -9 ShowName off GotoTag "Tx_B_Param_TxGain_D" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From9" SID "2779" Position [855, 1076, 1000, 1094] ZOrder -9 ShowName off GotoTag "Tx_B_Param_TxAntMask" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto15" SID "451" Position [355, 121, 530, 139] ZOrder -10 ShowName off GotoTag "PHY_TX_START_CONFIRM" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto16" SID "452" Position [355, 171, 530, 189] ZOrder -10 ShowName off GotoTag "PHY_TX_END_CONFIRM" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical1" SID "4092" Ports [2, 1] Position [970, 181, 995, 259] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "25,78,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 78 78 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 78 78 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[42" ".33 42.33 45.33 42.33 45.33 45.33 45.33 42.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[39.33 39.33 " "42.33 42.33 39.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[36.33 36.33 39.33 39.33 36.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[33.33 33.33 36.33 33.33 36.33 36.33 33.33 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n" "\ncolor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "871" Ports [4, 1] Position [915, 70, 940, 150] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "25,80,4,1,white,blue,0,4f3eee2e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 80 80 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 80 80 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[43" ".33 43.33 46.33 43.33 46.33 46.33 46.33 43.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[40.33 40.33 " "43.33 43.33 40.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[37.33 37.33 40.33 40.33 37.3" "3 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[34.33 34.33 37.33 34.33 37.33 37.33 34.33 ]," "[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n" "\n\n\ncolor('black');disp('or');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux" SID "965" Ports [5, 1] Position [1110, 301, 1135, 429] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "25,128,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 18.2857 109.714 128" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 18.2857 109.714 128 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66" " 12.66 8.325 5.325 ],[67.33 67.33 70.33 67.33 70.33 70.33 70.33 67.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.3" "25 8.325 ],[64.33 64.33 67.33 67.33 64.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[61.3" "3 61.33 64.33 64.33 61.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[58.33 58.33 61.33 58" ".33 61.33 61.33 58.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\nc" "olor('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_labe" "l('input',5,'d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux1" SID "4095" Ports [5, 1] Position [1110, 446, 1135, 574] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "25,128,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 18.2857 109.714 128" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 18.2857 109.714 128 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66" " 12.66 8.325 5.325 ],[67.33 67.33 70.33 67.33 70.33 70.33 70.33 67.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.3" "25 8.325 ],[64.33 64.33 67.33 67.33 64.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[61.3" "3 61.33 64.33 64.33 61.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[58.33 58.33 61.33 58" ".33 61.33 61.33 58.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\nc" "olor('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_labe" "l('input',5,'d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux2" SID "4097" Ports [5, 1] Position [1110, 586, 1135, 714] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "25,128,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 18.2857 109.714 128" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 18.2857 109.714 128 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66" " 12.66 8.325 5.325 ],[67.33 67.33 70.33 67.33 70.33 70.33 70.33 67.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.3" "25 8.325 ],[64.33 64.33 67.33 67.33 64.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[61.3" "3 61.33 64.33 64.33 61.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[58.33 58.33 61.33 58" ".33 61.33 61.33 58.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\nc" "olor('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_labe" "l('input',5,'d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux3" SID "4099" Ports [5, 1] Position [1110, 731, 1135, 859] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "25,128,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 18.2857 109.714 128" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 18.2857 109.714 128 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66" " 12.66 8.325 5.325 ],[67.33 67.33 70.33 67.33 70.33 70.33 70.33 67.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.3" "25 8.325 ],[64.33 64.33 67.33 67.33 64.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[61.3" "3 61.33 64.33 64.33 61.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[58.33 58.33 61.33 58" ".33 61.33 61.33 58.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\nc" "olor('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_labe" "l('input',5,'d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux4" SID "4101" Ports [5, 1] Position [1110, 876, 1135, 1004] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "25,128,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 18.2857 109.714 128" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 18.2857 109.714 128 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66" " 12.66 8.325 5.325 ],[67.33 67.33 70.33 67.33 70.33 70.33 70.33 67.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.3" "25 8.325 ],[64.33 64.33 67.33 67.33 64.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[61.3" "3 61.33 64.33 64.33 61.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[58.33 58.33 61.33 58" ".33 61.33 61.33 58.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\nc" "olor('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_labe" "l('input',5,'d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux5" SID "4103" Ports [5, 1] Position [1110, 1021, 1135, 1149] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "25,128,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 18.2857 109.714 128" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 18.2857 109.714 128 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66" " 12.66 8.325 5.325 ],[67.33 67.33 70.33 67.33 70.33 70.33 70.33 67.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.3" "25 8.325 ],[64.33 64.33 67.33 67.33 64.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[61.3" "3 61.33 64.33 64.33 61.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[58.33 58.33 61.33 58" ".33 61.33 61.33 58.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\nc" "olor('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_labe" "l('input',5,'d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Mux6" SID "4105" Ports [5, 1] Position [1110, 1166, 1135, 1294] NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Mux" SourceType "Xilinx Bus Multiplexer Block" inputs "4" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mux" sg_icon_stat "25,128,5,1,white,blue,3,d6c79293,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 18.2857 109.714 128" " 0 ],[0.77 0.82 0.91 ]);\nplot([0 25 25 0 0 ],[0 18.2857 109.714 128 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66" " 12.66 8.325 5.325 ],[67.33 67.33 70.33 67.33 70.33 70.33 70.33 67.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.3" "25 8.325 ],[64.33 64.33 67.33 67.33 64.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[61.3" "3 61.33 64.33 64.33 61.33 ],[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[58.33 58.33 61.33 58" ".33 61.33 61.33 58.33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT:" " begin icon text');\ncolor('black');port_label('input',1,'sel');\ncolor('black');port_label('input',2,'d0');\nc" "olor('black');port_label('input',3,'d1');\ncolor('black');port_label('input',4,'d2');\ncolor('black');port_labe" "l('input',5,'d3');\n\ncolor('black');disp('\\bf{}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_TX_ANT_MASK" SID "2052" Ports [1, 1] Position [1285, 1075, 1345, 1095] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_TX_DONE" SID "256" Ports [1, 1] Position [235, 170, 300, 190] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_TX_GAIN_A" SID "1979" Ports [1, 1] Position [1285, 500, 1345, 520] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_TX_GAIN_B" SID "2090" Ports [1, 1] Position [1285, 640, 1345, 660] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_TX_GAIN_C" SID "2093" Ports [1, 1] Position [1285, 785, 1345, 805] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_TX_GAIN_D" SID "2096" Ports [1, 1] Position [1285, 930, 1345, 950] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_TX_PHY_MODE" SID "3250" Ports [1, 1] Position [1285, 1220, 1345, 1240] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_TX_PKT_BUF" SID "964" Ports [1, 1] Position [1285, 355, 1345, 375] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_TX_START" SID "257" Ports [1, 1] Position [1285, 100, 1345, 120] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of t" "ype Simulink integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become t" "op level output ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','o" "n');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PHY_TX_STARTED" SID "258" Ports [1, 1] Position [235, 120, 300, 140] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to" " Xilinx fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top l" "evel input ports." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "16" bin_pt "14" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0" ".93 0.65 ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[1" "2.22 12.22 14.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.2" "2 12.22 12.22 10.22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.2" "2 ],[1 1 1 ]);\npatch([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985" " 0.979 0.895 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('bl" "ack');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' " "');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register" SID "972" Ports [1, 1] Position [1200, 98, 1225, 122] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "25,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode" "','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "973" Ports [1, 1] Position [1200, 353, 1225, 377] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "25,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode" "','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "1983" Ports [1, 1] Position [1200, 498, 1225, 522] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "25,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode" "','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register3" SID "3251" Ports [1, 1] Position [1200, 1218, 1225, 1242] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "25,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode" "','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register4" SID "2053" Ports [1, 1] Position [1200, 1073, 1225, 1097] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "25,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode" "','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register5" SID "2091" Ports [1, 1] Position [1200, 638, 1225, 662] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "25,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode" "','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register6" SID "2094" Ports [1, 1] Position [1200, 783, 1225, 807] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "25,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode" "','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register7" SID "2097" Ports [1, 1] Position [1200, 928, 1225, 952] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "25,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15" ".33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 " "15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ]" ",[1 1 1 ]);\npatch([8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.9" "46 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black'" ");port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode" "','on');\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "Register7" SrcPort 1 DstBlock "PHY_TX_GAIN_D" DstPort 1 } Line { SrcBlock "Register6" SrcPort 1 DstBlock "PHY_TX_GAIN_C" DstPort 1 } Line { SrcBlock "Register5" SrcPort 1 DstBlock "PHY_TX_GAIN_B" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 DstBlock "PHY_TX_ANT_MASK" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "PHY_TX_GAIN_A" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "PHY_TX_PKT_BUF" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "PHY_TX_START" DstPort 1 } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "PHY_TX_DONE" SrcPort 1 DstBlock "Goto16" DstPort 1 } Line { SrcBlock "PHY_TX_STARTED" SrcPort 1 DstBlock "Goto15" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [15, 0] Branch { DstBlock "PHY_TX_STARTED" DstPort 1 } Branch { Points [0, 50] DstBlock "PHY_TX_DONE" DstPort 1 } } Line { SrcBlock "Register3" SrcPort 1 DstBlock "PHY_TX_PHY_MODE" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mux" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Mux" DstPort 3 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Mux" DstPort 4 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Mux1" DstPort 4 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Mux2" DstPort 2 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Mux2" DstPort 3 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Mux2" DstPort 4 } Line { SrcBlock "From19" SrcPort 1 DstBlock "Mux3" DstPort 2 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Mux3" DstPort 3 } Line { SrcBlock "From18" SrcPort 1 DstBlock "Mux3" DstPort 4 } Line { SrcBlock "From20" SrcPort 1 DstBlock "Mux4" DstPort 2 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Mux4" DstPort 3 } Line { SrcBlock "From21" SrcPort 1 DstBlock "Mux4" DstPort 4 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Mux5" DstPort 2 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Mux5" DstPort 3 } Line { SrcBlock "From22" SrcPort 1 DstBlock "Mux5" DstPort 4 } Line { SrcBlock "From11" SrcPort 1 DstBlock "Mux6" DstPort 2 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Mux6" DstPort 3 } Line { SrcBlock "From23" SrcPort 1 DstBlock "Mux6" DstPort 4 } Line { SrcBlock "Mux6" SrcPort 1 DstBlock "Register3" DstPort 1 } Line { SrcBlock "Mux5" SrcPort 1 DstBlock "Register4" DstPort 1 } Line { SrcBlock "Mux4" SrcPort 1 DstBlock "Register7" DstPort 1 } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Register6" DstPort 1 } Line { SrcBlock "Mux2" SrcPort 1 DstBlock "Register5" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 Points [50, 0] Branch { DstBlock "Logical3" DstPort 2 } Branch { Points [0, 105] DstBlock "Concat" DstPort 2 } } Line { SrcBlock "From24" SrcPort 1 Points [55, 0] Branch { DstBlock "Logical3" DstPort 3 } Branch { Points [0, 70] DstBlock "Concat" DstPort 1 } } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "From25" SrcPort 1 Points [35, 0] Branch { DstBlock "Logical3" DstPort 4 } Branch { Points [0, 90] Branch { DstBlock "Concat2" DstPort 1 } Branch { Points [0, 15] DstBlock "Concat2" DstPort 2 } } } Line { SrcBlock "From26" SrcPort 1 DstBlock "Mux" DstPort 5 } Line { SrcBlock "Concat" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Concat2" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [80, 0; 0, 95] Branch { DstBlock "Mux" DstPort 1 } Branch { Points [0, 145] Branch { DstBlock "Mux1" DstPort 1 } Branch { Points [0, 140] Branch { DstBlock "Mux2" DstPort 1 } Branch { Points [0, 145] Branch { DstBlock "Mux3" DstPort 1 } Branch { Points [0, 145] Branch { DstBlock "Mux4" DstPort 1 } Branch { Points [0, 145] Branch { DstBlock "Mux5" DstPort 1 } Branch { Points [0, 145] DstBlock "Mux6" DstPort 1 } } } } } } } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "From27" SrcPort 1 DstBlock "Mux1" DstPort 5 } Line { SrcBlock "From28" SrcPort 1 DstBlock "Mux2" DstPort 5 } Line { SrcBlock "From29" SrcPort 1 DstBlock "Mux3" DstPort 5 } Line { SrcBlock "From30" SrcPort 1 DstBlock "Mux4" DstPort 5 } Line { SrcBlock "From31" SrcPort 1 DstBlock "Mux5" DstPort 5 } Line { SrcBlock "From32" SrcPort 1 DstBlock "Mux6" DstPort 5 } Annotation { Name "1-hot to binary decode" Position [928, 267] } } } Block { BlockType Reference Name "PHY_RX_BLOCK_PKTDET" SID "3792" Ports [1, 1] Position [855, 545, 915, 565] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed-point or floating-point type inputs into ouputs of type Simu" "link integer, single, double, or fixed-point.

Hardware notes: In hardware these blocks become top level out" "put ports or are discarded, depending on how they are configured." inherit_from_input off hdl_port on timing_constraint "None" locs_specified off LOCs "{}" UseAsDAC off DACChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" sg_icon_stat "60,20,1,1,white,yellow,1,cc31b7ac,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\npatch([25.55 28.44 30.44 32.44 34.44 30.44 27.55 25.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([27.55 30.44 28.44 25.55 27.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([25.55 28.44 30.44 27.55 25.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([27.55 34.44 32.44 30.44 28.44 25.55 27.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" " ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end i" "con text');" } Block { BlockType Reference Name "Register1" SID "3815" Ports [3, 1] Position [625, 813, 670, 877] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "45,64,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 64 64 0 ],[0.77 0.82 0.91" " ]);\nplot([0 45 45 0 0 ],[0 0 64 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[38.66 38.66 44." "66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[32.66 32.66 38.66 38.66 32.66" " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32.66 32.66 26.66 ],[1 1 1 ]);\npatch(" "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 26.66 20.66 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p" "ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3805" Ports [1, 1] Position [745, 543, 770, 567] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "25,24,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 24 24 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 24 24 0 ]);\npatch([5.325 9.66 12.66 15.66 18.66 12.66 8.325 5.325 ],[15.33 15.33 18" ".33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([8.325 12.66 9.66 5.325 8.325 ],[12.33 12.33 15.33 15.33 12.3" "3 ],[0.931 0.946 0.973 ]);\npatch([5.325 9.66 12.66 8.325 5.325 ],[9.33 9.33 12.33 12.33 9.33 ],[1 1 1 ]);\npatch([" "8.325 18.66 15.66 12.66 9.66 5.325 8.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6.33 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');" "\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: e" "nd icon text');" } Block { BlockType Reference Name "Register3" SID "1516" Ports [3, 1] Position [625, 713, 670, 777] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "45,64,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 64 64 0 ],[0.77 0.82 0.91" " ]);\nplot([0 45 45 0 0 ],[0 0 64 64 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[38.66 38.66 44." "66 38.66 44.66 44.66 44.66 38.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[32.66 32.66 38.66 38.66 32.66" " ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[26.66 26.66 32.66 32.66 26.66 ],[1 1 1 ]);\npatch(" "[14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[20.66 20.66 26.66 20.66 26.66 26.66 20.66 ],[0.931 0.946 0.973 ]);\nfp" "rintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input'" ",1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');p" "ort_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch1" SID "3793" Ports [2, 1] Position [630, 433, 670, 497] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch1" Location [379, 291, 1877, 1167] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "3794" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "3795" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "3796" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3797" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3798" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType SubSystem Name "S-R Latch2" SID "445" Ports [2, 1] Position [625, 73, 665, 137] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch2" Location [379, 291, 1877, 1167] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "446" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "447" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "448" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "449" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "450" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType SubSystem Name "S-R Latch3" SID "1426" Ports [2, 1] Position [625, 228, 665, 292] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch3" Location [379, 291, 1877, 1167] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "1427" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "1428" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "1429" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "1430" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "1431" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType SubSystem Name "S-R Latch4" SID "3865" Ports [2, 1] Position [625, 328, 665, 392] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch4" Location [379, 291, 1877, 1167] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "3866" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "3867" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "3868" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "3869" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "3870" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Line { SrcBlock "From6" SrcPort 1 DstBlock "S-R Latch2" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "S-R Latch2" DstPort 2 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "S-R Latch2" SrcPort 1 DstBlock "Goto17" DstPort 1 } Line { SrcBlock "From9" SrcPort 1 DstBlock "S-R Latch3" DstPort 1 } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "S-R Latch3" DstPort 2 } Line { SrcBlock "From11" SrcPort 1 DstBlock "Logical4" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Logical4" DstPort 2 } Line { SrcBlock "S-R Latch3" SrcPort 1 DstBlock "Delay" DstPort 1 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Register3" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 DstBlock "Goto18" DstPort 1 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Register3" DstPort 3 } Line { SrcBlock "From18" SrcPort 1 DstBlock "Register3" DstPort 2 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Logical4" DstPort 3 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Logical1" DstPort 3 } Line { SrcBlock "From4" SrcPort 1 DstBlock "S-R Latch1" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Logical2" DstPort 1 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 DstBlock "S-R Latch1" DstPort 2 } Line { SrcBlock "S-R Latch1" SrcPort 1 Points [20, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { Points [0, 90] DstBlock "Register2" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "PHY_RX_BLOCK_PKTDET" DstPort 1 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Register1" DstPort 3 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Register1" DstPort 2 } Line { SrcBlock "From21" SrcPort 1 DstBlock "S-R Latch4" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "S-R Latch4" DstPort 2 } Line { SrcBlock "From19" SrcPort 1 DstBlock "Logical3" DstPort 1 } Line { SrcBlock "From20" SrcPort 1 DstBlock "Logical3" DstPort 2 } Line { SrcBlock "S-R Latch4" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Logical3" DstPort 3 } Annotation { Name "FCS_Good is valid starting when\ndata_done = 1 and stays valid through\nrx_end = 1" Position [725, 700] HorizontalAlignment "left" } Annotation { Name "RX status bits need delay so MPDU Tx FSM has time to declare TX_DONE\ndue to RX_STARTED before the MAC co" "de is notified that RX_STARTED" Position [700, 204] HorizontalAlignment "left" } Annotation { Name "MAC core blocks future Rx events until MAC software clears\nthe RX_STARTED latch. The BLOCK_PKTDET signal" " prevents\nthe Rx PHY from asserting a new pkt det event, but it does not\nterminate an ongoing Rx event." Position [695, 618] HorizontalAlignment "left" } } } Block { BlockType SubSystem Name "Post Tx/Rx Timers" SID "2209" Ports [0, 4] Position [175, 178, 255, 237] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Post Tx/Rx Timers" Location [0, 73, 1459, 1372] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "87" Block { BlockType Constant Name "Constant" SID "4201" Position [25, 185, 55, 215] ZOrder -5 ShowName off Value "0" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant2" SID "2288" Ports [0, 1] Position [155, 151, 180, 169] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "0" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,18,0,1,white,blue,0,bf4ddd8b,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf(''" ",'COMMENT: end icon text');" } Block { BlockType Reference Name "FORCE_START_POSTRX_TIMER1" SID "4191" Ports [1, 1] Position [135, 190, 200, 210] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilinx" " fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input p" "orts." gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "65,20,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 0 ],[0 0 20 20 0 ],[0.95 0.93 0.65" " ]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\npatch([27.55 30.44 32.44 34.44 36.44 32.44 29.55 27.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([29.55 32.44 30.44 27.55 29.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.985 0.979 0.895 ]);\npatch([27.55 30.44 32.44 29.55 27.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([29.55 36.44 34.44 32.44 30.44 27.55 29.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.985 0.979 0.895 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'" "\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end ic" "on text');" } Block { BlockType From Name "From1" SID "2627" Position [170, 714, 305, 736] ZOrder -9 ShowName off GotoTag "PHY_TX_END_CONFIRM" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From13" SID "2287" Position [130, 94, 265, 116] ZOrder -9 ShowName off GotoTag "PHY_RX_END_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From14" SID "2289" Position [45, 129, 180, 151] ZOrder -9 ShowName off GotoTag "PHY_RX_END_RXERROR" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From17" SID "2325" Position [785, 216, 980, 234] ZOrder -9 ShowName off GotoTag "reg_PostRx_Timer1_CountTo" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From18" SID "2346" Position [430, 184, 565, 206] ZOrder -9 ShowName off GotoTag "reg_PostRx_Timer1_En" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "2348" Position [430, 474, 565, 496] ZOrder -9 ShowName off GotoTag "reg_PostRx_Timer2_En" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "2637" Position [710, 786, 905, 804] ZOrder -9 ShowName off GotoTag "reg_PostTx_Timer1_CountTo" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From20" SID "2352" Position [840, 274, 975, 296] ZOrder -9 BlockMirror on NamePlacement "alternate" ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From21" SID "2353" Position [785, 506, 980, 524] ZOrder -9 ShowName off GotoTag "reg_PostRx_Timer2_CountTo" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From22" SID "2354" Position [840, 564, 975, 586] ZOrder -9 BlockMirror on NamePlacement "alternate" ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "2638" Position [720, 849, 855, 871] ZOrder -9 BlockMirror on NamePlacement "alternate" ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "2648" Position [710, 1046, 905, 1064] ZOrder -9 ShowName off GotoTag "reg_PostTx_Timer2_CountTo" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From5" SID "2649" Position [720, 1109, 855, 1131] ZOrder -9 BlockMirror on NamePlacement "alternate" ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "2663" Position [285, 754, 420, 776] ZOrder -9 ShowName off GotoTag "reg_PostTx_Timer1_En" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "2664" Position [285, 1014, 420, 1036] ZOrder -9 ShowName off GotoTag "reg_PostTx_Timer2_En" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "4200" Position [45, 234, 240, 256] ZOrder -9 ShowName off GotoTag "reg_En_Ext_PostRx_Timer1_Start" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto" SID "3153" Position [825, 381, 1025, 399] ZOrder -10 ShowName off GotoTag "Status_PostRx_Timer2_Running" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto1" SID "3154" Position [825, 91, 1025, 109] ZOrder -10 ShowName off GotoTag "Status_PostRx_Timer1_Running" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto2" SID "3155" Position [820, 661, 1020, 679] ZOrder -10 ShowName off GotoTag "Status_PostTx_Timer1_Running" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto3" SID "3156" Position [820, 921, 1020, 939] ZOrder -10 ShowName off GotoTag "Status_PostTx_Timer2_Running" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Inverter1" SID "2323" Ports [1, 1] Position [815, 146, 840, 164] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Inverter2" SID "2355" Ports [1, 1] Position [815, 436, 840, 454] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Inverter3" SID "2634" Ports [1, 1] Position [770, 716, 795, 734] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Inverter4" SID "2650" Ports [1, 1] Position [770, 976, 795, 994] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Inverter5" SID "2895" Ports [1, 1] Position [730, 316, 755, 334] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Inverter6" SID "2897" Ports [1, 1] Position [730, 606, 755, 624] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Inverter7" SID "2899" Ports [1, 1] Position [615, 891, 640, 909] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Inverter8" SID "2901" Ports [1, 1] Position [610, 1151, 635, 1169] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.22 11.22 13.2" "2 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 11.22 9.22 ],[0." "931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([9.55 16.44 " "14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: en" "d icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('not');\nfprintf('','COMMENT: " "end icon text');" } Block { BlockType Reference Name "Logical1" SID "2900" Ports [3, 1] Position [610, 838, 640, 882] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,44,3,1,white,blue,0,a2abe52d,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 44 44 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[26.44 26.44 30.44 " "26.44 30.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 26.44 22.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 14.44 18.44 18.44 14.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('or');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical10" SID "2351" Ports [3, 1] Position [725, 263, 755, 307] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,44,3,1,white,blue,0,a2abe52d,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 44 44 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[26.44 26.44 30.44 " "26.44 30.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 26.44 22.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 14.44 18.44 18.44 14.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('or');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical11" SID "4199" Ports [2, 1] Position [330, 175, 365, 270] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,95,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 95 95 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 95 95 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[52.55 52.55 57.55" " 52.55 57.55 57.55 57.55 52.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[47.55 47.55 52.55 52.55 47.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[42.55 42.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[37.55 37.55 42.55 37.55 42.55 42.55 37.55 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical2" SID "2902" Ports [3, 1] Position [605, 1098, 635, 1142] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,44,3,1,white,blue,0,a2abe52d,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 44 44 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[26.44 26.44 30.44 " "26.44 30.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 26.44 22.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 14.44 18.44 18.44 14.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('or');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical3" SID "2662" Ports [2, 1] Position [480, 705, 515, 785] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,80,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 80 80 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 80 80 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[45.55 45.55 50.55" " 45.55 50.55 50.55 50.55 45.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[40.55 40.55 45.55 45.55 40.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[35.55 35.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[30.55 30.55 35.55 30.55 35.55 35.55 30.55 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical4" SID "2666" Ports [2, 1] Position [480, 965, 515, 1045] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,80,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 80 80 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 80 80 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[45.55 45.55 50.55" " 45.55 50.55 50.55 50.55 45.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[40.55 40.55 45.55 45.55 40.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[35.55 35.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[30.55 30.55 35.55 30.55 35.55 35.55 30.55 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical5" SID "2780" Ports [2, 1] Position [620, 425, 655, 505] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,80,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 80 80 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 80 80 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[45.55 45.55 50.55" " 45.55 50.55 50.55 50.55 45.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[40.55 40.55 45.55 45.55 40.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[35.55 35.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[30.55 30.55 35.55 30.55 35.55 35.55 30.55 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical6" SID "2898" Ports [3, 1] Position [725, 553, 755, 597] BlockMirror on NamePlacement "alternate" ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "3" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "30,44,3,1,white,blue,0,a2abe52d,left,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 44 44 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 44 44 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[26.44 26.44 30.44 " "26.44 30.44 30.44 30.44 26.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[22.44 22.44 26.44 26.44 22.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 14.44 18.44 18.44 14.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n\ncolor('black');disp('or');\nfprintf('" "','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical7" SID "2311" Ports [2, 1] Position [330, 80, 365, 175] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,95,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 95 95 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 95 95 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[52.55 52.55 57.55" " 52.55 57.55 57.55 57.55 52.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[47.55 47.55 52.55 52.55 47.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[42.55 42.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[37.55 37.55 42.55 37.55 42.55 42.55 37.55 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical8" SID "2312" Ports [2, 1] Position [620, 135, 655, 215] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,80,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 80 80 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 80 80 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[45.55 45.55 50.55" " 45.55 50.55 50.55 50.55 45.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[40.55 40.55 45.55 45.55 40.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[35.55 35.55 40.55 40.55 35.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[30.55 30.55 35.55 30.55 35.55 35.55 30.55 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('and');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical9" SID "4198" Ports [2, 1] Position [390, 105, 425, 200] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,95,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 95 95 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 95 95 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[52.55 52.55 57.55" " 52.55 57.55 57.55 57.55 52.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[47.55 47.55 52.55 52.55 47.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[42.55 42.55 47.55 47.55 42.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[37.55 37.55 42.55 37.55 42.55 42.55 37.55 ],[0.931 0.946 0.973 ]);\nfpr" "intf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge1" SID "2642" Ports [1, 1] Position [350, 716, 395, 734] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Posedge1" Location [88, 301, 2330, 1301] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "2643" Position [200, 253, 230, 267] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Delay" SID "2644" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]" ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3" "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 " "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "2645" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2" "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);" "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no" "t');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "2646" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32." "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3" "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2647" Position [610, 173, 640, 187] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "D" SrcPort 1 Points [150, 0; 0, -70] Branch { DstBlock "Logical1" DstPort 2 } Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType SubSystem Name "Posedge3" SID "2292" Ports [1, 1] Position [450, 146, 495, 164] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Posedge3" Location [88, 301, 2330, 1301] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "2293" Position [200, 253, 230, 267] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Delay" SID "2294" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]" ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3" "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 " "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "2295" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2" "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);" "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no" "t');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "2296" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32." "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3" "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2297" Position [610, 173, 640, 187] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [150, 0; 0, -70] Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType Reference Name "PostRx Timer 1" SID "2322" Ports [2, 1] Position [880, 140, 940, 200] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is" " implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "1" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "NB_CNTR_POSTRX" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" sg_icon_stat "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8" "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs" "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PostRx Timer 2" SID "2357" Ports [2, 1] Position [880, 430, 940, 490] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is" " implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "1" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "NB_CNTR_POSTRX" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" sg_icon_stat "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8" "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs" "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PostTx Timer 1" SID "2635" Ports [2, 1] Position [835, 710, 895, 770] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is" " implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "1" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "NB_CNTR_POSTRX" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" sg_icon_stat "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8" "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs" "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "PostTx Timer 2" SID "2652" Ports [2, 1] Position [835, 970, 895, 1030] NamePlacement "alternate" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is" " implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "1" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "NB_CNTR_POSTRX" bin_pt "0" load_pin off rst on en on explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off implementation "Fabric" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "counter" sg_icon_stat "60,60,2,1,white,blue,0,ae3608d6,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 0 ],[0 0 60 60 0 ],[0.77 0.82 0.91" " ]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\npatch([12.2 23.76 31.76 39.76 47.76 31.76 20.2 12.2 ],[38.88 38.88 46.8" "8 38.88 46.88 46.88 46.88 38.88 ],[1 1 1 ]);\npatch([20.2 31.76 23.76 12.2 20.2 ],[30.88 30.88 38.88 38.88 30.88 ]," "[0.931 0.946 0.973 ]);\npatch([12.2 23.76 31.76 20.2 12.2 ],[22.88 22.88 30.88 30.88 22.88 ],[1 1 1 ]);\npatch([20." "2 47.76 39.76 31.76 23.76 12.2 20.2 ],[14.88 14.88 22.88 14.88 22.88 22.88 14.88 ],[0.931 0.946 0.973 ]);\nfprintf(" "'','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rs" "t');\ncolor('black');port_label('input',2,'en');\n\ncolor('black');disp('{\\fontsize{14}\\bf++}','texmode','on');\n" "fprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register1" SID "2641" Ports [1, 1] Position [1115, 751, 1150, 789] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,38,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 38 38 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[24.55 24.55 29.55" " 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[19.55 19.55 24.55 24.55 19.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d" "');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Register2" SID "2653" Ports [1, 1] Position [1115, 1011, 1150, 1049] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,38,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 38 38 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[24.55 24.55 29.55" " 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[19.55 19.55 24.55 24.55 19.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d" "');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Register8" SID "2349" Ports [1, 1] Position [1115, 181, 1150, 219] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,38,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 38 38 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[24.55 24.55 29.55" " 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[19.55 19.55 24.55 24.55 19.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d" "');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Register9" SID "2358" Ports [1, 1] Position [1115, 471, 1150, 509] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,38,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 38 38 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[24.55 24.55 29.55" " 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[19.55 19.55 24.55 24.55 19.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d" "');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT" ": end icon text');" } Block { BlockType Reference Name "Relational1" SID "2636" Ports [2, 1] Position [985, 712, 1020, 823] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "35,111,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 111 111 0 ],[0.77 0.82 0." "91 ]);\nplot([0 35 35 0 0 ],[0 0 111 111 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[60.55 60.55 6" "5.55 60.55 65.55 65.55 65.55 60.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[55.55 55.55 60.55 60.55 55" ".55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[50.55 50.55 55.55 55.55 50.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[45.55 45.55 50.55 45.55 50.55 50.55 45.55 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\geq b','texmod" "e','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational2" SID "2654" Ports [2, 1] Position [985, 972, 1020, 1083] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "35,111,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 111 111 0 ],[0.77 0.82 0." "91 ]);\nplot([0 35 35 0 0 ],[0 0 111 111 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[60.55 60.55 6" "5.55 60.55 65.55 65.55 65.55 60.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[55.55 55.55 60.55 60.55 55" ".55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[50.55 50.55 55.55 55.55 50.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[45.55 45.55 50.55 45.55 50.55 50.55 45.55 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\geq b','texmod" "e','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational4" SID "2290" Ports [2, 1] Position [235, 129, 265, 171] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "30,42,2,1,white,blue,0,2a81ff49,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 42 42 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 42 42 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[25.44 25.44 29.44 " "25.44 29.44 29.44 29.44 25.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[21.44 21.44 25.44 25.44 21.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[17.44 17.44 21.44 21.44 17.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[13.44 13.44 17.44 13.44 17.44 17.44 13.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\nco" "lor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa = b','texmode','on');\ncolor('" "black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational7" SID "2324" Ports [2, 1] Position [1025, 142, 1060, 253] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "35,111,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 111 111 0 ],[0.77 0.82 0." "91 ]);\nplot([0 35 35 0 0 ],[0 0 111 111 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[60.55 60.55 6" "5.55 60.55 65.55 65.55 65.55 60.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[55.55 55.55 60.55 60.55 55" ".55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[50.55 50.55 55.55 55.55 50.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[45.55 45.55 50.55 45.55 50.55 50.55 45.55 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\geq b','texmod" "e','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Relational8" SID "2359" Ports [2, 1] Position [1025, 432, 1060, 543] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a>=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" sg_icon_stat "35,111,2,1,white,blue,0,6218dc92,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 111 111 0 ],[0.77 0.82 0." "91 ]);\nplot([0 35 35 0 0 ],[0 0 111 111 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[60.55 60.55 6" "5.55 60.55 65.55 65.55 65.55 60.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[55.55 55.55 60.55 60.55 55" ".55 ],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[50.55 50.55 55.55 55.55 50.55 ],[1 1 1 ]);\npa" "tch([10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[45.55 45.55 50.55 45.55 50.55 50.55 45.55 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('inpu" "t',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bfa \\geq b','texmod" "e','on');\ncolor('black');disp(' ');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "S-R Latch1" SID "2628" Ports [2, 1] Position [600, 735, 640, 775] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch1" Location [379, 291, 1877, 1167] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2629" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "2630" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "2631" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2632" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2633" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType SubSystem Name "S-R Latch2" SID "2655" Ports [2, 1] Position [600, 995, 640, 1035] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch2" Location [379, 291, 1877, 1167] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2656" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "2657" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "2658" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2659" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2660" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType SubSystem Name "S-R Latch3" SID "2316" Ports [2, 1] Position [720, 165, 760, 205] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch3" Location [379, 291, 1877, 1167] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2317" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "2318" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "2319" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2320" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2321" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } } } Block { BlockType SubSystem Name "S-R Latch4" SID "2360" Ports [2, 1] Position [720, 455, 760, 495] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "S-R Latch4" Location [379, 291, 1877, 1167] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "S" SID "2361" Position [140, 103, 170, 117] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Inport Name "R" SID "2362" Position [140, 88, 170, 102] NamePlacement "alternate" Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Constant1" SID "2363" Ports [0, 1] Position [195, 71, 210, 89] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "VER_STRING_GOES_HERE" sg_icon_stat "15,18,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 15 15 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 15 15 0 0 ],[0 0 18 18 0 ]);\npatch([2.55 5.44 7.44 9.44 11.44 7.44 4.55 2.55 ],[11.22 11" ".22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([4.55 7.44 5.44 2.55 4.55 ],[9.22 9.22 11.22 11.22 " "9.22 ],[0.931 0.946 0.973 ]);\npatch([2.55 5.44 7.44 4.55 2.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch(" "[4.55 11.44 9.44 7.44 5.44 2.55 4.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1," "'1');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register2" SID "2364" Ports [3, 1] Position [255, 71, 300, 119] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,193" block_type "register" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,48,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 48 48 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 48 48 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[30." "66 30.66 36.66 30.66 36.66 36.66 36.66 30.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[24.66 24.66 3" "0.66 30.66 24.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[18.66 18.66 24.66 24.66 18.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[12.66 12.66 18.66 12.66 18.66 18.66 12.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor" "('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('i" "nput',3,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2365" Position [325, 88, 355, 102] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "R" SrcPort 1 DstBlock "Register2" DstPort 2 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "S" SrcPort 1 DstBlock "Register2" DstPort 3 } } } Block { BlockType Outport Name " PostRx Timer 1" SID "2283" Position [1225, 193, 1255, 207] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name " PostRx Timer 2" SID "2285" Position [1225, 483, 1255, 497] Port "2" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name " PostTx Timer 1" SID "2640" Position [1225, 763, 1255, 777] Port "3" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Outport Name " PostTx Timer 2" SID "2661" Position [1225, 1023, 1255, 1037] Port "4" IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "From14" SrcPort 1 DstBlock "Relational4" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "Relational4" DstPort 2 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Logical7" DstPort 1 } Line { SrcBlock "Relational4" SrcPort 1 DstBlock "Logical7" DstPort 2 } Line { SrcBlock "Logical7" SrcPort 1 DstBlock "Logical9" DstPort 1 } Line { SrcBlock "Posedge3" SrcPort 1 Points [75, 0] Branch { DstBlock "Logical8" DstPort 1 } Branch { Points [0, 290] DstBlock "Logical5" DstPort 1 } } Line { SrcBlock "Logical8" SrcPort 1 DstBlock "S-R Latch3" DstPort 1 } Line { SrcBlock "S-R Latch3" SrcPort 1 Points [30, 0] Branch { DstBlock "PostRx Timer 1" DstPort 2 } Branch { Points [0, -30] Branch { DstBlock "Inverter1" DstPort 1 } Branch { Points [0, -55] DstBlock "Goto1" DstPort 1 } } } Line { SrcBlock "Inverter1" SrcPort 1 DstBlock "PostRx Timer 1" DstPort 1 } Line { SrcBlock "PostRx Timer 1" SrcPort 1 DstBlock "Relational7" DstPort 1 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Relational7" DstPort 2 } Line { SrcBlock "From18" SrcPort 1 Points [25, 0] Branch { DstBlock "Logical8" DstPort 2 } Branch { Points [0, 130] DstBlock "Inverter5" DstPort 1 } } Line { SrcBlock "Relational7" SrcPort 1 Points [10, 0] Branch { DstBlock "Register8" DstPort 1 } Branch { Points [0, 70] DstBlock "Logical10" DstPort 1 } } Line { SrcBlock "Register8" SrcPort 1 DstBlock " PostRx Timer 1" DstPort 1 } Line { SrcBlock "Logical10" SrcPort 1 Points [-25, 0; 0, -90] DstBlock "S-R Latch3" DstPort 2 } Line { SrcBlock "From20" SrcPort 1 DstBlock "Logical10" DstPort 2 } Line { SrcBlock "Logical5" SrcPort 1 DstBlock "S-R Latch4" DstPort 1 } Line { SrcBlock "S-R Latch4" SrcPort 1 Points [30, 0] Branch { DstBlock "PostRx Timer 2" DstPort 2 } Branch { Points [0, -30] Branch { DstBlock "Inverter2" DstPort 1 } Branch { Points [0, -55] DstBlock "Goto" DstPort 1 } } } Line { SrcBlock "Inverter2" SrcPort 1 DstBlock "PostRx Timer 2" DstPort 1 } Line { SrcBlock "PostRx Timer 2" SrcPort 1 DstBlock "Relational8" DstPort 1 } Line { SrcBlock "From21" SrcPort 1 DstBlock "Relational8" DstPort 2 } Line { SrcBlock "Relational8" SrcPort 1 Points [10, 0] Branch { DstBlock "Register9" DstPort 1 } Branch { Points [0, 70] DstBlock "Logical6" DstPort 1 } } Line { SrcBlock "Logical6" SrcPort 1 Points [-25, 0; 0, -90] DstBlock "S-R Latch4" DstPort 2 } Line { SrcBlock "From22" SrcPort 1 DstBlock "Logical6" DstPort 2 } Line { SrcBlock "Register9" SrcPort 1 DstBlock " PostRx Timer 2" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Posedge1" DstPort 1 } Line { SrcBlock "Inverter3" SrcPort 1 DstBlock "PostTx Timer 1" DstPort 1 } Line { SrcBlock "S-R Latch1" SrcPort 1 Points [105, 0] Branch { DstBlock "PostTx Timer 1" DstPort 2 } Branch { Points [0, -30] Branch { DstBlock "Inverter3" DstPort 1 } Branch { Points [0, -55] DstBlock "Goto2" DstPort 1 } } } Line { SrcBlock "PostTx Timer 1" SrcPort 1 DstBlock "Relational1" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Relational1" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Logical1" DstPort 2 } Line { SrcBlock "Logical1" SrcPort 1 Points [0, -95] DstBlock "S-R Latch1" DstPort 2 } Line { SrcBlock "Relational1" SrcPort 1 Points [50, 0] Branch { DstBlock "Register1" DstPort 1 } Branch { Points [0, 75] DstBlock "Logical1" DstPort 1 } } Line { SrcBlock "Register1" SrcPort 1 DstBlock " PostTx Timer 1" DstPort 1 } Line { SrcBlock "Inverter4" SrcPort 1 DstBlock "PostTx Timer 2" DstPort 1 } Line { SrcBlock "S-R Latch2" SrcPort 1 Points [105, 0] Branch { DstBlock "PostTx Timer 2" DstPort 2 } Branch { Points [0, -30] Branch { DstBlock "Inverter4" DstPort 1 } Branch { Points [0, -55] DstBlock "Goto3" DstPort 1 } } } Line { SrcBlock "PostTx Timer 2" SrcPort 1 DstBlock "Relational2" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Relational2" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Logical2" DstPort 2 } Line { SrcBlock "Logical2" SrcPort 1 Points [-25, 0; 0, -95] DstBlock "S-R Latch2" DstPort 2 } Line { SrcBlock "Relational2" SrcPort 1 Points [50, 0] Branch { DstBlock "Register2" DstPort 1 } Branch { Points [0, 75] DstBlock "Logical2" DstPort 1 } } Line { SrcBlock "Register2" SrcPort 1 DstBlock " PostTx Timer 2" DstPort 1 } Line { SrcBlock "Logical3" SrcPort 1 DstBlock "S-R Latch1" DstPort 1 } Line { SrcBlock "Posedge1" SrcPort 1 Points [45, 0] Branch { DstBlock "Logical3" DstPort 1 } Branch { Points [0, 260] DstBlock "Logical4" DstPort 1 } } Line { SrcBlock "From6" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical3" DstPort 2 } Branch { Points [0, 135] DstBlock "Inverter7" DstPort 1 } } Line { SrcBlock "From7" SrcPort 1 Points [20, 0] Branch { DstBlock "Logical4" DstPort 2 } Branch { Points [0, 135] DstBlock "Inverter8" DstPort 1 } } Line { SrcBlock "Logical4" SrcPort 1 DstBlock "S-R Latch2" DstPort 1 } Line { SrcBlock "From19" SrcPort 1 Points [30, 0] Branch { DstBlock "Logical5" DstPort 2 } Branch { Points [0, 130] DstBlock "Inverter6" DstPort 1 } } Line { SrcBlock "Inverter5" SrcPort 1 Points [20, 0; 0, -25] DstBlock "Logical10" DstPort 3 } Line { SrcBlock "Inverter6" SrcPort 1 Points [20, 0; 0, -25] DstBlock "Logical6" DstPort 3 } Line { SrcBlock "Inverter7" SrcPort 1 Points [20, 0; 0, -25] DstBlock "Logical1" DstPort 3 } Line { SrcBlock "Inverter8" SrcPort 1 Points [20, 0; 0, -25] DstBlock "Logical2" DstPort 3 } Line { SrcBlock "FORCE_START_POSTRX_TIMER1" SrcPort 1 DstBlock "Logical11" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Logical11" DstPort 2 } Line { SrcBlock "Logical11" SrcPort 1 Points [0, -50] DstBlock "Logical9" DstPort 2 } Line { SrcBlock "Logical9" SrcPort 1 DstBlock "Posedge3" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "FORCE_START_POSTRX_TIMER1" DstPort 1 } Annotation { Name "Parallel timers for controlling state after an Rx event. Normal uses include the SIFS interval\n between " "a Rx and response Tx.\n\nEach timer runs when:\n-PHY.RX_END asserts\n-PHY.RX_ERROR is zero (nonzero RX_ERROR is a P" "HY error, *not* a checksum error)\n-The timer is enabled (set by MAC sw)\n\nIf the countTo value is zero the \"Done" "\" output will be asserted. This allows the Tx state\n machines to continue immediately when configured to wait on " "timers\n\nOnce started a timer runs to completion and asserts its \"Done\" output. Normal software\ncannot clear a " "timer once it has started. Only a global reset can terminate a timer before \nit completes. Downstream logic using " "the \"Done\" signal should apply its own conditions \nwhen deciding whether to act on the timer expiring." Position [1116, 344] HorizontalAlignment "left" } Annotation { Name "Parallel timers for controlling state after a Tx event. Normal uses include the post-Tx\ntimeout and inte" "r-Tx SIFS for burst Tx\n\nEach timer runs when:\n-PHY.TX_END asserts\n-The timer is enabled (set by MAC sw)\n\nIf t" "he countTo value is zero the \"Done\" output will be asserted. This allows the Tx state\n machines to continue imme" "diately when configured to wait on timers\n\nOnce started a timer runs to completion and asserts its \"Done\" outpu" "t. Normal software\ncannot clear a timer once it has started. Only a global reset can terminate a timer before \nit" " completes. Downstream logic using the \"Done\" signal should apply its own conditions \nwhen deciding whether to a" "ct on the timer expiring." Position [1166, 879] HorizontalAlignment "left" } } } Block { BlockType SubSystem Name "Registers" SID "65" Ports [] Position [327, 346, 371, 393] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Registers" Location [2, 70, 2469, 1580] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name " b[15:0]" SID "786" Ports [1, 1] Position [270, 556, 305, 574] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type " "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14" ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name " b[15:0]2" SID "1021" Ports [1, 1] Position [280, 786, 315, 804] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type " "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14" ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name " b[29:20]" SID "783" Ports [1, 1] Position [270, 501, 305, 519] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type " "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "10" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "20" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14" ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name " b[31:16]" SID "784" Ports [1, 1] Position [270, 606, 305, 624] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type " "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "16" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14" ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name " b[31:24]" SID "806" Ports [1, 1] Position [270, 721, 305, 739] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type " "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "8" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14" ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name " b[31]" SID "1022" Ports [1, 1] Position [280, 826, 315, 844] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type " "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "31" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14" ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name " b[9:0]" SID "781" Ports [1, 1] Position [270, 446, 305, 464] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type " "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "10" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14" ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name " b[9:0]1" SID "807" Ports [1, 1] Position [270, 671, 305, 689] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type " "is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardwar" "e notes: In hardware this block costs nothing." nbits "10" boolean_output off mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,18,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 18 18 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 18 18 0 ]);\npatch([12.55 15.44 17.44 19.44 21.44 17.44 14.55 12.55 ],[11.22 11.22 1" "3.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([14.55 17.44 15.44 12.55 14.55 ],[9.22 9.22 11.22 11.22 9.22" " ],[0.931 0.946 0.973 ]);\npatch([12.55 15.44 17.44 14.55 12.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);\npatch([14" ".55 21.44 19.44 17.44 15.44 12.55 14.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\nfprintf(''," "'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output',1,'[a" ":b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Concat1" SID "1248" Ports [2, 1] Position [1245, 463, 1275, 512] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at ze" "ro." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "30,49,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 49 49 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 49 49 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[28.44 28.44 32.44 " "28.44 32.44 32.44 32.44 28.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[24.44 24.44 28.44 28.44 24.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[20.44 20.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 16.44 20.44 20.44 16.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\nc" "olor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "Concat3" SID "2932" Ports [7, 1] Position [1205, 686, 1235, 844] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at ze" "ro." num_inputs "7" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "30,158,7,1,white,blue,0,5db75f69,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 158 158 0 ],[0.77 0.82 0." "91 ]);\nplot([0 30 30 0 0 ],[0 0 158 158 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[83.44 83.44 87" ".44 83.44 87.44 87.44 87.44 83.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[79.44 79.44 83.44 83.44 79.44 ]" ",[0.931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[75.44 75.44 79.44 79.44 75.44 ],[1 1 1 ]);\npatch([10.1" " 23.88 19.88 15.88 11.88 6.1 10.1 ],[71.44 71.44 75.44 71.44 75.44 75.44 71.44 ],[0.931 0.946 0.973 ]);\nfprintf(''" ",'COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi')" ";\n\n\n\n\n\ncolor('black');port_label('input',7,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');" "\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Concat4" SID "4108" Ports [2, 1] Position [1210, 188, 1240, 237] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Concat" SourceType "Xilinx Bus Concatenator Block" infoedit "Concatenates two or more inputs. Output will be cast to an unsigned value with the binary point at ze" "ro." num_inputs "2" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "concat" block_version "8.2.02" sg_icon_stat "30,49,2,1,white,blue,0,16398980,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 49 49 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 49 49 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[28.44 28.44 32.44 " "28.44 32.44 32.44 32.44 28.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[24.44 24.44 28.44 28.44 24.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[20.44 20.44 24.44 24.44 20.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[16.44 16.44 20.44 16.44 20.44 20.44 16.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'hi');\nc" "olor('black');port_label('input',2,'lo');\n\ncolor('black');disp('\\fontsize{20}\\}','texmode','on');\nfprintf('','" "COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant1" SID "3146" Ports [0, 1] Position [1415, 125, 1440, 145] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "30" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2" "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1" "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant2" SID "1551" Ports [0, 1] Position [1435, 545, 1460, 565] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "30" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2" "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1" "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant3" SID "1920" Ports [0, 1] Position [1410, 395, 1435, 415] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "30" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2" "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1" "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Constant4" SID "4115" Ports [0, 1] Position [1415, 240, 1440, 260] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" const "1" gui_display_data_type "Boolean" arith_type "Boolean" n_bits "30" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" explicit_period on period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" sg_icon_stat "25,20,0,1,white,blue,0,1c72b5be,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 25 25 0 0 ],[0 0 20 20 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[12.22 12.22 14.2" "2 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[10.22 10.22 12.22 12.22 10.22 ]," "[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatch([9.55 1" "6.44 14.44 12.44 10.44 7.55 9.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprin" "tf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert" SID "1136" Ports [1, 1] Position [1395, 510, 1435, 530] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert1" SID "3147" Ports [1, 1] Position [1395, 90, 1435, 110] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert2" SID "4109" Ports [1, 1] Position [1400, 205, 1440, 225] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert4" SID "2971" Ports [1, 1] Position [1385, 830, 1425, 850] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Convert6" SID "1917" Ports [1, 1] Position [1400, 360, 1440, 380] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" float_type "Single" exp_bits "8" fraction_bits "24" quantization "Truncate" overflow "Wrap" en off latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "convert" sg_icon_stat "40,20,1,1,white,blue,0,edca21da,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 20 20 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 20 20 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[12.22 12.22 1" "4.22 12.22 14.22 14.22 14.22 12.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[10.22 10.22 12.22 12.22 10" ".22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[8.22 8.22 10.22 10.22 8.22 ],[1 1 1 ]);\npatc" "h([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[6.22 6.22 8.22 6.22 8.22 8.22 6.22 ],[0.931 0.946 0.973 ]);\nfprint" "f('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');port_label('output'," "1,'cast');\nfprintf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Ctrl Bits" SID "1452" Ports [1] Position [435, 189, 485, 221] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Ctrl Bits" Location [950, 345, 1480, 478] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "80" Block { BlockType Inport Name "32b" SID "1454" Position [25, 83, 55, 97] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto" SID "194" Position [365, 80, 560, 100] ZOrder -10 ShowName off GotoTag "GLOBAL_RESET" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto1" SID "3872" Position [360, 1075, 560, 1095] ShowName off GotoTag "reg_Pause_Tx_C" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto10" SID "1993" Position [360, 460, 560, 480] ShowName off GotoTag "reg_CCA_Ignore_NAV" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto11" SID "2035" Position [360, 160, 560, 180] ShowName off GotoTag "reg_Force_Reset_NAV" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto12" SID "2037" Position [360, 865, 560, 885] ShowName off GotoTag "reg_Force_Reset_A_Backoff" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto13" SID "3174" Position [360, 710, 560, 730] ShowName off GotoTag "reg_Reset_TxCtrl_B" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto14" SID "3497" Position [360, 500, 560, 520] ShowName off GotoTag "reg_CCA_Force_Busy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto15" SID "3691" Position [360, 915, 560, 935] ShowName off GotoTag "reg_Force_Reset_C_Backoff" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto16" SID "3723" Position [360, 1025, 560, 1045] ShowName off GotoTag "reg_Pause_Tx_A" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto17" SID "3758" Position [360, 270, 560, 290] ShowName off GotoTag "reg_Reset_TU_Latch" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto18" SID "3807" Position [355, 1285, 555, 1305] ShowName off GotoTag "reg_Reset_Rx_PHY_Active_Latches" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto19" SID "3806" Position [360, 610, 560, 630] ShowName off GotoTag "reg_Reset_RX_STARTED" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto2" SID "3874" Position [360, 1130, 560, 1150] ShowName off GotoTag "reg_Pause_Tx_D" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto20" SID "4079" Position [360, 815, 560, 835] ShowName off GotoTag "reg_Reset_TxCtrl_D" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto21" SID "4195" Position [360, 1185, 560, 1205] ShowName off GotoTag "reg_CCA_En_Busy_Input" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto22" SID "4202" Position [360, 1245, 560, 1265] ShowName off GotoTag "reg_En_Ext_PostRx_Timer1_Start" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto24" SID "4212" Position [355, 1325, 555, 1345] ShowName off GotoTag "reg_Reset_Tx_PHY_Active_Latches" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto3" SID "1563" Position [360, 120, 560, 140] ShowName off GotoTag "reg_Disable_NAV" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto4" SID "3173" Position [360, 660, 560, 680] ShowName off GotoTag "reg_Reset_TxCtrl_A" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto5" SID "1587" Position [360, 215, 560, 235] ShowName off GotoTag "reg_Block_Rx_On_Tx" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto6" SID "3213" Position [360, 760, 560, 780] ShowName off GotoTag "reg_Reset_TxCtrl_C" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto7" SID "4077" Position [360, 970, 560, 990] ShowName off GotoTag "reg_Force_Reset_D_Backoff" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto8" SID "1991" Position [360, 330, 560, 350] ShowName off GotoTag "reg_CCA_Ignore_PHY_CS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto9" SID "1992" Position [360, 390, 560, 410] ShowName off GotoTag "reg_CCA_Ignore_TxBusy" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType SubSystem Name "Sim Reset" SID "145" Ports [0, 1] Position [180, 25, 225, 55] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Sim Reset" Location [347, 173, 617, 257] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Sum Name "Add" SID "146" Ports [2, 1] Position [90, 57, 120, 88] ZOrder -2 InputSameDT off OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Disregard Subsystem" SID "147" Tag "discardX" Ports [] Position [553, 252, 611, 310] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code generatio" "n. This block can be used in combination with the Simulation Multiplexer block to provide an alternative simulatio" "n model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" sg_icon_stat "58,58,-1,-1,darkgray,black,0,07734,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 0 ],[0 0 58 58 0 ],[0.1 0.1 0.1 ]" ");\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\npatch([11.2 22.76 30.76 38.76 46.76 30.76 19.2 11.2 ],[37.88 37.88 45.88" " 37.88 45.88 45.88 45.88 37.88 ],[0.33 0.33 0.33 ]);\npatch([19.2 30.76 22.76 11.2 19.2 ],[29.88 29.88 37.88 37.88" " 29.88 ],[0.261 0.261 0.261 ]);\npatch([11.2 22.76 30.76 19.2 11.2 ],[21.88 21.88 29.88 29.88 21.88 ],[0.33 0.33 0" ".33 ]);\npatch([19.2 46.76 38.76 30.76 22.76 11.2 19.2 ],[13.88 13.88 21.88 13.88 21.88 21.88 13.88 ],[0.261 0.261" " 0.261 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMEN" "T: end icon text');" } Block { BlockType DiscretePulseGenerator Name "Pulse\nGenerator" SID "148" Ports [0, 1] Position [25, 29, 55, 61] ZOrder -13 Period "1e6" PulseWidth "2" PhaseDelay "1.25e4" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType DiscretePulseGenerator Name "Pulse\nGenerator1" SID "149" Ports [0, 1] Position [25, 99, 55, 131] ZOrder -13 Period "1e6" PulseWidth "2" PhaseDelay "2.5e4" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "sim_only_reset" SID "150" Ports [1, 1] Position [190, 63, 230, 77] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, single, double and fixed-point to Xilin" "x fixed-point or floating-point data type.

Hardware notes: In hardware these blocks become top level input" " ports." gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "1" bin_pt "0" preci_type "Single" exp_width "8" frac_width "24" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "1" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" UseAsADC off ADCChannel "'1'" xl_use_area off xl_area "[0,0,0,0,0,0,0]" inherit_from_input off hdl_port "on" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" sg_icon_stat "40,14,1,1,white,yellow,1,00d3666e,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.95 0.93 0.6" "5 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9.22 9.22 1" "1.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22 9.22 7.22 ]," "[0.985 0.979 0.895 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 ]);\npatch([17.5" "5 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.985 0.979 0.895 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fon" "tsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon t" "ext');" } Block { BlockType Outport Name "Out1" SID "151" Position [255, 63, 285, 77] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "sim_only_reset" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Pulse\nGenerator" SrcPort 1 Points [10, 0; 0, 20] DstBlock "Add" DstPort 1 } Line { SrcBlock "Pulse\nGenerator1" SrcPort 1 Points [10, 0; 0, -35] DstBlock "Add" DstPort 2 } Line { SrcBlock "Add" SrcPort 1 Points [5, 0; 0, -5] DstBlock "sim_only_reset" DstPort 1 } } } Block { BlockType Reference Name "b[0]" SID "162" Ports [1, 1] Position [135, 83, 175, 97] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[10]" SID "2036" Ports [1, 1] Position [135, 613, 175, 627] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "10" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[11]" SID "2038" Ports [1, 1] Position [135, 663, 175, 677] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "11" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[12]" SID "3175" Ports [1, 1] Position [135, 713, 175, 727] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "12" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[13]" SID "3176" Ports [1, 1] Position [135, 763, 175, 777] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "13" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[14]" SID "3214" Ports [1, 1] Position [135, 818, 175, 832] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "14" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[15]" SID "3227" Ports [1, 1] Position [135, 868, 175, 882] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "15" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[16]" SID "3690" Ports [1, 1] Position [135, 918, 175, 932] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "16" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[17]" SID "3724" Ports [1, 1] Position [135, 973, 175, 987] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "17" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[18]" SID "3787" Ports [1, 1] Position [135, 1028, 175, 1042] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "18" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[19]" SID "3808" Ports [1, 1] Position [135, 1078, 175, 1092] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "19" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[1] " SID "1456" Ports [1, 1] Position [135, 123, 175, 137] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "1" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[20]" SID "3873" Ports [1, 1] Position [135, 1133, 175, 1147] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "20" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[21]" SID "3875" Ports [1, 1] Position [135, 1188, 175, 1202] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "21" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[22]" SID "4078" Ports [1, 1] Position [135, 1248, 175, 1262] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "22" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[23]" SID "4207" Ports [1, 1] Position [135, 1288, 175, 1302] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "23" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[24]" SID "4210" Ports [1, 1] Position [135, 1328, 175, 1342] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "24" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[2]" SID "1457" Ports [1, 1] Position [135, 163, 175, 177] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "2" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[3]" SID "1570" Ports [1, 1] Position [135, 218, 175, 232] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "3" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[4]" SID "1588" Ports [1, 1] Position [135, 273, 175, 287] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "4" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[5]" SID "1753" Ports [1, 1] Position [135, 333, 175, 347] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "5" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[6]" SID "1802" Ports [1, 1] Position [135, 393, 175, 407] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "6" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[7]" SID "1994" Ports [1, 1] Position [135, 463, 175, 477] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "7" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[8]" SID "1995" Ports [1, 1] Position [135, 503, 175, 517] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "8" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "b[9]" SID "1996" Ports [1, 1] Position [135, 543, 175, 557] LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The outp" "ut type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.
Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "9" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,398" block_type "slice" block_version "VER_STRING_GOES_HERE" sg_icon_stat "40,14,1,1,white,blue,0,1fd851a7,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 14 14 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\npatch([15.55 18.44 20.44 22.44 24.44 20.44 17.55 15.55 ],[9" ".22 9.22 11.22 9.22 11.22 11.22 11.22 9.22 ],[1 1 1 ]);\npatch([17.55 20.44 18.44 15.55 17.55 ],[7.22 7.22 9.22" " 9.22 7.22 ],[0.931 0.946 0.973 ]);\npatch([15.55 18.44 20.44 17.55 15.55 ],[5.22 5.22 7.22 7.22 5.22 ],[1 1 1 " "]);\npatch([17.55 24.44 22.44 20.44 18.44 15.55 17.55 ],[3.22 3.22 5.22 3.22 5.22 5.22 3.22 ],[0.931 0.946 0.97" "3 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\ncolor('black');por" "t_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');" } Line { SrcBlock "b[0]" SrcPort 1 DstBlock "Goto" DstPort 1 } Line { SrcBlock "32b" SrcPort 1 Points [40, 0] Branch { DstBlock "b[0]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "b[1] " DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "b[2]" DstPort 1 } Branch { Points [0, 55] Branch { DstBlock "b[3]" DstPort 1 } Branch { Points [0, 55] Branch { DstBlock "b[4]" DstPort 1 } Branch { Points [0, 60] Branch { DstBlock "b[5]" DstPort 1 } Branch { Points [0, 60] Branch { DstBlock "b[6]" DstPort 1 } Branch { Points [0, 70] Branch { DstBlock "b[7]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "b[8]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "b[9]" DstPort 1 } Branch { Points [0, 70] Branch { DstBlock "b[10]" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "b[11]" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "b[12]" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "b[13]" DstPort 1 } Branch { Points [0, 55] Branch { DstBlock "b[14]" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "b[15]" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "b[16]" DstPort 1 } Branch { Points [0, 55] Branch { DstBlock "b[17]" DstPort 1 } Branch { Points [0, 55] Branch { DstBlock "b[18]" DstPort 1 } Branch { Points [0, 50] Branch { DstBlock "b[19]" DstPort 1 } Branch { Points [0, 55] Branch { DstBlock "b[20]" DstPort 1 } Branch { Points [0, 55] Branch { DstBlock "b[21]" DstPort 1 } Branch { Points [0, 60] Branch { DstBlock "b[22]" DstPort 1 } Branch { Points [0, 40] Branch { DstBlock "b[23]" DstPort 1 } Branch { Points [0, 40] DstBlock "b[24]" DstPort 1 } } } } } } } } } } } } } } } } } } } } } } } } } Line { SrcBlock "b[3]" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "b[4]" SrcPort 1 DstBlock "Goto17" DstPort 1 } Line { SrcBlock "b[7]" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "b[8]" SrcPort 1 DstBlock "Goto14" DstPort 1 } Line { SrcBlock "b[9]" SrcPort 1 Points [175, 0] } Line { SrcBlock "b[10]" SrcPort 1 DstBlock "Goto19" DstPort 1 } Line { SrcBlock "b[11]" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "b[12]" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "b[13]" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "b[14]" SrcPort 1 DstBlock "Goto20" DstPort 1 } Line { SrcBlock "b[15]" SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "b[16]" SrcPort 1 DstBlock "Goto15" DstPort 1 } Line { SrcBlock "b[17]" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "b[5]" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "b[18]" SrcPort 1 DstBlock "Goto16" DstPort 1 } Line { SrcBlock "b[19]" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "b[20]" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "b[2]" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "b[1] " SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "b[6]" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "b[21]" SrcPort 1 DstBlock "Goto21" DstPort 1 } Line { SrcBlock "b[22]" SrcPort 1 DstBlock "Goto22" DstPort 1 } Line { SrcBlock "b[23]" SrcPort 1 DstBlock "Goto18" DstPort 1 } Line { SrcBlock "b[24]" SrcPort 1 DstBlock "Goto24" DstPort 1 } } } Block { BlockType Reference Name "From Register1" SID "1017" Ports [0, 1] Position [145, 780, 185, 810] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'BACKOFF_CTRL'" init "REG_MAC_Backoff_Control" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register15" SID "2557" Ports [0, 1] Position [140, 890, 180, 920] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'NAV_MATCH_ADDR_2'" init "REG_NAV_Match_Addr_2" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register16" SID "2563" Ports [0, 1] Position [140, 960, 180, 990] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'NAV_MATCH_ADDR_1'" init "REG_NAV_Match_Addr_1" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register2" SID "99" Ports [0, 1] Position [150, 190, 190, 220] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'Control'" init "REG_MAC_Control" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register3" SID "3738" Ports [0, 1] Position [140, 1035, 180, 1065] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TU_TARGET_MSB'" init "2^32-1" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register4" SID "619" Ports [0, 1] Position [150, 260, 190, 290] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TX_START'" init "0" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register5" SID "780" Ports [0, 1] Position [145, 440, 185, 470] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'IFS_INTERVALS1'" init "REG_MAC_Intervals_1" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register6" SID "787" Ports [0, 1] Position [145, 550, 185, 580] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'IFS_INTERVALS2'" init "REG_MAC_Intervals_2" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register7" SID "4176" Ports [0, 1] Position [140, 1115, 180, 1145] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'TU_TARGET_LSB'" init "2^32-1" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "From Register8" SID "792" Ports [0, 1] Position [145, 665, 185, 695] AttributesFormatString "<< % >>" LibraryVersion "1.2" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'CALIB_TIMES'" init "REG_MAC_Calib_Times" period "1" ownership "Locally owned and initialized" gui_display_data_type "Fixed-point" arith_type "Unsigned" n_bits "32" bin_pt "0" preci_type "Single" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" sg_icon_stat "40,30,0,1,white,blue,0,b27a07ff,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 0 ],[0 0 30 30 0 ],[0.77 0.82 0.91" " ]);\nplot([0 40 40 0 0 ],[0 0 30 30 0 ]);\npatch([11.1 16.88 20.88 24.88 28.88 20.88 15.1 11.1 ],[19.44 19.44 23.4" "4 19.44 23.44 23.44 23.44 19.44 ],[1 1 1 ]);\npatch([15.1 20.88 16.88 11.1 15.1 ],[15.44 15.44 19.44 19.44 15.44 ]," "[0.931 0.946 0.973 ]);\npatch([11.1 16.88 20.88 15.1 11.1 ],[11.44 11.44 15.44 15.44 11.44 ],[1 1 1 ]);\npatch([15." "1 28.88 24.88 20.88 16.88 11.1 15.1 ],[7.44 7.44 11.44 7.44 11.44 11.44 7.44 ],[0.931 0.946 0.973 ]);\nfprintf('','" "COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout'" ");\nfprintf('','COMMENT: end icon text');" } Block { BlockType From Name "From1" SID "3166" Position [885, 877, 1080, 893] ZOrder -9 ShowName off GotoTag "PHY_RX_PARAMS_VALID" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From10" SID "1251" Position [885, 467, 1080, 483] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTE" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From16" SID "1489" Position [885, 857, 1080, 873] ZOrder -9 ShowName off GotoTag "PHY_RX_START_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From17" SID "2966" Position [885, 757, 1080, 773] ZOrder -9 ShowName off GotoTag "PHY_RX_PARAMS_PHY_MODE" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From19" SID "1553" Position [885, 511, 1065, 529] ZOrder -9 ShowName off GotoTag "PHY_RX_START_IND" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From2" SID "3170" Position [885, 694, 1020, 716] ZOrder -9 ShowName off GotoTag "PHY_RX_END_RXERROR" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From20" SID "2961" Position [885, 777, 1080, 793] ZOrder -9 ShowName off GotoTag "PHY_RX_PARAMS_UNSUPPORTED" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From21" SID "2965" Position [885, 717, 1080, 733] ZOrder -9 ShowName off GotoTag "PHY_RX_START_PHY_SEL" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From22" SID "2925" Position [885, 797, 1080, 813] ZOrder -9 ShowName off GotoTag "PHY_RX_PARAMS_MCS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From24" SID "1915" Position [885, 362, 1080, 378] ZOrder -9 ShowName off GotoTag "NAV_VALUE_100NSEC" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From27" SID "2927" Position [885, 817, 1080, 833] ZOrder -9 ShowName off GotoTag "PHY_RX_PARAMS_LENGTH" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From28" SID "2928" Position [885, 737, 1080, 753] ZOrder -9 ShowName off GotoTag "PHY_RX_PARAMS_VALID" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From3" SID "3696" Position [805, 92, 1000, 108] ZOrder -9 ShowName off GotoTag "Status_Current_A_Backoff_Count" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From4" SID "4110" Position [810, 217, 1005, 233] ZOrder -9 ShowName off GotoTag "Status_Current_C_Backoff_Count" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From6" SID "1134" Position [885, 542, 1080, 558] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTE_VALID" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From7" SID "1135" Position [885, 492, 1080, 508] ZOrder -9 ShowName off GotoTag "PHY_RX_BYTENUM" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType From Name "From8" SID "4111" Position [810, 192, 1005, 208] ZOrder -9 ShowName off GotoTag "Status_Current_D_Backoff_Count" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto1" SID "1018" Position [460, 826, 660, 844] ZOrder -10 ShowName off GotoTag "reg_Backoff_Sw_Start" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto10" SID "464" Position [465, 671, 660, 689] ZOrder -10 ShowName off GotoTag "reg_CalibTime_TxDIFS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto11" SID "554" Position [465, 721, 660, 739] ZOrder -10 ShowName off GotoTag "reg_NAV_TIME_ADJ" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto12" SID "4177" Position [455, 1121, 655, 1139] ZOrder -10 ShowName off GotoTag "reg_TU_TARGET_LSB" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto13" SID "570" Position [465, 556, 660, 574] ZOrder -10 ShowName off GotoTag "reg_Interval_EIFS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto19" SID "655" Position [460, 266, 660, 284] ZOrder -10 ShowName off GotoTag "reg_Tx_Start_A" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto2" SID "1020" Position [460, 786, 660, 804] ZOrder -10 ShowName off GotoTag "reg_Backoff_Sw_NumSlots" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto3" SID "2939" Position [460, 296, 660, 314] ZOrder -10 ShowName off GotoTag "reg_Tx_Start_B" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto33" SID "2564" Position [455, 966, 655, 984] ZOrder -10 ShowName off GotoTag "reg_NAV_Check_Addr_1" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto34" SID "2559" Position [455, 896, 655, 914] ZOrder -10 ShowName off GotoTag "reg_NAV_Check_Addr_2" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto4" SID "3498" Position [460, 326, 660, 344] ZOrder -10 ShowName off GotoTag "reg_Tx_Start_C" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto5" SID "3740" Position [455, 1041, 655, 1059] ZOrder -10 ShowName off GotoTag "reg_TU_TARGET_MSB" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto6" SID "4041" Position [460, 356, 660, 374] ZOrder -10 ShowName off GotoTag "reg_Tx_Start_D" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto7" SID "380" Position [465, 501, 660, 519] ZOrder -10 ShowName off GotoTag "reg_Interval_DIFS" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto8" SID "383" Position [465, 446, 660, 464] ZOrder -10 ShowName off GotoTag "reg_Interval_Slot" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Goto Name "Goto9" SID "385" Position [465, 606, 660, 624] ZOrder -10 ShowName off GotoTag "reg_Interval_ACK_Timeout" TagVisibility "global" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Logical" SID "2933" Ports [2, 1] Position [1125, 856, 1160, 894] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "OR" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "0" align_bp on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" sg_icon_stat "35,38,2,1,white,blue,0,7ede7d88,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 38 38 0 ],[0.77 0.82 0.91" " ]);\nplot([0 35 35 0 0 ],[0 0 38 38 0 ]);\npatch([5.875 13.1 18.1 23.1 28.1 18.1 10.875 5.875 ],[24.55 24.55 29.55" " 24.55 29.55 29.55 29.55 24.55 ],[1 1 1 ]);\npatch([10.875 18.1 13.1 5.875 10.875 ],[19.55 19.55 24.55 24.55 19.55 " "],[0.931 0.946 0.973 ]);\npatch([5.875 13.1 18.1 10.875 5.875 ],[14.55 14.55 19.55 19.55 14.55 ],[1 1 1 ]);\npatch(" "[10.875 28.1 23.1 18.1 13.1 5.875 10.875 ],[9.55 9.55 14.55 9.55 14.55 14.55 9.55 ],[0.931 0.946 0.973 ]);\nfprintf" "('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\ncolor('black');disp('or');\nfpri" "ntf('','COMMENT: end icon text');" } Block { BlockType SubSystem Name "Posedge3" SID "2028" Ports [1, 1] Position [1195, 866, 1240, 884] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" System { Name "Posedge3" Location [88, 301, 2330, 1301] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "D" SID "2029" Position [200, 253, 230, 267] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Block { BlockType Reference Name "Delay" SID "2030" Ports [1, 1] Position [425, 153, 460, 177] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flo" "p. If register retiming is enabled, the delay line is a chain of flip-flops." rst off infoeditControl "Selection of Reset will increase slice count due to use of real FFs and instead of SRLs" en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "VER_STRING_GOES_HERE" sg_icon_stat "35,24,1,1,white,blue,0,07b98262,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 0 ],[0 0 24 24 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 35 35 0 0 ],[0 0 24 24 0 ]);\npatch([10.325 14.66 17.66 20.66 23.66 17.66 13.325 10.325 ]" ",[15.33 15.33 18.33 15.33 18.33 18.33 18.33 15.33 ],[1 1 1 ]);\npatch([13.325 17.66 14.66 10.325 13.325 ],[12.3" "3 12.33 15.33 15.33 12.33 ],[0.931 0.946 0.973 ]);\npatch([10.325 14.66 17.66 13.325 10.325 ],[9.33 9.33 12.33 " "12.33 9.33 ],[1 1 1 ]);\npatch([13.325 23.66 20.66 17.66 14.66 10.325 13.325 ],[6.33 6.33 9.33 6.33 9.33 9.33 6" ".33 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text')" ";\n\n\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Inverter" SID "2031" Ports [1, 1] Position [490, 156, 515, 174] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Inverter" SourceType "Xilinx Inverter Block" infoedit "Bitwise logical negation (one's complement) operator." en off latency "0" dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "inv" block_version "VER_STRING_GOES_HERE" sg_icon_stat "25,18,1,1,white,blue,0,267846e5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 0 ],[0 0 18 18 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 25 25 0 0 ],[0 0 18 18 0 ]);\npatch([7.55 10.44 12.44 14.44 16.44 12.44 9.55 7.55 ],[11.2" "2 11.22 13.22 11.22 13.22 13.22 13.22 11.22 ],[1 1 1 ]);\npatch([9.55 12.44 10.44 7.55 9.55 ],[9.22 9.22 11.22 " "11.22 9.22 ],[0.931 0.946 0.973 ]);\npatch([7.55 10.44 12.44 9.55 7.55 ],[7.22 7.22 9.22 9.22 7.22 ],[1 1 1 ]);" "\npatch([9.55 16.44 14.44 12.44 10.44 7.55 9.55 ],[5.22 5.22 7.22 5.22 7.22 7.22 5.22 ],[0.931 0.946 0.973 ]);\n" "fprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\ncolor('black');disp('no" "t');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Logical1" SID "2032" Ports [2, 1] Position [540, 151, 585, 204] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Logical" SourceType "Xilinx Logical Block Block" logical_function "AND" inputs "2" en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" align_bp on dbl_ovrd off xl_use_area off xl_area "[1 0 0 1 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "logical" block_version "VER_STRING_GOES_HERE" sg_icon_stat "45,53,2,1,white,blue,0,83a4b621,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 0 ],[0 0 53 53 0 ],[0.77 0" ".82 0.91 ]);\nplot([0 45 45 0 0 ],[0 0 53 53 0 ]);\npatch([8.65 17.32 23.32 29.32 35.32 23.32 14.65 8.65 ],[32." "66 32.66 38.66 32.66 38.66 38.66 38.66 32.66 ],[1 1 1 ]);\npatch([14.65 23.32 17.32 8.65 14.65 ],[26.66 26.66 3" "2.66 32.66 26.66 ],[0.931 0.946 0.973 ]);\npatch([8.65 17.32 23.32 14.65 8.65 ],[20.66 20.66 26.66 26.66 20.66 " "],[1 1 1 ]);\npatch([14.65 35.32 29.32 23.32 17.32 8.65 14.65 ],[14.66 14.66 20.66 14.66 20.66 20.66 14.66 ],[0" ".931 0.946 0.973 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\n\n\n\n" "color('black');disp('and');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Outport Name "Q" SID "2033" Position [610, 173, 640, 187] IconDisplay "Port number" MaskIconFrame on MaskIconOpaque on MaskIconRotate "none" MaskPortRotate "default" MaskIconUnits "autoscale" } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Inverter" DstPort 1 } Line { SrcBlock "Inverter" SrcPort 1 DstBlock "Logical1" DstPort 1 } Line { SrcBlock "Logical1" SrcPort 1 DstBlock "Q" DstPort 1 } Line { SrcBlock "D" SrcPort 1 Points [150, 0; 0, -70] Branch { Points [0, -25] DstBlock "Delay" DstPort 1 } Branch { DstBlock "Logical1" DstPort 2 } } Annotation { Name "Rising Edge Detection" Position [500, 112] } } } Block { BlockType Reference Name "Register1" SID "2930" Ports [1, 1] Position [1300, 826, 1330, 854] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,28,1,1,white,blue,0,c80657c5,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 28 28 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 28 28 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[18.44 18.44 22.44 " "18.44 22.44 22.44 22.44 18.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[14.44 14.44 18.44 18.44 14.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[10.44 10.44 14.44 14.44 10.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[6.44 6.44 10.44 6.44 10.44 10.44 6.44 ],[0.931 0.946 0.973 ]);\nfprintf('','COMMEN" "T: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor(" "'black');port_label('output',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon " "text');" } Block { BlockType Reference Name "Register10" SID "1550" Ports [3, 1] Position [1335, 475, 1365, 565] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst on en on dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" sg_icon_stat "30,90,3,1,white,blue,0,30546de1,right,,[ ],[ ]" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 0 ],[0 0 90 90 0 ],[0.77 0.82 0.91" " ]);\nplot([0 30 30 0 0 ],[0 0 90 90 0 ]);\npatch([6.1 11.88 15.88 19.88 23.88 15.88 10.1 6.1 ],[49.44 49.44 53.44 " "49.44 53.44 53.44 53.44 49.44 ],[1 1 1 ]);\npatch([10.1 15.88 11.88 6.1 10.1 ],[45.44 45.44 49.44 49.44 45.44 ],[0." "931 0.946 0.973 ]);\npatch([6.1 11.88 15.88 10.1 6.1 ],[41.44 41.44 45.44 45.44 41.44 ],[1 1 1 ]);\npatch([10.1 23." "88 19.88 15.88 11.88 6.1 10.1 ],[37.44 37.44 41.44 37.44 41.44 41.44 37.44 ],[0.931 0.946 0.973 ]);\nfprintf('','CO" "MMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\nco" "lor('black');port_label('input',2,'rst');\ncolor('black');port_label('input',3,'en');\ncolor('black');port_label('o" "utput',1,'q');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');" } Block { BlockType Reference Name "Register11" SID "2931" Ports [1, 1] Position [1300, 861, 1330, 889] ShowName off LibraryVersion "1.2" SourceBlock "xbsIndex_r4/Register"