Model { Name "rate_change_filters_txrx_2ch" Version 7.1 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.44" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "windows-1252" SaveDefaultBlockParams on SampleTimeColors on LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes on ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowSignalResolutionIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off InitFcn "rate_change_filters_init" StartFcn "rate_change_filters_init" Created "Sat Aug 28 15:03:25 2010" Creator "Administrator" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "Administrator" ModifiedDateFormat "%" LastModifiedDate "Sat Apr 23 14:13:43 2011" RTWModifiedTimeStamp 0 ModelVersionFormat "1.%" ConfigurationManager "None" SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on CovModelRefEnable "Off" ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.4.0" Array { Type "Handle" Dimension 7 Simulink.SolverCC { $ObjectID 2 Version "1.4.0" StartTime "0.0" StopTime "1e3" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ZcThreshold "auto" ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" Solver "ode45" SolverName "ode45" ShapePreserveControl "DisableAll" ZeroCrossControl "UseLocalSettings" ZeroCrossAlgorithm "Non-adaptive" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" InsertRTBMode "Whenever possible" } Simulink.DataIOCC { $ObjectID 3 Version "1.4.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on InspectSignalLogs off SaveTime on StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" OutputOption "RefineOutputTimes" OutputTimes "[]" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Array { Type "Cell" Dimension 5 Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "InitFltsAndDblsToZero" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" PropName "DisabledProps" } Version "1.4.0" BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnhancedBackFolding off EnforceIntegerDowncast on ExpressionFolding on ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero on NoFixptDivByZeroProtection off EfficientFloat2IntCast off OptimizeModelRefInitCode off LifeSpan "inf" BufferReusableBoundary on SimCompilerOptimization "Off" AccelVerboseBuild off } Simulink.DebuggingCC { $ObjectID 5 Version "1.4.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" SignalRangeChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" SaveWithDisabledLinksMsg "warning" SaveWithParameterizedLinksMsg "warning" CheckSSInitialOutputMsg on CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" ModelReferenceSimTargetVerbose off UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" StrictBusMsg "Warning" LoggingUnavailableSignals "error" BlockIODiagnostic "none" } Simulink.HardwareCC { $ObjectID 6 Version "1.4.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.4.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" ModelReferenceNumInstancesAllowed "Multi" ModelReferenceSigSizeVariationType "Always allowed" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 8 Array { Type "Cell" Dimension 6 Cell "IncludeHyperlinkInReport" Cell "GenerateTraceInfo" Cell "GenerateTraceReport" Cell "GenerateTraceReportSl" Cell "GenerateTraceReportSf" Cell "GenerateTraceReportEml" PropName "DisabledProps" } Version "1.4.0" SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off GenerateTraceInfo off GenerateTraceReport off GenerateTraceReportSl off GenerateTraceReportSf off GenerateTraceReportEml off GenerateCodeInfo off RTWCompilerOptimization "Off" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 9 Array { Type "Cell" Dimension 16 Cell "IgnoreCustomStorageClasses" Cell "InsertBlockDesc" Cell "SFDataObjDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" PropName "DisabledProps" } Version "1.4.0" ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 10 Array { Type "Cell" Dimension 16 Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlCompliant" Cell "CPPClassGenCompliant" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportNonFinite" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" Cell "PortableWordSizes" PropName "DisabledProps" } Version "1.4.0" TargetFcnLib "ansi_tfl_table_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" TargetFunctionLibrary "ANSI_C" UtilityFuncGeneration "Auto" GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on CompOptLevelCompliant on IncludeMdlTerminateFcn on CombineOutputUpdateFcns off SuppressErrorStatus off ERTFirstTimeCompliant off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off AutosarCompliant off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { Orientation "right" ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on } BlockParameterDefaults { Block { BlockType Clock DisplayTime off } Block { BlockType From IconDisplay "Tag" TagVisibility "local" } Block { BlockType Gain Gain "1" Multiplication "Element-wise(K.*u)" ParamMin "[]" ParamMax "[]" ParameterDataTypeMode "Same as input" ParameterDataType "fixdt(1,16,0)" ParameterScalingMode "Best Precision: Matrix-wise" ParameterScaling "[]" ParamDataTypeStr "Inherit: Same as input" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Goto IconDisplay "Tag" } Block { BlockType Inport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchByCopyingInsideSignal off Interpolate on } Block { BlockType Outport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" SignalType "auto" SamplingMode "auto" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Product Inputs "2" Multiplication "Element-wise(.*)" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Scope ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "-1" } Block { BlockType "S-Function" FunctionName "system" SFunctionModules "''" PortCounts "[]" SFunctionDeploymentMode off } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off CheckFcnCallInpInsideContextMsg off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" } Block { BlockType Sum IconShape "rectangular" Inputs "++" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on AccumDataTypeStr "Inherit: Inherit via internal rule" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Terminator } Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutMin "[]" OutMax "[]" OutDataTypeMode "Inherit from 'Constant value'" OutDataType "fixdt(1,16,0)" ConRadixGroup "Use specified scaling" OutScaling "[]" OutDataTypeStr "Inherit: Inherit from 'Constant value'" SampleTime "inf" FramePeriod "inf" } Block { BlockType DiscretePulseGenerator PulseType "Sample based" TimeSource "Use simulation time" Amplitude "1" Period "2" PulseWidth "1" PhaseDelay "0" SampleTime "1" VectorParams1D on } Block { BlockType Trigonometry Operator "sin" OutputSignalType "auto" SampleTime "-1" } } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } System { Name "rate_change_filters_txrx_2ch" Location [2, 70, 1910, 1108] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "199" ReportName "simulink-default.rpt" Block { BlockType Reference Name " System Generator" Tag "genX" Ports [] Position [317, 185, 368, 235] ShowName off AttributesFormatString "System\\nGenerator" UserDataPersistent on UserData "DataTag0" SourceBlock "xbsIndex_r4/ System Generator" SourceType "Xilinx System Generator Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" infoedit " System Generator" xilinxfamily "virtex2p" part "xc2vp70" speed "-6" package "ff1517" synthesis_tool "XST" clock_wrapper "Clock Enables" directory "./filts_v2p_v05_fastGW" testbench off simulink_period "1/2" sysclk_period "10" dcm_input_clock_period "100" incr_netlist off trim_vbits "Everywhere in SubSystem" dbl_ovrd "According to Block Masks" core_generation "According to Block Masks" run_coregen off deprecated_control off eval_field "0" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "sysgen" block_version "10.1.3" sg_icon_stat "51,50,-1,-1,red,beige,0,07734,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 51 51 0 ],[0 0 50 50 ],[0.93 0.92 0.86]);\npatch([12 4 16 4 12 25 29 33 47 36 25 17 29 17 25 36 47 33 29 25 12 ],[5 13 25 37 45 45 41 45 45 34 45 37 25 13 5 16 5 5 9 5 5 ],[0.6 0.2 0.25]);\nplot([0 51 51 0 0 ],[0 0 50 50 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Control & Coefficients" Ports [] Position [98, 185, 149, 235] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Control & Coefficients" Location [1409, 355, 1687, 1110] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "1LSB" Ports [1, 1] Position [260, 513, 300, 527] SourceBlock "xbsIndex_r4/Slice" SourceType "Xilinx Bit Slice Extractor Block" infoedit "Extracts a given range of bits from each input sample and presents it at the output. The output type is ordinarily unsigned with binary point at zero, but can be Boolean when the slice is one bit wide.

Hardware notes: In hardware this block costs nothing." nbits "1" boolean_output on mode "Lower Bit Location + Width" bit1 "0" base1 "MSB of Input" bit0 "0" base0 "LSB of Input" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,449,376" block_type "slice" block_version "10.1.3" sg_icon_stat "40,14,1,1,white,blue,0,b1026674,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([22 17 24 17 22 30 32 34 42 35 29 24 30 24 29 35 42 34 32 30 22 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'[a:b]');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "2-bit\nCounter" Ports [1, 1] Position [395, 507, 445, 533] SourceBlock "xbsIndex_r4/Counter" SourceType "Xilinx Counter Block" infoedit "Hardware notes: Free running counters are the least expensive in hardware. A count limited counter is implemented by combining a counter with a comparator." cnt_type "Free Running" cnt_to "Inf" operation "Up" start_count "0" cnt_by_val "1" arith_type "Unsigned" n_bits "2" bin_pt "0" load_pin off rst on en off explicit_period "off" period "1" dbl_ovrd off use_behavioral_HDL off use_rpm on implementation "Fabric" xl_use_area off xl_area "[2 2 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,619" block_type "counter" block_version "9.1.01" sg_icon_stat "50,26,1,1,white,blue,0,300e9576,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black');port_label('output',1,'out');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Constant" Ports [0, 1] Position [615, 637, 640, 663] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Boolean" const "1" n_bits "16" bin_pt "14" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "10.1.3" sg_icon_stat "25,26,1,1,white,blue,0,06094819,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 25 25 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([6 2 8 2 6 13 15 17 24 18 13 9 14 9 13 18 24 17 15 13 6 ],[3 7 13 19 23 23 21 23 23 17 22 18 13 8 4 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 25 25 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'1');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert" Ports [1, 1] Position [610, 613, 650, 627] ShowName off SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." arith_type "Unsigned" n_bits "32" bin_pt "0" quantization "Truncate" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "40,14,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 40 40 0 ],[0 0 14 14 ],[0.77 0.82 0.91]);\npatch([16 14 17 14 16 20 21 22 26 23 20 18 21 18 20 23 26 22 21 20 16 ],[2 4 7 10 12 12 11 12 12 9 12 10 7 4 2 5 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 40 40 0 0 ],[0 0 14 14 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay" Ports [1, 1] Position [525, 400, 560, 420] SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "3" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[1 2 0 2 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "10.1.3" sg_icon_stat "35,20,1,1,white,blue,0,eabd56db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-3}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample" Ports [1, 1] Position [330, 503, 365, 537] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[1 1 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "35,34,1,1,white,blue,0,c153b99b,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 35 35 0 ],[0 0 34 34 ],[0.77 0.82 0.91]);\npatch([9 3 11 3 9 18 20 22 32 24 17 12 20 12 17 24 32 22 20 18 9 ],[4 10 18 26 32 32 30 32 32 24 31 26 18 10 5 12 4 4 6 4 4 ],[0.98 0.96 0.92]);\nplot([0 35 35 0 0 ],[0 0 34 34 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downarrow}2\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "From Register" Ports [0, 1] Position [135, 492, 195, 548] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'FilterOptions'" init "0" period "1/2" ownership "Locally owned and initialized" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,234" block_type "fromreg" block_version "10.1.3" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Goto Name "Goto1" Position [635, 510, 735, 530] ShowName off GotoTag "CoefAddr" TagVisibility "global" } Block { BlockType SubSystem Name "Rx Coefficients" Ports [1] Position [660, 456, 730, 484] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Rx Coefficients" Location [457, 111, 807, 885] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Addr" Position [25, 735, 55, 750] Orientation "up" IconDisplay "Port number" } Block { BlockType Goto Name "Goto" Position [225, 705, 325, 725] ShowName off GotoTag "ROM_0" TagVisibility "global" } Block { BlockType Goto Name "Goto1" Position [225, 660, 325, 680] ShowName off GotoTag "ROM_1" TagVisibility "global" } Block { BlockType Goto Name "Goto10" Position [225, 255, 325, 275] ShowName off GotoTag "ROM_10" TagVisibility "global" } Block { BlockType Goto Name "Goto11" Position [225, 210, 325, 230] ShowName off GotoTag "ROM_11" TagVisibility "global" } Block { BlockType Goto Name "Goto12" Position [225, 165, 325, 185] ShowName off GotoTag "ROM_12" TagVisibility "global" } Block { BlockType Goto Name "Goto13" Position [225, 120, 325, 140] ShowName off GotoTag "ROM_13" TagVisibility "global" } Block { BlockType Goto Name "Goto14" Position [225, 75, 325, 95] ShowName off GotoTag "ROM_14" TagVisibility "global" } Block { BlockType Goto Name "Goto15" Position [225, 30, 325, 50] ShowName off GotoTag "ROM_15" TagVisibility "global" } Block { BlockType Goto Name "Goto2" Position [225, 615, 325, 635] ShowName off GotoTag "ROM_2" TagVisibility "global" } Block { BlockType Goto Name "Goto3" Position [225, 570, 325, 590] ShowName off GotoTag "ROM_3" TagVisibility "global" } Block { BlockType Goto Name "Goto4" Position [225, 525, 325, 545] ShowName off GotoTag "ROM_4" TagVisibility "global" } Block { BlockType Goto Name "Goto5" Position [225, 480, 325, 500] ShowName off GotoTag "ROM_5" TagVisibility "global" } Block { BlockType Goto Name "Goto6" Position [225, 435, 325, 455] ShowName off GotoTag "ROM_6" TagVisibility "global" } Block { BlockType Goto Name "Goto7" Position [225, 390, 325, 410] ShowName off GotoTag "ROM_7" TagVisibility "global" } Block { BlockType Goto Name "Goto8" Position [225, 345, 325, 365] ShowName off GotoTag "ROM_8" TagVisibility "global" } Block { BlockType Goto Name "Goto9" Position [225, 300, 325, 320] ShowName off GotoTag "ROM_9" TagVisibility "global" } Block { BlockType Reference Name "ROM 0" Ports [1, 1] Position [100, 701, 150, 729] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+0)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 1" Ports [1, 1] Position [100, 656, 150, 684] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+4)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 10" Ports [1, 1] Position [100, 251, 150, 279] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+40)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 11" Ports [1, 1] Position [100, 206, 150, 234] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+44)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 12" Ports [1, 1] Position [100, 161, 150, 189] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+48)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 13" Ports [1, 1] Position [100, 116, 150, 144] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+52)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 14" Ports [1, 1] Position [100, 71, 150, 99] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+56)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 15" Ports [1, 1] Position [100, 26, 150, 54] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+60)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 2" Ports [1, 1] Position [100, 611, 150, 639] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+8)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 3" Ports [1, 1] Position [100, 566, 150, 594] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+12)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 4" Ports [1, 1] Position [100, 521, 150, 549] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+16)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 5" Ports [1, 1] Position [100, 476, 150, 504] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+20)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 6" Ports [1, 1] Position [100, 431, 150, 459] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+24)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 7" Ports [1, 1] Position [100, 386, 150, 414] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+28)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 16 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 8" Ports [1, 1] Position [100, 341, 150, 369] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+32)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 16 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 9" Ports [1, 1] Position [100, 296, 150, 324] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h64_rs([1:4]+36)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Line { SrcBlock "Addr" SrcPort 1 Points [0, -15] Branch { DstBlock "ROM 0" DstPort 1 } Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { Points [0, -45] Branch { DstBlock "ROM 14" DstPort 1 } Branch { Points [0, -45] DstBlock "ROM 15" DstPort 1 } } Branch { DstBlock "ROM 13" DstPort 1 } } Branch { DstBlock "ROM 12" DstPort 1 } } Branch { DstBlock "ROM 11" DstPort 1 } } Branch { DstBlock "ROM 10" DstPort 1 } } Branch { DstBlock "ROM 9" DstPort 1 } } Branch { DstBlock "ROM 8" DstPort 1 } } Branch { DstBlock "ROM 7" DstPort 1 } } Branch { DstBlock "ROM 6" DstPort 1 } } Branch { DstBlock "ROM 5" DstPort 1 } } Branch { DstBlock "ROM 4" DstPort 1 } } Branch { DstBlock "ROM 3" DstPort 1 } } Branch { DstBlock "ROM 2" DstPort 1 } } Branch { DstBlock "ROM 1" DstPort 1 } } } Line { SrcBlock "ROM 15" SrcPort 1 DstBlock "Goto15" DstPort 1 } Line { SrcBlock "ROM 14" SrcPort 1 DstBlock "Goto14" DstPort 1 } Line { SrcBlock "ROM 13" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "ROM 12" SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "ROM 11" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "ROM 10" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "ROM 9" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "ROM 8" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "ROM 7" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "ROM 6" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "ROM 5" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "ROM 4" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "ROM 3" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "ROM 2" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "ROM 1" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "ROM 0" SrcPort 1 DstBlock "Goto" DstPort 1 } } } Block { BlockType Terminator Name "Terminator" Position [875, 625, 895, 645] ShowName off } Block { BlockType Reference Name "To Register" Ports [2, 1] Position [760, 607, 820, 663] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'CoefCounter'" init "0" ownership "Locally owned and initialized" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,381,266" block_type "toreg" block_version "10.1.3" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Tx Coefficients" Ports [1] Position [660, 396, 730, 424] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Tx Coefficients" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Addr" Position [25, 735, 55, 750] Orientation "up" IconDisplay "Port number" } Block { BlockType Goto Name "Goto" Position [225, 705, 325, 725] ShowName off GotoTag "TX_ROM_0" TagVisibility "global" } Block { BlockType Goto Name "Goto1" Position [225, 660, 325, 680] ShowName off GotoTag "TX_ROM_1" TagVisibility "global" } Block { BlockType Goto Name "Goto2" Position [225, 615, 325, 635] ShowName off GotoTag "TX_ROM_2" TagVisibility "global" } Block { BlockType Goto Name "Goto3" Position [225, 570, 325, 590] ShowName off GotoTag "TX_ROM_3" TagVisibility "global" } Block { BlockType Goto Name "Goto4" Position [225, 525, 325, 545] ShowName off GotoTag "TX_ROM_4" TagVisibility "global" } Block { BlockType Goto Name "Goto5" Position [225, 480, 325, 500] ShowName off GotoTag "TX_ROM_5" TagVisibility "global" } Block { BlockType Goto Name "Goto6" Position [225, 435, 325, 455] ShowName off GotoTag "TX_ROM_6" TagVisibility "global" } Block { BlockType Goto Name "Goto7" Position [225, 390, 325, 410] ShowName off GotoTag "TX_ROM_7" TagVisibility "global" } Block { BlockType Reference Name "ROM 0" Ports [1, 1] Position [100, 701, 150, 729] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h32_rs([1:4]+0)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 1" Ports [1, 1] Position [100, 656, 150, 684] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h32_rs([1:4]+4)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 2" Ports [1, 1] Position [100, 611, 150, 639] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h32_rs([1:4]+8)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 3" Ports [1, 1] Position [100, 566, 150, 594] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h32_rs([1:4]+12)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 16 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 4" Ports [1, 1] Position [100, 521, 150, 549] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h32_rs([1:4]+16)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 16 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 5" Ports [1, 1] Position [100, 476, 150, 504] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h32_rs([1:4]+20)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 17 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 6" Ports [1, 1] Position [100, 431, 150, 459] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h32_rs([1:4]+24)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ROM 7" Ports [1, 1] Position [100, 386, 150, 414] SourceBlock "xbsIndex_r4/ROM" SourceType "Xilinx Single Port Read-Only Memory Block" depth "4" initVector "h32_rs([1:4]+28)" distributed_mem "Distributed memory" rst off init_reg "0" en off latency "1" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" dbl_ovrd off optimize "Area" use_rpm off xl_use_area off xl_area "[9 18 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,308" block_type "sprom" block_version "9.1.01" sg_icon_stat "50,28,1,1,white,blue,0,a8b86474,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Line { SrcBlock "ROM 0" SrcPort 1 DstBlock "Goto" DstPort 1 } Line { SrcBlock "ROM 1" SrcPort 1 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "ROM 2" SrcPort 1 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "ROM 3" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "ROM 4" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "ROM 5" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "ROM 6" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "ROM 7" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "Addr" SrcPort 1 Points [0, -15] Branch { Points [0, -45] Branch { DstBlock "ROM 1" DstPort 1 } Branch { Points [0, -45] Branch { DstBlock "ROM 2" DstPort 1 } Branch { Points [0, -45] Branch { DstBlock "ROM 3" DstPort 1 } Branch { Points [0, -45] Branch { DstBlock "ROM 4" DstPort 1 } Branch { Points [0, -45] Branch { DstBlock "ROM 5" DstPort 1 } Branch { Points [0, -45] Branch { DstBlock "ROM 6" DstPort 1 } Branch { Points [0, -45] DstBlock "ROM 7" DstPort 1 } } } } } } } Branch { DstBlock "ROM 0" DstPort 1 } } } } Block { BlockType Reference Name "Up Sample1" Ports [1, 1] Position [520, 609, 540, 631] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "2" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,22,1,1,white,blue,0,1c669c00,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 ],[0 0 22 22 ],[0.77 0.82 0.91]);\npatch([4 1 6 1 4 9 10 11 17 13 9 6 11 6 9 13 17 11 10 9 4 ],[3 6 11 16 19 19 18 19 19 15 19 16 11 6 3 7 3 3 4 3 3 ],[0.98 0.96 0.92]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Line { SrcBlock "From Register" SrcPort 1 DstBlock "1LSB" DstPort 1 } Line { SrcBlock "1LSB" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "2-bit\nCounter" SrcPort 1 Points [35, 0] Branch { Labels [0, 0] Points [0, -50] Branch { DstBlock "Rx Coefficients" DstPort 1 } Branch { Points [0, -60] DstBlock "Delay" DstPort 1 } } Branch { DstBlock "Goto1" DstPort 1 } Branch { Points [0, 100] DstBlock "Up Sample1" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 DstBlock "Tx Coefficients" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "2-bit\nCounter" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "To Register" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "To Register" DstPort 2 } Line { SrcBlock "To Register" SrcPort 1 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Convert" DstPort 1 } } } Block { BlockType SubSystem Name "EDK Processor" Ports [] Position [206, 188, 254, 235] CopyFcn "xlProcBlockCopyCallback(gcbh);xlBlockMoveCallback(gcbh);" DeleteFcn "xlDestroyGui(gcbh);" LoadFcn "xlBlockLoadCallback(gcbh);" ModelCloseFcn "xlDestroyGui(gcbh);" PreSaveFcn "xlBlockPreSaveCallback(gcbh);" PostSaveFcn "xlBlockPostSaveCallback(gcbh);" DestroyFcn "xlDestroyGui(gcbh);" OpenFcn "bh=gcbh;xlProcBlockCallbacks('populatesharedmemorylistbox',bh);xlOpenGui(bh, 'edkprocessor_gui.xml', @xlProcBlockEnablement, @xlProcBlockAction)" CloseFcn "xlDestroyGui(gcbh);" MoveFcn "xlBlockMoveCallback(gcbh);" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off MaskType "Xilinx EDK Processor Block" MaskDescription "Xilinx EDK Processor" MaskHelp "eval('');xlDoc('-book','sysgen','-topic','EDK_Processor');" MaskPromptString "Configure Processor for|EDK Project| |Available Memories| | |Bus Type|Base Address| |Lock| |Dual Clocks| |Register Read-Back|Constraint file| |Inherit Device Type| | | | | | | | | | | | | | | | " MaskStyleString "popup(EDK pcore generation|HDL netlisting),edit,edit,popup(),edit,edit,popup(PLB|FSL),edit,edit,checkbox,edit,checkbox,edit,checkbox,edit,edit,checkbox,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit,edit" MaskTunableValueString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on" MaskCallbackString "||||||||||||||||||||||||||||||||" MaskEnableString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on" MaskVisibilityString "on,on,off,on,on,off,on,on,off,on,off,on,off,on,on,off,on,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off,off" MaskToolTipString "on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on,on" MaskVarAliasString ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," MaskVariables "mode=&1;xmp=&2;MemVisToProc=&3;AvailableMemories=&4;portInterfaceTable=&5;bus_type_sgadvanced=&6;bus_type=@7;baseaddr=&8;baseaddr_lock_sgadvanced=&9;baseaddr_lock=@10;dual_clock_sgadvanced=&11;dual_clock=@12;reg_readback_sgadvanced=&13;reg_readback=@14;ucf_file=&15;inheritDeviceType_sgadvanced=&16;inheritDeviceType=@17;clock_name=&18;internalPortList=&19;resetPolarity=&20;memxtable=&21;procinfo=&22;memmapdirty=&23;blockname=&24;xpsintstyle=&25;has_advanced_control=@26;sggui_pos=&27;block_type=&28;block_version=&29;sg_icon_stat=&30;sg_mask_display=&31;sg_list_contents=&32;sg_blockgui_xml=&33;" MaskInitialization "try\n tmp_gcb = gcb;\n tmp_gcbh = gcbh;\n if (strcmp('SysGenIndex',get_param(bdroot(tmp_gcbh),'tag')) && ~isempty(regexp(bdroot(tmp_gcb), '^xbs', 'once')))\n return;\n end;\n xlMungeMaskParams;\n\nblock_type='edkprocessor';\n serialized_declarations = '{,''block_type''=>''String''}';\n xledkprocessor_init();\n ptable_ = xlblockprep(get_param(tmp_gcb, 'MaskWSVariables'));\ncatch\n global dbgsysgen;\n if(~isempty(dbgsysgen) && dbgsysgen)\n e = regexprep(lasterr, '\\n', '\\nError: ');\n disp(['Error: While running MaskInit code on block ' tmp_gcb ': ' e]);\n error(e);\n end\nend\n" MaskDisplay "fprintf('','COMMENT: begin icon graphics');\npatch([0 48 48 0 ],[0 0 47 47 ],[0.77 0.82 0.91]);\npatch([12 4 15 4 12 24 27 30 43 32 22 15 26 15 22 32 43 30 27 24 12 ],[5 13 24 35 43 43 40 43 43 32 42 35 24 13 6 16 5 5 8 5 5 ],[0.98 0.96 0.92]);\nplot([0 48 48 0 0 ],[0 0 47 47 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ndisp('');\n\nfprintf('','COMMENT: end icon text');\n" MaskSelfModifiable on MaskIconFrame off MaskIconOpaque on MaskIconRotate "none" MaskIconUnits "autoscale" MaskValueString "EDK pcore generation||

<<CoefCounter>>
<<FilterOptions>>
||{'exposed'=>[],'portdir'=>[],'portname'=>[],'shortname'=>[]}||PLB|0x80000000||off||off||off|||off|plb|{}|0|{'mlist'=>['rate_change_filters_txrx_2ch/Control & Coefficients/To Register','rate_change_filters_txrx_2ch/Control & Coefficients/From Register'],'mlname'=>['\\'CoefCounter\\'','\\'FilterOptions\\''],'mlstate'=>[0.00000000000000000,0.00000000000000000]}|{'xmliface'=>'Xilinx//microblaze//iface.xml'}|off||default|0|20,20,383,441|edkprocessor|2.5|48,47,-1,-1,white,blue,0,07734,right|fprintf('','COMMENT: begin icon graphics');\npatch([0 48 48 0 ],[0 0 47 47 ],[0.77 0.82 0.91]);\npatch([12 4 15 4 12 24 27 30 43 32 22 15 26 15 22 32 43 30 27 24 12 ],[5 13 24 35 43 43 40 43 43 32 42 35 24 13 6 16 5 5 8 5 5 ],[0.98 0.96 0.92]);\nplot([0 48 48 0 0 ],[0 0 47 47 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n|{'table'=>{'AvailableMemories'=>'popup()','userSelections'=>{'AvailableMemories'=>''}}}|" MaskTabNameString ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," System { Name "EDK Processor" Location [514, 91, 900, 269] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Constant Name "Constant" Position [40, 100, 60, 120] } Block { BlockType Constant Name "Constant1" Position [40, 160, 60, 180] } Block { BlockType Constant Name "Constant2" Position [40, 220, 60, 240] } Block { BlockType Constant Name "Constant3" Position [40, 280, 60, 300] } Block { BlockType Constant Name "Constant4" Position [40, 335, 60, 355] } Block { BlockType Reference Name "Constant5" Ports [0, 1] Position [20, 32, 75, 58] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Unsigned" const "0" n_bits "1" bin_pt "0" explicit_period on period "xlGetSimulinkPeriod(gcb)" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "constant" block_version "10.1.3" sg_icon_stat "55,26,1,1,white,blue,0,72d575a1,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'0');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "Sl_wait" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Constant Name "Constant6" Position [40, 455, 60, 475] } Block { BlockType Reference Name "From Register" Ports [0, 1] Position [260, 522, 320, 578] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/From Register" SourceType "Xilinx Shared Memory Based From Register Block" infoedit "Register block that reads data to a shared memory register. Delay of one sample period." shared_memory_name "'CoefCounter'" init "0" period "xlGetSimulinkPeriod(gcb)" ownership "Owned and initialized elsewhere" arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "fromreg" block_version "10.1.3" sg_icon_stat "60,56,1,1,white,blue,0,4b212927,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "CoefCounter_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_ABus" Ports [1, 1] Position [110, 160, 175, 180] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "32" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 32 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_ABus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "PLB_ABus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_PAValid" Ports [1, 1] Position [110, 220, 175, 240] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "1" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_PAValid'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "PLB_PAValid" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_RNW" Ports [1, 1] Position [110, 280, 175, 300] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "1" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_RNW'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "PLB_RNW" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "PLB_wrDBus" Ports [1, 1] Position [110, 335, 175, 355] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "32" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 32 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'PLB_wrDBus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "PLB_wrDBus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "SPLB_Rst" Ports [1, 1] Position [110, 100, 175, 120] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "1" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'SPLB_Rst'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "SPLB_Rst" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "Sl_addrAck" Ports [1, 1] Position [460, 85, 520, 105] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_addrAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_rdComp" Ports [1, 1] Position [460, 135, 520, 155] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdComp'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_rdDAck" Ports [1, 1] Position [460, 560, 520, 580] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdDAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_rdDBus" Ports [1, 1] Position [460, 610, 520, 630] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 32 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_rdDBus'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_wait" Ports [1, 1] Position [110, 30, 170, 50] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wait'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_wrComp" Ports [1, 1] Position [460, 230, 520, 250] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wrComp'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Sl_wrDAck" Ports [1, 1] Position [460, 185, 520, 205] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 1 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'Sl_wrDAck'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayout" block_version "10.1.3" sg_icon_stat "60,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([24 21 26 21 24 29 30 31 37 33 29 26 31 26 29 33 37 31 30 29 24 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Terminator Name "Terminator" Position [630, 85, 650, 105] ShowName off } Block { BlockType Terminator Name "Terminator1" Position [630, 135, 650, 155] ShowName off } Block { BlockType Terminator Name "Terminator2" Position [630, 560, 650, 580] ShowName off } Block { BlockType Terminator Name "Terminator3" Position [630, 610, 650, 630] ShowName off } Block { BlockType Terminator Name "Terminator4" Position [280, 30, 300, 50] ShowName off } Block { BlockType Terminator Name "Terminator5" Position [630, 185, 650, 205] ShowName off } Block { BlockType Terminator Name "Terminator6" Position [630, 230, 650, 250] ShowName off } Block { BlockType Terminator Name "Terminator7" Position [700, 440, 720, 460] ShowName off } Block { BlockType Reference Name "To Register" Ports [2, 1] Position [610, 422, 670, 478] AttributesFormatString "<< % >>" SourceBlock "xbsIndex_r4/To Register" SourceType "Xilinx Shared Memory Based To Register Block" infoedit "Register block that writes data to a shared memory register. Delay of one sample period." shared_memory_name "'FilterOptions'" init "0" ownership "Owned and initialized elsewhere" explicit_data_type on arith_type "Unsigned" n_bits "32" bin_pt "0" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "toreg" block_version "10.1.3" sg_icon_stat "60,56,1,1,white,blue,0,77cabcdf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'dout');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "FilterOptions_dout" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "plb_decode" Ports [7, 9] Position [205, 84, 375, 496] SourceBlock "xbsIndex_r4/MCode" SourceType "Xilinx MCode Block Block" infoedit "Pass input values to a MATLAB function for evaluation in Xilinx fixed-point type. The input ports of the block are input arguments of the function. The output ports of the block are output arguments of the function." mfname "xlmax" explicit_period off period "1" dbl_ovrd off enable_stdout off enable_debug off xl_use_area off xl_area "[0,0,0,0,0,0,0]" mfilecontent "function [wrDBusReg, addrAck, rdComp, wrDAck, bankAddr, RNWReg, rdDAck, rdDBus, linearAddr] = ...\n plb_bus_decode(plbRst, plbABus, plbPAValid, plbRNW, plbWrDBus, rdData, addrPref)\n\n% constant variables (TODO: should pass from outside)\nADDRPREF_LEN = 20;\nBANKADDR_LEN = 2;\nLINEARADDR_LEN = 8;\nABUS_LEN = 32;\nDBUS_LEN = 32;\n\n% declare and initialize persistent variables\n% register input bus signals\npersistent plbRstReg_, plbRstReg_ = xl_state(0, {xlBoolean});\npersistent plbABusReg_, plbABusReg_ = xl_state(0, {xlUnsigned, ABUS_LEN, 0});\npersistent plbPAValidReg_, plbPAValidReg_ = xl_state(0, {xlBoolean});\npersistent plbRNWReg_, plbRNWReg_ = xl_state(0, {xlUnsigned, 1, 0});\npersistent plbWrDBusReg_, plbWrDBusReg_ = xl_state(0, {xlUnsigned, DBUS_LEN, 0});\n\n% ===== rest of the outputs =====\n\nbankAddr = xl_slice(plbABusReg_, 2+BANKADDR_LEN+LINEARADDR_LEN-1, 2+LINEARADDR_LEN);\nlinearAddr = xl_slice(plbABusReg_, 2+LINEARADDR_LEN-1, 2);\nRNWReg = plbRNWReg_;\nwrDBusReg = plbWrDBusReg_;\n\n% ===== p_select =====\n\n% register PAValid\npersistent aValidReg, aValidReg = xl_state(0, {xlBoolean});\naValidReg = plbPAValidReg_;\n\n% extract and register the address prefix\naddrPref_in = xl_slice(plbABusReg_, xl_nbits(plbABusReg_)-1, xl_nbits(plbABusReg_)-ADDRPREF_LEN);\nif addrPref_in == addrPref\n ps1 = true;\nelse \n ps1 = false;\nend \n\npersistent ps1Reg, ps1Reg = xl_state(0, ps1);\nps1Reg = ps1;\n\nps = xl_and(ps1Reg, aValidReg);\n\n% ===== addrAck =====\n\n% register ps\npersistent psReg, psReg = xl_state(0, ps);\n\naddrAck = xfix({xlUnsigned, 1, 0}, xl_and(xl_not(plbRstReg_), ps, xl_not(psReg)));\n\npsReg = ps;\n\n% ===== rdComp, rd/wr DAck =====\n \nrdComp1 = xfix({xlUnsigned, 1, 0}, xl_and(addrAck, RNWReg));\n\nNUM_rdCompDelay = 3;\npersistent rdCompDelay, rdCompDelay = xl_state(zeros(1, NUM_rdCompDelay), rdComp1, NUM_rdCompDelay);\nrdComp2 = rdCompDelay.back;\nrdCompDelay.push_front_pop_back(rdComp1);\n\npersistent rdCompReg, rdCompReg = xl_state(0, rdComp1);\nrdComp = rdCompReg;\nrdCompReg = rdComp2;\n\npersistent rdDAckReg, rdDAckReg = xl_state(0, rdComp1);\nrdDAck = rdDAckReg;\nrdDAckReg = rdComp;\n\npersistent wrDAckReg, wrDAckReg = xl_state(0, addrAck);\nwrDAck = wrDAckReg;\nwrDAckReg = xl_and(addrAck, xl_not(RNWReg));\n\n% ===== rdDBus =====\n\nrdSel = xl_or(rdComp2, rdComp);\n\nif rdSel == 1\n rdDBus1 = rdData;\nelse\n rdDBus1 = 0;\nend % if\n\npersistent rdDBusReg, rdDBusReg = xl_state(0, rdDBus1);\nrdDBus = rdDBusReg;\nrdDBusReg = rdDBus1;\n\n% rdDBus = xl_concat(rdDBus32, rdDBus32);\n% rdDBus = rdDBus32;\n\n% ===== update the persistent variables =====\n\nplbRstReg_ = plbRst;\nplbABusReg_ = plbABus;\nplbPAValidReg_ = plbPAValid;\nplbRNWReg_ = plbRNW;\nplbWrDBusReg_ = xl_slice(plbWrDBus, DBUS_LEN-1, 0);\n" suppress_output "1" defparams "{}" hide_port_list "{}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mcode" block_version "10.1.3" sg_icon_stat "170,412,1,1,white,blue,0,8b15b975,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 170 170 0 ],[0 0 412 412 ],[0.77 0.82 0.91]);\npatch([40 12 52 12 40 85 97 109 157 119 83 57 97 57 83 119 157 109 97 85 40 ],[139 167 207 247 275 275 263 275 275 237 273 247 207 167 141 177 139 139 151 139 139 ],[0.98 0.96 0.92]);\nplot([0 170 170 0 0 ],[0 0 412 412 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'plbRst');\ncolor('black');port_label('input',2,'plbABus');\ncolor('black');port_label('input',3,'plbPAValid');\ncolor('black');port_label('input',4,'plbRNW');\ncolor('black');port_label('input',5,'plbWrDBus');\ncolor('black');port_label('input',6,'rdData');\ncolor('black');port_label('input',7,'addrPref');\ncolor('black');port_label('output',1,'wrDBusReg');\ncolor('black');port_label('output',2,'addrAck');\ncolor('black');port_label('output',3,'rdComp');\ncolor('black');port_label('output',4,'wrDAck');\ncolor('black');port_label('output',5,'bankAddr');\ncolor('black');port_label('output',6,'RNWReg');\ncolor('black');port_label('output',7,'rdDAck');\ncolor('black');port_label('output',8,'rdDBus');\ncolor('black');port_label('output',9,'linearAddr');\ncolor('black');disp('\\bf{xlmax}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "wrDBusReg" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "Sl_addrAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "Sl_rdComp" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 4 Name "Sl_wrDAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 5 Name "bankAddr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 6 Name "RNWReg" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 7 Name "Sl_rdDAck" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 8 Name "Sl_rdDBus" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 9 Name "linearAddr" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "plb_memmap" Ports [6, 3] Position [405, 280, 575, 530] SourceBlock "xbsIndex_r4/MCode" SourceType "Xilinx MCode Block Block" infoedit "Pass input values to a MATLAB function for evaluation in Xilinx fixed-point type. The input ports of the block are input arguments of the function. The output ports of the block are output arguments of the function." mfname "xlmax" explicit_period off period "1" dbl_ovrd off enable_stdout off enable_debug off xl_use_area off xl_area "[0,0,0,0,0,0,0]" mfilecontent "function [read_bank_out, sm_FilterOptions_din, sm_FilterOptions_en] = plb_memmap(wrDBus, bankAddr, linearAddr, RNWReg, addrAck, sm_CoefCounter)\n\n\n% connvert the input data to UFix_32_0 (the bus data type)\n% 'From Register' blocks\n% sm_CoefCounter_bus = xfix({xlUnsigned, 32, 0}, 0);\nsm_CoefCounter_bus = xl_force(sm_CoefCounter, xlUnsigned, 0);\n\n% 'To Register' blocks\n\n% 'From FIFO' blocks\n% 'To FIFO' blocks\n% 'Shared Memory' blocks\n\n% 'dout' ports of 'From Register' blocks\n\n% registered register mux output\npersistent reg_bank_out_reg; reg_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nreg_bank_out = reg_bank_out_reg;\n\n% direct connection if there is one 'From Reg' but no 'To Reg'\nreg_bank_out_reg = sm_CoefCounter_bus;\n\n% 'From FIFO' and 'To FIFO' blocks\n\n\n\n\n\nopCode = xl_concat(addrAck, RNWReg, bankAddr, linearAddr);\n\n% 'Shared Memory' blocks\n\n\n\n\n\n% 'din' ports of 'Shared Memory' blocks\n\n\n% 'we' ports of 'Shared Memory' blocks\n\n\n% 'addr' ports of 'Shared Memory' blocks\n\n\n% 're' ports of 'From FIFO' blocks\n\n\n% 'en' ports of 'To Register' blocks\nif opCode == xl_concat(xfix({xlUnsigned, 4, 0}, 10), ...\n xfix({xlUnsigned, xl_nbits(linearAddr), 0}, 0))\n sm_FilterOptions_en = true;\nelse\n sm_FilterOptions_en = false;\nend\n\n\n% 'din' ports of 'To FIFO' blocks\n\n\n% 'we' ports of 'To FIFO' blocks\n\n\n% 'din' ports of 'To Register' blocks\nsm_FilterOptions_din = xl_force(xl_slice(wrDBus, 32 - 1, 0), ...\n xlUnsigned, ...\n 0);\n\n\npersistent read_bank_out_reg; read_bank_out_reg = xl_state(0, {xlUnsigned, 32, 0});\nread_bank_out = read_bank_out_reg;\n\npersistent bankAddr_reg; bankAddr_reg = xl_state(0, bankAddr);\n\nif bankAddr_reg == 0\n % Bank 0: Shared Memories\n read_bank_out_reg = 0;\nelseif bankAddr_reg == 1\n % Bank 1: From/To FIFOs\n read_bank_out_reg = 0;\nelseif bankAddr_reg == 2\n % Bank 2: From/To Registers\n read_bank_out_reg = reg_bank_out;\nelseif bankAddr_reg == 3\n % Bank 3: Configuration Registers\n read_bank_out_reg = 0;\nend\n\nbankAddr_reg = bankAddr;\n" suppress_output "1" defparams "{}" hide_port_list "{}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "mcode" block_version "10.1.3" sg_icon_stat "170,250,1,1,white,blue,0,dfbeca5a,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 170 170 0 ],[0 0 250 250 ],[0.77 0.82 0.91]);\npatch([40 12 52 12 40 85 97 109 157 119 83 57 97 57 83 119 157 109 97 85 40 ],[58 86 126 166 194 194 182 194 194 156 192 166 126 86 60 96 58 58 70 58 58 ],[0.98 0.96 0.92]);\nplot([0 170 170 0 0 ],[0 0 250 250 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'wrDBus');\ncolor('black');port_label('input',2,'bankAddr');\ncolor('black');port_label('input',3,'linearAddr');\ncolor('black');port_label('input',4,'RNWReg');\ncolor('black');port_label('input',5,'addrAck');\ncolor('black');port_label('input',6,'sm_CoefCounter');\ncolor('black');port_label('output',1,'read_bank_out');\ncolor('black');port_label('output',2,'sm_FilterOptions_din');\ncolor('black');port_label('output',3,'sm_FilterOptions_en');\ncolor('black');disp('\\bf{xlmax}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "rdData" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "FilterOptions_din" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "FilterOptions_en" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType Reference Name "sg_plb_addrpref" Ports [1, 1] Position [110, 455, 175, 475] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Unsigned" n_bits "20" bin_pt "0" quantization "Round (unbiased: +/- Inf)" overflow "Saturate" period "xlGetSimulinkPeriod(gcb)" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 20 0 0]" sginterface "{'Xilinx'=>{'jtaghwcosim'=>{'non_memory_mapped_port'=>'sg_plb_addrpref'}},'iopad'=>{'constraint'=>'#'}}" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "gatewayin" block_version "10.1.3" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" Port { PortNumber 1 Name "addrPref" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Line { Name "Sl_addrAck" SrcBlock "plb_decode" SrcPort 2 Points [0, 0] Branch { Labels [1, 0] Points [5, 0; 0, 310] DstBlock "plb_memmap" DstPort 5 } Branch { Labels [0, 0] Points [30, 0; 0, -60] DstBlock "Sl_addrAck" DstPort 1 } } Line { Name "Sl_wrDAck" SrcBlock "plb_decode" SrcPort 4 Points [0, 0] Branch { Labels [1, 0] Points [30, 0; 0, -50] DstBlock "Sl_wrDAck" DstPort 1 } Branch { Labels [0, 0] Points [30, 0; 0, -5] DstBlock "Sl_wrComp" DstPort 1 } } Line { Name "FilterOptions_en" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 3 Points [15, 0] DstBlock "To Register" DstPort 2 } Line { Name "FilterOptions_din" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 2 Points [15, 0] DstBlock "To Register" DstPort 1 } Line { Name "rdData" Labels [0, 0] SrcBlock "plb_memmap" SrcPort 1 Points [5, 0; 0, 215; -260, 0; 0, -30; -140, 0; 0, -95] DstBlock "plb_decode" DstPort 6 } Line { Name "CoefCounter_dout" Labels [0, 0] SrcBlock "From Register" SrcPort 1 Points [65, 0] DstBlock "plb_memmap" DstPort 6 } Line { Name "RNWReg" Labels [0, 0] SrcBlock "plb_decode" SrcPort 6 Points [5, 0; 0, 90] DstBlock "plb_memmap" DstPort 4 } Line { Name "linearAddr" Labels [0, 0] SrcBlock "plb_decode" SrcPort 9 Points [5, 0; 0, -85] DstBlock "plb_memmap" DstPort 3 } Line { Name "bankAddr" Labels [0, 0] SrcBlock "plb_decode" SrcPort 5 Points [5, 0; 0, 55] DstBlock "plb_memmap" DstPort 2 } Line { Name "wrDBusReg" Labels [0, 0] SrcBlock "plb_decode" SrcPort 1 Points [10, 0] DstBlock "plb_memmap" DstPort 1 } Line { Name "FilterOptions_dout" Labels [0, 0] SrcBlock "To Register" SrcPort 1 DstBlock "Terminator7" DstPort 1 } Line { Name "Sl_rdDBus" Labels [0, 0] SrcBlock "plb_decode" SrcPort 8 Points [5, 0; 0, 195] DstBlock "Sl_rdDBus" DstPort 1 } Line { Name "Sl_rdDAck" Labels [0, 0] SrcBlock "plb_decode" SrcPort 7 Points [5, 0; 0, 190] DstBlock "Sl_rdDAck" DstPort 1 } Line { Name "Sl_rdComp" Labels [0, 0] SrcBlock "plb_decode" SrcPort 3 Points [60, 0; 0, -55] DstBlock "Sl_rdComp" DstPort 1 } Line { Name "addrPref" Labels [0, 0] SrcBlock "sg_plb_addrpref" SrcPort 1 Points [10, 0] DstBlock "plb_decode" DstPort 7 } Line { Name "PLB_wrDBus" Labels [0, 0] SrcBlock "PLB_wrDBus" SrcPort 1 Points [5, 0; 0, 5] DstBlock "plb_decode" DstPort 5 } Line { Name "PLB_RNW" Labels [0, 0] SrcBlock "PLB_RNW" SrcPort 1 DstBlock "plb_decode" DstPort 4 } Line { Name "PLB_PAValid" Labels [0, 0] SrcBlock "PLB_PAValid" SrcPort 1 DstBlock "plb_decode" DstPort 3 } Line { Name "PLB_ABus" Labels [0, 0] SrcBlock "PLB_ABus" SrcPort 1 DstBlock "plb_decode" DstPort 2 } Line { Name "SPLB_Rst" Labels [0, 0] SrcBlock "SPLB_Rst" SrcPort 1 DstBlock "plb_decode" DstPort 1 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "sg_plb_addrpref" DstPort 1 } Line { Name "Sl_wait" Labels [0, 0] SrcBlock "Constant5" SrcPort 1 Points [5, 0; 0, -5] DstBlock "Sl_wait" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "PLB_wrDBus" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 DstBlock "PLB_RNW" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 DstBlock "PLB_PAValid" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 DstBlock "PLB_ABus" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "SPLB_Rst" DstPort 1 } Line { SrcBlock "Sl_wrComp" SrcPort 1 DstBlock "Terminator6" DstPort 1 } Line { SrcBlock "Sl_wrDAck" SrcPort 1 DstBlock "Terminator5" DstPort 1 } Line { SrcBlock "Sl_wait" SrcPort 1 DstBlock "Terminator4" DstPort 1 } Line { SrcBlock "Sl_rdDBus" SrcPort 1 DstBlock "Terminator3" DstPort 1 } Line { SrcBlock "Sl_rdDAck" SrcPort 1 DstBlock "Terminator2" DstPort 1 } Line { SrcBlock "Sl_rdComp" SrcPort 1 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "Sl_addrAck" SrcPort 1 DstBlock "Terminator" DstPort 1 } } } Block { BlockType Reference Name "Resource Estimator" Tag "resEstTag" Ports [] Position [206, 268, 252, 312] ShowName off AttributesFormatString "Resource\\nEstimator" SourceBlock "xbsIndex_r4/Resource Estimator" SourceType "Xilinx Resource Estimator Block" Slices "3628" FFs "4465" BRAMs "0" LUTs "6136" IOBs "365" EBMs "48" TBUFs "0" xl_use_estimator_area off est_options "Estimate" xl_estimator_area "[3628 4465 0 6136 365 48 0]" has_advanced_control "0" sggui_pos "20,20,336,293" block_type "resource_estimator" block_version "10.1.3" sg_icon_stat "46,44,-1,-1,blue,white,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 46 46 0 ],[0 0 44 44 ],[0.98 0.96 0.92]);\npatch([11 4 14 4 11 23 26 29 41 31 22 15 24 15 22 31 41 29 26 23 11 ],[5 12 22 32 39 39 36 39 39 29 38 31 22 13 6 15 5 5 8 5 5 ],[0.77 0.82 0.91]);\nplot([0 46 46 0 0 ],[0 0 44 44 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Rx Path" Ports [] Position [170, 104, 281, 140] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Rx Path" Location [627, 202, 1637, 917] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "94" Block { BlockType SubSystem Name "2-Ch Decimation A" Ports [2, 2] Position [520, 361, 585, 414] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "2-Ch Decimation A" Location [2, 74, 1894, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "XA" Position [320, 283, 350, 297] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "XB" Position [320, 393, 350, 407] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "Accumulator" Ports [2, 1] Position [1115, 443, 1165, 492] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "32" overflow "Flag as error" scale "1" rst on hasbypass on en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[17 33 0 32 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,457" block_type "accum" block_version "9.1.01" sg_icon_stat "50,49,1,1,white,blue,0,1b1827f6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Accumulator1" Ports [2, 1] Position [1115, 378, 1165, 427] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "32" overflow "Flag as error" scale "1" rst on hasbypass on en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[17 33 0 32 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,457" block_type "accum" block_version "9.1.01" sg_icon_stat "50,49,1,1,white,blue,0,1b1827f6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Adders" Ports [16, 1] Position [815, 230, 890, 570] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Adders" Location [1072, 3, 1437, 1082] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [25, 113, 55, 127] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [25, 178, 55, 192] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [25, 243, 55, 257] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [25, 308, 55, 322] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [25, 373, 55, 387] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [25, 438, 55, 452] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [25, 503, 55, 517] Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "In9" Position [25, 568, 55, 582] Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "In10" Position [25, 633, 55, 647] Port "10" IconDisplay "Port number" } Block { BlockType Inport Name "In11" Position [25, 698, 55, 712] Port "11" IconDisplay "Port number" } Block { BlockType Inport Name "In12" Position [25, 763, 55, 777] Port "12" IconDisplay "Port number" } Block { BlockType Inport Name "In13" Position [25, 828, 55, 842] Port "13" IconDisplay "Port number" } Block { BlockType Inport Name "In14" Position [25, 893, 55, 907] Port "14" IconDisplay "Port number" } Block { BlockType Inport Name "In15" Position [25, 958, 55, 972] Port "15" IconDisplay "Port number" } Block { BlockType Inport Name "In16" Position [25, 1023, 55, 1037] Port "16" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub6" Ports [2, 1] Position [235, 767, 285, 818] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "1" bin_pt "0" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[15 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Adder Tree" Ports [8, 1] Position [80, 550, 135, 1055] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Adder Tree" Location [2, 70, 1918, 1108] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 33, 55, 47] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In2" Position [25, 58, 55, 72] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In3" Position [25, 143, 55, 157] Port "3" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In4" Position [25, 168, 55, 182] Port "4" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In5" Position [25, 283, 55, 297] Port "5" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In6" Position [25, 308, 55, 322] Port "6" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In7" Position [25, 398, 55, 412] Port "7" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In8" Position [25, 423, 55, 437] Port "8" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [80, 27, 130, 78] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [80, 137, 130, 188] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [165, 127, 215, 178] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 26 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub3" Ports [2, 1] Position [80, 277, 130, 328] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub4" Ports [2, 1] Position [80, 392, 130, 443] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub5" Ports [2, 1] Position [165, 292, 215, 343] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 26 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub6" Ports [2, 1] Position [265, 192, 315, 243] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "1" bin_pt "0" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 27 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [340, 213, 370, 227] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "In8" SrcPort 1 DstBlock "AddSub4" DstPort 2 } Line { SrcBlock "In7" SrcPort 1 DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "In5" SrcPort 1 DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "In3" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "In1" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [10, 0; 0, 85] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [15, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "AddSub5" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 2 } } } Block { BlockType SubSystem Name "Adder Tree1" Ports [8, 1] Position [80, 30, 135, 535] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Adder Tree1" Location [2, 70, 1918, 1108] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 33, 55, 47] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In2" Position [25, 58, 55, 72] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In3" Position [25, 143, 55, 157] Port "3" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In4" Position [25, 168, 55, 182] Port "4" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In5" Position [25, 283, 55, 297] Port "5" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In6" Position [25, 308, 55, 322] Port "6" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In7" Position [25, 398, 55, 412] Port "7" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In8" Position [25, 423, 55, 437] Port "8" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [80, 27, 130, 78] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [80, 137, 130, 188] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [165, 127, 215, 178] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 26 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub3" Ports [2, 1] Position [80, 277, 130, 328] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub4" Ports [2, 1] Position [80, 392, 130, 443] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub5" Ports [2, 1] Position [165, 292, 215, 343] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 26 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub6" Ports [2, 1] Position [265, 192, 315, 243] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "1" bin_pt "0" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 27 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [340, 213, 370, 227] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "AddSub5" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [15, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 Points [10, 0; 0, 85] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "In3" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In5" SrcPort 1 DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "In7" SrcPort 1 DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "AddSub4" DstPort 2 } } } Block { BlockType Outport Name "Out1" Position [310, 788, 340, 802] IconDisplay "Port number" } Line { SrcBlock "Adder Tree" SrcPort 1 DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "Adder Tree1" SrcPort 1 Points [25, 0; 0, 495] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Adder Tree1" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Adder Tree1" DstPort 2 } Line { SrcBlock "In3" SrcPort 1 DstBlock "Adder Tree1" DstPort 3 } Line { SrcBlock "In4" SrcPort 1 DstBlock "Adder Tree1" DstPort 4 } Line { SrcBlock "In5" SrcPort 1 DstBlock "Adder Tree1" DstPort 5 } Line { SrcBlock "In6" SrcPort 1 DstBlock "Adder Tree1" DstPort 6 } Line { SrcBlock "In7" SrcPort 1 DstBlock "Adder Tree1" DstPort 7 } Line { SrcBlock "In8" SrcPort 1 DstBlock "Adder Tree1" DstPort 8 } Line { SrcBlock "In9" SrcPort 1 DstBlock "Adder Tree" DstPort 1 } Line { SrcBlock "In10" SrcPort 1 DstBlock "Adder Tree" DstPort 2 } Line { SrcBlock "In11" SrcPort 1 DstBlock "Adder Tree" DstPort 3 } Line { SrcBlock "In12" SrcPort 1 DstBlock "Adder Tree" DstPort 4 } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In13" SrcPort 1 DstBlock "Adder Tree" DstPort 5 } Line { SrcBlock "In14" SrcPort 1 DstBlock "Adder Tree" DstPort 6 } Line { SrcBlock "In15" SrcPort 1 DstBlock "Adder Tree" DstPort 7 } Line { SrcBlock "In16" SrcPort 1 DstBlock "Adder Tree" DstPort 8 } } } Block { BlockType Reference Name "Constant" Ports [0, 1] Position [785, 660, 810, 680] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Unsigned" const "3" n_bits "3" bin_pt "0" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "9.1.01" sg_icon_stat "25,20,1,1,white,blue,0,bdb1da60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'3');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert" Ports [1, 1] Position [1300, 462, 1335, 478] ShowName off SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[11 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert1" Ports [1, 1] Position [1300, 397, 1335, 413] ShowName off SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[11 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [510, 675, 535, 705] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "0" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "25,30,1,1,white,blue,0,d74ee26d,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay16" Ports [1, 1] Position [380, 610, 410, 635] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "0" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "30,25,1,1,white,blue,0,d74ee26d,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Delays" Ports [16, 16] Position [550, 236, 610, 564] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Delays" Location [447, 284, 682, 658] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [25, 53, 55, 67] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [25, 73, 55, 87] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [25, 93, 55, 107] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [25, 113, 55, 127] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [25, 133, 55, 147] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [25, 153, 55, 167] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [25, 173, 55, 187] Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "In9" Position [25, 193, 55, 207] Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "In10" Position [25, 213, 55, 227] Port "10" IconDisplay "Port number" } Block { BlockType Inport Name "In11" Position [25, 233, 55, 247] Port "11" IconDisplay "Port number" } Block { BlockType Inport Name "In12" Position [25, 253, 55, 267] Port "12" IconDisplay "Port number" } Block { BlockType Inport Name "In13" Position [25, 273, 55, 287] Port "13" IconDisplay "Port number" } Block { BlockType Inport Name "In14" Position [25, 293, 55, 307] Port "14" IconDisplay "Port number" } Block { BlockType Inport Name "In15" Position [25, 313, 55, 327] Port "15" IconDisplay "Port number" } Block { BlockType Inport Name "In16" Position [25, 333, 55, 347] Port "16" IconDisplay "Port number" } Block { BlockType Reference Name "Register10" Ports [1, 1] Position [80, 189, 105, 211] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register11" Ports [1, 1] Position [80, 209, 105, 231] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register12" Ports [1, 1] Position [80, 229, 105, 251] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register13" Ports [1, 1] Position [80, 249, 105, 271] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register14" Ports [1, 1] Position [80, 269, 105, 291] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register15" Ports [1, 1] Position [80, 289, 105, 311] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register16" Ports [1, 1] Position [80, 309, 105, 331] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register17" Ports [1, 1] Position [80, 329, 105, 351] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register18" Ports [1, 1] Position [130, 189, 155, 211] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register19" Ports [1, 1] Position [130, 209, 155, 231] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register2" Ports [1, 1] Position [80, 29, 105, 51] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register20" Ports [1, 1] Position [130, 229, 155, 251] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register21" Ports [1, 1] Position [130, 249, 155, 271] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register22" Ports [1, 1] Position [130, 269, 155, 291] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register23" Ports [1, 1] Position [130, 289, 155, 311] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register24" Ports [1, 1] Position [130, 309, 155, 331] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register25" Ports [1, 1] Position [130, 329, 155, 351] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register26" Ports [1, 1] Position [130, 29, 155, 51] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register27" Ports [1, 1] Position [130, 49, 155, 71] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register28" Ports [1, 1] Position [130, 69, 155, 91] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register29" Ports [1, 1] Position [130, 89, 155, 111] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register3" Ports [1, 1] Position [80, 49, 105, 71] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register30" Ports [1, 1] Position [130, 109, 155, 131] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register31" Ports [1, 1] Position [130, 129, 155, 151] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register32" Ports [1, 1] Position [130, 149, 155, 171] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register33" Ports [1, 1] Position [130, 169, 155, 191] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register4" Ports [1, 1] Position [80, 69, 105, 91] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register5" Ports [1, 1] Position [80, 89, 105, 111] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register6" Ports [1, 1] Position [80, 109, 105, 131] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register7" Ports [1, 1] Position [80, 129, 105, 151] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register8" Ports [1, 1] Position [80, 149, 105, 171] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register9" Ports [1, 1] Position [80, 169, 105, 191] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [180, 33, 210, 47] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [180, 53, 210, 67] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [180, 73, 210, 87] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [180, 93, 210, 107] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [180, 113, 210, 127] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [180, 133, 210, 147] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [180, 153, 210, 167] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [180, 173, 210, 187] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Out9" Position [180, 193, 210, 207] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Out10" Position [180, 213, 210, 227] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Out11" Position [180, 233, 210, 247] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Out12" Position [180, 253, 210, 267] Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "Out13" Position [180, 273, 210, 287] Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "Out14" Position [180, 293, 210, 307] Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "Out15" Position [180, 313, 210, 327] Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "Out16" Position [180, 333, 210, 347] Port "16" IconDisplay "Port number" } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Register26" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 DstBlock "Register27" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 DstBlock "Register28" DstPort 1 } Line { SrcBlock "Register5" SrcPort 1 DstBlock "Register29" DstPort 1 } Line { SrcBlock "Register6" SrcPort 1 DstBlock "Register30" DstPort 1 } Line { SrcBlock "Register7" SrcPort 1 DstBlock "Register31" DstPort 1 } Line { SrcBlock "Register8" SrcPort 1 DstBlock "Register32" DstPort 1 } Line { SrcBlock "Register9" SrcPort 1 DstBlock "Register33" DstPort 1 } Line { SrcBlock "Register10" SrcPort 1 DstBlock "Register18" DstPort 1 } Line { SrcBlock "Register11" SrcPort 1 DstBlock "Register19" DstPort 1 } Line { SrcBlock "Register12" SrcPort 1 DstBlock "Register20" DstPort 1 } Line { SrcBlock "Register13" SrcPort 1 DstBlock "Register21" DstPort 1 } Line { SrcBlock "Register14" SrcPort 1 DstBlock "Register22" DstPort 1 } Line { SrcBlock "Register15" SrcPort 1 DstBlock "Register23" DstPort 1 } Line { SrcBlock "Register16" SrcPort 1 DstBlock "Register24" DstPort 1 } Line { SrcBlock "Register17" SrcPort 1 DstBlock "Register25" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Register26" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Register27" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Register3" DstPort 1 } Line { SrcBlock "Register28" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "In3" SrcPort 1 DstBlock "Register4" DstPort 1 } Line { SrcBlock "Register29" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "Register5" DstPort 1 } Line { SrcBlock "Register30" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "In5" SrcPort 1 DstBlock "Register6" DstPort 1 } Line { SrcBlock "Register31" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "Register7" DstPort 1 } Line { SrcBlock "Register32" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "In7" SrcPort 1 DstBlock "Register8" DstPort 1 } Line { SrcBlock "Register33" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "Register9" DstPort 1 } Line { SrcBlock "In9" SrcPort 1 DstBlock "Register10" DstPort 1 } Line { SrcBlock "Register18" SrcPort 1 DstBlock "Out9" DstPort 1 } Line { SrcBlock "In10" SrcPort 1 DstBlock "Register11" DstPort 1 } Line { SrcBlock "Register19" SrcPort 1 DstBlock "Out10" DstPort 1 } Line { SrcBlock "In11" SrcPort 1 DstBlock "Register12" DstPort 1 } Line { SrcBlock "Register20" SrcPort 1 DstBlock "Out11" DstPort 1 } Line { SrcBlock "In12" SrcPort 1 DstBlock "Register13" DstPort 1 } Line { SrcBlock "Register21" SrcPort 1 DstBlock "Out12" DstPort 1 } Line { SrcBlock "In13" SrcPort 1 DstBlock "Register14" DstPort 1 } Line { SrcBlock "Register22" SrcPort 1 DstBlock "Out13" DstPort 1 } Line { SrcBlock "In14" SrcPort 1 DstBlock "Register15" DstPort 1 } Line { SrcBlock "Register23" SrcPort 1 DstBlock "Out14" DstPort 1 } Line { SrcBlock "In15" SrcPort 1 DstBlock "Register16" DstPort 1 } Line { SrcBlock "Register24" SrcPort 1 DstBlock "Out15" DstPort 1 } Line { SrcBlock "In16" SrcPort 1 DstBlock "Register17" DstPort 1 } Line { SrcBlock "Register25" SrcPort 1 DstBlock "Out16" DstPort 1 } } } Block { BlockType Reference Name "Down Sample" Ports [1, 1] Position [1470, 471, 1495, 499] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[15 15 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "9.1.01" sg_icon_stat "25,28,1,1,white,blue,0,0a78979b,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample1" Ports [1, 1] Position [1470, 406, 1495, 434] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[15 15 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "9.1.01" sg_icon_stat "25,28,1,1,white,blue,0,0a78979b,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType From Name "From2" Position [240, 680, 340, 700] ShowName off CloseFcn "tagdialog Close" GotoTag "CoefAddr" TagVisibility "global" } Block { BlockType SubSystem Name "ROMS & Mults" Ports [16, 16] Position [670, 224, 750, 576] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ROMS & Mults" Location [857, 12, 1162, 1077] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [125, 28, 155, 42] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [125, 93, 155, 107] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [125, 158, 155, 172] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [125, 223, 155, 237] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [125, 288, 155, 302] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [125, 353, 155, 367] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [125, 418, 155, 432] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [125, 483, 155, 497] Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "In9" Position [125, 548, 155, 562] Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "In10" Position [125, 613, 155, 627] Port "10" IconDisplay "Port number" } Block { BlockType Inport Name "In11" Position [125, 678, 155, 692] Port "11" IconDisplay "Port number" } Block { BlockType Inport Name "In12" Position [125, 743, 155, 757] Port "12" IconDisplay "Port number" } Block { BlockType Inport Name "In13" Position [125, 808, 155, 822] Port "13" IconDisplay "Port number" } Block { BlockType Inport Name "In14" Position [125, 873, 155, 887] Port "14" IconDisplay "Port number" } Block { BlockType Inport Name "In15" Position [125, 938, 155, 952] Port "15" IconDisplay "Port number" } Block { BlockType Inport Name "In16" Position [125, 1003, 155, 1017] Port "16" IconDisplay "Port number" } Block { BlockType From Name "From" Position [30, 1020, 130, 1040] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_0" TagVisibility "global" } Block { BlockType From Name "From10" Position [30, 435, 130, 455] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_9" TagVisibility "global" } Block { BlockType From Name "From11" Position [30, 370, 130, 390] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_10" TagVisibility "global" } Block { BlockType From Name "From12" Position [30, 305, 130, 325] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_11" TagVisibility "global" } Block { BlockType From Name "From13" Position [25, 175, 125, 195] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_13" TagVisibility "global" } Block { BlockType From Name "From14" Position [25, 110, 125, 130] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_14" TagVisibility "global" } Block { BlockType From Name "From15" Position [25, 45, 125, 65] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_15" TagVisibility "global" } Block { BlockType From Name "From16" Position [25, 240, 125, 260] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_12" TagVisibility "global" } Block { BlockType From Name "From2" Position [30, 955, 130, 975] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_1" TagVisibility "global" } Block { BlockType From Name "From3" Position [30, 890, 130, 910] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_2" TagVisibility "global" } Block { BlockType From Name "From4" Position [30, 825, 130, 845] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_3" TagVisibility "global" } Block { BlockType From Name "From5" Position [30, 760, 130, 780] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_4" TagVisibility "global" } Block { BlockType From Name "From6" Position [30, 695, 130, 715] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_5" TagVisibility "global" } Block { BlockType From Name "From7" Position [30, 630, 130, 650] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_6" TagVisibility "global" } Block { BlockType From Name "From8" Position [30, 565, 130, 585] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_7" TagVisibility "global" } Block { BlockType From Name "From9" Position [30, 500, 130, 520] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_8" TagVisibility "global" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [180, 937, 225, 973] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult10" Ports [2, 1] Position [180, 287, 225, 323] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult11" Ports [2, 1] Position [180, 352, 225, 388] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult12" Ports [2, 1] Position [180, 157, 225, 193] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult13" Ports [2, 1] Position [180, 27, 225, 63] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult14" Ports [2, 1] Position [180, 92, 225, 128] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult15" Ports [2, 1] Position [180, 482, 225, 518] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult16" Ports [2, 1] Position [180, 222, 225, 258] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [180, 807, 225, 843] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [180, 872, 225, 908] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult4" Ports [2, 1] Position [180, 677, 225, 713] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult5" Ports [2, 1] Position [180, 547, 225, 583] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult6" Ports [2, 1] Position [180, 612, 225, 648] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult7" Ports [2, 1] Position [180, 1002, 225, 1038] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult8" Ports [2, 1] Position [180, 742, 225, 778] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult9" Ports [2, 1] Position [180, 417, 225, 453] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [250, 38, 280, 52] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [250, 103, 280, 117] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [250, 168, 280, 182] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [250, 233, 280, 247] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [250, 298, 280, 312] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [250, 363, 280, 377] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [250, 428, 280, 442] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [250, 493, 280, 507] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Out9" Position [250, 558, 280, 572] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Out10" Position [250, 623, 280, 637] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Out11" Position [250, 688, 280, 702] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Out12" Position [250, 753, 280, 767] Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "Out13" Position [250, 818, 280, 832] Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "Out14" Position [250, 883, 280, 897] Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "Out15" Position [250, 948, 280, 962] Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "Out16" Position [250, 1013, 280, 1027] Port "16" IconDisplay "Port number" } Line { SrcBlock "From15" SrcPort 1 DstBlock "Mult13" DstPort 2 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Mult14" DstPort 2 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Mult12" DstPort 2 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Mult16" DstPort 2 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Mult10" DstPort 2 } Line { SrcBlock "From11" SrcPort 1 DstBlock "Mult11" DstPort 2 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Mult9" DstPort 2 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Mult15" DstPort 2 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Mult5" DstPort 2 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Mult6" DstPort 2 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Mult4" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Mult8" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Mult2" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Mult3" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "From" SrcPort 1 DstBlock "Mult7" DstPort 2 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Mult13" DstPort 1 } Line { SrcBlock "Mult13" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Mult14" DstPort 1 } Line { SrcBlock "Mult14" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "In3" SrcPort 1 DstBlock "Mult12" DstPort 1 } Line { SrcBlock "Mult12" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "Mult16" DstPort 1 } Line { SrcBlock "Mult16" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "In5" SrcPort 1 DstBlock "Mult10" DstPort 1 } Line { SrcBlock "Mult10" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "Mult11" DstPort 1 } Line { SrcBlock "Mult11" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "In7" SrcPort 1 DstBlock "Mult9" DstPort 1 } Line { SrcBlock "Mult9" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "Mult15" DstPort 1 } Line { SrcBlock "Mult15" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "In9" SrcPort 1 DstBlock "Mult5" DstPort 1 } Line { SrcBlock "Mult5" SrcPort 1 DstBlock "Out9" DstPort 1 } Line { SrcBlock "In10" SrcPort 1 DstBlock "Mult6" DstPort 1 } Line { SrcBlock "Mult6" SrcPort 1 DstBlock "Out10" DstPort 1 } Line { SrcBlock "In11" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Mult4" SrcPort 1 DstBlock "Out11" DstPort 1 } Line { SrcBlock "In12" SrcPort 1 DstBlock "Mult8" DstPort 1 } Line { SrcBlock "Mult8" SrcPort 1 DstBlock "Out12" DstPort 1 } Line { SrcBlock "In13" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "Out13" DstPort 1 } Line { SrcBlock "In14" SrcPort 1 DstBlock "Mult3" DstPort 1 } Line { SrcBlock "Mult3" SrcPort 1 DstBlock "Out14" DstPort 1 } Line { SrcBlock "In15" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "Out15" DstPort 1 } Line { SrcBlock "In16" SrcPort 1 DstBlock "Mult7" DstPort 1 } Line { SrcBlock "Mult7" SrcPort 1 DstBlock "Out16" DstPort 1 } } } Block { BlockType Reference Name "Register" Ports [2, 1] Position [1375, 458, 1420, 507] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "9.1.01" sg_icon_stat "45,49,1,1,white,blue,0,cc3303a0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 49 49 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 43 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register1" Ports [2, 1] Position [1375, 393, 1420, 442] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "9.1.01" sg_icon_stat "45,49,1,1,white,blue,0,cc3303a0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 49 49 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 43 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational" Ports [2, 1] Position [850, 658, 895, 702] ShowName off SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "9.1.01" sg_icon_stat "45,44,1,1,white,blue,0,1b68ef8e,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Sample\nRAMs" Ports [3, 16] Position [430, 237, 490, 563] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Sample\nRAMs" Location [602, 203, 1072, 897] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "XA" Position [40, 103, 70, 117] IconDisplay "Port number" } Block { BlockType Inport Name "XB" Position [40, 423, 70, 437] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Addr" Position [25, 610, 55, 625] Orientation "up" Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "MemoryA" Ports [2, 16] Position [95, 30, 165, 350] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MemoryA" Location [362, -8, 942, 1090] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 913, 55, 927] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "Addr" Position [365, 1065, 395, 1080] Orientation "up" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "ASR 0" Ports [2, 1] Position [450, 547, 500, 598] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 1" Ports [2, 1] Position [450, 612, 500, 663] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 10" Ports [2, 1] Position [450, 157, 500, 208] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 11" Ports [2, 1] Position [450, 222, 500, 273] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 12" Ports [2, 1] Position [450, 287, 500, 338] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 13" Ports [2, 1] Position [450, 352, 500, 403] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 14" Ports [2, 1] Position [450, 417, 500, 468] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 15" Ports [2, 1] Position [450, 482, 500, 533] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 2" Ports [2, 1] Position [450, 677, 500, 728] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 3" Ports [2, 1] Position [450, 741, 500, 794] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,53,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 4" Ports [2, 1] Position [450, 807, 500, 858] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 5" Ports [2, 1] Position [450, 872, 500, 923] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 6" Ports [2, 1] Position [450, 937, 500, 988] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 7" Ports [2, 1] Position [450, 1002, 500, 1053] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 8" Ports [2, 1] Position [450, 27, 500, 78] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 9" Ports [2, 1] Position [450, 92, 500, 143] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [332, 780, 348, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay10" Ports [1, 1] Position [332, 260, 348, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay11" Ports [1, 1] Position [312, 260, 328, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay12" Ports [1, 1] Position [292, 260, 308, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [312, 780, 328, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [292, 780, 308, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [352, 780, 368, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [352, 520, 368, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [332, 520, 348, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay7" Ports [1, 1] Position [312, 520, 328, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay8" Ports [1, 1] Position [292, 520, 308, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay9" Ports [1, 1] Position [352, 260, 368, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "TDD" Ports [1, 4] Position [160, 786, 230, 1049] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "TDD" Location [2, 74, 1902, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 148, 55, 162] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "TDD" Ports [1, 4] Position [120, 25, 175, 280] SourceBlock "xbsIndex_r4/Time Division\nDemultiplexer" SourceType "Xilinx Time Division Demultiplexer Block" infoedit "Samples presented at the input are selected and down-sampled according to the frame sampling pattern specified. The sampled input is presented either as a single or multiple channel at the output." frame_pattern "ones(1,4)" impl_style "Multiple Channel" vin off dbl_ovrd off xl_use_area off xl_area "[49 98 0 0 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,268" block_type "tdd" block_version "9.1.01" sg_icon_stat "55,255,1,1,white,blue,0,acbf1a72,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 ],[0 0 86 86 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 37 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[14 26 44 62 74 74 69 74 74 57 73 61 44 27 15 31 14 14 19 14 14 ],[0.98 0.96 0.92]);\nplot([0 75 75 0 0 ],[0 0 86 86 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q0');\ncolor('black');port_label('output',2,'q1');\ncolor('black');port_label('output',3,'q2');\ncolor('black');port_label('output',4,'q3');\ncolor('black');disp('TDD');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "x[3]" Position [235, 48, 265, 62] IconDisplay "Port number" } Block { BlockType Outport Name "x[2]" Position [235, 113, 265, 127] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "x[1]" Position [230, 178, 260, 192] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "x[0]" Position [240, 243, 270, 257] Port "4" IconDisplay "Port number" } Line { SrcBlock "TDD" SrcPort 4 DstBlock "x[0]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 3 DstBlock "x[1]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 2 DstBlock "x[2]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 1 DstBlock "x[3]" DstPort 1 } Line { SrcBlock "X" SrcPort 1 DstBlock "TDD" DstPort 1 } } } Block { BlockType Outport Name "Out1" Position [525, 48, 555, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [525, 113, 555, 127] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [525, 178, 555, 192] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [525, 243, 555, 257] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [525, 308, 555, 322] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [525, 373, 555, 387] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [525, 438, 555, 452] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [525, 503, 555, 517] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Out9" Position [525, 568, 555, 582] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Out10" Position [525, 633, 555, 647] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Out11" Position [525, 698, 555, 712] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Out12" Position [525, 763, 555, 777] Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "Out13" Position [525, 828, 555, 842] Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "Out14" Position [525, 893, 555, 907] Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "Out15" Position [525, 958, 555, 972] Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "Out16" Position [525, 1023, 555, 1037] Port "16" IconDisplay "Port number" } Line { SrcBlock "X" SrcPort 1 DstBlock "TDD" DstPort 1 } Line { SrcBlock "TDD" SrcPort 2 Points [85, 0] Branch { DstBlock "ASR 5" DstPort 1 } Branch { DstBlock "Delay2" DstPort 1 } } Line { SrcBlock "TDD" SrcPort 1 Points [65, 0] Branch { DstBlock "ASR 4" DstPort 1 } Branch { DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "TDD" SrcPort 4 Points [125, 0] Branch { DstBlock "ASR 7" DstPort 1 } Branch { DstBlock "Delay4" DstPort 1 } } Line { SrcBlock "Delay12" SrcPort 1 Points [0, -215] DstBlock "ASR 8" DstPort 1 } Line { SrcBlock "Delay11" SrcPort 1 Points [0, -150] DstBlock "ASR 9" DstPort 1 } Line { SrcBlock "Delay10" SrcPort 1 Points [0, -85] DstBlock "ASR 10" DstPort 1 } Line { SrcBlock "Delay9" SrcPort 1 Points [0, -20] DstBlock "ASR 11" DstPort 1 } Line { SrcBlock "Delay8" SrcPort 1 Points [0, -215] Branch { DstBlock "Delay12" DstPort 1 } Branch { DstBlock "ASR 12" DstPort 1 } } Line { SrcBlock "Delay7" SrcPort 1 Points [0, -150] Branch { DstBlock "Delay11" DstPort 1 } Branch { DstBlock "ASR 13" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 Points [0, -85] Branch { DstBlock "Delay10" DstPort 1 } Branch { DstBlock "ASR 14" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 Points [0, -20] Branch { DstBlock "Delay9" DstPort 1 } Branch { DstBlock "ASR 15" DstPort 1 } } Line { SrcBlock "TDD" SrcPort 3 Points [105, 0] Branch { DstBlock "ASR 6" DstPort 1 } Branch { DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Addr" SrcPort 1 Points [0, -20] Branch { DstBlock "ASR 7" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 6" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 5" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 4" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 3" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 2" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 1" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 0" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 15" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 14" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 13" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 12" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 11" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 10" DstPort 2 } Branch { Points [0, -65] Branch { Points [0, -65] DstBlock "ASR 8" DstPort 2 } Branch { DstBlock "ASR 9" DstPort 2 } } } } } } } } } } } } } } } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, -215] Branch { DstBlock "ASR 0" DstPort 1 } Branch { DstBlock "Delay8" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [0, -150] Branch { DstBlock "ASR 1" DstPort 1 } Branch { DstBlock "Delay7" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [0, -85] Branch { DstBlock "ASR 2" DstPort 1 } Branch { DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "Delay4" SrcPort 1 Points [0, -20] Branch { DstBlock "ASR 3" DstPort 1 } Branch { DstBlock "Delay5" DstPort 1 } } Line { SrcBlock "ASR 8" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "ASR 9" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "ASR 10" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "ASR 11" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "ASR 12" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "ASR 13" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "ASR 14" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "ASR 15" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "ASR 0" SrcPort 1 DstBlock "Out9" DstPort 1 } Line { SrcBlock "ASR 1" SrcPort 1 DstBlock "Out10" DstPort 1 } Line { SrcBlock "ASR 2" SrcPort 1 DstBlock "Out11" DstPort 1 } Line { SrcBlock "ASR 3" SrcPort 1 DstBlock "Out12" DstPort 1 } Line { SrcBlock "ASR 4" SrcPort 1 DstBlock "Out13" DstPort 1 } Line { SrcBlock "ASR 5" SrcPort 1 DstBlock "Out14" DstPort 1 } Line { SrcBlock "ASR 6" SrcPort 1 DstBlock "Out15" DstPort 1 } Line { SrcBlock "ASR 7" SrcPort 1 DstBlock "Out16" DstPort 1 } } } Block { BlockType SubSystem Name "MemoryB" Ports [2, 16] Position [95, 350, 165, 670] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MemoryB" Location [2, 70, 1902, 1108] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 913, 55, 927] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "Addr" Position [365, 1060, 395, 1075] Orientation "up" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "ASR 0" Ports [2, 1] Position [450, 547, 500, 598] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 1" Ports [2, 1] Position [450, 612, 500, 663] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 10" Ports [2, 1] Position [450, 157, 500, 208] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 11" Ports [2, 1] Position [450, 222, 500, 273] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 12" Ports [2, 1] Position [450, 287, 500, 338] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 13" Ports [2, 1] Position [450, 352, 500, 403] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 14" Ports [2, 1] Position [450, 417, 500, 468] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 15" Ports [2, 1] Position [450, 482, 500, 533] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 2" Ports [2, 1] Position [450, 677, 500, 728] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 3" Ports [2, 1] Position [450, 741, 500, 794] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,53,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 4" Ports [2, 1] Position [450, 807, 500, 858] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 5" Ports [2, 1] Position [450, 872, 500, 923] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 6" Ports [2, 1] Position [450, 937, 500, 988] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 7" Ports [2, 1] Position [450, 1002, 500, 1053] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 8" Ports [2, 1] Position [450, 27, 500, 78] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 9" Ports [2, 1] Position [450, 92, 500, 143] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [332, 780, 348, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay10" Ports [1, 1] Position [332, 260, 348, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay11" Ports [1, 1] Position [312, 260, 328, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay12" Ports [1, 1] Position [292, 260, 308, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [312, 780, 328, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [292, 780, 308, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [352, 780, 368, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [352, 520, 368, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [332, 520, 348, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay7" Ports [1, 1] Position [312, 520, 328, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay8" Ports [1, 1] Position [292, 520, 308, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay9" Ports [1, 1] Position [352, 260, 368, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "TDD" Ports [1, 4] Position [160, 786, 230, 1049] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "TDD" Location [2, 74, 1902, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 148, 55, 162] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "TDD" Ports [1, 4] Position [120, 25, 175, 280] SourceBlock "xbsIndex_r4/Time Division\nDemultiplexer" SourceType "Xilinx Time Division Demultiplexer Block" infoedit "Samples presented at the input are selected and down-sampled according to the frame sampling pattern specified. The sampled input is presented either as a single or multiple channel at the output." frame_pattern "ones(1,4)" impl_style "Multiple Channel" vin off dbl_ovrd off xl_use_area off xl_area "[49 98 0 0 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,268" block_type "tdd" block_version "9.1.01" sg_icon_stat "55,255,1,1,white,blue,0,acbf1a72,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 ],[0 0 86 86 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 37 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[14 26 44 62 74 74 69 74 74 57 73 61 44 27 15 31 14 14 19 14 14 ],[0.98 0.96 0.92]);\nplot([0 75 75 0 0 ],[0 0 86 86 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q0');\ncolor('black');port_label('output',2,'q1');\ncolor('black');port_label('output',3,'q2');\ncolor('black');port_label('output',4,'q3');\ncolor('black');disp('TDD');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "x[3]" Position [235, 48, 265, 62] IconDisplay "Port number" } Block { BlockType Outport Name "x[2]" Position [235, 113, 265, 127] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "x[1]" Position [230, 178, 260, 192] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "x[0]" Position [240, 243, 270, 257] Port "4" IconDisplay "Port number" } Line { SrcBlock "X" SrcPort 1 DstBlock "TDD" DstPort 1 } Line { SrcBlock "TDD" SrcPort 1 DstBlock "x[3]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 2 DstBlock "x[2]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 3 DstBlock "x[1]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 4 DstBlock "x[0]" DstPort 1 } } } Block { BlockType Outport Name "Out1" Position [525, 48, 555, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [525, 113, 555, 127] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [525, 178, 555, 192] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [525, 243, 555, 257] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [525, 308, 555, 322] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [525, 373, 555, 387] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [525, 438, 555, 452] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [525, 503, 555, 517] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Out9" Position [525, 568, 555, 582] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Out10" Position [525, 633, 555, 647] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Out11" Position [525, 698, 555, 712] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Out12" Position [525, 763, 555, 777] Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "Out13" Position [525, 828, 555, 842] Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "Out14" Position [525, 893, 555, 907] Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "Out15" Position [525, 958, 555, 972] Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "Out16" Position [525, 1023, 555, 1037] Port "16" IconDisplay "Port number" } Line { SrcBlock "ASR 7" SrcPort 1 DstBlock "Out16" DstPort 1 } Line { SrcBlock "ASR 6" SrcPort 1 DstBlock "Out15" DstPort 1 } Line { SrcBlock "ASR 5" SrcPort 1 DstBlock "Out14" DstPort 1 } Line { SrcBlock "ASR 4" SrcPort 1 DstBlock "Out13" DstPort 1 } Line { SrcBlock "ASR 3" SrcPort 1 DstBlock "Out12" DstPort 1 } Line { SrcBlock "ASR 2" SrcPort 1 DstBlock "Out11" DstPort 1 } Line { SrcBlock "ASR 1" SrcPort 1 DstBlock "Out10" DstPort 1 } Line { SrcBlock "ASR 0" SrcPort 1 DstBlock "Out9" DstPort 1 } Line { SrcBlock "ASR 15" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "ASR 14" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "ASR 13" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "ASR 12" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "ASR 11" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "ASR 10" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "ASR 9" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "ASR 8" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 Points [0, -20] Branch { DstBlock "Delay5" DstPort 1 } Branch { DstBlock "ASR 3" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [0, -85] Branch { DstBlock "Delay6" DstPort 1 } Branch { DstBlock "ASR 2" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [0, -150] Branch { DstBlock "Delay7" DstPort 1 } Branch { DstBlock "ASR 1" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, -215] Branch { DstBlock "Delay8" DstPort 1 } Branch { DstBlock "ASR 0" DstPort 1 } } Line { SrcBlock "Addr" SrcPort 1 Points [0, -15] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { DstBlock "ASR 9" DstPort 2 } Branch { Points [0, -65] DstBlock "ASR 8" DstPort 2 } } Branch { DstBlock "ASR 10" DstPort 2 } } Branch { DstBlock "ASR 11" DstPort 2 } } Branch { DstBlock "ASR 12" DstPort 2 } } Branch { DstBlock "ASR 13" DstPort 2 } } Branch { DstBlock "ASR 14" DstPort 2 } } Branch { DstBlock "ASR 15" DstPort 2 } } Branch { DstBlock "ASR 0" DstPort 2 } } Branch { DstBlock "ASR 1" DstPort 2 } } Branch { DstBlock "ASR 2" DstPort 2 } } Branch { DstBlock "ASR 3" DstPort 2 } } Branch { DstBlock "ASR 4" DstPort 2 } } Branch { DstBlock "ASR 5" DstPort 2 } } Branch { DstBlock "ASR 6" DstPort 2 } } Branch { DstBlock "ASR 7" DstPort 2 } } Line { SrcBlock "TDD" SrcPort 3 Points [105, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { DstBlock "ASR 6" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 Points [0, -20] Branch { DstBlock "ASR 15" DstPort 1 } Branch { DstBlock "Delay9" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 Points [0, -85] Branch { DstBlock "ASR 14" DstPort 1 } Branch { DstBlock "Delay10" DstPort 1 } } Line { SrcBlock "Delay7" SrcPort 1 Points [0, -150] Branch { DstBlock "ASR 13" DstPort 1 } Branch { DstBlock "Delay11" DstPort 1 } } Line { SrcBlock "Delay8" SrcPort 1 Points [0, -215] Branch { DstBlock "ASR 12" DstPort 1 } Branch { DstBlock "Delay12" DstPort 1 } } Line { SrcBlock "Delay9" SrcPort 1 Points [0, -20] DstBlock "ASR 11" DstPort 1 } Line { SrcBlock "Delay10" SrcPort 1 Points [0, -85] DstBlock "ASR 10" DstPort 1 } Line { SrcBlock "Delay11" SrcPort 1 Points [0, -150] DstBlock "ASR 9" DstPort 1 } Line { SrcBlock "Delay12" SrcPort 1 Points [0, -215] DstBlock "ASR 8" DstPort 1 } Line { SrcBlock "TDD" SrcPort 4 Points [125, 0] Branch { DstBlock "Delay4" DstPort 1 } Branch { DstBlock "ASR 7" DstPort 1 } } Line { SrcBlock "TDD" SrcPort 1 Points [65, 0] Branch { DstBlock "Delay3" DstPort 1 } Branch { DstBlock "ASR 4" DstPort 1 } } Line { SrcBlock "TDD" SrcPort 2 Points [85, 0] Branch { DstBlock "Delay2" DstPort 1 } Branch { DstBlock "ASR 5" DstPort 1 } } Line { SrcBlock "X" SrcPort 1 DstBlock "TDD" DstPort 1 } } } Block { BlockType Reference Name "Time Division\nMultiplexer" Ports [2, 1] Position [330, 37, 390, 53] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer10" Ports [2, 1] Position [330, 217, 390, 233] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer11" Ports [2, 1] Position [330, 237, 390, 253] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer12" Ports [2, 1] Position [330, 257, 390, 273] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer13" Ports [2, 1] Position [330, 277, 390, 293] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer14" Ports [2, 1] Position [330, 297, 390, 313] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer15" Ports [2, 1] Position [330, 317, 390, 333] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer16" Ports [2, 1] Position [330, 337, 390, 353] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer2" Ports [2, 1] Position [330, 57, 390, 73] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer3" Ports [2, 1] Position [330, 77, 390, 93] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer4" Ports [2, 1] Position [330, 97, 390, 113] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer5" Ports [2, 1] Position [330, 117, 390, 133] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer6" Ports [2, 1] Position [330, 137, 390, 153] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer7" Ports [2, 1] Position [330, 157, 390, 173] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer8" Ports [2, 1] Position [330, 177, 390, 193] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer9" Ports [2, 1] Position [330, 197, 390, 213] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [415, 38, 445, 52] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [415, 58, 445, 72] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [415, 78, 445, 92] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [415, 98, 445, 112] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [415, 118, 445, 132] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [415, 138, 445, 152] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [415, 158, 445, 172] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [415, 178, 445, 192] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Out9" Position [415, 198, 445, 212] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Out10" Position [415, 218, 445, 232] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Out11" Position [415, 238, 445, 252] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Out12" Position [415, 258, 445, 272] Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "Out13" Position [415, 278, 445, 292] Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "Out14" Position [415, 298, 445, 312] Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "Out15" Position [415, 318, 445, 332] Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "Out16" Position [415, 338, 445, 352] Port "16" IconDisplay "Port number" } Line { Labels [0, 0] SrcBlock "Addr" SrcPort 1 Points [0, -15] Branch { Points [0, -320] DstBlock "MemoryA" DstPort 2 } Branch { DstBlock "MemoryB" DstPort 2 } } Line { SrcBlock "MemoryA" SrcPort 1 DstBlock "Time Division\nMultiplexer" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 2 DstBlock "Time Division\nMultiplexer2" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 3 DstBlock "Time Division\nMultiplexer3" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 4 DstBlock "Time Division\nMultiplexer4" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 5 DstBlock "Time Division\nMultiplexer5" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 6 DstBlock "Time Division\nMultiplexer6" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 7 DstBlock "Time Division\nMultiplexer7" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 8 DstBlock "Time Division\nMultiplexer8" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 9 DstBlock "Time Division\nMultiplexer9" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 10 DstBlock "Time Division\nMultiplexer10" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 11 DstBlock "Time Division\nMultiplexer11" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 12 DstBlock "Time Division\nMultiplexer12" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 13 DstBlock "Time Division\nMultiplexer13" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 14 DstBlock "Time Division\nMultiplexer14" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 15 DstBlock "Time Division\nMultiplexer15" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 16 DstBlock "Time Division\nMultiplexer16" DstPort 1 } Line { SrcBlock "MemoryB" SrcPort 1 Points [70, 0; 0, -310] DstBlock "Time Division\nMultiplexer" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 2 Points [75, 0; 0, -310] DstBlock "Time Division\nMultiplexer2" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 3 Points [80, 0; 0, -310] DstBlock "Time Division\nMultiplexer3" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 4 Points [85, 0; 0, -310] DstBlock "Time Division\nMultiplexer4" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 5 Points [90, 0; 0, -310] DstBlock "Time Division\nMultiplexer5" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 6 Points [95, 0; 0, -310] DstBlock "Time Division\nMultiplexer6" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 7 Points [100, 0; 0, -310] DstBlock "Time Division\nMultiplexer7" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 8 Points [105, 0; 0, -310] DstBlock "Time Division\nMultiplexer8" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 9 Points [110, 0; 0, -310] DstBlock "Time Division\nMultiplexer9" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 10 Points [115, 0; 0, -310] DstBlock "Time Division\nMultiplexer10" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 11 Points [120, 0; 0, -310] DstBlock "Time Division\nMultiplexer11" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 12 Points [125, 0; 0, -310] DstBlock "Time Division\nMultiplexer12" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 13 Points [130, 0; 0, -310] DstBlock "Time Division\nMultiplexer13" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 14 Points [135, 0; 0, -310] DstBlock "Time Division\nMultiplexer14" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 15 Points [140, 0; 0, -310] DstBlock "Time Division\nMultiplexer15" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 16 Points [145, 0] DstBlock "Time Division\nMultiplexer16" DstPort 2 } Line { SrcBlock "Time Division\nMultiplexer" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer2" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer3" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer4" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "XA" SrcPort 1 DstBlock "MemoryA" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer5" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer6" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer7" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer8" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer9" SrcPort 1 DstBlock "Out9" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer10" SrcPort 1 DstBlock "Out10" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer11" SrcPort 1 DstBlock "Out11" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer12" SrcPort 1 DstBlock "Out12" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer13" SrcPort 1 DstBlock "Out13" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer14" SrcPort 1 DstBlock "Out14" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer15" SrcPort 1 DstBlock "Out15" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer16" SrcPort 1 DstBlock "Out16" DstPort 1 } Line { SrcBlock "XB" SrcPort 1 DstBlock "MemoryB" DstPort 1 } } } Block { BlockType Reference Name "Scale" Ports [1, 1] Position [1220, 459, 1250, 481] ShowName off SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In hardware this block costs nothing." scale_factor "-2" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.3" sg_icon_stat "30,22,1,1,white,blue,0,4c4129cf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\bf{2^{-2}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale1" Ports [1, 1] Position [1220, 394, 1250, 416] ShowName off SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In hardware this block costs nothing." scale_factor "-2" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.3" sg_icon_stat "30,22,1,1,white,blue,0,4c4129cf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\bf{2^{-2}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "TDD" Ports [1, 2] Position [955, 379, 1015, 421] SourceBlock "xbsIndex_r4/Time Division\nDemultiplexer" SourceType "Xilinx Time Division Demultiplexer Block" infoedit "Samples presented at the input are selected and down-sampled according to the frame sampling pattern specified. The sampled input is presented either as a single or multiple channel at the output." frame_pattern "ones(1,2)" impl_style "Multiple Channel" vin off dbl_ovrd off xl_use_area off xl_area "[42 84 0 0 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,268" block_type "tdd" block_version "9.1.01" sg_icon_stat "60,42,1,1,white,blue,0,f2edb40e,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 ],[0 0 86 86 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 37 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[14 26 44 62 74 74 69 74 74 57 73 61 44 27 15 31 14 14 19 14 14 ],[0.98 0.96 0.92]);\nplot([0 75 75 0 0 ],[0 0 86 86 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q0');\ncolor('black');port_label('output',2,'q1');\ncolor('black');disp('TDD');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "YA" Position [1570, 413, 1600, 427] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Outport Name "YB" Position [1570, 478, 1600, 492] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "ROMS & Mults" SrcPort 8 DstBlock "Adders" DstPort 8 } Line { SrcBlock "ROMS & Mults" SrcPort 7 DstBlock "Adders" DstPort 7 } Line { SrcBlock "ROMS & Mults" SrcPort 6 DstBlock "Adders" DstPort 6 } Line { SrcBlock "ROMS & Mults" SrcPort 5 DstBlock "Adders" DstPort 5 } Line { SrcBlock "ROMS & Mults" SrcPort 4 DstBlock "Adders" DstPort 4 } Line { SrcBlock "ROMS & Mults" SrcPort 3 DstBlock "Adders" DstPort 3 } Line { SrcBlock "ROMS & Mults" SrcPort 2 DstBlock "Adders" DstPort 2 } Line { SrcBlock "ROMS & Mults" SrcPort 1 DstBlock "Adders" DstPort 1 } Line { SrcBlock "ROMS & Mults" SrcPort 16 DstBlock "Adders" DstPort 16 } Line { SrcBlock "ROMS & Mults" SrcPort 15 DstBlock "Adders" DstPort 15 } Line { SrcBlock "ROMS & Mults" SrcPort 14 DstBlock "Adders" DstPort 14 } Line { SrcBlock "ROMS & Mults" SrcPort 13 DstBlock "Adders" DstPort 13 } Line { SrcBlock "ROMS & Mults" SrcPort 12 DstBlock "Adders" DstPort 12 } Line { SrcBlock "ROMS & Mults" SrcPort 11 DstBlock "Adders" DstPort 11 } Line { SrcBlock "ROMS & Mults" SrcPort 10 DstBlock "Adders" DstPort 10 } Line { SrcBlock "ROMS & Mults" SrcPort 9 DstBlock "Adders" DstPort 9 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "YB" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "Scale" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [50, 0] Branch { DstBlock "Delay16" DstPort 1 } Branch { DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Scale" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "XA" SrcPort 1 DstBlock "Sample\nRAMs" DstPort 1 } Line { SrcBlock "XB" SrcPort 1 DstBlock "Sample\nRAMs" DstPort 2 } Line { SrcBlock "Accumulator1" SrcPort 1 DstBlock "Scale1" DstPort 1 } Line { SrcBlock "Scale1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "YA" DstPort 1 } Line { SrcBlock "Adders" SrcPort 1 DstBlock "TDD" DstPort 1 } Line { SrcBlock "TDD" SrcPort 1 DstBlock "Accumulator1" DstPort 1 } Line { SrcBlock "TDD" SrcPort 2 Points [25, 0; 0, 45] DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [190, 0] Branch { Points [0, -200] Branch { Points [0, -65] DstBlock "Accumulator1" DstPort 2 } Branch { DstBlock "Accumulator" DstPort 2 } } Branch { Points [260, 0; 0, -185] Branch { Points [0, -65] DstBlock "Register1" DstPort 2 } Branch { DstBlock "Register" DstPort 2 } } } Line { SrcBlock "Sample\nRAMs" SrcPort 1 DstBlock "Delays" DstPort 1 } Line { SrcBlock "Sample\nRAMs" SrcPort 2 DstBlock "Delays" DstPort 2 } Line { SrcBlock "Sample\nRAMs" SrcPort 3 DstBlock "Delays" DstPort 3 } Line { SrcBlock "Sample\nRAMs" SrcPort 4 DstBlock "Delays" DstPort 4 } Line { SrcBlock "Sample\nRAMs" SrcPort 5 DstBlock "Delays" DstPort 5 } Line { SrcBlock "Sample\nRAMs" SrcPort 6 DstBlock "Delays" DstPort 6 } Line { SrcBlock "Sample\nRAMs" SrcPort 7 DstBlock "Delays" DstPort 7 } Line { SrcBlock "Sample\nRAMs" SrcPort 8 DstBlock "Delays" DstPort 8 } Line { SrcBlock "Sample\nRAMs" SrcPort 9 DstBlock "Delays" DstPort 9 } Line { SrcBlock "Sample\nRAMs" SrcPort 10 DstBlock "Delays" DstPort 10 } Line { SrcBlock "Sample\nRAMs" SrcPort 11 DstBlock "Delays" DstPort 11 } Line { SrcBlock "Sample\nRAMs" SrcPort 12 DstBlock "Delays" DstPort 12 } Line { SrcBlock "Sample\nRAMs" SrcPort 13 DstBlock "Delays" DstPort 13 } Line { SrcBlock "Sample\nRAMs" SrcPort 14 DstBlock "Delays" DstPort 14 } Line { SrcBlock "Sample\nRAMs" SrcPort 15 DstBlock "Delays" DstPort 15 } Line { SrcBlock "Sample\nRAMs" SrcPort 16 DstBlock "Delays" DstPort 16 } Line { Labels [0, 0] SrcBlock "Delay16" SrcPort 1 Points [0, -95] DstBlock "Sample\nRAMs" DstPort 3 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { SrcBlock "Delays" SrcPort 1 DstBlock "ROMS & Mults" DstPort 1 } Line { SrcBlock "Delays" SrcPort 2 DstBlock "ROMS & Mults" DstPort 2 } Line { SrcBlock "Delays" SrcPort 3 DstBlock "ROMS & Mults" DstPort 3 } Line { SrcBlock "Delays" SrcPort 4 DstBlock "ROMS & Mults" DstPort 4 } Line { SrcBlock "Delays" SrcPort 5 DstBlock "ROMS & Mults" DstPort 5 } Line { SrcBlock "Delays" SrcPort 6 DstBlock "ROMS & Mults" DstPort 6 } Line { SrcBlock "Delays" SrcPort 7 DstBlock "ROMS & Mults" DstPort 7 } Line { SrcBlock "Delays" SrcPort 8 DstBlock "ROMS & Mults" DstPort 8 } Line { SrcBlock "Delays" SrcPort 9 DstBlock "ROMS & Mults" DstPort 9 } Line { SrcBlock "Delays" SrcPort 10 DstBlock "ROMS & Mults" DstPort 10 } Line { SrcBlock "Delays" SrcPort 11 DstBlock "ROMS & Mults" DstPort 11 } Line { SrcBlock "Delays" SrcPort 12 DstBlock "ROMS & Mults" DstPort 12 } Line { SrcBlock "Delays" SrcPort 13 DstBlock "ROMS & Mults" DstPort 13 } Line { SrcBlock "Delays" SrcPort 14 DstBlock "ROMS & Mults" DstPort 14 } Line { SrcBlock "Delays" SrcPort 15 DstBlock "ROMS & Mults" DstPort 15 } Line { SrcBlock "Delays" SrcPort 16 DstBlock "ROMS & Mults" DstPort 16 } Annotation { Name "This convert will overflow, but never for\nthe output samples that are actually\ncaptured by the next register." Position [1335, 331] } Annotation { Name "Need a pipeline stage here to meet 80MHz timing when using non-DSP48 mults in V4.\nNeed double-delays to keep everything lined up\nwhen processing two interleaved sample streams." Position [581, 185] } } } Block { BlockType SubSystem Name "2-Ch Decimation B" Ports [2, 2] Position [520, 461, 585, 514] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "2-Ch Decimation B" Location [2, 70, 1918, 1108] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "XA" Position [320, 283, 350, 297] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "XB" Position [320, 393, 350, 407] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "Accumulator" Ports [2, 1] Position [1115, 443, 1165, 492] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "32" overflow "Flag as error" scale "1" rst on hasbypass on en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[17 33 0 32 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,457" block_type "accum" block_version "9.1.01" sg_icon_stat "50,49,1,1,white,blue,0,1b1827f6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Accumulator1" Ports [2, 1] Position [1115, 378, 1165, 427] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Accumulator" SourceType "Xilinx Accumulator Block" infoedit "Adder or subtractor-based accumulator. Output type and binary point position match the input.

Hardware notes: When \"Reinitialize with input 'b' on reset\" is selected, the accumulator is forced to run at the system rate even if the input 'b' is running at a slower rate." operation "Add" n_bits "32" overflow "Flag as error" scale "1" rst on hasbypass on en off dbl_ovrd off use_behavioral_HDL on implementation "Fabric" xl_use_area off xl_area "[17 33 0 32 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,457" block_type "accum" block_version "9.1.01" sg_icon_stat "50,49,1,1,white,blue,0,1b1827f6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'b');\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Adders" Ports [16, 1] Position [815, 230, 890, 570] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Adders" Location [2, 70, 1902, 1108] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [25, 113, 55, 127] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [25, 178, 55, 192] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [25, 243, 55, 257] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [25, 308, 55, 322] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [25, 373, 55, 387] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [25, 438, 55, 452] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [25, 503, 55, 517] Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "In9" Position [25, 568, 55, 582] Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "In10" Position [25, 633, 55, 647] Port "10" IconDisplay "Port number" } Block { BlockType Inport Name "In11" Position [25, 698, 55, 712] Port "11" IconDisplay "Port number" } Block { BlockType Inport Name "In12" Position [25, 763, 55, 777] Port "12" IconDisplay "Port number" } Block { BlockType Inport Name "In13" Position [25, 828, 55, 842] Port "13" IconDisplay "Port number" } Block { BlockType Inport Name "In14" Position [25, 893, 55, 907] Port "14" IconDisplay "Port number" } Block { BlockType Inport Name "In15" Position [25, 958, 55, 972] Port "15" IconDisplay "Port number" } Block { BlockType Inport Name "In16" Position [25, 1023, 55, 1037] Port "16" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub6" Ports [2, 1] Position [235, 767, 285, 818] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "1" bin_pt "0" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[15 0 0 28 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Adder Tree" Ports [8, 1] Position [80, 550, 135, 1055] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Adder Tree" Location [2, 70, 1918, 1108] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 33, 55, 47] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In2" Position [25, 58, 55, 72] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In3" Position [25, 143, 55, 157] Port "3" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In4" Position [25, 168, 55, 182] Port "4" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In5" Position [25, 283, 55, 297] Port "5" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In6" Position [25, 308, 55, 322] Port "6" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In7" Position [25, 398, 55, 412] Port "7" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In8" Position [25, 423, 55, 437] Port "8" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [80, 27, 130, 78] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [80, 137, 130, 188] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [165, 127, 215, 178] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 26 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub3" Ports [2, 1] Position [80, 277, 130, 328] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub4" Ports [2, 1] Position [80, 392, 130, 443] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub5" Ports [2, 1] Position [165, 292, 215, 343] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 26 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub6" Ports [2, 1] Position [265, 192, 315, 243] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "1" bin_pt "0" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 27 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [340, 213, 370, 227] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "AddSub5" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [15, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub" SrcPort 1 Points [10, 0; 0, 85] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "In3" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In5" SrcPort 1 DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "In7" SrcPort 1 DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "AddSub4" DstPort 2 } } } Block { BlockType SubSystem Name "Adder Tree1" Ports [8, 1] Position [80, 30, 135, 535] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Adder Tree1" Location [2, 70, 1918, 1108] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 33, 55, 47] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In2" Position [25, 58, 55, 72] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In3" Position [25, 143, 55, 157] Port "3" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In4" Position [25, 168, 55, 182] Port "4" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In5" Position [25, 283, 55, 297] Port "5" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In6" Position [25, 308, 55, 322] Port "6" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In7" Position [25, 398, 55, 412] Port "7" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In8" Position [25, 423, 55, 437] Port "8" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "AddSub" Ports [2, 1] Position [80, 27, 130, 78] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [80, 137, 130, 188] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [165, 127, 215, 178] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 26 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub3" Ports [2, 1] Position [80, 277, 130, 328] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub4" Ports [2, 1] Position [80, 392, 130, 443] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[13 0 0 25 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub5" Ports [2, 1] Position [165, 292, 215, 343] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "8" bin_pt "2" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 26 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub6" Ports [2, 1] Position [265, 192, 315, 243] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Signed (2's comp)" n_bits "1" bin_pt "0" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL on pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[14 0 0 27 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,344" block_type "addsub" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [340, 213, 370, 227] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "In8" SrcPort 1 DstBlock "AddSub4" DstPort 2 } Line { SrcBlock "In7" SrcPort 1 DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "In5" SrcPort 1 DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "In3" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "AddSub" DstPort 2 } Line { SrcBlock "In1" SrcPort 1 DstBlock "AddSub" DstPort 1 } Line { SrcBlock "AddSub" SrcPort 1 Points [10, 0; 0, 85] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [15, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "AddSub5" SrcPort 1 Points [30, 0] DstBlock "AddSub6" DstPort 2 } } } Block { BlockType Outport Name "Out1" Position [310, 788, 340, 802] IconDisplay "Port number" } Line { SrcBlock "In16" SrcPort 1 DstBlock "Adder Tree" DstPort 8 } Line { SrcBlock "In15" SrcPort 1 DstBlock "Adder Tree" DstPort 7 } Line { SrcBlock "In14" SrcPort 1 DstBlock "Adder Tree" DstPort 6 } Line { SrcBlock "In13" SrcPort 1 DstBlock "Adder Tree" DstPort 5 } Line { SrcBlock "AddSub6" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In12" SrcPort 1 DstBlock "Adder Tree" DstPort 4 } Line { SrcBlock "In11" SrcPort 1 DstBlock "Adder Tree" DstPort 3 } Line { SrcBlock "In10" SrcPort 1 DstBlock "Adder Tree" DstPort 2 } Line { SrcBlock "In9" SrcPort 1 DstBlock "Adder Tree" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "Adder Tree1" DstPort 8 } Line { SrcBlock "In7" SrcPort 1 DstBlock "Adder Tree1" DstPort 7 } Line { SrcBlock "In6" SrcPort 1 DstBlock "Adder Tree1" DstPort 6 } Line { SrcBlock "In5" SrcPort 1 DstBlock "Adder Tree1" DstPort 5 } Line { SrcBlock "In4" SrcPort 1 DstBlock "Adder Tree1" DstPort 4 } Line { SrcBlock "In3" SrcPort 1 DstBlock "Adder Tree1" DstPort 3 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Adder Tree1" DstPort 2 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Adder Tree1" DstPort 1 } Line { SrcBlock "Adder Tree1" SrcPort 1 Points [25, 0; 0, 495] DstBlock "AddSub6" DstPort 1 } Line { SrcBlock "Adder Tree" SrcPort 1 DstBlock "AddSub6" DstPort 2 } } } Block { BlockType Reference Name "Constant" Ports [0, 1] Position [785, 660, 810, 680] ShowName off SourceBlock "xbsIndex_r4/Constant" SourceType "Xilinx Constant Block Block" arith_type "Unsigned" const "3" n_bits "3" bin_pt "0" explicit_period off period "1" dsp48_infoedit "The use of this block for DSP48 instructions is deprecated. Please use the Opmode block." equ "P=C" opselect "C" inp2 "PCIN>>17" opr "+" inp1 "P" carry "CIN" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,400,346" block_type "constant" block_version "9.1.01" sg_icon_stat "25,20,1,1,white,blue,0,bdb1da60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 27 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 26 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'3');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert" Ports [1, 1] Position [1300, 462, 1335, 478] ShowName off SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[11 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Convert1" Ports [1, 1] Position [1300, 397, 1335, 413] ShowName off SourceBlock "xbsIndex_r4/Convert" SourceType "Xilinx Type Converter Block" infoedit "Hardware notes: rounding and saturating require hardware resources; truncating and wrapping do not." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Round (unbiased: +/- Inf)" overflow "Wrap" latency "0" dbl_ovrd off pipeline off xl_use_area off xl_area "[11 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "20,20,461,334" block_type "convert" block_version "10.1.3" sg_icon_stat "35,16,1,1,white,blue,0,74901e60,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 23 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [510, 675, 535, 705] ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "0" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "25,30,1,1,white,blue,0,d74ee26d,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay16" Ports [1, 1] Position [380, 610, 410, 635] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "0" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "30,25,1,1,white,blue,0,d74ee26d,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Delays" Ports [16, 16] Position [550, 236, 610, 564] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Delays" Location [447, 284, 682, 658] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 33, 55, 47] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [25, 53, 55, 67] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [25, 73, 55, 87] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [25, 93, 55, 107] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [25, 113, 55, 127] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [25, 133, 55, 147] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [25, 153, 55, 167] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [25, 173, 55, 187] Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "In9" Position [25, 193, 55, 207] Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "In10" Position [25, 213, 55, 227] Port "10" IconDisplay "Port number" } Block { BlockType Inport Name "In11" Position [25, 233, 55, 247] Port "11" IconDisplay "Port number" } Block { BlockType Inport Name "In12" Position [25, 253, 55, 267] Port "12" IconDisplay "Port number" } Block { BlockType Inport Name "In13" Position [25, 273, 55, 287] Port "13" IconDisplay "Port number" } Block { BlockType Inport Name "In14" Position [25, 293, 55, 307] Port "14" IconDisplay "Port number" } Block { BlockType Inport Name "In15" Position [25, 313, 55, 327] Port "15" IconDisplay "Port number" } Block { BlockType Inport Name "In16" Position [25, 333, 55, 347] Port "16" IconDisplay "Port number" } Block { BlockType Reference Name "Register10" Ports [1, 1] Position [80, 189, 105, 211] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register11" Ports [1, 1] Position [80, 209, 105, 231] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register12" Ports [1, 1] Position [80, 229, 105, 251] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register13" Ports [1, 1] Position [80, 249, 105, 271] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register14" Ports [1, 1] Position [80, 269, 105, 291] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register15" Ports [1, 1] Position [80, 289, 105, 311] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register16" Ports [1, 1] Position [80, 309, 105, 331] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register17" Ports [1, 1] Position [80, 329, 105, 351] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register18" Ports [1, 1] Position [130, 189, 155, 211] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register19" Ports [1, 1] Position [130, 209, 155, 231] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register2" Ports [1, 1] Position [80, 29, 105, 51] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register20" Ports [1, 1] Position [130, 229, 155, 251] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register21" Ports [1, 1] Position [130, 249, 155, 271] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register22" Ports [1, 1] Position [130, 269, 155, 291] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register23" Ports [1, 1] Position [130, 289, 155, 311] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register24" Ports [1, 1] Position [130, 309, 155, 331] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register25" Ports [1, 1] Position [130, 329, 155, 351] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register26" Ports [1, 1] Position [130, 29, 155, 51] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register27" Ports [1, 1] Position [130, 49, 155, 71] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register28" Ports [1, 1] Position [130, 69, 155, 91] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register29" Ports [1, 1] Position [130, 89, 155, 111] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register3" Ports [1, 1] Position [80, 49, 105, 71] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register30" Ports [1, 1] Position [130, 109, 155, 131] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register31" Ports [1, 1] Position [130, 129, 155, 151] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register32" Ports [1, 1] Position [130, 149, 155, 171] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register33" Ports [1, 1] Position [130, 169, 155, 191] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register4" Ports [1, 1] Position [80, 69, 105, 91] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register5" Ports [1, 1] Position [80, 89, 105, 111] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register6" Ports [1, 1] Position [80, 109, 105, 131] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register7" Ports [1, 1] Position [80, 129, 105, 151] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register8" Ports [1, 1] Position [80, 149, 105, 171] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register9" Ports [1, 1] Position [80, 169, 105, 191] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en off dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "10.1.3" sg_icon_stat "25,22,1,1,white,blue,0,ac6b57db,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [180, 33, 210, 47] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [180, 53, 210, 67] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [180, 73, 210, 87] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [180, 93, 210, 107] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [180, 113, 210, 127] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [180, 133, 210, 147] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [180, 153, 210, 167] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [180, 173, 210, 187] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Out9" Position [180, 193, 210, 207] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Out10" Position [180, 213, 210, 227] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Out11" Position [180, 233, 210, 247] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Out12" Position [180, 253, 210, 267] Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "Out13" Position [180, 273, 210, 287] Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "Out14" Position [180, 293, 210, 307] Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "Out15" Position [180, 313, 210, 327] Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "Out16" Position [180, 333, 210, 347] Port "16" IconDisplay "Port number" } Line { SrcBlock "Register25" SrcPort 1 DstBlock "Out16" DstPort 1 } Line { SrcBlock "In16" SrcPort 1 DstBlock "Register17" DstPort 1 } Line { SrcBlock "Register24" SrcPort 1 DstBlock "Out15" DstPort 1 } Line { SrcBlock "In15" SrcPort 1 DstBlock "Register16" DstPort 1 } Line { SrcBlock "Register23" SrcPort 1 DstBlock "Out14" DstPort 1 } Line { SrcBlock "In14" SrcPort 1 DstBlock "Register15" DstPort 1 } Line { SrcBlock "Register22" SrcPort 1 DstBlock "Out13" DstPort 1 } Line { SrcBlock "In13" SrcPort 1 DstBlock "Register14" DstPort 1 } Line { SrcBlock "Register21" SrcPort 1 DstBlock "Out12" DstPort 1 } Line { SrcBlock "In12" SrcPort 1 DstBlock "Register13" DstPort 1 } Line { SrcBlock "Register20" SrcPort 1 DstBlock "Out11" DstPort 1 } Line { SrcBlock "In11" SrcPort 1 DstBlock "Register12" DstPort 1 } Line { SrcBlock "Register19" SrcPort 1 DstBlock "Out10" DstPort 1 } Line { SrcBlock "In10" SrcPort 1 DstBlock "Register11" DstPort 1 } Line { SrcBlock "Register18" SrcPort 1 DstBlock "Out9" DstPort 1 } Line { SrcBlock "In9" SrcPort 1 DstBlock "Register10" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "Register9" DstPort 1 } Line { SrcBlock "Register33" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "In7" SrcPort 1 DstBlock "Register8" DstPort 1 } Line { SrcBlock "Register32" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "Register7" DstPort 1 } Line { SrcBlock "Register31" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "In5" SrcPort 1 DstBlock "Register6" DstPort 1 } Line { SrcBlock "Register30" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "Register5" DstPort 1 } Line { SrcBlock "Register29" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "In3" SrcPort 1 DstBlock "Register4" DstPort 1 } Line { SrcBlock "Register28" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Register3" DstPort 1 } Line { SrcBlock "Register27" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "Register26" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Register2" DstPort 1 } Line { SrcBlock "Register17" SrcPort 1 DstBlock "Register25" DstPort 1 } Line { SrcBlock "Register16" SrcPort 1 DstBlock "Register24" DstPort 1 } Line { SrcBlock "Register15" SrcPort 1 DstBlock "Register23" DstPort 1 } Line { SrcBlock "Register14" SrcPort 1 DstBlock "Register22" DstPort 1 } Line { SrcBlock "Register13" SrcPort 1 DstBlock "Register21" DstPort 1 } Line { SrcBlock "Register12" SrcPort 1 DstBlock "Register20" DstPort 1 } Line { SrcBlock "Register11" SrcPort 1 DstBlock "Register19" DstPort 1 } Line { SrcBlock "Register10" SrcPort 1 DstBlock "Register18" DstPort 1 } Line { SrcBlock "Register9" SrcPort 1 DstBlock "Register33" DstPort 1 } Line { SrcBlock "Register8" SrcPort 1 DstBlock "Register32" DstPort 1 } Line { SrcBlock "Register7" SrcPort 1 DstBlock "Register31" DstPort 1 } Line { SrcBlock "Register6" SrcPort 1 DstBlock "Register30" DstPort 1 } Line { SrcBlock "Register5" SrcPort 1 DstBlock "Register29" DstPort 1 } Line { SrcBlock "Register4" SrcPort 1 DstBlock "Register28" DstPort 1 } Line { SrcBlock "Register3" SrcPort 1 DstBlock "Register27" DstPort 1 } Line { SrcBlock "Register2" SrcPort 1 DstBlock "Register26" DstPort 1 } } } Block { BlockType Reference Name "Down Sample" Ports [1, 1] Position [1470, 471, 1495, 499] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[15 15 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "9.1.01" sg_icon_stat "25,28,1,1,white,blue,0,0a78979b,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample1" Ports [1, 1] Position [1470, 406, 1495, 434] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "4" sample_phase "First Value of Frame" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[15 15 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "9.1.01" sg_icon_stat "25,28,1,1,white,blue,0,0a78979b,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\downarrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType From Name "From2" Position [240, 680, 340, 700] ShowName off CloseFcn "tagdialog Close" GotoTag "CoefAddr" TagVisibility "global" } Block { BlockType SubSystem Name "ROMS & Mults" Ports [16, 16] Position [670, 224, 750, 576] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ROMS & Mults" Location [2, 70, 1902, 1108] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [125, 28, 155, 42] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [125, 93, 155, 107] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [125, 158, 155, 172] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [125, 223, 155, 237] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [125, 288, 155, 302] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [125, 353, 155, 367] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [125, 418, 155, 432] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [125, 483, 155, 497] Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "In9" Position [125, 548, 155, 562] Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "In10" Position [125, 613, 155, 627] Port "10" IconDisplay "Port number" } Block { BlockType Inport Name "In11" Position [125, 678, 155, 692] Port "11" IconDisplay "Port number" } Block { BlockType Inport Name "In12" Position [125, 743, 155, 757] Port "12" IconDisplay "Port number" } Block { BlockType Inport Name "In13" Position [125, 808, 155, 822] Port "13" IconDisplay "Port number" } Block { BlockType Inport Name "In14" Position [125, 873, 155, 887] Port "14" IconDisplay "Port number" } Block { BlockType Inport Name "In15" Position [125, 938, 155, 952] Port "15" IconDisplay "Port number" } Block { BlockType Inport Name "In16" Position [125, 1003, 155, 1017] Port "16" IconDisplay "Port number" } Block { BlockType From Name "From" Position [30, 1020, 130, 1040] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_0" TagVisibility "global" } Block { BlockType From Name "From10" Position [30, 435, 130, 455] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_9" TagVisibility "global" } Block { BlockType From Name "From11" Position [30, 370, 130, 390] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_10" TagVisibility "global" } Block { BlockType From Name "From12" Position [30, 305, 130, 325] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_11" TagVisibility "global" } Block { BlockType From Name "From13" Position [25, 175, 125, 195] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_13" TagVisibility "global" } Block { BlockType From Name "From14" Position [25, 110, 125, 130] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_14" TagVisibility "global" } Block { BlockType From Name "From15" Position [25, 45, 125, 65] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_15" TagVisibility "global" } Block { BlockType From Name "From16" Position [25, 240, 125, 260] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_12" TagVisibility "global" } Block { BlockType From Name "From2" Position [30, 955, 130, 975] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_1" TagVisibility "global" } Block { BlockType From Name "From3" Position [30, 890, 130, 910] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_2" TagVisibility "global" } Block { BlockType From Name "From4" Position [30, 825, 130, 845] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_3" TagVisibility "global" } Block { BlockType From Name "From5" Position [30, 760, 130, 780] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_4" TagVisibility "global" } Block { BlockType From Name "From6" Position [30, 695, 130, 715] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_5" TagVisibility "global" } Block { BlockType From Name "From7" Position [30, 630, 130, 650] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_6" TagVisibility "global" } Block { BlockType From Name "From8" Position [30, 565, 130, 585] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_7" TagVisibility "global" } Block { BlockType From Name "From9" Position [30, 500, 130, 520] ShowName off CloseFcn "tagdialog Close" GotoTag "ROM_8" TagVisibility "global" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [180, 937, 225, 973] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult10" Ports [2, 1] Position [180, 287, 225, 323] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult11" Ports [2, 1] Position [180, 352, 225, 388] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult12" Ports [2, 1] Position [180, 157, 225, 193] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult13" Ports [2, 1] Position [180, 27, 225, 63] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult14" Ports [2, 1] Position [180, 92, 225, 128] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult15" Ports [2, 1] Position [180, 482, 225, 518] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult16" Ports [2, 1] Position [180, 222, 225, 258] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [180, 807, 225, 843] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [180, 872, 225, 908] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult4" Ports [2, 1] Position [180, 677, 225, 713] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult5" Ports [2, 1] Position [180, 547, 225, 583] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult6" Ports [2, 1] Position [180, 612, 225, 648] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult7" Ports [2, 1] Position [180, 1002, 225, 1038] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult8" Ports [2, 1] Position [180, 742, 225, 778] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult9" Ports [2, 1] Position [180, 417, 225, 453] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "24" bin_pt "22" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[16 32 0 32 0 1 0]" pipeline "off" use_rpm "on" placement_style "Rectangular shape" has_advanced_control "0" sggui_pos "20,20,348,433" block_type "mult" block_version "9.1.01" sg_icon_stat "45,36,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [250, 38, 280, 52] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [250, 103, 280, 117] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [250, 168, 280, 182] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [250, 233, 280, 247] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [250, 298, 280, 312] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [250, 363, 280, 377] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [250, 428, 280, 442] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [250, 493, 280, 507] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Out9" Position [250, 558, 280, 572] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Out10" Position [250, 623, 280, 637] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Out11" Position [250, 688, 280, 702] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Out12" Position [250, 753, 280, 767] Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "Out13" Position [250, 818, 280, 832] Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "Out14" Position [250, 883, 280, 897] Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "Out15" Position [250, 948, 280, 962] Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "Out16" Position [250, 1013, 280, 1027] Port "16" IconDisplay "Port number" } Line { SrcBlock "Mult7" SrcPort 1 DstBlock "Out16" DstPort 1 } Line { SrcBlock "In16" SrcPort 1 DstBlock "Mult7" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "Out15" DstPort 1 } Line { SrcBlock "In15" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Mult3" SrcPort 1 DstBlock "Out14" DstPort 1 } Line { SrcBlock "In14" SrcPort 1 DstBlock "Mult3" DstPort 1 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "Out13" DstPort 1 } Line { SrcBlock "In13" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Mult8" SrcPort 1 DstBlock "Out12" DstPort 1 } Line { SrcBlock "In12" SrcPort 1 DstBlock "Mult8" DstPort 1 } Line { SrcBlock "Mult4" SrcPort 1 DstBlock "Out11" DstPort 1 } Line { SrcBlock "In11" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Mult6" SrcPort 1 DstBlock "Out10" DstPort 1 } Line { SrcBlock "In10" SrcPort 1 DstBlock "Mult6" DstPort 1 } Line { SrcBlock "Mult5" SrcPort 1 DstBlock "Out9" DstPort 1 } Line { SrcBlock "In9" SrcPort 1 DstBlock "Mult5" DstPort 1 } Line { SrcBlock "Mult15" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "Mult15" DstPort 1 } Line { SrcBlock "Mult9" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "In7" SrcPort 1 DstBlock "Mult9" DstPort 1 } Line { SrcBlock "Mult11" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "Mult11" DstPort 1 } Line { SrcBlock "Mult10" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "In5" SrcPort 1 DstBlock "Mult10" DstPort 1 } Line { SrcBlock "Mult16" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "Mult16" DstPort 1 } Line { SrcBlock "Mult12" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "In3" SrcPort 1 DstBlock "Mult12" DstPort 1 } Line { SrcBlock "Mult14" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Mult14" DstPort 1 } Line { SrcBlock "Mult13" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Mult13" DstPort 1 } Line { SrcBlock "From" SrcPort 1 DstBlock "Mult7" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Mult3" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Mult2" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Mult8" DstPort 2 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Mult4" DstPort 2 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Mult6" DstPort 2 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Mult5" DstPort 2 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Mult15" DstPort 2 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Mult9" DstPort 2 } Line { SrcBlock "From11" SrcPort 1 DstBlock "Mult11" DstPort 2 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Mult10" DstPort 2 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Mult16" DstPort 2 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Mult12" DstPort 2 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Mult14" DstPort 2 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Mult13" DstPort 2 } } } Block { BlockType Reference Name "Register" Ports [2, 1] Position [1375, 458, 1420, 507] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "9.1.01" sg_icon_stat "45,49,1,1,white,blue,0,cc3303a0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 49 49 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 43 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Register1" Ports [2, 1] Position [1375, 393, 1420, 442] ShowName off SourceBlock "xbsIndex_r4/Register" SourceType "Xilinx Register Block" init "0" rst off en on dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "register" block_version "9.1.01" sg_icon_stat "45,49,1,1,white,blue,0,cc3303a0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 49 49 ],[0.77 0.82 0.91]);\npatch([10 3 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[7 14 25 36 43 43 40 43 43 33 43 36 25 14 7 17 7 7 10 7 7 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 49 49 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Relational" Ports [2, 1] Position [850, 658, 895, 702] ShowName off SourceBlock "xbsIndex_r4/Relational" SourceType "Xilinx Arithmetic Relational Operator Block" mode "a=b" en off latency "0" dbl_ovrd off xl_use_area off xl_area "[1 0 0 2 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "relational" block_version "9.1.01" sg_icon_stat "45,44,1,1,white,blue,0,1b68ef8e,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a=b}\\newlinez^{-0}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "Sample\nRAMs" Ports [3, 16] Position [430, 237, 490, 563] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Sample\nRAMs" Location [2, 70, 1918, 1108] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "XA" Position [40, 103, 70, 117] IconDisplay "Port number" } Block { BlockType Inport Name "XB" Position [40, 423, 70, 437] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "Addr" Position [25, 610, 55, 625] Orientation "up" Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "MemoryA" Ports [2, 16] Position [95, 30, 165, 350] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MemoryA" Location [2, 70, 1902, 1108] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 913, 55, 927] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "Addr" Position [365, 1065, 395, 1080] Orientation "up" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "ASR 0" Ports [2, 1] Position [450, 547, 500, 598] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 1" Ports [2, 1] Position [450, 612, 500, 663] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 10" Ports [2, 1] Position [450, 157, 500, 208] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 11" Ports [2, 1] Position [450, 222, 500, 273] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 12" Ports [2, 1] Position [450, 287, 500, 338] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 13" Ports [2, 1] Position [450, 352, 500, 403] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 14" Ports [2, 1] Position [450, 417, 500, 468] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 15" Ports [2, 1] Position [450, 482, 500, 533] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 2" Ports [2, 1] Position [450, 677, 500, 728] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 3" Ports [2, 1] Position [450, 741, 500, 794] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,53,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 4" Ports [2, 1] Position [450, 807, 500, 858] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 5" Ports [2, 1] Position [450, 872, 500, 923] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 6" Ports [2, 1] Position [450, 937, 500, 988] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 7" Ports [2, 1] Position [450, 1002, 500, 1053] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 8" Ports [2, 1] Position [450, 27, 500, 78] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 9" Ports [2, 1] Position [450, 92, 500, 143] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [332, 780, 348, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay10" Ports [1, 1] Position [332, 260, 348, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay11" Ports [1, 1] Position [312, 260, 328, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay12" Ports [1, 1] Position [292, 260, 308, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [312, 780, 328, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [292, 780, 308, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [352, 780, 368, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [352, 520, 368, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [332, 520, 348, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay7" Ports [1, 1] Position [312, 520, 328, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay8" Ports [1, 1] Position [292, 520, 308, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay9" Ports [1, 1] Position [352, 260, 368, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "TDD" Ports [1, 4] Position [160, 786, 230, 1049] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "TDD" Location [2, 74, 1902, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 148, 55, 162] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "TDD" Ports [1, 4] Position [120, 25, 175, 280] SourceBlock "xbsIndex_r4/Time Division\nDemultiplexer" SourceType "Xilinx Time Division Demultiplexer Block" infoedit "Samples presented at the input are selected and down-sampled according to the frame sampling pattern specified. The sampled input is presented either as a single or multiple channel at the output." frame_pattern "ones(1,4)" impl_style "Multiple Channel" vin off dbl_ovrd off xl_use_area off xl_area "[49 98 0 0 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,268" block_type "tdd" block_version "9.1.01" sg_icon_stat "55,255,1,1,white,blue,0,acbf1a72,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 ],[0 0 86 86 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 37 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[14 26 44 62 74 74 69 74 74 57 73 61 44 27 15 31 14 14 19 14 14 ],[0.98 0.96 0.92]);\nplot([0 75 75 0 0 ],[0 0 86 86 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q0');\ncolor('black');port_label('output',2,'q1');\ncolor('black');port_label('output',3,'q2');\ncolor('black');port_label('output',4,'q3');\ncolor('black');disp('TDD');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "x[3]" Position [235, 48, 265, 62] IconDisplay "Port number" } Block { BlockType Outport Name "x[2]" Position [235, 113, 265, 127] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "x[1]" Position [230, 178, 260, 192] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "x[0]" Position [240, 243, 270, 257] Port "4" IconDisplay "Port number" } Line { SrcBlock "X" SrcPort 1 DstBlock "TDD" DstPort 1 } Line { SrcBlock "TDD" SrcPort 1 DstBlock "x[3]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 2 DstBlock "x[2]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 3 DstBlock "x[1]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 4 DstBlock "x[0]" DstPort 1 } } } Block { BlockType Outport Name "Out1" Position [525, 48, 555, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [525, 113, 555, 127] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [525, 178, 555, 192] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [525, 243, 555, 257] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [525, 308, 555, 322] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [525, 373, 555, 387] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [525, 438, 555, 452] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [525, 503, 555, 517] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Out9" Position [525, 568, 555, 582] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Out10" Position [525, 633, 555, 647] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Out11" Position [525, 698, 555, 712] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Out12" Position [525, 763, 555, 777] Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "Out13" Position [525, 828, 555, 842] Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "Out14" Position [525, 893, 555, 907] Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "Out15" Position [525, 958, 555, 972] Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "Out16" Position [525, 1023, 555, 1037] Port "16" IconDisplay "Port number" } Line { SrcBlock "ASR 7" SrcPort 1 DstBlock "Out16" DstPort 1 } Line { SrcBlock "ASR 6" SrcPort 1 DstBlock "Out15" DstPort 1 } Line { SrcBlock "ASR 5" SrcPort 1 DstBlock "Out14" DstPort 1 } Line { SrcBlock "ASR 4" SrcPort 1 DstBlock "Out13" DstPort 1 } Line { SrcBlock "ASR 3" SrcPort 1 DstBlock "Out12" DstPort 1 } Line { SrcBlock "ASR 2" SrcPort 1 DstBlock "Out11" DstPort 1 } Line { SrcBlock "ASR 1" SrcPort 1 DstBlock "Out10" DstPort 1 } Line { SrcBlock "ASR 0" SrcPort 1 DstBlock "Out9" DstPort 1 } Line { SrcBlock "ASR 15" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "ASR 14" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "ASR 13" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "ASR 12" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "ASR 11" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "ASR 10" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "ASR 9" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "ASR 8" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Delay4" SrcPort 1 Points [0, -20] Branch { DstBlock "Delay5" DstPort 1 } Branch { DstBlock "ASR 3" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [0, -85] Branch { DstBlock "Delay6" DstPort 1 } Branch { DstBlock "ASR 2" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [0, -150] Branch { DstBlock "Delay7" DstPort 1 } Branch { DstBlock "ASR 1" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, -215] Branch { DstBlock "Delay8" DstPort 1 } Branch { DstBlock "ASR 0" DstPort 1 } } Line { SrcBlock "Addr" SrcPort 1 Points [0, -20] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { Points [0, -65] Branch { DstBlock "ASR 9" DstPort 2 } Branch { Points [0, -65] DstBlock "ASR 8" DstPort 2 } } Branch { DstBlock "ASR 10" DstPort 2 } } Branch { DstBlock "ASR 11" DstPort 2 } } Branch { DstBlock "ASR 12" DstPort 2 } } Branch { DstBlock "ASR 13" DstPort 2 } } Branch { DstBlock "ASR 14" DstPort 2 } } Branch { DstBlock "ASR 15" DstPort 2 } } Branch { DstBlock "ASR 0" DstPort 2 } } Branch { DstBlock "ASR 1" DstPort 2 } } Branch { DstBlock "ASR 2" DstPort 2 } } Branch { DstBlock "ASR 3" DstPort 2 } } Branch { DstBlock "ASR 4" DstPort 2 } } Branch { DstBlock "ASR 5" DstPort 2 } } Branch { DstBlock "ASR 6" DstPort 2 } } Branch { DstBlock "ASR 7" DstPort 2 } } Line { SrcBlock "TDD" SrcPort 3 Points [105, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { DstBlock "ASR 6" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 Points [0, -20] Branch { DstBlock "ASR 15" DstPort 1 } Branch { DstBlock "Delay9" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 Points [0, -85] Branch { DstBlock "ASR 14" DstPort 1 } Branch { DstBlock "Delay10" DstPort 1 } } Line { SrcBlock "Delay7" SrcPort 1 Points [0, -150] Branch { DstBlock "ASR 13" DstPort 1 } Branch { DstBlock "Delay11" DstPort 1 } } Line { SrcBlock "Delay8" SrcPort 1 Points [0, -215] Branch { DstBlock "ASR 12" DstPort 1 } Branch { DstBlock "Delay12" DstPort 1 } } Line { SrcBlock "Delay9" SrcPort 1 Points [0, -20] DstBlock "ASR 11" DstPort 1 } Line { SrcBlock "Delay10" SrcPort 1 Points [0, -85] DstBlock "ASR 10" DstPort 1 } Line { SrcBlock "Delay11" SrcPort 1 Points [0, -150] DstBlock "ASR 9" DstPort 1 } Line { SrcBlock "Delay12" SrcPort 1 Points [0, -215] DstBlock "ASR 8" DstPort 1 } Line { SrcBlock "TDD" SrcPort 4 Points [125, 0] Branch { DstBlock "Delay4" DstPort 1 } Branch { DstBlock "ASR 7" DstPort 1 } } Line { SrcBlock "TDD" SrcPort 1 Points [65, 0] Branch { DstBlock "Delay3" DstPort 1 } Branch { DstBlock "ASR 4" DstPort 1 } } Line { SrcBlock "TDD" SrcPort 2 Points [85, 0] Branch { DstBlock "Delay2" DstPort 1 } Branch { DstBlock "ASR 5" DstPort 1 } } Line { SrcBlock "X" SrcPort 1 DstBlock "TDD" DstPort 1 } } } Block { BlockType SubSystem Name "MemoryB" Ports [2, 16] Position [95, 350, 165, 670] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "MemoryB" Location [2, 70, 1902, 1108] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 913, 55, 927] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "Addr" Position [365, 1060, 395, 1075] Orientation "up" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "ASR 0" Ports [2, 1] Position [450, 547, 500, 598] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 1" Ports [2, 1] Position [450, 612, 500, 663] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 10" Ports [2, 1] Position [450, 157, 500, 208] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 11" Ports [2, 1] Position [450, 222, 500, 273] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 12" Ports [2, 1] Position [450, 287, 500, 338] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 13" Ports [2, 1] Position [450, 352, 500, 403] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 14" Ports [2, 1] Position [450, 417, 500, 468] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 15" Ports [2, 1] Position [450, 482, 500, 533] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 2" Ports [2, 1] Position [450, 677, 500, 728] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 3" Ports [2, 1] Position [450, 741, 500, 794] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,53,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 4" Ports [2, 1] Position [450, 807, 500, 858] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 5" Ports [2, 1] Position [450, 872, 500, 923] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 6" Ports [2, 1] Position [450, 937, 500, 988] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 7" Ports [2, 1] Position [450, 1002, 500, 1053] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 8" Ports [2, 1] Position [450, 27, 500, 78] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,389" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "ASR 9" Ports [2, 1] Position [450, 92, 500, 143] SourceBlock "xbsIndex_r4/Addressable Shift Register" SourceType "Xilinx Addressable Shift Register Block" infoedit "Delay of configurable length. Any element in the delay \n line can be addressed and driven onto the output \n port.

Hardware notes: Implemented using SRL16s. \n If Virtex-4, Virtex-II or Spartan-3 devices are used, multiple SRLC16s are cascaded together." infer_latency on depth "2" initVector "[0]" en off dbl_ovrd off use_behavioral_HDL off use_rpm on xl_use_area off xl_area "[7 0 0 14 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "addrsr" block_version "9.1.01" sg_icon_stat "50,51,1,1,white,blue,0,c4974527,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('input',2,'addr');\ncolor('black');port_label('output',1,'q');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [332, 780, 348, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay10" Ports [1, 1] Position [332, 260, 348, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay11" Ports [1, 1] Position [312, 260, 328, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay12" Ports [1, 1] Position [292, 260, 308, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [312, 780, 328, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [292, 780, 308, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [352, 780, 368, 805] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [352, 520, 368, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [332, 520, 348, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay7" Ports [1, 1] Position [312, 520, 328, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay8" Ports [1, 1] Position [292, 520, 308, 545] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay9" Ports [1, 1] Position [352, 260, 368, 285] Orientation "up" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "4" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[7 14 0 14 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,255" block_type "delay" block_version "9.1.01" sg_icon_stat "16,25,1,1,white,blue,0,c2217bc4,up" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-4}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType SubSystem Name "TDD" Ports [1, 4] Position [160, 786, 230, 1049] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "TDD" Location [2, 74, 1902, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 148, 55, 162] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "TDD" Ports [1, 4] Position [120, 25, 175, 280] SourceBlock "xbsIndex_r4/Time Division\nDemultiplexer" SourceType "Xilinx Time Division Demultiplexer Block" infoedit "Samples presented at the input are selected and down-sampled according to the frame sampling pattern specified. The sampled input is presented either as a single or multiple channel at the output." frame_pattern "ones(1,4)" impl_style "Multiple Channel" vin off dbl_ovrd off xl_use_area off xl_area "[49 98 0 0 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,268" block_type "tdd" block_version "9.1.01" sg_icon_stat "55,255,1,1,white,blue,0,acbf1a72,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 ],[0 0 86 86 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 37 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[14 26 44 62 74 74 69 74 74 57 73 61 44 27 15 31 14 14 19 14 14 ],[0.98 0.96 0.92]);\nplot([0 75 75 0 0 ],[0 0 86 86 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q0');\ncolor('black');port_label('output',2,'q1');\ncolor('black');port_label('output',3,'q2');\ncolor('black');port_label('output',4,'q3');\ncolor('black');disp('TDD');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "x[3]" Position [235, 48, 265, 62] IconDisplay "Port number" } Block { BlockType Outport Name "x[2]" Position [235, 113, 265, 127] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "x[1]" Position [230, 178, 260, 192] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "x[0]" Position [240, 243, 270, 257] Port "4" IconDisplay "Port number" } Line { SrcBlock "TDD" SrcPort 4 DstBlock "x[0]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 3 DstBlock "x[1]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 2 DstBlock "x[2]" DstPort 1 } Line { SrcBlock "TDD" SrcPort 1 DstBlock "x[3]" DstPort 1 } Line { SrcBlock "X" SrcPort 1 DstBlock "TDD" DstPort 1 } } } Block { BlockType Outport Name "Out1" Position [525, 48, 555, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [525, 113, 555, 127] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [525, 178, 555, 192] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [525, 243, 555, 257] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [525, 308, 555, 322] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [525, 373, 555, 387] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [525, 438, 555, 452] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [525, 503, 555, 517] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Out9" Position [525, 568, 555, 582] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Out10" Position [525, 633, 555, 647] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Out11" Position [525, 698, 555, 712] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Out12" Position [525, 763, 555, 777] Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "Out13" Position [525, 828, 555, 842] Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "Out14" Position [525, 893, 555, 907] Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "Out15" Position [525, 958, 555, 972] Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "Out16" Position [525, 1023, 555, 1037] Port "16" IconDisplay "Port number" } Line { SrcBlock "X" SrcPort 1 DstBlock "TDD" DstPort 1 } Line { SrcBlock "TDD" SrcPort 2 Points [85, 0] Branch { DstBlock "ASR 5" DstPort 1 } Branch { DstBlock "Delay2" DstPort 1 } } Line { SrcBlock "TDD" SrcPort 1 Points [65, 0] Branch { DstBlock "ASR 4" DstPort 1 } Branch { DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "TDD" SrcPort 4 Points [125, 0] Branch { DstBlock "ASR 7" DstPort 1 } Branch { DstBlock "Delay4" DstPort 1 } } Line { SrcBlock "Delay12" SrcPort 1 Points [0, -215] DstBlock "ASR 8" DstPort 1 } Line { SrcBlock "Delay11" SrcPort 1 Points [0, -150] DstBlock "ASR 9" DstPort 1 } Line { SrcBlock "Delay10" SrcPort 1 Points [0, -85] DstBlock "ASR 10" DstPort 1 } Line { SrcBlock "Delay9" SrcPort 1 Points [0, -20] DstBlock "ASR 11" DstPort 1 } Line { SrcBlock "Delay8" SrcPort 1 Points [0, -215] Branch { DstBlock "Delay12" DstPort 1 } Branch { DstBlock "ASR 12" DstPort 1 } } Line { SrcBlock "Delay7" SrcPort 1 Points [0, -150] Branch { DstBlock "Delay11" DstPort 1 } Branch { DstBlock "ASR 13" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 Points [0, -85] Branch { DstBlock "Delay10" DstPort 1 } Branch { DstBlock "ASR 14" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 Points [0, -20] Branch { DstBlock "Delay9" DstPort 1 } Branch { DstBlock "ASR 15" DstPort 1 } } Line { SrcBlock "TDD" SrcPort 3 Points [105, 0] Branch { DstBlock "ASR 6" DstPort 1 } Branch { DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Addr" SrcPort 1 Points [0, -15] Branch { DstBlock "ASR 7" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 6" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 5" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 4" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 3" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 2" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 1" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 0" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 15" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 14" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 13" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 12" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 11" DstPort 2 } Branch { Points [0, -65] Branch { DstBlock "ASR 10" DstPort 2 } Branch { Points [0, -65] Branch { Points [0, -65] DstBlock "ASR 8" DstPort 2 } Branch { DstBlock "ASR 9" DstPort 2 } } } } } } } } } } } } } } } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, -215] Branch { DstBlock "ASR 0" DstPort 1 } Branch { DstBlock "Delay8" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [0, -150] Branch { DstBlock "ASR 1" DstPort 1 } Branch { DstBlock "Delay7" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [0, -85] Branch { DstBlock "ASR 2" DstPort 1 } Branch { DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "Delay4" SrcPort 1 Points [0, -20] Branch { DstBlock "ASR 3" DstPort 1 } Branch { DstBlock "Delay5" DstPort 1 } } Line { SrcBlock "ASR 8" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "ASR 9" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "ASR 10" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "ASR 11" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "ASR 12" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "ASR 13" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "ASR 14" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "ASR 15" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "ASR 0" SrcPort 1 DstBlock "Out9" DstPort 1 } Line { SrcBlock "ASR 1" SrcPort 1 DstBlock "Out10" DstPort 1 } Line { SrcBlock "ASR 2" SrcPort 1 DstBlock "Out11" DstPort 1 } Line { SrcBlock "ASR 3" SrcPort 1 DstBlock "Out12" DstPort 1 } Line { SrcBlock "ASR 4" SrcPort 1 DstBlock "Out13" DstPort 1 } Line { SrcBlock "ASR 5" SrcPort 1 DstBlock "Out14" DstPort 1 } Line { SrcBlock "ASR 6" SrcPort 1 DstBlock "Out15" DstPort 1 } Line { SrcBlock "ASR 7" SrcPort 1 DstBlock "Out16" DstPort 1 } } } Block { BlockType Reference Name "Time Division\nMultiplexer" Ports [2, 1] Position [330, 37, 390, 53] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer10" Ports [2, 1] Position [330, 217, 390, 233] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer11" Ports [2, 1] Position [330, 237, 390, 253] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer12" Ports [2, 1] Position [330, 257, 390, 273] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer13" Ports [2, 1] Position [330, 277, 390, 293] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer14" Ports [2, 1] Position [330, 297, 390, 313] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer15" Ports [2, 1] Position [330, 317, 390, 333] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer16" Ports [2, 1] Position [330, 337, 390, 353] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer2" Ports [2, 1] Position [330, 57, 390, 73] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer3" Ports [2, 1] Position [330, 77, 390, 93] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer4" Ports [2, 1] Position [330, 97, 390, 113] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer5" Ports [2, 1] Position [330, 117, 390, 133] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer6" Ports [2, 1] Position [330, 137, 390, 153] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer7" Ports [2, 1] Position [330, 157, 390, 173] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer8" Ports [2, 1] Position [330, 177, 390, 193] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer9" Ports [2, 1] Position [330, 197, 390, 213] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 31 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [415, 38, 445, 52] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [415, 58, 445, 72] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [415, 78, 445, 92] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [415, 98, 445, 112] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [415, 118, 445, 132] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [415, 138, 445, 152] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [415, 158, 445, 172] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [415, 178, 445, 192] Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "Out9" Position [415, 198, 445, 212] Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "Out10" Position [415, 218, 445, 232] Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "Out11" Position [415, 238, 445, 252] Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "Out12" Position [415, 258, 445, 272] Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "Out13" Position [415, 278, 445, 292] Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "Out14" Position [415, 298, 445, 312] Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "Out15" Position [415, 318, 445, 332] Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "Out16" Position [415, 338, 445, 352] Port "16" IconDisplay "Port number" } Line { SrcBlock "XB" SrcPort 1 DstBlock "MemoryB" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer16" SrcPort 1 DstBlock "Out16" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer15" SrcPort 1 DstBlock "Out15" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer14" SrcPort 1 DstBlock "Out14" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer13" SrcPort 1 DstBlock "Out13" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer12" SrcPort 1 DstBlock "Out12" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer11" SrcPort 1 DstBlock "Out11" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer10" SrcPort 1 DstBlock "Out10" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer9" SrcPort 1 DstBlock "Out9" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer8" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer7" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer6" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer5" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "XA" SrcPort 1 DstBlock "MemoryA" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer4" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer3" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer2" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "MemoryB" SrcPort 16 Points [145, 0] DstBlock "Time Division\nMultiplexer16" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 15 Points [140, 0; 0, -310] DstBlock "Time Division\nMultiplexer15" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 14 Points [135, 0; 0, -310] DstBlock "Time Division\nMultiplexer14" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 13 Points [130, 0; 0, -310] DstBlock "Time Division\nMultiplexer13" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 12 Points [125, 0; 0, -310] DstBlock "Time Division\nMultiplexer12" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 11 Points [120, 0; 0, -310] DstBlock "Time Division\nMultiplexer11" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 10 Points [115, 0; 0, -310] DstBlock "Time Division\nMultiplexer10" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 9 Points [110, 0; 0, -310] DstBlock "Time Division\nMultiplexer9" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 8 Points [105, 0; 0, -310] DstBlock "Time Division\nMultiplexer8" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 7 Points [100, 0; 0, -310] DstBlock "Time Division\nMultiplexer7" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 6 Points [95, 0; 0, -310] DstBlock "Time Division\nMultiplexer6" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 5 Points [90, 0; 0, -310] DstBlock "Time Division\nMultiplexer5" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 4 Points [85, 0; 0, -310] DstBlock "Time Division\nMultiplexer4" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 3 Points [80, 0; 0, -310] DstBlock "Time Division\nMultiplexer3" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 2 Points [75, 0; 0, -310] DstBlock "Time Division\nMultiplexer2" DstPort 2 } Line { SrcBlock "MemoryB" SrcPort 1 Points [70, 0; 0, -310] DstBlock "Time Division\nMultiplexer" DstPort 2 } Line { SrcBlock "MemoryA" SrcPort 16 DstBlock "Time Division\nMultiplexer16" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 15 DstBlock "Time Division\nMultiplexer15" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 14 DstBlock "Time Division\nMultiplexer14" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 13 DstBlock "Time Division\nMultiplexer13" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 12 DstBlock "Time Division\nMultiplexer12" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 11 DstBlock "Time Division\nMultiplexer11" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 10 DstBlock "Time Division\nMultiplexer10" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 9 DstBlock "Time Division\nMultiplexer9" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 8 DstBlock "Time Division\nMultiplexer8" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 7 DstBlock "Time Division\nMultiplexer7" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 6 DstBlock "Time Division\nMultiplexer6" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 5 DstBlock "Time Division\nMultiplexer5" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 4 DstBlock "Time Division\nMultiplexer4" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 3 DstBlock "Time Division\nMultiplexer3" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 2 DstBlock "Time Division\nMultiplexer2" DstPort 1 } Line { SrcBlock "MemoryA" SrcPort 1 DstBlock "Time Division\nMultiplexer" DstPort 1 } Line { Labels [0, 0] SrcBlock "Addr" SrcPort 1 Points [0, -15] Branch { DstBlock "MemoryB" DstPort 2 } Branch { Points [0, -320] DstBlock "MemoryA" DstPort 2 } } } } Block { BlockType Reference Name "Scale" Ports [1, 1] Position [1220, 459, 1250, 481] ShowName off SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In hardware this block costs nothing." scale_factor "-2" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.3" sg_icon_stat "30,22,1,1,white,blue,0,4c4129cf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\bf{2^{-2}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Scale1" Ports [1, 1] Position [1220, 394, 1250, 416] ShowName off SourceBlock "xbsIndex_r4/Scale" SourceType "Xilinx Input Scaler Block" infoedit "Scales input by a power of two by adjusting the binary point position.

Hardware notes: In hardware this block costs nothing." scale_factor "-2" dbl_ovrd off has_advanced_control "0" sggui_pos "20,20,336,191" block_type "scale" block_version "10.1.3" sg_icon_stat "30,22,1,1,white,blue,0,4c4129cf,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\bf{2^{-2}}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "TDD" Ports [1, 2] Position [955, 379, 1015, 421] SourceBlock "xbsIndex_r4/Time Division\nDemultiplexer" SourceType "Xilinx Time Division Demultiplexer Block" infoedit "Samples presented at the input are selected and down-sampled according to the frame sampling pattern specified. The sampled input is presented either as a single or multiple channel at the output." frame_pattern "ones(1,2)" impl_style "Multiple Channel" vin off dbl_ovrd off xl_use_area off xl_area "[42 84 0 0 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,268" block_type "tdd" block_version "9.1.01" sg_icon_stat "60,42,1,1,white,blue,0,f2edb40e,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 ],[0 0 86 86 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 37 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[14 26 44 62 74 74 69 74 74 57 73 61 44 27 15 31 14 14 19 14 14 ],[0.98 0.96 0.92]);\nplot([0 75 75 0 0 ],[0 0 86 86 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q0');\ncolor('black');port_label('output',2,'q1');\ncolor('black');disp('TDD');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "YA" Position [1570, 413, 1600, 427] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Outport Name "YB" Position [1570, 478, 1600, 492] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "Delays" SrcPort 16 DstBlock "ROMS & Mults" DstPort 16 } Line { SrcBlock "Delays" SrcPort 15 DstBlock "ROMS & Mults" DstPort 15 } Line { SrcBlock "Delays" SrcPort 14 DstBlock "ROMS & Mults" DstPort 14 } Line { SrcBlock "Delays" SrcPort 13 DstBlock "ROMS & Mults" DstPort 13 } Line { SrcBlock "Delays" SrcPort 12 DstBlock "ROMS & Mults" DstPort 12 } Line { SrcBlock "Delays" SrcPort 11 DstBlock "ROMS & Mults" DstPort 11 } Line { SrcBlock "Delays" SrcPort 10 DstBlock "ROMS & Mults" DstPort 10 } Line { SrcBlock "Delays" SrcPort 9 DstBlock "ROMS & Mults" DstPort 9 } Line { SrcBlock "Delays" SrcPort 8 DstBlock "ROMS & Mults" DstPort 8 } Line { SrcBlock "Delays" SrcPort 7 DstBlock "ROMS & Mults" DstPort 7 } Line { SrcBlock "Delays" SrcPort 6 DstBlock "ROMS & Mults" DstPort 6 } Line { SrcBlock "Delays" SrcPort 5 DstBlock "ROMS & Mults" DstPort 5 } Line { SrcBlock "Delays" SrcPort 4 DstBlock "ROMS & Mults" DstPort 4 } Line { SrcBlock "Delays" SrcPort 3 DstBlock "ROMS & Mults" DstPort 3 } Line { SrcBlock "Delays" SrcPort 2 DstBlock "ROMS & Mults" DstPort 2 } Line { SrcBlock "Delays" SrcPort 1 DstBlock "ROMS & Mults" DstPort 1 } Line { SrcBlock "Delay1" SrcPort 1 DstBlock "Relational" DstPort 2 } Line { Labels [0, 0] SrcBlock "Delay16" SrcPort 1 Points [0, -95] DstBlock "Sample\nRAMs" DstPort 3 } Line { SrcBlock "Sample\nRAMs" SrcPort 16 DstBlock "Delays" DstPort 16 } Line { SrcBlock "Sample\nRAMs" SrcPort 15 DstBlock "Delays" DstPort 15 } Line { SrcBlock "Sample\nRAMs" SrcPort 14 DstBlock "Delays" DstPort 14 } Line { SrcBlock "Sample\nRAMs" SrcPort 13 DstBlock "Delays" DstPort 13 } Line { SrcBlock "Sample\nRAMs" SrcPort 12 DstBlock "Delays" DstPort 12 } Line { SrcBlock "Sample\nRAMs" SrcPort 11 DstBlock "Delays" DstPort 11 } Line { SrcBlock "Sample\nRAMs" SrcPort 10 DstBlock "Delays" DstPort 10 } Line { SrcBlock "Sample\nRAMs" SrcPort 9 DstBlock "Delays" DstPort 9 } Line { SrcBlock "Sample\nRAMs" SrcPort 8 DstBlock "Delays" DstPort 8 } Line { SrcBlock "Sample\nRAMs" SrcPort 7 DstBlock "Delays" DstPort 7 } Line { SrcBlock "Sample\nRAMs" SrcPort 6 DstBlock "Delays" DstPort 6 } Line { SrcBlock "Sample\nRAMs" SrcPort 5 DstBlock "Delays" DstPort 5 } Line { SrcBlock "Sample\nRAMs" SrcPort 4 DstBlock "Delays" DstPort 4 } Line { SrcBlock "Sample\nRAMs" SrcPort 3 DstBlock "Delays" DstPort 3 } Line { SrcBlock "Sample\nRAMs" SrcPort 2 DstBlock "Delays" DstPort 2 } Line { SrcBlock "Sample\nRAMs" SrcPort 1 DstBlock "Delays" DstPort 1 } Line { SrcBlock "Relational" SrcPort 1 Points [190, 0] Branch { Points [260, 0; 0, -185] Branch { DstBlock "Register" DstPort 2 } Branch { Points [0, -65] DstBlock "Register1" DstPort 2 } } Branch { Points [0, -200] Branch { DstBlock "Accumulator" DstPort 2 } Branch { Points [0, -65] DstBlock "Accumulator1" DstPort 2 } } } Line { SrcBlock "TDD" SrcPort 2 Points [25, 0; 0, 45] DstBlock "Accumulator" DstPort 1 } Line { SrcBlock "TDD" SrcPort 1 DstBlock "Accumulator1" DstPort 1 } Line { SrcBlock "Adders" SrcPort 1 DstBlock "TDD" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "YA" DstPort 1 } Line { SrcBlock "Register1" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "Convert1" SrcPort 1 DstBlock "Register1" DstPort 1 } Line { SrcBlock "Scale1" SrcPort 1 DstBlock "Convert1" DstPort 1 } Line { SrcBlock "Accumulator1" SrcPort 1 DstBlock "Scale1" DstPort 1 } Line { SrcBlock "XB" SrcPort 1 DstBlock "Sample\nRAMs" DstPort 2 } Line { SrcBlock "XA" SrcPort 1 DstBlock "Sample\nRAMs" DstPort 1 } Line { SrcBlock "Convert" SrcPort 1 DstBlock "Register" DstPort 1 } Line { SrcBlock "Scale" SrcPort 1 DstBlock "Convert" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [50, 0] Branch { DstBlock "Delay1" DstPort 1 } Branch { DstBlock "Delay16" DstPort 1 } } Line { SrcBlock "Accumulator" SrcPort 1 DstBlock "Scale" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Relational" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "YB" DstPort 1 } Line { SrcBlock "Register" SrcPort 1 DstBlock "Down Sample" DstPort 1 } Line { SrcBlock "ROMS & Mults" SrcPort 9 DstBlock "Adders" DstPort 9 } Line { SrcBlock "ROMS & Mults" SrcPort 10 DstBlock "Adders" DstPort 10 } Line { SrcBlock "ROMS & Mults" SrcPort 11 DstBlock "Adders" DstPort 11 } Line { SrcBlock "ROMS & Mults" SrcPort 12 DstBlock "Adders" DstPort 12 } Line { SrcBlock "ROMS & Mults" SrcPort 13 DstBlock "Adders" DstPort 13 } Line { SrcBlock "ROMS & Mults" SrcPort 14 DstBlock "Adders" DstPort 14 } Line { SrcBlock "ROMS & Mults" SrcPort 15 DstBlock "Adders" DstPort 15 } Line { SrcBlock "ROMS & Mults" SrcPort 16 DstBlock "Adders" DstPort 16 } Line { SrcBlock "ROMS & Mults" SrcPort 1 DstBlock "Adders" DstPort 1 } Line { SrcBlock "ROMS & Mults" SrcPort 2 DstBlock "Adders" DstPort 2 } Line { SrcBlock "ROMS & Mults" SrcPort 3 DstBlock "Adders" DstPort 3 } Line { SrcBlock "ROMS & Mults" SrcPort 4 DstBlock "Adders" DstPort 4 } Line { SrcBlock "ROMS & Mults" SrcPort 5 DstBlock "Adders" DstPort 5 } Line { SrcBlock "ROMS & Mults" SrcPort 6 DstBlock "Adders" DstPort 6 } Line { SrcBlock "ROMS & Mults" SrcPort 7 DstBlock "Adders" DstPort 7 } Line { SrcBlock "ROMS & Mults" SrcPort 8 DstBlock "Adders" DstPort 8 } Annotation { Name "Need a pipeline stage here to meet 80MHz timing when using non-DSP48 mults in V4.\nNeed double-delays to keep everything lined up\nwhen processing two interleaved sample streams." Position [581, 185] } Annotation { Name "This convert will overflow, but never for\nthe output samples that are actually\ncaptured by the next register." Position [1335, 331] } } } Block { BlockType Sum Name "Add" Ports [2, 1] Position [1100, 417, 1130, 448] ShowName off Inputs "+-" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Add1" Ports [2, 1] Position [1110, 537, 1140, 568] ShowName off Inputs "+-" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType SubSystem Name "Chirp" Ports [0, 1] Position [180, 359, 220, 391] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Chirp" Location [47, 420, 272, 502] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Chirp Signal" Ports [0, 1] Position [25, 25, 55, 55] SourceBlock "simulink/Sources/Chirp Signal" SourceType "chirp" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" f1 "0" T "512" f2 "0.5" VectorParams1D on } Block { BlockType Gain Name "Gain" Position [100, 25, 145, 55] Gain "0.99" ParameterDataTypeMode "Inherit via internal rule" ParameterDataType "sfix(16)" ParameterScaling "2^0" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "Out1" Position [170, 33, 200, 47] IconDisplay "Port number" } Line { SrcBlock "Chirp Signal" SrcPort 1 DstBlock "Gain" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 DstBlock "Out1" DstPort 1 } } } Block { BlockType SubSystem Name "Chirp1" Ports [0, 1] Position [180, 384, 220, 416] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Chirp1" Location [47, 420, 272, 502] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Chirp Signal" Ports [0, 1] Position [25, 25, 55, 55] SourceBlock "simulink/Sources/Chirp Signal" SourceType "chirp" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" f1 "0" T "512" f2 "0.5" VectorParams1D on } Block { BlockType Gain Name "Gain" Position [100, 25, 145, 55] Gain "-0.99" ParameterDataTypeMode "Inherit via internal rule" ParameterDataType "sfix(16)" ParameterScaling "2^0" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "Out1" Position [170, 33, 200, 47] IconDisplay "Port number" } Line { SrcBlock "Gain" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Chirp Signal" SrcPort 1 DstBlock "Gain" DstPort 1 } } } Block { BlockType Reference Name "Down Sample" Ports [1, 1] Position [430, 360, 460, 390] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,c153b99b,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downarrow}2\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample1" Ports [1, 1] Position [430, 385, 460, 415] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,c153b99b,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downarrow}2\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" Ports [1, 1] Position [430, 460, 460, 490] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,c153b99b,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downarrow}2\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample3" Ports [1, 1] Position [430, 485, 460, 515] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,c153b99b,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downarrow}2\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample4" Ports [1, 1] Position [435, 190, 465, 220] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,c153b99b,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downarrow}2\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample5" Ports [1, 1] Position [435, 225, 465, 255] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "2" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[7 14 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "10.1.3" sg_icon_stat "30,30,1,1,white,blue,0,c153b99b,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[3 8 15 22 27 27 25 27 27 20 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 30 30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downarrow}2\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Integer Delay" Ports [1, 1] Position [935, 359, 965, 391] ShowName off SourceBlock "simulink/Discrete/Integer Delay" SourceType "Integer Delay" vinit "0.0" samptime "-1" NumDelays "48*2" } Block { BlockType Reference Name "Integer Delay1" Ports [1, 1] Position [925, 479, 955, 511] ShowName off SourceBlock "simulink/Discrete/Integer Delay" SourceType "Integer Delay" vinit "0.0" samptime "-1" NumDelays "48*2" } Block { BlockType SubSystem Name "Reference\nFilter" Ports [1, 1] Position [535, 189, 600, 221] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Reference\nFilter" Location [1157, 365, 1612, 542] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [110, 198, 140, 212] IconDisplay "Port number" } Block { BlockType Reference Name "DAFIR v9_0 2" Ports [1, 1] Position [205, 191, 270, 219] SourceBlock "xbsIndex_r4/DAFIR v9_0 " SourceType "Xilinx Finite Impulse Response Filter Block" infoedit "Hardware notes: Implemented using distributed arithmetic (DA). The hardware over sampling rate determines the degree of parallelism. A rate of one produces a fully parallel DA filter. A rate of n (resp., n+1) for an n-bit input signal produces a fully serial implementation for a non-symmetric (resp., symmetric) impulse response. Intermediate values produce implementations with intermediate levels of parallelism." coef "h64" structure "Inferred from Coefficients" coef_n_bits "18" coef_bin_pt "17" over_sample "1" reload off valids off rst off latency "15" num_channels "1" serial_input off polyphase_behavior "Decimate: 4:1 (samples in:out)" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" explicit_period "off" period "1" use_isim "0" has_advanced_control "0" sggui_pos "20,20,348,503" block_type "fir" block_version "10.1.2" sg_icon_stat "65,28,1,1,white,blue,0,0bf469c9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 62 62 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[7 17 31 45 55 55 51 55 55 42 55 46 31 16 7 20 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 62 62 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'x0');\ncolor('black');port_label('output',1,'y0');\ncolor('black');disp('64 tap');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Disregard Subsystem" Tag "discardX" Ports [] Position [301, 250, 359, 308] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code generation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative simulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "10.1.3" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0.1]);\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Gain Name "Gain" Position [425, 190, 470, 220] ShowName off Gain "0.25" ParameterDataTypeMode "Inherit via internal rule" ParameterDataType "sfix(16)" ParameterScaling "2^0" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "Rx_I1" Ports [1, 1] Position [335, 199, 380, 211] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "45,12,1,1,white,grey,0,b3a044a9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([19 17 20 17 19 22 23 24 27 24 21 19 22 19 21 24 27 24 23 22 19 ],[1 3 6 9 11 11 10 11 11 8 11 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 12 12 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Y" Position [520, 198, 550, 212] IconDisplay "Port number" } Line { SrcBlock "Rx_I1" SrcPort 1 DstBlock "Gain" DstPort 1 } Line { SrcBlock "DAFIR v9_0 2" SrcPort 1 DstBlock "Rx_I1" DstPort 1 } Line { SrcBlock "X" SrcPort 1 DstBlock "DAFIR v9_0 2" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 DstBlock "Y" DstPort 1 } } } Block { BlockType SubSystem Name "Reference\nFilter1" Ports [1, 1] Position [535, 224, 600, 256] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Reference\nFilter1" Location [1157, 365, 1612, 542] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [110, 198, 140, 212] IconDisplay "Port number" } Block { BlockType Reference Name "DAFIR v9_0 2" Ports [1, 1] Position [205, 191, 270, 219] SourceBlock "xbsIndex_r4/DAFIR v9_0 " SourceType "Xilinx Finite Impulse Response Filter Block" infoedit "Hardware notes: Implemented using distributed arithmetic (DA). The hardware over sampling rate determines the degree of parallelism. A rate of one produces a fully parallel DA filter. A rate of n (resp., n+1) for an n-bit input signal produces a fully serial implementation for a non-symmetric (resp., symmetric) impulse response. Intermediate values produce implementations with intermediate levels of parallelism." coef "h64" structure "Inferred from Coefficients" coef_n_bits "18" coef_bin_pt "17" over_sample "1" reload off valids off rst off latency "15" num_channels "1" serial_input off polyphase_behavior "Decimate: 4:1 (samples in:out)" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" explicit_period "off" period "1" use_isim "0" has_advanced_control "0" sggui_pos "20,20,348,503" block_type "fir" block_version "10.1.2" sg_icon_stat "65,28,1,1,white,blue,0,0bf469c9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 62 62 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[7 17 31 45 55 55 51 55 55 42 55 46 31 16 7 20 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 62 62 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'x0');\ncolor('black');port_label('output',1,'y0');\ncolor('black');disp('64 tap');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Disregard Subsystem" Tag "discardX" Ports [] Position [301, 250, 359, 308] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code generation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative simulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "10.1.3" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0.1]);\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Gain Name "Gain" Position [425, 190, 470, 220] ShowName off Gain "0.25" ParameterDataTypeMode "Inherit via internal rule" ParameterDataType "sfix(16)" ParameterScaling "2^0" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "Rx_I1" Ports [1, 1] Position [335, 199, 380, 211] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "45,12,1,1,white,grey,0,b3a044a9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([19 17 20 17 19 22 23 24 27 24 21 19 22 19 21 24 27 24 23 22 19 ],[1 3 6 9 11 11 10 11 11 8 11 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 12 12 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Y" Position [520, 198, 550, 212] IconDisplay "Port number" } Line { SrcBlock "Gain" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "X" SrcPort 1 DstBlock "DAFIR v9_0 2" DstPort 1 } Line { SrcBlock "DAFIR v9_0 2" SrcPort 1 DstBlock "Rx_I1" DstPort 1 } Line { SrcBlock "Rx_I1" SrcPort 1 DstBlock "Gain" DstPort 1 } } } Block { BlockType Scope Name "Rx Scope" Ports [8] Position [1170, 326, 1220, 574] Floating off Location [1, 45, 1921, 1127] Open off NumInputPorts "8" TickLabels "on" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" } TimeRange "1000" YMin "-1~-1~-1~-1~-1~-1~-1~-1" YMax "1~1~1~1~1~1~1~1" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "RxA_I_10M" Ports [1, 1] Position [740, 365, 805, 385] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "RxA_I_40M" Ports [1, 1] Position [300, 365, 365, 385] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Round (unbiased: +/- Inf)" overflow "Flag as error" period "1/2" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "RxA_Q_10M" Ports [1, 1] Position [740, 390, 805, 410] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "RxA_Q_40M" Ports [1, 1] Position [300, 390, 365, 410] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Round (unbiased: +/- Inf)" overflow "Flag as error" period "1/2" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "RxB_I_10M" Ports [1, 1] Position [740, 465, 805, 485] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "RxB_I_40M" Ports [1, 1] Position [300, 465, 365, 485] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Round (unbiased: +/- Inf)" overflow "Flag as error" period "1/2" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "RxB_Q_10M" Ports [1, 1] Position [740, 490, 805, 510] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "RxB_Q_40M" Ports [1, 1] Position [300, 490, 365, 510] SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Signed (2's comp)" n_bits "14" bin_pt "13" quantization "Round (unbiased: +/- Inf)" overflow "Flag as error" period "1/2" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 14 0 0]" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Terminator Name "Terminator1" Position [870, 490, 890, 510] ShowName off } Block { BlockType Terminator Name "Terminator3" Position [870, 465, 890, 485] ShowName off } Block { BlockType Reference Name "Up Sample" Ports [1, 1] Position [645, 357, 675, 393] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "8" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "30,36,1,1,white,blue,0,8b0564a6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 36 36 ],[0.77 0.82 0.91]);\npatch([7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[6 11 18 25 30 30 28 30 30 23 29 24 18 12 7 13 6 6 8 6 6 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 36 36 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample1" Ports [1, 1] Position [645, 382, 675, 418] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "8" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "30,36,1,1,white,blue,0,8b0564a6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 36 36 ],[0.77 0.82 0.91]);\npatch([7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[6 11 18 25 30 30 28 30 30 23 29 24 18 12 7 13 6 6 8 6 6 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 36 36 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample2" Ports [1, 1] Position [645, 457, 675, 493] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "8" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "30,36,1,1,white,blue,0,8b0564a6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 36 36 ],[0.77 0.82 0.91]);\npatch([7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[6 11 18 25 30 30 28 30 30 23 29 24 18 12 7 13 6 6 8 6 6 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 36 36 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample3" Ports [1, 1] Position [645, 482, 675, 518] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "8" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "30,36,1,1,white,blue,0,8b0564a6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 30 30 0 ],[0 0 36 36 ],[0.77 0.82 0.91]);\npatch([7 2 9 2 7 15 17 19 27 20 14 9 15 9 14 20 27 19 17 15 7 ],[6 11 18 25 30 30 28 30 30 23 29 24 18 12 7 13 6 6 8 6 6 ],[0.98 0.96 0.92]);\nplot([0 30 30 0 0 ],[0 0 36 36 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}8','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Line { SrcBlock "RxA_I_40M" SrcPort 1 Points [15, 0] Branch { DstBlock "Down Sample" DstPort 1 } Branch { Points [0, -170] DstBlock "Down Sample4" DstPort 1 } } Line { SrcBlock "Chirp" SrcPort 1 Points [35, 0] Branch { DstBlock "RxA_I_40M" DstPort 1 } Branch { Points [0, 100] DstBlock "RxB_I_40M" DstPort 1 } Branch { Points [0, -85; 885, 0; 0, 55] DstBlock "Rx Scope" DstPort 1 } } Line { SrcBlock "Chirp1" SrcPort 1 Points [40, 0] Branch { DstBlock "RxA_Q_40M" DstPort 1 } Branch { Points [0, 100] DstBlock "RxB_Q_40M" DstPort 1 } Branch { Points [0, -105; 875, 0; 0, 170] DstBlock "Rx Scope" DstPort 5 } } Line { SrcBlock "Integer Delay" SrcPort 1 Points [115, 0] Branch { DstBlock "Rx Scope" DstPort 2 } Branch { DstBlock "Add" DstPort 1 } } Line { SrcBlock "Integer Delay1" SrcPort 1 Points [115, 0] Branch { DstBlock "Rx Scope" DstPort 6 } Branch { Points [0, 50] DstBlock "Add1" DstPort 1 } } Line { SrcBlock "RxB_I_40M" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "RxB_Q_40M" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "2-Ch Decimation B" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "2-Ch Decimation B" SrcPort 2 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "Add" SrcPort 1 DstBlock "Rx Scope" DstPort 4 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Rx Scope" DstPort 8 } Line { SrcBlock "2-Ch Decimation A" SrcPort 1 DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "RxA_Q_40M" SrcPort 1 Points [20, 0] Branch { DstBlock "Down Sample1" DstPort 1 } Branch { Points [0, -160] DstBlock "Down Sample5" DstPort 1 } } Line { SrcBlock "2-Ch Decimation A" SrcPort 2 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "RxA_I_10M" SrcPort 1 DstBlock "Integer Delay" DstPort 1 } Line { SrcBlock "RxA_Q_10M" SrcPort 1 Points [95, 0; 0, 95] DstBlock "Integer Delay1" DstPort 1 } Line { SrcBlock "Reference\nFilter" SrcPort 1 Points [465, 0; 0, 200] Branch { DstBlock "Rx Scope" DstPort 3 } Branch { Points [0, 35] DstBlock "Add" DstPort 2 } } Line { SrcBlock "Reference\nFilter1" SrcPort 1 Points [450, 0; 0, 285] Branch { DstBlock "Rx Scope" DstPort 7 } Branch { Points [0, 35] DstBlock "Add1" DstPort 2 } } Line { SrcBlock "RxB_I_10M" SrcPort 1 DstBlock "Terminator3" DstPort 1 } Line { SrcBlock "RxB_Q_10M" SrcPort 1 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "Down Sample" SrcPort 1 DstBlock "2-Ch Decimation A" DstPort 1 } Line { SrcBlock "Down Sample1" SrcPort 1 DstBlock "2-Ch Decimation A" DstPort 2 } Line { SrcBlock "Down Sample2" SrcPort 1 DstBlock "2-Ch Decimation B" DstPort 1 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "2-Ch Decimation B" DstPort 2 } Line { SrcBlock "Down Sample4" SrcPort 1 DstBlock "Reference\nFilter" DstPort 1 } Line { SrcBlock "Down Sample5" SrcPort 1 DstBlock "Reference\nFilter1" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "RxA_I_10M" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "RxA_Q_10M" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "RxB_I_10M" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "RxB_Q_10M" DstPort 1 } } } Block { BlockType SubSystem Name "Tx Path" Ports [] Position [170, 65, 281, 101] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Tx Path" Location [647, 750, 1457, 1017] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType SubSystem Name "2-Ch Interp A" Ports [2, 2] Position [510, 282, 590, 313] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "2-Ch Interp A" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "134" Block { BlockType Inport Name "XA" Position [550, 274, 585, 286] NamePlacement "alternate" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "XB" Position [550, 319, 585, 331] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType SubSystem Name "Adders" Ports [8, 1] Position [880, 249, 920, 351] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Adders" Location [957, 199, 1352, 546] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 28, 55, 42] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [25, 48, 55, 62] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [25, 93, 55, 107] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [25, 113, 55, 127] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [25, 218, 55, 232] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [25, 238, 55, 252] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [25, 283, 55, 297] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [25, 303, 55, 317] Port "8" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [80, 90, 125, 130] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [165, 80, 210, 120] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 20 0 19 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub3" Ports [2, 1] Position [80, 215, 125, 255] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub4" Ports [2, 1] Position [80, 280, 125, 320] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub5" Ports [2, 1] Position [165, 225, 210, 265] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 20 0 19 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub7" Ports [2, 1] Position [80, 25, 125, 65] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub8" Ports [2, 1] Position [270, 150, 315, 190] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "388,27,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [340, 163, 370, 177] IconDisplay "Port number" } Line { SrcBlock "AddSub5" SrcPort 1 Points [35, 0; 0, -65] DstBlock "AddSub8" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [35, 0; 0, 60] DstBlock "AddSub8" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [20, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub7" SrcPort 1 Points [15, 0; 0, 45] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "AddSub7" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "AddSub7" DstPort 2 } Line { SrcBlock "In3" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "AddSub8" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In5" SrcPort 1 DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "In7" SrcPort 1 DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "AddSub4" DstPort 2 } } } Block { BlockType SubSystem Name "Mults & ROMs" Ports [8, 8] Position [770, 250, 810, 350] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Mults & ROMs" Location [919, 161, 1381, 743] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [170, 33, 200, 47] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [170, 88, 200, 102] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [170, 133, 200, 147] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [170, 183, 200, 197] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [170, 228, 200, 242] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [170, 278, 200, 292] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [170, 323, 200, 337] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [170, 373, 200, 387] Port "8" IconDisplay "Port number" } Block { BlockType From Name "From1" Position [25, 105, 125, 125] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_1" TagVisibility "global" } Block { BlockType From Name "From16" Position [30, 50, 130, 70] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_0" TagVisibility "global" } Block { BlockType From Name "From2" Position [25, 200, 125, 220] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_3" TagVisibility "global" } Block { BlockType From Name "From3" Position [25, 150, 125, 170] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_2" TagVisibility "global" } Block { BlockType From Name "From4" Position [30, 295, 130, 315] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_5" TagVisibility "global" } Block { BlockType From Name "From5" Position [25, 245, 125, 265] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_4" TagVisibility "global" } Block { BlockType From Name "From6" Position [30, 390, 130, 410] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_7" TagVisibility "global" } Block { BlockType From Name "From7" Position [30, 340, 130, 360] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_6" TagVisibility "global" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [225, 84, 265, 126] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [225, 29, 265, 71] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [225, 129, 265, 171] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult4" Ports [2, 1] Position [225, 179, 265, 221] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult5" Ports [2, 1] Position [225, 224, 265, 266] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult6" Ports [2, 1] Position [225, 274, 265, 316] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult7" Ports [2, 1] Position [225, 319, 265, 361] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult8" Ports [2, 1] Position [225, 369, 265, 411] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [290, 43, 320, 57] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [290, 98, 320, 112] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [290, 143, 320, 157] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [290, 193, 320, 207] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [290, 238, 320, 252] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [290, 288, 320, 302] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [290, 333, 320, 347] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [290, 383, 320, 397] Port "8" IconDisplay "Port number" } Line { SrcBlock "From6" SrcPort 1 DstBlock "Mult8" DstPort 2 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Mult7" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Mult6" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Mult5" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mult4" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Mult3" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Mult2" DstPort 2 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "In3" SrcPort 1 DstBlock "Mult3" DstPort 1 } Line { SrcBlock "Mult3" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Mult4" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "In5" SrcPort 1 DstBlock "Mult5" DstPort 1 } Line { SrcBlock "Mult5" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "Mult6" DstPort 1 } Line { SrcBlock "Mult6" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "In7" SrcPort 1 DstBlock "Mult7" DstPort 1 } Line { SrcBlock "Mult7" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "Mult8" DstPort 1 } Line { SrcBlock "Mult8" SrcPort 1 DstBlock "Out8" DstPort 1 } } } Block { BlockType SubSystem Name "Sample RAMs" Ports [2, 8] Position [645, 255, 685, 345] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Sample RAMs" Location [163, 146, 651, 535] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "194" Block { BlockType Inport Name "A" Position [25, 83, 55, 97] IconDisplay "Port number" } Block { BlockType Inport Name "B" Position [25, 203, 55, 217] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Delays" Ports [1, 8] Position [80, 29, 125, 146] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Delays" Location [47, 96, 322, 525] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 29, 60, 41] NamePlacement "alternate" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "Delay" Ports [1, 1] Position [112, 70, 138, 95] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [112, 120, 138, 145] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [112, 165, 138, 190] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [112, 210, 138, 235] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [112, 260, 138, 285] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [112, 310, 138, 335] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [112, 355, 138, 380] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample1" Ports [1, 1] Position [160, 91, 195, 119] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample10" Ports [1, 1] Position [160, 136, 195, 164] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample15" Ports [1, 1] Position [160, 376, 195, 404] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample2" Ports [1, 1] Position [160, 36, 195, 64] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample3" Ports [1, 1] Position [160, 186, 195, 214] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample4" Ports [1, 1] Position [160, 231, 195, 259] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample5" Ports [1, 1] Position [160, 281, 195, 309] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample6" Ports [1, 1] Position [160, 326, 195, 354] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [220, 43, 250, 57] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [220, 98, 250, 112] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [220, 143, 250, 157] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [220, 193, 250, 207] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [220, 238, 250, 252] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [220, 288, 250, 302] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [220, 333, 250, 347] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [220, 383, 250, 397] Port "8" IconDisplay "Port number" } Line { SrcBlock "X" SrcPort 1 Points [60, 0; 0, 15] Branch { DstBlock "Delay" DstPort 1 } Branch { DstBlock "Up Sample2" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 Points [0, 5] DstBlock "Up Sample15" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 Points [0, 0] Branch { DstBlock "Delay6" DstPort 1 } Branch { DstBlock "Up Sample6" DstPort 1 } } Line { SrcBlock "Delay4" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay5" DstPort 1 } Branch { DstBlock "Up Sample5" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay4" DstPort 1 } Branch { DstBlock "Up Sample4" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay3" DstPort 1 } Branch { DstBlock "Up Sample3" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [0, 0] Branch { DstBlock "Delay2" DstPort 1 } Branch { DstBlock "Up Sample10" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay1" DstPort 1 } Branch { DstBlock "Up Sample1" DstPort 1 } } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "Up Sample10" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "Up Sample15" SrcPort 1 DstBlock "Out8" DstPort 1 } } } Block { BlockType SubSystem Name "Delays1" Ports [1, 8] Position [80, 149, 125, 266] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Delays1" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 29, 60, 41] NamePlacement "alternate" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "Delay" Ports [1, 1] Position [112, 70, 138, 95] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [112, 120, 138, 145] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [112, 165, 138, 190] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [112, 210, 138, 235] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [112, 260, 138, 285] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [112, 310, 138, 335] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [112, 355, 138, 380] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample1" Ports [1, 1] Position [160, 91, 195, 119] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample10" Ports [1, 1] Position [160, 136, 195, 164] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample15" Ports [1, 1] Position [160, 376, 195, 404] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample2" Ports [1, 1] Position [160, 36, 195, 64] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample3" Ports [1, 1] Position [160, 186, 195, 214] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample4" Ports [1, 1] Position [160, 231, 195, 259] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample5" Ports [1, 1] Position [160, 281, 195, 309] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample6" Ports [1, 1] Position [160, 326, 195, 354] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [220, 43, 250, 57] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [220, 98, 250, 112] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [220, 143, 250, 157] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [220, 193, 250, 207] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [220, 238, 250, 252] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [220, 288, 250, 302] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [220, 333, 250, 347] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [220, 383, 250, 397] Port "8" IconDisplay "Port number" } Line { SrcBlock "Up Sample15" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "Up Sample10" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [0, 5] Branch { DstBlock "Up Sample1" DstPort 1 } Branch { DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [0, 0] Branch { DstBlock "Up Sample10" DstPort 1 } Branch { DstBlock "Delay2" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [0, 5] Branch { DstBlock "Up Sample3" DstPort 1 } Branch { DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, 5] Branch { DstBlock "Up Sample4" DstPort 1 } Branch { DstBlock "Delay4" DstPort 1 } } Line { SrcBlock "Delay4" SrcPort 1 Points [0, 5] Branch { DstBlock "Up Sample5" DstPort 1 } Branch { DstBlock "Delay5" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 Points [0, 0] Branch { DstBlock "Up Sample6" DstPort 1 } Branch { DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 Points [0, 5] DstBlock "Up Sample15" DstPort 1 } Line { SrcBlock "X" SrcPort 1 Points [60, 0; 0, 15] Branch { DstBlock "Up Sample2" DstPort 1 } Branch { DstBlock "Delay" DstPort 1 } } } } Block { BlockType Reference Name "Time Division\nMultiplexer1" Ports [2, 1] Position [225, 47, 285, 63] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer16" Ports [2, 1] Position [225, 32, 285, 48] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer2" Ports [2, 1] Position [225, 77, 285, 93] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer3" Ports [2, 1] Position [225, 62, 285, 78] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer4" Ports [2, 1] Position [225, 107, 285, 123] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer5" Ports [2, 1] Position [225, 92, 285, 108] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer6" Ports [2, 1] Position [225, 137, 285, 153] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer7" Ports [2, 1] Position [225, 122, 285, 138] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [385, 33, 415, 47] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [310, 48, 340, 62] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [310, 63, 340, 77] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [310, 78, 340, 92] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [310, 93, 340, 107] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [310, 108, 340, 122] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [310, 123, 340, 137] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [310, 138, 340, 152] Port "8" IconDisplay "Port number" } Line { SrcBlock "Delays" SrcPort 1 DstBlock "Time Division\nMultiplexer16" DstPort 1 } Line { SrcBlock "Delays1" SrcPort 1 Points [15, 0; 0, -110] DstBlock "Time Division\nMultiplexer16" DstPort 2 } Line { SrcBlock "Delays" SrcPort 2 DstBlock "Time Division\nMultiplexer1" DstPort 1 } Line { SrcBlock "Delays1" SrcPort 2 Points [20, 0; 0, -110] DstBlock "Time Division\nMultiplexer1" DstPort 2 } Line { SrcBlock "Delays" SrcPort 3 DstBlock "Time Division\nMultiplexer3" DstPort 1 } Line { SrcBlock "Delays" SrcPort 4 DstBlock "Time Division\nMultiplexer2" DstPort 1 } Line { SrcBlock "Delays" SrcPort 5 DstBlock "Time Division\nMultiplexer5" DstPort 1 } Line { SrcBlock "Delays" SrcPort 6 DstBlock "Time Division\nMultiplexer4" DstPort 1 } Line { SrcBlock "Delays" SrcPort 7 DstBlock "Time Division\nMultiplexer7" DstPort 1 } Line { SrcBlock "Delays" SrcPort 8 DstBlock "Time Division\nMultiplexer6" DstPort 1 } Line { SrcBlock "Delays1" SrcPort 3 Points [25, 0; 0, -110] DstBlock "Time Division\nMultiplexer3" DstPort 2 } Line { SrcBlock "Delays1" SrcPort 4 Points [30, 0; 0, -110] DstBlock "Time Division\nMultiplexer2" DstPort 2 } Line { SrcBlock "Delays1" SrcPort 5 Points [35, 0; 0, -110] DstBlock "Time Division\nMultiplexer5" DstPort 2 } Line { SrcBlock "Delays1" SrcPort 6 Points [40, 0; 0, -110] DstBlock "Time Division\nMultiplexer4" DstPort 2 } Line { SrcBlock "Delays1" SrcPort 7 Points [45, 0; 0, -110] DstBlock "Time Division\nMultiplexer7" DstPort 2 } Line { SrcBlock "Delays1" SrcPort 8 Points [50, 0; 0, -110] DstBlock "Time Division\nMultiplexer6" DstPort 2 } Line { SrcBlock "Time Division\nMultiplexer16" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer1" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer3" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer2" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "A" SrcPort 1 DstBlock "Delays" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer5" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer4" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer7" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer6" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "B" SrcPort 1 DstBlock "Delays1" DstPort 1 } } } Block { BlockType Reference Name "TDD" Ports [1, 2] Position [965, 279, 1025, 321] SourceBlock "xbsIndex_r4/Time Division\nDemultiplexer" SourceType "Xilinx Time Division Demultiplexer Block" infoedit "Samples presented at the input are selected and down-sampled according to the frame sampling pattern specified. The sampled input is presented either as a single or multiple channel at the output." frame_pattern "ones(1,2)" impl_style "Multiple Channel" vin off dbl_ovrd off xl_use_area off xl_area "[24 48 0 0 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,268" block_type "tdd" block_version "9.1.01" sg_icon_stat "60,42,1,1,white,blue,0,f2edb40e,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 ],[0 0 86 86 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 37 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[14 26 44 62 74 74 69 74 74 57 73 61 44 27 15 31 14 14 19 14 14 ],[0.98 0.96 0.92]);\nplot([0 75 75 0 0 ],[0 0 86 86 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q0');\ncolor('black');port_label('output',2,'q1');\ncolor('black');disp('TDD');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "YA" Position [1100, 283, 1130, 297] NamePlacement "alternate" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Outport Name "YB" Position [1100, 303, 1130, 317] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "Mults & ROMs" SrcPort 8 DstBlock "Adders" DstPort 8 } Line { SrcBlock "Mults & ROMs" SrcPort 7 DstBlock "Adders" DstPort 7 } Line { SrcBlock "Mults & ROMs" SrcPort 6 DstBlock "Adders" DstPort 6 } Line { SrcBlock "Mults & ROMs" SrcPort 5 DstBlock "Adders" DstPort 5 } Line { SrcBlock "Mults & ROMs" SrcPort 4 DstBlock "Adders" DstPort 4 } Line { SrcBlock "Mults & ROMs" SrcPort 3 DstBlock "Adders" DstPort 3 } Line { SrcBlock "Mults & ROMs" SrcPort 2 DstBlock "Adders" DstPort 2 } Line { SrcBlock "Mults & ROMs" SrcPort 1 DstBlock "Adders" DstPort 1 } Line { SrcBlock "XA" SrcPort 1 DstBlock "Sample RAMs" DstPort 1 } Line { SrcBlock "XB" SrcPort 1 DstBlock "Sample RAMs" DstPort 2 } Line { SrcBlock "Sample RAMs" SrcPort 1 DstBlock "Mults & ROMs" DstPort 1 } Line { SrcBlock "Sample RAMs" SrcPort 2 DstBlock "Mults & ROMs" DstPort 2 } Line { SrcBlock "Sample RAMs" SrcPort 3 DstBlock "Mults & ROMs" DstPort 3 } Line { SrcBlock "Sample RAMs" SrcPort 4 DstBlock "Mults & ROMs" DstPort 4 } Line { SrcBlock "Sample RAMs" SrcPort 5 DstBlock "Mults & ROMs" DstPort 5 } Line { SrcBlock "Sample RAMs" SrcPort 6 DstBlock "Mults & ROMs" DstPort 6 } Line { SrcBlock "Sample RAMs" SrcPort 7 DstBlock "Mults & ROMs" DstPort 7 } Line { SrcBlock "Sample RAMs" SrcPort 8 DstBlock "Mults & ROMs" DstPort 8 } Line { SrcBlock "Adders" SrcPort 1 DstBlock "TDD" DstPort 1 } Line { SrcBlock "TDD" SrcPort 1 DstBlock "YA" DstPort 1 } Line { SrcBlock "TDD" SrcPort 2 DstBlock "YB" DstPort 1 } } } Block { BlockType SubSystem Name "2-Ch Interp B" Ports [2, 2] Position [510, 392, 590, 423] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "2-Ch Interp B" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "134" Block { BlockType Inport Name "XA" Position [550, 274, 585, 286] NamePlacement "alternate" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "XB" Position [550, 319, 585, 331] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType SubSystem Name "Adders" Ports [8, 1] Position [880, 249, 920, 351] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Adders" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [25, 28, 55, 42] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [25, 48, 55, 62] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [25, 93, 55, 107] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [25, 113, 55, 127] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [25, 218, 55, 232] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [25, 238, 55, 252] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [25, 283, 55, 297] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [25, 303, 55, 317] Port "8" IconDisplay "Port number" } Block { BlockType Reference Name "AddSub1" Ports [2, 1] Position [80, 90, 125, 130] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub2" Ports [2, 1] Position [165, 80, 210, 120] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 20 0 19 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub3" Ports [2, 1] Position [80, 215, 125, 255] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub4" Ports [2, 1] Position [80, 280, 125, 320] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub5" Ports [2, 1] Position [165, 225, 210, 265] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "1" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 20 0 19 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,d7118884,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub7" Ports [2, 1] Position [80, 25, 125, 65] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "Full" arith_type "Unsigned" n_bits "16" bin_pt "14" quantization "Truncate" overflow "Wrap" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[10 0 0 18 0 0 0]" has_advanced_control "0" sggui_pos "50,50,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "AddSub8" Ports [2, 1] Position [270, 150, 315, 190] ShowName off SourceBlock "xbsIndex_r4/AddSub" SourceType "Xilinx Adder/Subtractor Block" mode "Addition" use_carryin off use_carryout off en off latency "0" precision "User Defined" arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Truncate" overflow "Flag as error" dbl_ovrd off use_behavioral_HDL off pipelined off use_rpm on hw_selection "Fabric" xl_use_area off xl_area "[11 0 0 20 0 0 0]" has_advanced_control "0" sggui_pos "388,27,348,344" block_type "addsub" block_version "10.1.3" sg_icon_stat "45,40,1,1,white,blue,0,36a47907,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([15 5 19 5 15 30 34 38 54 41 29 20 34 20 29 41 54 38 34 30 15 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'\\bf{a + b}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [340, 163, 370, 177] IconDisplay "Port number" } Line { SrcBlock "In8" SrcPort 1 DstBlock "AddSub4" DstPort 2 } Line { SrcBlock "In7" SrcPort 1 DstBlock "AddSub4" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "AddSub3" DstPort 2 } Line { SrcBlock "In5" SrcPort 1 DstBlock "AddSub3" DstPort 1 } Line { SrcBlock "AddSub8" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "AddSub1" DstPort 2 } Line { SrcBlock "In3" SrcPort 1 DstBlock "AddSub1" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "AddSub7" DstPort 2 } Line { SrcBlock "In1" SrcPort 1 DstBlock "AddSub7" DstPort 1 } Line { SrcBlock "AddSub7" SrcPort 1 Points [15, 0; 0, 45] DstBlock "AddSub2" DstPort 1 } Line { SrcBlock "AddSub1" SrcPort 1 DstBlock "AddSub2" DstPort 2 } Line { SrcBlock "AddSub3" SrcPort 1 DstBlock "AddSub5" DstPort 1 } Line { SrcBlock "AddSub4" SrcPort 1 Points [20, 0] DstBlock "AddSub5" DstPort 2 } Line { SrcBlock "AddSub2" SrcPort 1 Points [35, 0; 0, 60] DstBlock "AddSub8" DstPort 1 } Line { SrcBlock "AddSub5" SrcPort 1 Points [35, 0; 0, -65] DstBlock "AddSub8" DstPort 2 } } } Block { BlockType SubSystem Name "Mults & ROMs" Ports [8, 8] Position [770, 250, 810, 350] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Mults & ROMs" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [170, 33, 200, 47] IconDisplay "Port number" } Block { BlockType Inport Name "In2" Position [170, 88, 200, 102] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3" Position [170, 133, 200, 147] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "In4" Position [170, 183, 200, 197] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "In5" Position [170, 228, 200, 242] Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "In6" Position [170, 278, 200, 292] Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "In7" Position [170, 323, 200, 337] Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "In8" Position [170, 373, 200, 387] Port "8" IconDisplay "Port number" } Block { BlockType From Name "From1" Position [25, 105, 125, 125] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_1" TagVisibility "global" } Block { BlockType From Name "From16" Position [30, 50, 130, 70] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_0" TagVisibility "global" } Block { BlockType From Name "From2" Position [25, 200, 125, 220] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_3" TagVisibility "global" } Block { BlockType From Name "From3" Position [25, 150, 125, 170] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_2" TagVisibility "global" } Block { BlockType From Name "From4" Position [30, 295, 130, 315] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_5" TagVisibility "global" } Block { BlockType From Name "From5" Position [25, 245, 125, 265] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_4" TagVisibility "global" } Block { BlockType From Name "From6" Position [30, 390, 130, 410] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_7" TagVisibility "global" } Block { BlockType From Name "From7" Position [30, 340, 130, 360] ShowName off CloseFcn "tagdialog Close" GotoTag "TX_ROM_6" TagVisibility "global" } Block { BlockType Reference Name "Mult1" Ports [2, 1] Position [225, 84, 265, 126] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult2" Ports [2, 1] Position [225, 29, 265, 71] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult3" Ports [2, 1] Position [225, 129, 265, 171] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult4" Ports [2, 1] Position [225, 179, 265, 221] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult5" Ports [2, 1] Position [225, 224, 265, 266] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult6" Ports [2, 1] Position [225, 274, 265, 316] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult7" Ports [2, 1] Position [225, 319, 265, 361] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Mult8" Ports [2, 1] Position [225, 369, 265, 411] ShowName off SourceBlock "xbsIndex_r4/Mult" SourceType "Xilinx Multiplier Block" infoedit "Hardware notes: To use the internal pipeline stage of the dedicated multiplier you must select 'Pipeline for maximum performance'." precision "User Defined" arith_type "Signed (2's comp)" n_bits "18" bin_pt "17" quantization "Truncate" overflow "Flag as error" en off latency "1" dbl_ovrd off use_behavioral_HDL off use_embedded on opt "Speed" optimum_pipeline off xl_use_area off xl_area "[9 -15 0 18 0 1 0]" pipeline "on" use_rpm "on" placement_style "Triangular" has_advanced_control "0" sggui_pos "50,50,348,433" block_type "mult" block_version "10.1.3" sg_icon_stat "40,42,1,1,white,blue,0,2b745779,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 55 55 0 ],[0 0 55 55 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 55 55 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('output',1,'(ab)');\ncolor('black');disp('\\newline\\bf{}\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [290, 43, 320, 57] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [290, 98, 320, 112] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [290, 143, 320, 157] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [290, 193, 320, 207] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [290, 238, 320, 252] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [290, 288, 320, 302] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [290, 333, 320, 347] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [290, 383, 320, 397] Port "8" IconDisplay "Port number" } Line { SrcBlock "Mult8" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "In8" SrcPort 1 DstBlock "Mult8" DstPort 1 } Line { SrcBlock "Mult7" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "In7" SrcPort 1 DstBlock "Mult7" DstPort 1 } Line { SrcBlock "Mult6" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "In6" SrcPort 1 DstBlock "Mult6" DstPort 1 } Line { SrcBlock "Mult5" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "In5" SrcPort 1 DstBlock "Mult5" DstPort 1 } Line { SrcBlock "Mult4" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "In4" SrcPort 1 DstBlock "Mult4" DstPort 1 } Line { SrcBlock "Mult3" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "In3" SrcPort 1 DstBlock "Mult3" DstPort 1 } Line { SrcBlock "Mult1" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "In2" SrcPort 1 DstBlock "Mult1" DstPort 1 } Line { SrcBlock "Mult2" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 DstBlock "Mult2" DstPort 1 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Mult2" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Mult1" DstPort 2 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Mult3" DstPort 2 } Line { SrcBlock "From2" SrcPort 1 DstBlock "Mult4" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Mult5" DstPort 2 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Mult6" DstPort 2 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Mult7" DstPort 2 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Mult8" DstPort 2 } } } Block { BlockType SubSystem Name "Sample RAMs" Ports [2, 8] Position [645, 255, 685, 345] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Sample RAMs" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "194" Block { BlockType Inport Name "A" Position [25, 83, 55, 97] IconDisplay "Port number" } Block { BlockType Inport Name "B" Position [25, 203, 55, 217] Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Delays" Ports [1, 8] Position [80, 29, 125, 146] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Delays" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 29, 60, 41] NamePlacement "alternate" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "Delay" Ports [1, 1] Position [112, 70, 138, 95] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [112, 120, 138, 145] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [112, 165, 138, 190] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [112, 210, 138, 235] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [112, 260, 138, 285] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [112, 310, 138, 335] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [112, 355, 138, 380] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample1" Ports [1, 1] Position [160, 91, 195, 119] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample10" Ports [1, 1] Position [160, 136, 195, 164] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample15" Ports [1, 1] Position [160, 376, 195, 404] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample2" Ports [1, 1] Position [160, 36, 195, 64] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample3" Ports [1, 1] Position [160, 186, 195, 214] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample4" Ports [1, 1] Position [160, 231, 195, 259] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample5" Ports [1, 1] Position [160, 281, 195, 309] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample6" Ports [1, 1] Position [160, 326, 195, 354] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [220, 43, 250, 57] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [220, 98, 250, 112] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [220, 143, 250, 157] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [220, 193, 250, 207] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [220, 238, 250, 252] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [220, 288, 250, 302] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [220, 333, 250, 347] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [220, 383, 250, 397] Port "8" IconDisplay "Port number" } Line { SrcBlock "Up Sample15" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "Up Sample10" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Delay" SrcPort 1 Points [0, 5] Branch { DstBlock "Up Sample1" DstPort 1 } Branch { DstBlock "Delay1" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [0, 0] Branch { DstBlock "Up Sample10" DstPort 1 } Branch { DstBlock "Delay2" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [0, 5] Branch { DstBlock "Up Sample3" DstPort 1 } Branch { DstBlock "Delay3" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, 5] Branch { DstBlock "Up Sample4" DstPort 1 } Branch { DstBlock "Delay4" DstPort 1 } } Line { SrcBlock "Delay4" SrcPort 1 Points [0, 5] Branch { DstBlock "Up Sample5" DstPort 1 } Branch { DstBlock "Delay5" DstPort 1 } } Line { SrcBlock "Delay5" SrcPort 1 Points [0, 0] Branch { DstBlock "Up Sample6" DstPort 1 } Branch { DstBlock "Delay6" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 Points [0, 5] DstBlock "Up Sample15" DstPort 1 } Line { SrcBlock "X" SrcPort 1 Points [60, 0; 0, 15] Branch { DstBlock "Up Sample2" DstPort 1 } Branch { DstBlock "Delay" DstPort 1 } } } } Block { BlockType SubSystem Name "Delays1" Ports [1, 8] Position [80, 149, 125, 266] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Delays1" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [25, 29, 60, 41] NamePlacement "alternate" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "Delay" Ports [1, 1] Position [112, 70, 138, 95] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay1" Ports [1, 1] Position [112, 120, 138, 145] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay2" Ports [1, 1] Position [112, 165, 138, 190] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay3" Ports [1, 1] Position [112, 210, 138, 235] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay4" Ports [1, 1] Position [112, 260, 138, 285] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay5" Ports [1, 1] Position [112, 310, 138, 335] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Delay6" Ports [1, 1] Position [112, 355, 138, 380] Orientation "down" NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Delay" SourceType "Xilinx Delay Block" infoedit "Hardware notes: A delay line is a chain, each link of which is an SRL16 followed by a flip-flop." en off latency "1" dbl_ovrd off reg_retiming off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "delay" block_version "10.1.3" sg_icon_stat "26,25,1,1,white,blue,0,fc531c0e,down" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('z^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample1" Ports [1, 1] Position [160, 91, 195, 119] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample10" Ports [1, 1] Position [160, 136, 195, 164] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample15" Ports [1, 1] Position [160, 376, 195, 404] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample2" Ports [1, 1] Position [160, 36, 195, 64] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample3" Ports [1, 1] Position [160, 186, 195, 214] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample4" Ports [1, 1] Position [160, 231, 195, 259] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample5" Ports [1, 1] Position [160, 281, 195, 309] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample6" Ports [1, 1] Position [160, 326, 195, 354] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "4" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "35,28,1,1,white,blue,0,b6c489dd,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 54 54 ],[0.77 0.82 0.91]);\npatch([16 7 20 7 16 30 34 38 53 41 29 21 35 21 29 41 53 38 34 30 16 ],[6 15 28 41 50 50 46 50 50 38 50 42 28 14 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 54 54 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}4','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [220, 43, 250, 57] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [220, 98, 250, 112] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [220, 143, 250, 157] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [220, 193, 250, 207] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [220, 238, 250, 252] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [220, 288, 250, 302] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [220, 333, 250, 347] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [220, 383, 250, 397] Port "8" IconDisplay "Port number" } Line { SrcBlock "X" SrcPort 1 Points [60, 0; 0, 15] Branch { DstBlock "Delay" DstPort 1 } Branch { DstBlock "Up Sample2" DstPort 1 } } Line { SrcBlock "Delay6" SrcPort 1 Points [0, 5] DstBlock "Up Sample15" DstPort 1 } Line { SrcBlock "Delay5" SrcPort 1 Points [0, 0] Branch { DstBlock "Delay6" DstPort 1 } Branch { DstBlock "Up Sample6" DstPort 1 } } Line { SrcBlock "Delay4" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay5" DstPort 1 } Branch { DstBlock "Up Sample5" DstPort 1 } } Line { SrcBlock "Delay3" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay4" DstPort 1 } Branch { DstBlock "Up Sample4" DstPort 1 } } Line { SrcBlock "Delay2" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay3" DstPort 1 } Branch { DstBlock "Up Sample3" DstPort 1 } } Line { SrcBlock "Delay1" SrcPort 1 Points [0, 0] Branch { DstBlock "Delay2" DstPort 1 } Branch { DstBlock "Up Sample10" DstPort 1 } } Line { SrcBlock "Delay" SrcPort 1 Points [0, 5] Branch { DstBlock "Delay1" DstPort 1 } Branch { DstBlock "Up Sample1" DstPort 1 } } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "Up Sample10" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "Up Sample4" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "Up Sample5" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "Up Sample6" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "Up Sample15" SrcPort 1 DstBlock "Out8" DstPort 1 } } } Block { BlockType Reference Name "Time Division\nMultiplexer1" Ports [2, 1] Position [225, 47, 285, 63] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer16" Ports [2, 1] Position [225, 32, 285, 48] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer2" Ports [2, 1] Position [225, 77, 285, 93] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer3" Ports [2, 1] Position [225, 62, 285, 78] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer4" Ports [2, 1] Position [225, 107, 285, 123] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer5" Ports [2, 1] Position [225, 92, 285, 108] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer6" Ports [2, 1] Position [225, 137, 285, 153] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Time Division\nMultiplexer7" Ports [2, 1] Position [225, 122, 285, 138] ShowName off SourceBlock "xbsIndex_r4/Time Division\nMultiplexer" SourceType "Xilinx Time Division Multiplexer Block" infoedit "Multiple inputs are sampled and presented serially at the output." inputs "2" vin off dbl_ovrd off xl_use_area off xl_area "[3 2 0 35 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,209" block_type "tdm" block_version "10.1.3" sg_icon_stat "60,16,1,1,white,blue,0,b46043e6,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 16 16 ],[0.77 0.82 0.91]);\npatch([26 23 27 23 26 30 31 32 37 33 30 28 32 28 30 33 37 32 31 30 26 ],[2 5 9 13 16 16 15 16 16 12 15 13 9 5 3 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 16 16 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d0');\ncolor('black');port_label('input',2,'d1');\ncolor('black');port_label('output',1,'q');\ncolor('black');disp('TDM');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Out1" Position [385, 33, 415, 47] IconDisplay "Port number" } Block { BlockType Outport Name "Out2" Position [310, 48, 340, 62] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Out3" Position [310, 63, 340, 77] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Out4" Position [310, 78, 340, 92] Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "Out5" Position [310, 93, 340, 107] Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "Out6" Position [310, 108, 340, 122] Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "Out7" Position [310, 123, 340, 137] Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "Out8" Position [310, 138, 340, 152] Port "8" IconDisplay "Port number" } Line { SrcBlock "B" SrcPort 1 DstBlock "Delays1" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer6" SrcPort 1 DstBlock "Out8" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer7" SrcPort 1 DstBlock "Out7" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer4" SrcPort 1 DstBlock "Out6" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer5" SrcPort 1 DstBlock "Out5" DstPort 1 } Line { SrcBlock "A" SrcPort 1 DstBlock "Delays" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer2" SrcPort 1 DstBlock "Out4" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer3" SrcPort 1 DstBlock "Out3" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer1" SrcPort 1 DstBlock "Out2" DstPort 1 } Line { SrcBlock "Time Division\nMultiplexer16" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Delays1" SrcPort 8 Points [50, 0; 0, -110] DstBlock "Time Division\nMultiplexer6" DstPort 2 } Line { SrcBlock "Delays1" SrcPort 7 Points [45, 0; 0, -110] DstBlock "Time Division\nMultiplexer7" DstPort 2 } Line { SrcBlock "Delays1" SrcPort 6 Points [40, 0; 0, -110] DstBlock "Time Division\nMultiplexer4" DstPort 2 } Line { SrcBlock "Delays1" SrcPort 5 Points [35, 0; 0, -110] DstBlock "Time Division\nMultiplexer5" DstPort 2 } Line { SrcBlock "Delays1" SrcPort 4 Points [30, 0; 0, -110] DstBlock "Time Division\nMultiplexer2" DstPort 2 } Line { SrcBlock "Delays1" SrcPort 3 Points [25, 0; 0, -110] DstBlock "Time Division\nMultiplexer3" DstPort 2 } Line { SrcBlock "Delays" SrcPort 8 DstBlock "Time Division\nMultiplexer6" DstPort 1 } Line { SrcBlock "Delays" SrcPort 7 DstBlock "Time Division\nMultiplexer7" DstPort 1 } Line { SrcBlock "Delays" SrcPort 6 DstBlock "Time Division\nMultiplexer4" DstPort 1 } Line { SrcBlock "Delays" SrcPort 5 DstBlock "Time Division\nMultiplexer5" DstPort 1 } Line { SrcBlock "Delays" SrcPort 4 DstBlock "Time Division\nMultiplexer2" DstPort 1 } Line { SrcBlock "Delays" SrcPort 3 DstBlock "Time Division\nMultiplexer3" DstPort 1 } Line { SrcBlock "Delays1" SrcPort 2 Points [20, 0; 0, -110] DstBlock "Time Division\nMultiplexer1" DstPort 2 } Line { SrcBlock "Delays" SrcPort 2 DstBlock "Time Division\nMultiplexer1" DstPort 1 } Line { SrcBlock "Delays1" SrcPort 1 Points [15, 0; 0, -110] DstBlock "Time Division\nMultiplexer16" DstPort 2 } Line { SrcBlock "Delays" SrcPort 1 DstBlock "Time Division\nMultiplexer16" DstPort 1 } } } Block { BlockType Reference Name "TDD" Ports [1, 2] Position [965, 279, 1025, 321] SourceBlock "xbsIndex_r4/Time Division\nDemultiplexer" SourceType "Xilinx Time Division Demultiplexer Block" infoedit "Samples presented at the input are selected and down-sampled according to the frame sampling pattern specified. The sampled input is presented either as a single or multiple channel at the output." frame_pattern "ones(1,2)" impl_style "Multiple Channel" vin off dbl_ovrd off xl_use_area off xl_area "[24 48 0 0 0 0 0]" explicit_period "off" period "1" has_advanced_control "0" sggui_pos "20,20,348,268" block_type "tdd" block_version "9.1.01" sg_icon_stat "60,42,1,1,white,blue,0,f2edb40e,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 75 75 0 ],[0 0 86 86 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 37 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[14 26 44 62 74 74 69 74 74 57 73 61 44 27 15 31 14 14 19 14 14 ],[0.98 0.96 0.92]);\nplot([0 75 75 0 0 ],[0 0 86 86 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');port_label('output',1,'q0');\ncolor('black');port_label('output',2,'q1');\ncolor('black');disp('TDD');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "YA" Position [1100, 283, 1130, 297] NamePlacement "alternate" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Outport Name "YB" Position [1100, 303, 1130, 317] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "TDD" SrcPort 2 DstBlock "YB" DstPort 1 } Line { SrcBlock "TDD" SrcPort 1 DstBlock "YA" DstPort 1 } Line { SrcBlock "Adders" SrcPort 1 DstBlock "TDD" DstPort 1 } Line { SrcBlock "Sample RAMs" SrcPort 8 DstBlock "Mults & ROMs" DstPort 8 } Line { SrcBlock "Sample RAMs" SrcPort 7 DstBlock "Mults & ROMs" DstPort 7 } Line { SrcBlock "Sample RAMs" SrcPort 6 DstBlock "Mults & ROMs" DstPort 6 } Line { SrcBlock "Sample RAMs" SrcPort 5 DstBlock "Mults & ROMs" DstPort 5 } Line { SrcBlock "Sample RAMs" SrcPort 4 DstBlock "Mults & ROMs" DstPort 4 } Line { SrcBlock "Sample RAMs" SrcPort 3 DstBlock "Mults & ROMs" DstPort 3 } Line { SrcBlock "Sample RAMs" SrcPort 2 DstBlock "Mults & ROMs" DstPort 2 } Line { SrcBlock "Sample RAMs" SrcPort 1 DstBlock "Mults & ROMs" DstPort 1 } Line { SrcBlock "XB" SrcPort 1 DstBlock "Sample RAMs" DstPort 2 } Line { SrcBlock "XA" SrcPort 1 DstBlock "Sample RAMs" DstPort 1 } Line { SrcBlock "Mults & ROMs" SrcPort 1 DstBlock "Adders" DstPort 1 } Line { SrcBlock "Mults & ROMs" SrcPort 2 DstBlock "Adders" DstPort 2 } Line { SrcBlock "Mults & ROMs" SrcPort 3 DstBlock "Adders" DstPort 3 } Line { SrcBlock "Mults & ROMs" SrcPort 4 DstBlock "Adders" DstPort 4 } Line { SrcBlock "Mults & ROMs" SrcPort 5 DstBlock "Adders" DstPort 5 } Line { SrcBlock "Mults & ROMs" SrcPort 6 DstBlock "Adders" DstPort 6 } Line { SrcBlock "Mults & ROMs" SrcPort 7 DstBlock "Adders" DstPort 7 } Line { SrcBlock "Mults & ROMs" SrcPort 8 DstBlock "Adders" DstPort 8 } } } Block { BlockType Sum Name "Add" Ports [2, 1] Position [1100, 202, 1130, 233] ShowName off Inputs "+-" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Add1" Ports [2, 1] Position [1095, 322, 1125, 353] ShowName off Inputs "+-" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType SubSystem Name "Chirp" Ports [0, 1] Position [100, 274, 140, 306] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Chirp" Location [47, 420, 272, 502] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Chirp Signal" Ports [0, 1] Position [25, 25, 55, 55] SourceBlock "simulink/Sources/Chirp Signal" SourceType "chirp" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" f1 "0" T "512" f2 "0.5" VectorParams1D on } Block { BlockType Gain Name "Gain" Position [100, 25, 145, 55] Gain "0.95" ParameterDataTypeMode "Inherit via internal rule" ParameterDataType "sfix(16)" ParameterScaling "2^0" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "Out1" Position [170, 33, 200, 47] IconDisplay "Port number" } Line { SrcBlock "Chirp Signal" SrcPort 1 DstBlock "Gain" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 DstBlock "Out1" DstPort 1 } } } Block { BlockType SubSystem Name "Chirp1" Ports [0, 1] Position [100, 329, 140, 361] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Chirp1" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "Chirp Signal" Ports [0, 1] Position [25, 25, 55, 55] SourceBlock "simulink/Sources/Chirp Signal" SourceType "chirp" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" f1 "0" T "512" f2 "0.5" VectorParams1D on } Block { BlockType Gain Name "Gain" Position [100, 25, 145, 55] Gain "-0.95" ParameterDataTypeMode "Inherit via internal rule" ParameterDataType "sfix(16)" ParameterScaling "2^0" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "Out1" Position [170, 33, 200, 47] IconDisplay "Port number" } Line { SrcBlock "Gain" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Chirp Signal" SrcPort 1 DstBlock "Gain" DstPort 1 } } } Block { BlockType Reference Name "Down Sample1" Ports [1, 1] Position [335, 331, 360, 359] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "9.1.01" sg_icon_stat "25,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downarrow}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample2" Ports [1, 1] Position [335, 276, 360, 304] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "9.1.01" sg_icon_stat "25,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downarrow}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample3" Ports [1, 1] Position [335, 386, 360, 414] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "9.1.01" sg_icon_stat "25,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downarrow}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Down Sample4" Ports [1, 1] Position [335, 441, 360, 469] ShowName off SourceBlock "xbsIndex_r4/Down Sample" SourceType "Xilinx Down Sampler Block" infoedit "Hardware notes: Sample and Latency controls determine the hardware implementation. The cost in hardware of different implementations varies considerably; press Help for details." sample_ratio "8" sample_phase "Last Value of Frame (most efficient)" en off latency "1" dbl_ovrd off xl_use_area off xl_area "[8 16 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,360,300" block_type "dsamp" block_version "9.1.01" sg_icon_stat "25,28,1,1,white,blue,0,e83e9e44,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downarrow}8\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Integer Delay" Ports [1, 1] Position [995, 144, 1025, 176] ShowName off SourceBlock "simulink/Discrete/Integer Delay" SourceType "Integer Delay" vinit "0.0" samptime "-1" NumDelays "13*2" } Block { BlockType Reference Name "Integer Delay1" Ports [1, 1] Position [995, 264, 1025, 296] ShowName off SourceBlock "simulink/Discrete/Integer Delay" SourceType "Integer Delay" vinit "0.0" samptime "-1" NumDelays "13*2" } Block { BlockType SubSystem Name "Reference\nFilter" Ports [1, 1] Position [515, 174, 580, 206] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Reference\nFilter" Location [1157, 365, 1612, 542] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [110, 198, 140, 212] IconDisplay "Port number" } Block { BlockType Reference Name "DAFIR v9_0 2" Ports [1, 1] Position [205, 191, 270, 219] SourceBlock "xbsIndex_r4/DAFIR v9_0 " SourceType "Xilinx Finite Impulse Response Filter Block" infoedit "Hardware notes: Implemented using distributed arithmetic (DA). The hardware over sampling rate determines the degree of parallelism. A rate of one produces a fully parallel DA filter. A rate of n (resp., n+1) for an n-bit input signal produces a fully serial implementation for a non-symmetric (resp., symmetric) impulse response. Intermediate values produce implementations with intermediate levels of parallelism." coef "h32" structure "Inferred from Coefficients" coef_n_bits "14" coef_bin_pt "13" over_sample "1" reload off valids off rst off latency "15" num_channels "1" serial_input off polyphase_behavior "Interpolate: 1:4 (samples in:out)" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" explicit_period "off" period "1" use_isim "0" has_advanced_control "0" sggui_pos "20,20,348,503" block_type "fir" block_version "10.1.2" sg_icon_stat "65,28,1,1,white,blue,0,589438ed,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 62 62 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[7 17 31 45 55 55 51 55 55 42 55 46 31 16 7 20 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 62 62 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'x0');\ncolor('black');port_label('output',1,'y0');\ncolor('black');disp('32 tap');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Disregard Subsystem" Tag "discardX" Ports [] Position [301, 250, 359, 308] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code generation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative simulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "10.1.3" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0.1]);\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Rx_I1" Ports [1, 1] Position [335, 199, 380, 211] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "45,12,1,1,white,grey,0,b3a044a9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([19 17 20 17 19 22 23 24 27 24 21 19 22 19 21 24 27 24 23 22 19 ],[1 3 6 9 11 11 10 11 11 8 11 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 12 12 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Y" Position [520, 198, 550, 212] IconDisplay "Port number" } Line { SrcBlock "Rx_I1" SrcPort 1 DstBlock "Y" DstPort 1 } Line { SrcBlock "DAFIR v9_0 2" SrcPort 1 DstBlock "Rx_I1" DstPort 1 } Line { SrcBlock "X" SrcPort 1 DstBlock "DAFIR v9_0 2" DstPort 1 } } } Block { BlockType SubSystem Name "Reference\nFilter1" Ports [1, 1] Position [515, 209, 580, 241] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Reference\nFilter1" Location [2, 74, 1910, 1112] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "X" Position [110, 198, 140, 212] IconDisplay "Port number" } Block { BlockType Reference Name "DAFIR v9_0 2" Ports [1, 1] Position [205, 191, 270, 219] SourceBlock "xbsIndex_r4/DAFIR v9_0 " SourceType "Xilinx Finite Impulse Response Filter Block" infoedit "Hardware notes: Implemented using distributed arithmetic (DA). The hardware over sampling rate determines the degree of parallelism. A rate of one produces a fully parallel DA filter. A rate of n (resp., n+1) for an n-bit input signal produces a fully serial implementation for a non-symmetric (resp., symmetric) impulse response. Intermediate values produce implementations with intermediate levels of parallelism." coef "h32" structure "Inferred from Coefficients" coef_n_bits "14" coef_bin_pt "13" over_sample "1" reload off valids off rst off latency "15" num_channels "1" serial_input off polyphase_behavior "Interpolate: 1:4 (samples in:out)" dbl_ovrd off xl_use_area off xl_area "[0,0,0,0,0,0,0]" explicit_period "off" period "1" use_isim "0" has_advanced_control "0" sggui_pos "20,20,348,503" block_type "fir" block_version "10.1.2" sg_icon_stat "65,28,1,1,white,blue,0,589438ed,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 60 60 0 ],[0 0 62 62 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[7 17 31 45 55 55 51 55 55 42 55 46 31 16 7 20 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 62 62 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'x0');\ncolor('black');port_label('output',1,'y0');\ncolor('black');disp('32 tap');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Disregard Subsystem" Tag "discardX" Ports [] Position [301, 250, 359, 308] ShowName off AttributesFormatString "Disregard Subsystem\\nFor Generation" SourceBlock "xbsIndex_r4/Disregard Subsystem" SourceType "Xilinx Disregard Subsystem For Generation Block" infoedit "Place this block into a subsystem to have System Generator ignore the subsystem during code generation. This block can be used in combination with the Simulation Multiplexer block to provide an alternative simulation model for another subsystem (e.g., to provide a simulation model for a black box)." has_advanced_control "0" sggui_pos "-1,-1,-1,-1" block_type "disregard" block_version "10.1.3" sg_icon_stat "58,58,-1,-1,darkgray,black,0,0,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 58 58 0 ],[0 0 58 58 ],[0.1 0.1 0.1]);\npatch([14 4 18 4 14 29 33 37 53 40 28 19 33 19 28 40 53 37 33 29 14 ],[6 16 30 44 54 54 50 54 54 41 53 44 30 16 7 19 6 6 10 6 6 ],[0.33 0.33 0.33]);\nplot([0 58 58 0 0 ],[0 0 58 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Rx_I1" Ports [1, 1] Position [335, 199, 380, 211] NamePlacement "alternate" ShowName off SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0,0,0,0,0,0,0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "45,12,1,1,white,grey,0,b3a044a9,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 45 45 0 ],[0 0 12 12 ],[0.88 0.88 0.88]);\npatch([19 17 20 17 19 22 23 24 27 24 21 19 22 19 21 24 27 24 23 22 19 ],[1 3 6 9 11 11 10 11 11 8 11 9 6 3 1 4 1 1 2 1 1 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 12 12 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt} Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Outport Name "Y" Position [520, 198, 550, 212] IconDisplay "Port number" } Line { SrcBlock "X" SrcPort 1 DstBlock "DAFIR v9_0 2" DstPort 1 } Line { SrcBlock "DAFIR v9_0 2" SrcPort 1 DstBlock "Rx_I1" DstPort 1 } Line { SrcBlock "Rx_I1" SrcPort 1 DstBlock "Y" DstPort 1 } } } Block { BlockType Terminator Name "Terminator1" Position [905, 405, 925, 425] ShowName off } Block { BlockType Terminator Name "Terminator3" Position [905, 390, 925, 410] ShowName off } Block { BlockType Scope Name "Tx Scope" Ports [8] Position [1160, 111, 1210, 359] Floating off Location [5, 45, 1925, 1127] Open off NumInputPorts "8" TickLabels "on" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "%" axes7 "%" axes8 "%" } TimeRange "1000" YMin "-1~-1~-1~-1~-1~-1~-1~-1" YMax "1~1~1~1~1~1~1~1" SaveName "ScopeData1" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "TxA_I_10M" Ports [1, 1] Position [205, 280, 270, 300] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Round (unbiased: +/- Inf)" overflow "Flag as error" period "1/2" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 16 0 0]" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "TxA_I_40M" Ports [1, 1] Position [780, 280, 845, 300] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 16 0 0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "TxA_Q_10M" Ports [1, 1] Position [205, 335, 270, 355] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Round (unbiased: +/- Inf)" overflow "Flag as error" period "1/2" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 16 0 0]" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "TxA_Q_40M" Ports [1, 1] Position [780, 295, 845, 315] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 16 0 0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "TxB_I_10M" Ports [1, 1] Position [205, 390, 270, 410] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Round (unbiased: +/- Inf)" overflow "Flag as error" period "1/2" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 16 0 0]" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "TxB_I_40M" Ports [1, 1] Position [780, 390, 845, 410] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 16 0 0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "TxB_Q_10M" Ports [1, 1] Position [205, 445, 270, 465] NamePlacement "alternate" SourceBlock "xbsIndex_r4/Gateway In" SourceType "Xilinx Gateway In Block" infoedit "Gateway in block. Converts inputs of type Simulink integer, double and fixed point to Xilinx fixed point type.

Hardware notes: In hardware these blocks become top level input ports." arith_type "Signed (2's comp)" n_bits "16" bin_pt "15" quantization "Round (unbiased: +/- Inf)" overflow "Flag as error" period "1/2" dbl_ovrd off timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 16 0 0]" has_advanced_control "0" sggui_pos "20,20,356,432" block_type "gatewayin" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,bc55d28f,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'\\fontsize{11pt}\\bf In ','texmode','on');\ncolor('black');port_label('output',1,' ');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "TxB_Q_40M" Ports [1, 1] Position [780, 405, 845, 425] SourceBlock "xbsIndex_r4/Gateway Out" SourceType "Xilinx Gateway Out Block" infoedit "Gateway out block. Converts Xilinx fixed point inputs into ouputs of type Simulink integer, double, or fixed point.

Hardware notes: In hardware these blocks become top level output ports or are discarded, depending on how they are configured." hdl_port on timing_constraint "None" locs_specified off LOCs "{}" xl_use_area off xl_area "[0 0 0 0 16 0 0]" has_advanced_control "0" sggui_pos "20,20,336,386" block_type "gatewayout" block_version "8.2.01" sg_icon_stat "65,20,1,1,white,yellow,0,38220381,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 65 65 0 ],[0 0 20 20 ],[0.95 0.93 0.65]);\npatch([27 24 29 24 27 32 33 34 40 36 32 29 34 29 32 36 40 34 33 32 27 ],[2 5 10 15 18 18 17 18 18 14 18 15 10 5 2 6 2 2 3 2 2 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 20 20 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,' ');\ncolor('black');port_label('output',1,'\\fontsize{11pt}\\bf Out ','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample" Ports [1, 1] Position [660, 279, 680, 301] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "2" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,22,1,1,white,blue,0,1c669c00,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 ],[0 0 22 22 ],[0.77 0.82 0.91]);\npatch([4 1 6 1 4 9 10 11 17 13 9 6 11 6 9 13 17 11 10 9 4 ],[3 6 11 16 19 19 18 19 19 15 19 16 11 6 3 7 3 3 4 3 3 ],[0.98 0.96 0.92]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample1" Ports [1, 1] Position [660, 294, 680, 316] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "2" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,22,1,1,white,blue,0,1c669c00,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 ],[0 0 22 22 ],[0.77 0.82 0.91]);\npatch([4 1 6 1 4 9 10 11 17 13 9 6 11 6 9 13 17 11 10 9 4 ],[3 6 11 16 19 19 18 19 19 15 19 16 11 6 3 7 3 3 4 3 3 ],[0.98 0.96 0.92]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample2" Ports [1, 1] Position [660, 389, 680, 411] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "2" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,22,1,1,white,blue,0,1c669c00,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 ],[0 0 22 22 ],[0.77 0.82 0.91]);\npatch([4 1 6 1 4 9 10 11 17 13 9 6 11 6 9 13 17 11 10 9 4 ],[3 6 11 16 19 19 18 19 19 15 19 16 11 6 3 7 3 3 4 3 3 ],[0.98 0.96 0.92]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Block { BlockType Reference Name "Up Sample3" Ports [1, 1] Position [660, 404, 680, 426] ShowName off SourceBlock "xbsIndex_r4/Up Sample" SourceType "Xilinx Up Sampler Block" infoedit "Up samples input data. Inserted values can be zeros or copies of the most recent input sample.

Hardware notes: No hardware is needed if inserted values are copies of the input sample; otherwise, a mux and single bit flip-flop are used." sample_ratio "2" copy_samples on dbl_ovrd off xl_use_area off xl_area "[0 0 0 0 0 0 0]" has_advanced_control "0" sggui_pos "20,20,348,277" block_type "usamp" block_version "10.1.3" sg_icon_stat "20,22,1,1,white,blue,0,1c669c00,right" sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npatch([0 20 20 0 ],[0 0 22 22 ],[0.77 0.82 0.91]);\npatch([4 1 6 1 4 9 10 11 17 13 9 6 11 6 9 13 17 11 10 9 4 ],[3 6 11 16 19 19 18 19 19 15 19 16 11 6 3 7 3 3 4 3 3 ],[0.98 0.96 0.92]);\nplot([0 20 20 0 0 ],[0 0 22 22 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin icon text');\ncolor('black');disp('{\\fontsize{14pt}\\bf\\uparrow}2','texmode','on');\nfprintf('','COMMENT: end icon text');\n" } Line { SrcBlock "TxA_I_10M" SrcPort 1 DstBlock "Down Sample2" DstPort 1 } Line { SrcBlock "TxA_Q_10M" SrcPort 1 DstBlock "Down Sample1" DstPort 1 } Line { SrcBlock "TxB_I_10M" SrcPort 1 DstBlock "Down Sample3" DstPort 1 } Line { SrcBlock "TxB_Q_10M" SrcPort 1 DstBlock "Down Sample4" DstPort 1 } Line { SrcBlock "Down Sample2" SrcPort 1 Points [100, 0] Branch { Points [0, -100] DstBlock "Reference\nFilter" DstPort 1 } Branch { DstBlock "2-Ch Interp A" DstPort 1 } } Line { SrcBlock "Chirp" SrcPort 1 Points [30, 0] Branch { DstBlock "TxA_I_10M" DstPort 1 } Branch { Points [0, 110] DstBlock "TxB_I_10M" DstPort 1 } Branch { Points [0, -215; 950, 0; 0, 55] DstBlock "Tx Scope" DstPort 1 } } Line { SrcBlock "Integer Delay" SrcPort 1 Points [45, 0] Branch { DstBlock "Tx Scope" DstPort 2 } Branch { Points [0, 50] DstBlock "Add" DstPort 1 } } Line { SrcBlock "Add" SrcPort 1 DstBlock "Tx Scope" DstPort 4 } Line { SrcBlock "Down Sample1" SrcPort 1 Points [65, 0; 0, -40; 40, 0] Branch { DstBlock "2-Ch Interp A" DstPort 2 } Branch { Points [0, -80] DstBlock "Reference\nFilter1" DstPort 1 } } Line { SrcBlock "Chirp1" SrcPort 1 Points [25, 0] Branch { DstBlock "TxA_Q_10M" DstPort 1 } Branch { Points [0, 110] DstBlock "TxB_Q_10M" DstPort 1 } Branch { Points [0, -265; 805, 0; 0, 170] DstBlock "Tx Scope" DstPort 5 } } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Tx Scope" DstPort 8 } Line { SrcBlock "Down Sample3" SrcPort 1 DstBlock "2-Ch Interp B" DstPort 1 } Line { SrcBlock "Down Sample4" SrcPort 1 Points [30, 0; 0, -40] DstBlock "2-Ch Interp B" DstPort 2 } Line { SrcBlock "2-Ch Interp A" SrcPort 1 DstBlock "Up Sample" DstPort 1 } Line { SrcBlock "2-Ch Interp A" SrcPort 2 DstBlock "Up Sample1" DstPort 1 } Line { SrcBlock "2-Ch Interp B" SrcPort 1 DstBlock "Up Sample2" DstPort 1 } Line { SrcBlock "2-Ch Interp B" SrcPort 2 DstBlock "Up Sample3" DstPort 1 } Line { SrcBlock "TxA_I_40M" SrcPort 1 Points [70, 0; 0, -130] DstBlock "Integer Delay" DstPort 1 } Line { SrcBlock "Reference\nFilter" SrcPort 1 Points [485, 0] Branch { DstBlock "Tx Scope" DstPort 3 } Branch { Points [0, 35] DstBlock "Add" DstPort 2 } } Line { SrcBlock "TxA_Q_40M" SrcPort 1 Points [95, 0; 0, -25] DstBlock "Integer Delay1" DstPort 1 } Line { SrcBlock "Integer Delay1" SrcPort 1 Points [30, 0] Branch { DstBlock "Tx Scope" DstPort 6 } Branch { Points [0, 50] DstBlock "Add1" DstPort 1 } } Line { SrcBlock "Reference\nFilter1" SrcPort 1 Points [480, 0; 0, 85] Branch { DstBlock "Tx Scope" DstPort 7 } Branch { Points [0, 35] DstBlock "Add1" DstPort 2 } } Line { SrcBlock "TxB_I_40M" SrcPort 1 DstBlock "Terminator3" DstPort 1 } Line { SrcBlock "TxB_Q_40M" SrcPort 1 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "Up Sample" SrcPort 1 DstBlock "TxA_I_40M" DstPort 1 } Line { SrcBlock "Up Sample1" SrcPort 1 DstBlock "TxA_Q_40M" DstPort 1 } Line { SrcBlock "Up Sample2" SrcPort 1 DstBlock "TxB_I_40M" DstPort 1 } Line { SrcBlock "Up Sample3" SrcPort 1 DstBlock "TxB_Q_40M" DstPort 1 } } } } } MatData { NumRecords 1 DataRecord { Tag DataTag0 Data " %)30 . 2%$ 8 ( @ % \" $ ! 0 % 0 !@ $ , 0 . . 8 ( ! % \" $ ' 0 0 !P '1A7, !V86QU97, . P 8 ( 0 % \" $ \" 0 . 0 8 ( ! % \" $ + 0 0 \"P $A$3\"!.971L:7-T . 2 8 ( ! % \" $ 8 0 0 & $5X<&]R=\"!A7-T96T #@ $@ & \" 0 !0 @ ! & $ $ !@ !!8V-O 0 !H$ !I;F9O961I= !X:6QI;GAF86UI;'D !P87)T !S<&5E9 !P86-K86=E !S>6YT:&5S:7-?=&]O;%]S9V%D=F%N8V5D !S>6YT:&5S:7-?=&]O; !C;&]C:U]W7-C;&M?<&5R:6]D !D8VU?:6YP=71?8VQO8VM?<&5R:6]D !I;F-R7VYE=&QI7-T96T@1V5N97)A=&]R X X !@ @ $ 4 ( 0 < ! ! ' =FER=&5X- . . 8 ( ! % \" $ ( 0 0 \" 'AC-'9S>#,U#@ # & \" 0 !0 @ ! P $ $ # \"TQ, . . 8 ( ! % \" $ % 0 0 !0 &9F-C8X #@ # & \" 0 !0 @ $ $ . , 8 ( ! % \" $ # 0 0 , 6%-4 X P !@ @ $ 4 ( ! ! #@ $ & \" 0 !0 @ ! #0 $ $ T !#;&]C:R!%;F%B;&5S #@ $ & \" 0 !0 @ ! \"0 $ $ D N+VYE=&QI 0 ,X$ !I;F9O961I= !X:6QI;GAF86UI;'D !P87)T !S<&5E9 !P86-K86=E !S>6YT:&5S:7-?=&]O;%]S9V%D=F%N8V5D !S>6YT:&5S:7-?=&]O; !C;&]C:U]W7-C;&M?<&5R:6]D !D8VU?:6YP=71?8VQO8VM?<&5R:6]D !I;F-R7VYE=&QI&,R=G W, . , 8 ( ! % \" $ \" 0 0 ( +38 X X !@ @ $ 4 ( 0 8 ! ! & 9F8Q-3$W . , 8 ( ! % \" 0 0 X P !@ @ $ 4 ( 0 , ! ! P!84U0 #@ # & \" 0 !0 @ $ $ . 0 8 ( ! % \" $ - 0 0 #0 $-L;V-K($5N86)L97, . 2 8 ( ! % \" $ 6 0 0 %@ \"XO9FEL='-?=C)P7W8P-5]F87-T1U< X P !@ @ $ 4 ( ! ! #@ # & \" 0 !0 @ ! P $ $ # &]F9@ . , 8 ( ! % \" $ \" 0 0 ( ,3 X P !@ @ $ 4 ( 0 , ! ! P Q,# #@ # & \" 0 !0 @ $ $ . , 8 ( ! % \" 0 0 X P !@ @ $ 4 ( ! ! #@ # & \" 0 !0 @ $ $ . 2 8 ( ! % \" $ 8 0 0 & $%C8V]R9&EN9R!T;R!\";&]C:R!-87-K'0G*3L*9G!R:6YT9B@G)RPG0T]-345.5#H@96YD(&EC;VX@=&5X=\"0X !( !@ @ $ 4 ( 0 !@ ! ! 8 +B]F:6QT0 . . 8 ( ! % \" $ ' 0 0 !P '1A7, !V86QU97, . P 8 ( 0 % \" $ \" 0 . 0 8 ( ! % \" $ + 0 0 \"P $A$3\"!.971L:7-T . 2 8 ( ! % \" $ 8 0 0 & $5X<&]R=\"!A7-T96T #@ $@ & \" 0 !0 @ ! & $ $ !@ !!8V-O 0 !H$ !I;F9O961I= !X:6QI;GAF86UI;'D !P87)T !S<&5E9 !P86-K86=E !S>6YT:&5S:7-?=&]O;%]S9V%D=F%N8V5D !S>6YT:&5S:7-?=&]O; !C;&]C:U]W7-C;&M?<&5R:6]D !D8VU?:6YP=71?8VQO8VM?<&5R:6]D !I;F-R7VYE=&QI7-T96T@1V5N97)A=&]R X X !@ @ $ 4 ( 0 < ! ! ' =FER=&5X- . . 8 ( ! % \" $ ( 0 0 \" 'AC-'9S>#,U#@ # & \" 0 !0 @ ! P $ $ # \"TQ, . . 8 ( ! % \" $ % 0 0 !0 &9F-C8X #@ # & \" 0 !0 @ $ $ . , 8 ( ! % \" $ # 0 0 , 6%-4 X P !@ @ $ 4 ( ! ! #@ $ & \" 0 !0 @ ! #0 $ $ T !#;&]C:R!%;F%B;&5S #@ $ & \" 0 !0 @ ! \"0 $ $ D N+VYE=&QI 0 ,X$ !I;F9O961I= !X:6QI;GAF86UI;'D !P87)T !S<&5E9 !P86-K86=E !S>6YT:&5S:7-?=&]O;%]S9V%D=F%N8V5D !S>6YT:&5S:7-?=&]O; !C;&]C:U]W7-C;&M?<&5R:6]D !D8VU?:6YP=71?8VQO8VM?<&5R:6]D !I;F-R7VYE=&QI&,R=G W, . , 8 ( ! % \" $ \" 0 0 ( +38 X X !@ @ $ 4 ( 0 8 ! ! & 9F8Q-3$W . , 8 ( ! % \" 0 0 X P !@ @ $ 4 ( 0 , ! ! P!84U0 #@ # & \" 0 !0 @ $ $ . 0 8 ( ! % \" $ - 0 0 #0 $-L;V-K($5N86)L97, . 2 8 ( ! % \" $ 6 0 0 %@ \"XO9FEL='-?=C)P7W8P-5]F87-T1U< X P !@ @ $ 4 ( ! ! #@ # & \" 0 !0 @ ! P $ $ # &]F9@ . , 8 ( ! % \" $ \" 0 0 ( ,3 X P !@ @ $ 4 ( 0 , ! ! P Q,# #@ # & \" 0 !0 @ $ $ . , 8 ( ! % \" 0 0 X P !@ @ $ 4 ( ! ! #@ # & \" 0 !0 @ $ $ . 2 8 ( ! % \" $ 8 0 0 & $%C8V]R9&EN9R!T;R!\";&]C:R!-87-K'0G*3L*9G!R:6YT9B@G)RPG0T]-345.5#H@96YD(&EC;VX@=&5X=\"0X !( !@ @ $ 4 ( 0 !@ ! ! 8 +B]F:6QT