| 70 | == Updating SDK Hardware BMM File == |
| 71 | |
| 72 | The Reference Design SDK workspace relies on a hardware project exported from XPS. The reference design archive includes a pre-built hardware project in the SDK_Workspace folder. If you modify the hardware design in XPS you will need to re-export the hardware from XPS into the SDK workspace. This is the standard process for exporting an XPS design to the SDK. |
| 73 | |
| 74 | However the 802.11 Reference Design requires a manual edit of one hardware project file in the SDK. The XPS hardware project includes a Block Memory Map ({{{system_bd.bmm}}}) file that describes the physical BRAM instances which are used for processor-addressable memory in the hardware design. The CPU High 256kB ILMB block is implemented as two 128kB blocks. The {{{.bmm}}} file describes these 128kB blocks separately. These blocks must be merged in the {{{.bmm}}} file so the SDK linker can use the full 256kB space when creating the final {{{.elf}}} executable. |
| 75 | |
| 76 | '''This process is only required if you export a new hardware design from XPS into the SDK. We have already applied this change to the hardware project distributed in the reference design .zip archive.''' |
| 77 | |
| 78 | After exporting the hardware project to the SDK: |
| 79 | 1. Find the {{{SDK_workspace/Mango_802.11_RefDes_vX.Y.Z_hw_platform/system_bd.bmm}}} file |
| 80 | 1. Open this file in a text editor and find the section starting with {{{ADDRESS_SPACE mb_high_lmb_bram_0_combined}}}. This section will have a {{{BUS_BLOCK}}} sub-section like: |
| 81 | {{{ |
| 82 | ADDRESS_SPACE mb_high_lmb_bram_0_combined RAMB32 [0x00000000:0x0001FFFF] |
| 83 | BUS_BLOCK |
| 84 | mb_high_lmb_bram_0/mb_high_lmb_bram_0/ramb36e1_0 RAMB32 [31:31] [0:32767] INPUT = mb_high_lmb_bram_0_combined_0.mem PLACED = XnYn; |
| 85 | mb_high_lmb_bram_0/mb_high_lmb_bram_0/ramb36e1_1 RAMB32 [30:30] [0:32767] INPUT = mb_high_lmb_bram_0_combined_1.mem PLACED = XnYn; |
| 86 | mb_high_lmb_bram_0/mb_high_lmb_bram_0/ramb36e1_2 RAMB32 [29:29] [0:32767] INPUT = mb_high_lmb_bram_0_combined_2.mem PLACED = XnYn; |
| 87 | .... |
| 88 | mb_high_lmb_bram_0/mb_high_lmb_bram_0/ramb36e1_30 RAMB32 [1:1] [0:32767] INPUT = mb_high_lmb_bram_0_combined_30.mem PLACED = XnYn; |
| 89 | mb_high_lmb_bram_0/mb_high_lmb_bram_0/ramb36e1_31 RAMB32 [0:0] [0:32767] INPUT = mb_high_lmb_bram_0_combined_31.mem PLACED = XnYn; |
| 90 | END_BUS_BLOCK; |
| 91 | END_ADDRESS_SPACE; |
| 92 | }}} |
| 93 | 3. Immediately below this section will be another {{{ADDRESS_SPACE}}} block for the upper 128kB of the LMB: |
| 94 | {{{ |
| 95 | ADDRESS_SPACE mb_high_lmb_bram_1_combined RAMB32 [0x00020000:0x0003FFFF] |
| 96 | BUS_BLOCK |
| 97 | mb_high_lmb_bram_1/mb_high_lmb_bram_1/ramb36e1_0 RAMB32 [31:31] [0:32767] INPUT = mb_high_lmb_bram_1_combined_0.mem PLACED = XnYn; |
| 98 | mb_high_lmb_bram_1/mb_high_lmb_bram_1/ramb36e1_1 RAMB32 [30:30] [0:32767] INPUT = mb_high_lmb_bram_1_combined_1.mem PLACED = XnYn; |
| 99 | mb_high_lmb_bram_1/mb_high_lmb_bram_1/ramb36e1_2 RAMB32 [29:29] [0:32767] INPUT = mb_high_lmb_bram_1_combined_2.mem PLACED = XnYn; |
| 100 | .... |
| 101 | mb_high_lmb_bram_1/mb_high_lmb_bram_1/ramb36e1_30 RAMB32 [1:1] [0:32767] INPUT = mb_high_lmb_bram_1_combined_30.mem PLACED = XnYn; |
| 102 | mb_high_lmb_bram_1/mb_high_lmb_bram_1/ramb36e1_31 RAMB32 [0:0] [0:32767] INPUT = mb_high_lmb_bram_1_combined_31.mem PLACED = XnYn; |
| 103 | END_BUS_BLOCK; |
| 104 | END_ADDRESS_SPACE; |
| 105 | }}} |
| 106 | 4. Move the second {{{BUS_BLOCK}}} section into the first {{{ADDRESS_SPACE}}} block, then delete the second (now empty) {{{ADDRESS_SPACE}}} block. |
| 107 | 5. Change the address range of the combined {{{ADDRESS_SPACE}}} block to {{{[0x00000000:0x0003FFFF]}}}, describing the full 256kB LMB memory area. |
| 108 | 6. When finished the single {{{ADDRESS_SPACE mb_high_lmb_bram_0_combined}}} block should look like: |
| 109 | {{{ |
| 110 | ADDRESS_SPACE mb_high_lmb_bram_0_combined RAMB32 [0x00000000:0x0003FFFF] |
| 111 | BUS_BLOCK |
| 112 | mb_high_lmb_bram_0/mb_high_lmb_bram_0/ramb36e1_0 RAMB32 [31:31] [0:32767] INPUT = mb_high_lmb_bram_0_combined_0.mem PLACED = XnYn; |
| 113 | mb_high_lmb_bram_0/mb_high_lmb_bram_0/ramb36e1_1 RAMB32 [30:30] [0:32767] INPUT = mb_high_lmb_bram_0_combined_1.mem PLACED = XnYn; |
| 114 | .... |
| 115 | mb_high_lmb_bram_0/mb_high_lmb_bram_0/ramb36e1_30 RAMB32 [1:1] [0:32767] INPUT = mb_high_lmb_bram_0_combined_30.mem PLACED = XnYn; |
| 116 | mb_high_lmb_bram_0/mb_high_lmb_bram_0/ramb36e1_31 RAMB32 [0:0] [0:32767] INPUT = mb_high_lmb_bram_0_combined_31.mem PLACED = XnYn; |
| 117 | END_BUS_BLOCK; |
| 118 | BUS_BLOCK |
| 119 | mb_high_lmb_bram_1/mb_high_lmb_bram_1/ramb36e1_0 RAMB32 [31:31] [0:32767] INPUT = mb_high_lmb_bram_1_combined_0.mem PLACED = XnYn; |
| 120 | mb_high_lmb_bram_1/mb_high_lmb_bram_1/ramb36e1_1 RAMB32 [30:30] [0:32767] INPUT = mb_high_lmb_bram_1_combined_1.mem PLACED = XnYn; |
| 121 | mb_high_lmb_bram_1/mb_high_lmb_bram_1/ramb36e1_2 RAMB32 [29:29] [0:32767] INPUT = mb_high_lmb_bram_1_combined_2.mem PLACED = XnYn; |
| 122 | .... |
| 123 | mb_high_lmb_bram_1/mb_high_lmb_bram_1/ramb36e1_30 RAMB32 [1:1] [0:32767] INPUT = mb_high_lmb_bram_1_combined_30.mem PLACED = XnYn; |
| 124 | mb_high_lmb_bram_1/mb_high_lmb_bram_1/ramb36e1_31 RAMB32 [0:0] [0:32767] INPUT = mb_high_lmb_bram_1_combined_31.mem PLACED = XnYn; |
| 125 | END_BUS_BLOCK; |
| 126 | END_ADDRESS_SPACE; |
| 127 | }}} |
| 128 | |