Changes between Version 9 and Version 10 of 802.11/Usage/UserIO


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Timestamp:
Mar 10, 2017, 9:35:47 AM (7 years ago)
Author:
murphpo
Comment:

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  • 802.11/Usage/UserIO

    v9 v10  
    6262The 802.11 Reference Design hardware project routes 16 MAC/PHY status signals to the w3_userio debug port. By default (see above) only 12 of these hardware status signals are routed to the debug header, reserving the top 4 pins for software-controlled I/O. The table below lists all 16 status signals. To access the status signals on pins '''15, 14, 13, 12'''  the corresponding pins must be re-configured as hardware-controlled outputs in the C code.
    6363
    64 '''Hardware debug signals design release v1.5.3:'''
     64'''Hardware debug signals design release v1.6 and later:'''
     65||=  Pin  =||=  Signal Description  =||
     66||  0  ||'''Tx PHY Active''': asserts when the Tx PHY begins transmitting a frame and de-asserts after the last sample is transmitted ||
     67||  1  ||'''OFDM Rx PHY Active''': asserts when the first FFT is started and de-asserts when the Rx PHY completes processing ||
     68||  2  ||'''DSSS Rx PHY Active''': asserts when the DSSS receiver is processing a frame ||
     69||  3  ||'''OFDM Packet Detect''': asserts when the OFDM Rx PHY attempts a reception. A packet detection event does not always result in an Rx PHY active event ||
     70||  4  ||'''DSSS Packet Detect''': asserts when the DSSS Rx PHY attempts a reception. A packet detection event does not always result in an Rx PHY active event ||
     71||  5  ||'''LTS Timeout''': asserts briefly when the Rx PHY fails to correlate the preamble LTS following a packet detection event ||
     72||  6  ||'''FCS Good''': asserts briefly after the PHY writes the last byte of a received frame to the packet buffer and the checksum calculation indicates no errors ||
     73||  7  ||'''RSSI Det''': asserts when the instantaneous RSSI exceeds a programmed threshold (debug only - does not indicate actual PHY state) ||
     74||  8  ||'''Tx A Pending''': asserted by the MAC hardware when a new Tx MPDU is submitted to Tx Controller A by the MAC software, de-asserts when the Tx PHY completes the transmission ||
     75||  9  ||'''Idle for DIFS''': asserted whenever the MAC observes the medium has been idle longer than  DIFS interval ||
     76||  10  ||'''Backoff A Active''': asserted whenever the backoff counter for Tx Controller A is non-zero, indicating the MAC hardware will defer a transmission ||
     77||  11  ||'''NAV Active''': asserted whenever the MAC is enforcing backoff due to virtual carrier sense after reception of a frame with a valid duration field ||
     78||  12  ||'''Tx B Pending''': asserted by the MAC hardware when a new Tx MPDU is submitted to Tx Controller B by the MAC software, de-asserts when the Tx PHY completes the transmission ||
     79||  13  ||'''Backoff C Active''': asserted whenever the backoff counter for Tx Controller C is non-zero, indicating the MAC hardware will defer a transmission ||
     80||  14  ||'''Tx C Pending''': asserted by the MAC hardware when a new Tx MPDU is submitted to Tx Controller C by the MAC software, de-asserts when the Tx PHY completes the transmission ||
     81||  15  ||'''Tx D Pending''': asserted by the MAC hardware when a new Tx MPDU is submitted to Tx Controller D by the MAC software, de-asserts when the Tx PHY completes the transmission ||
     82
     83----
     84
     85The tables below list the debug header pin map for previous releases of the 802.11 Reference Design.
     86
     87'''Hardware debug signals design release v1.5.3 - v1.5.4:'''
    6588||=  Pin  =||=  Signal Description  =||
    6689||  0  ||'''Tx PHY Active''': asserts when the Tx PHY begins transmitting a frame and de-asserts after the last sample is transmitted ||
    … …  
    81104||  15  ||'''EIFS Sel''': asserted whenever the MAC is using the EIFS interval instead of DIFS, required when the most recent medium busy event is a reception with bad FCS ||
    82105
    83 ----
    84 
    85 The tables below list the debug header pin map for previous releases of the 802.11 Reference Design.
    86106
    87107'''Pin Map for design v1.5.0 - v1.5.2:'''