| | 44 | '''Pin Map for design v1.5:''' |
| | 45 | ||= Pin =||= In/Out =||= Signal Description =|| |
| | 46 | || 0 || Out || '''Tx PHY Active''': asserts when the Tx PHY begins transmitting a frame and de-asserts after the last sample is transmitted || |
| | 47 | || 1 || Out || '''OFDM Rx PHY Active''': asserts when the first FFT is started and de-asserts when the Rx PHY completes processing || |
| | 48 | || 2 || Out || '''DSSS Rx PHY Active''': asserts when the DSSS receiver is processing a frame || |
| | 49 | || 3 || Out || '''OFDM Packet Detect''': asserts when the OFDM Rx PHY attempts a reception. A packet detection event does not always result in an Rx PHY active event || |
| | 50 | || 4 || Out || '''DSSS Packet Detect''': asserts when the DSSS Rx PHY attempts a reception. A packet detection event does not always result in an Rx PHY active event || |
| | 51 | || 5 || Out || '''LTS Timeout''': asserts briefly when the Rx PHY fails to correlate the preamble LTS following a packet detection event || |
| | 52 | || 6 || Out || '''FCS Good''': asserts briefly after the PHY writes the last byte of a received frame to the packet buffer and the checksum calculation indicates no errors || |
| | 53 | || 7 || Out || '''RSSI Det''': asserts when the instantaneous RSSI exceeds a programmed threshold (debug only - does not indicate actual PHY state) || |
| | 54 | || 8 || Out || '''Tx Pending''': asserted by the MAC hardware when a new Tx MPDU is provided by the MAC but has not yet been submitted to the Tx PHY || |
| | 55 | || 9 || Out || '''Idle for DIFS''': asserted whenever the MAC observes the medium has been idle longer than DIFS interval || |
| | 56 | || 10 || Out || '''Backoff Active''': asserted whenever the MAC is deferring to a busy medium; the MAC will not transmit when backing off || |
| | 57 | || 11 || Out || '''NAV Active''': asserted whenever the MAC is enforcing backoff due to virtual carrier sense after reception of a frame with a valid duration field || |
| | 58 | || 12:15 || Out || '''Sw Debug''': General debug outputs controlled by software via a register in the Rx PHY; useful for unobtrusively measuring software execution times || |
| | 59 | |
| | 60 | |
