Changes between Version 18 and Version 19 of 802.11/Usage


Ignore:
Timestamp:
Nov 25, 2013, 10:34:15 PM (10 years ago)
Author:
welsh
Comment:

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  • 802.11/Usage

    v18 v19  
    9292The usual debugging tools in the Xilinx SDK work fine with dual-processor designs. The Reference Design includes one instance of the mdm pcore. The mdm is connected to both MicroBlaze debug ports. The PC-side debug tools can connect to either MB via the mdm and xmd.
    9393
    94 Each MicroBlaze processor has an xps_uartlite peripheral mapped to stdin/stdout. The WARP v3 hardware has only USB-UART transceiver. The Reference Design includes a uart_mux core which allows either xps_uartlite to connect to the USB-UART transceiver. By default the mux is controlled by the LSB of the user DIP switch on the WARP v3 board. A 0 (switch down) selects the UART for CPU Low.
     94Each MicroBlaze processor has an xps_uartlite peripheral mapped to stdin/stdout. The WARP v3 hardware has only one USB-UART transceiver. The Reference Design includes a uart_mux core which allows either xps_uartlite to connect to the USB-UART transceiver. By default the mux is controlled by the LSB of the user DIP switch on the WARP v3 board. A 0 (switch down) selects the UART for CPU Low.
    9595
    9696