Changes between Version 26 and Version 27 of Exercises/13_4/IntroToSDK


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Timestamp:
Dec 3, 2012, 9:08:55 AM (11 years ago)
Author:
chunter
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  • Exercises/13_4/IntroToSDK

    v26 v27  
    1616== Instructions ==
    1717
    18 1. Download either the [wiki:HardwareUsersGuides/WARPv3/TemplateProjects WARP v3 Template Project]. Note: any template for your version of the hardware will work fine for this exercise as only the SDK is necessary. In general, when FPGA hardware designs must be generated, the "lite" template will build the quickest, but it lacks peripherals like Ethernet that may be necessary for the design.
     181. Download the [wiki:HardwareUsersGuides/WARPv3/TemplateProjects WARP v3 Template Project]. Note: any template for your version of the hardware will work fine for this exercise as only the SDK is necessary. In general, when FPGA hardware designs must be generated, the "lite" template will build the quickest, but it lacks peripherals like Ethernet that may be necessary for the design.
    19191. Extract the archive into a folder on your hard drive. Note: this folder '''must not''' contain any spaces in the path (this includes the the Windows desktop, as that lives in a folder known as "Documents and Settings").
    20201. Launch the Xilinx SDK from the Start Menu. It will ask you to select a workspace. Click "Browse ..." and navigate to the "SDK_workspace" folder in the archive you just extracted. Do '''not''' check the box for "Use this as the default and do not ask again." We recommend the convention of using a single workspace per hardware project; checking this box will make this difficult. More useful tips for using the SDK are available [wiki:XilinxSDK here]. Click OK.
     
    5050= Discussion =
    5151
    52 The XPS and SDK tools are not intuitive. The purpose of this exercise was to take you through the whole process of writing software for an existing hardware project. In the [wiki:../SysGenExport System Generator Peripheral Export] exercise, you will develop a custom FPGA peripheral core and control it via custom software.
     52The purpose of this exercise was to take you through the whole process of writing software for an existing hardware project. In the [wiki:../SysGenExport System Generator Peripheral Export] exercise, you will develop a custom FPGA peripheral core and control it via custom software.
    5353
    5454= Additional Questions and Feedback =