| | 9 | |
| | 10 | |
| | 11 | == Exercises == |
| | 12 | |
| | 13 | We have designed the exercises below to introduce the Xilinx tools we use for building designs on WARP v3. We recommend working through the exercises in order. |
| | 14 | |
| | 15 | '''[wiki:Exercises/13_4/IntroToSDK/w2 Introduction to the Software Development Kit:]''' This is the classic "hello world" project for WARP v3 using the Xilinx SDK. This exercise show: |
| | 16 | * How to create a Xilinx SDK workspace and import existing hardware, bsp and software projects |
| | 17 | * How to update C code and compile the software project |
| | 18 | * How to download and execute a software project on WARP v3 |
| | 19 | |
| | 20 | '''[wiki:Exercises/13_4/IntroToXPS/w2 Introduction to Xilinx Platform Studio:]''' This exercise introduces Xilinx Platform Studio (XPS). This exercise shows: |
| | 21 | * How to open and navigate one of the WARP v3 template projects |
| | 22 | * How to instantiate a custom peripheral core in XPS |
| | 23 | * How to access the custom core's registers from a software project in the SDK |
| | 24 | |
| | 25 | '''[wiki:Exercises/13_4/SysGenExport Exporting a Peripheral Core from System Generator:]''' In this exercise, you will create a custom peripheral using Xilinx System Generator (an FPGA design tool integrated with MATLAB/Simulink). This custom peripheral can then be used in an XPS project, using the procedure introduced in the XPS Intro exercise above. |
| | 26 | |
| | 27 | == Reference Designs == |
| | 28 | Once you're comfortable with the design flows introduced by the exercises above, we recommend getting started with one of our reference designs. |
| | 29 | * [wiki:WARPLab WARPLab]: A framework for rapid prototyping of physical layer algorithms in MATLAB, using real signals transmitted/received via WARP hardware. |
| | 30 | * [wiki:OFDMReferenceDesign OFDM Reference Design]: Implements an OFDM physical layer transceiver and CSMA MAC protocol, both of which operate in real-time in the FPGA |
| | 31 | |
| | 32 | |
