Context Navigation

Clocking

-                      v4
+                      v5
 A third oscillator is used for the SystemACE CompactFlash controller. This clock runs at 33MHz and is routed to both the Sysace and FPGA.
 || Clock || Component || FPGA Pin ||
+|| '''Clock''' || '''Component''' || '''FPGA Pin''' ||
 || 100MHz || Y5 || AH21 ||
 || NM || Y6 || AH20 ||
 …
 [[Image(HardwareUsersGuides/FPGABoard_v1.2/Images:FPGA_Board_ClkHeader.jpg)]]
 || Header Pin || FPGA GCLK || FPGA Pin ||
+|| '''Header Pin''' || '''FPGA GCLK''' || '''FPGA Pin''' ||
 || 3 || GCLK0P || AK20 ||
 || 4 || GCLK1S || AL20 ||
 …
 The SystemACE CF controller requires a 33MHz clock which runs at all times. The FPGA requires a copy of this clock in order to use the SystemACE controller's microprocessor interface. A dedicated 33MHz oscillator (component Y4) is used on the FPGA board to supply this clock. The oscillator's output is split and driven to both the FPGA and the SystemACE CF controller.
 || Clock || Component || FPGA Pin ||
+|| '''Clock''' || '''Component''' || '''FPGA''' '''Pin''' ||
 || 33MHz || Y4 || N20 ||