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== WARP FPGA Details ==

The WARP FPGA Board v2.2 is designed around the Xilinx Virtex-4 XC4VFX100FFG1517-11C FPGA.

||'''Part'''||XC4VFX100||
||'''Package'''||FFG1517 (1517 pin 1mm pitch BGA||
||'''Speed Grade'''||11 (middle grade)||
||'''Temperature Range'''||C (commercial)||

The resources of the V4FX100 FPGA are summarized below:
|| '''Logic Slices''' || 42k ||
|| '''DSP48 Slices''' || 160 ||
|| '''Block RAMs''' || 376 ||
|| '''PowerPC Cores''' || 2 ||
|| '''Tri-mode Ethernet MACs''' || 4 ||


=== Xilinx Documentation ===
The links below point to the latest Virtex-4 documentation from Xilinx.
 * [http://www.xilinx.com/support/documentation/data_sheets/ds302.pdf Virtex-4 Datasheet] (DC & switching characteristics)
 * [http://www.xilinx.com/support/documentation/user_guides/ug070.pdf Virtex-4 User Guide]
 * [http://www.xilinx.com/support/documentation/user_guides/ug074.pdf Virtex-4 Tri-Mode Ethernet MAC User Guide]
 * [http://www.xilinx.com/support/documentation/user_guides/ug076.pdf Virtex-4 Multi-Gigabit Transceiver User Guide]
 * [http://www.xilinx.com/support/documentation/user_guides/ug073.pdf Virtex-4 XtremeDSP User Guide]