Changes between Version 3 and Version 4 of HardwareUsersGuides/FPGABoard_v2.2/OtherIO


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Timestamp:
Sep 8, 2009, 12:32:51 PM (15 years ago)
Author:
murphpo
Comment:

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  • HardwareUsersGuides/FPGABoard_v2.2/OtherIO

    v3 v4  
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    55=== USB UART ===
    6 The FPGA board includes a USB-UART interface, built around the FTDI [http://www.ftdichip.com/Products/FT232R.htm FT232R transceiver]. You can connect this port to a PC via a standard USB cable, and your OS will regonize a new serial port. You will need the [http://www.ftdichip.com/Drivers/VCP.htm Virtual COM Port drivers] from FTDI. The transceiver presents a 2-wire (Tx/Rx) UART interface to the FPGA, which can be used with the Xilinx UART transceiver cores.
     6The FPGA board includes a USB-UART interface, built around the FTDI [http://www.ftdichip.com/Products/FT232R.htm FT232R transceiver]. You can connect this port to a PC via a standard USB cable, and your OS will regonize a new serial port. We have tested this interface in Windows, Linux and OS X. You will need the [http://www.ftdichip.com/Drivers/VCP.htm Virtual COM Port drivers] from FTDI.
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     8The transceiver presents a 2-wire (Tx/Rx) UART interface to the FPGA, which can be used with the Xilinx UART transceiver cores.
    79
    810=== RS-232 UART ===
    911The FPGA board also includes a standard RS-232 serial port. The board's female DB9 port is configured just like a PC, with Tx on pin 3, Rx on pin 2 and GND on pin 5. The rest of the signals are unconnected. You must use a null-modem (i.e. crossover) cable to connect this port directly to a PC.
    1012
    11 The LVTTL-RS232 level shifting is handled on the FPGA board by a Maxim [http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2288 MAX3319].
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     13The LVTTL-RS232 level shifting is handled by a Maxim [http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2288 MAX3319] transceiver.
    1414
    1515=== Digital I/O ===