Changes between Version 5 and Version 6 of HardwareUsersGuides/FPGABoard_v2.2/UserIO/warp_v4_userio
- Timestamp:
- Oct 18, 2009, 10:30:51 PM (15 years ago)
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HardwareUsersGuides/FPGABoard_v2.2/UserIO/warp_v4_userio
v5 v6 1 = = Custom User I/O Control Core ==1 = Custom User I/O Control Core = 2 2 3 3 A custom core for user I/O control is available in the [source:/PlatformSupport/CustomPeripherals/pcores/warp_v4_userio_v1_00_a repository] and during the [//svn/WARP/Documentation/Tutorials/XPS_Intro/html/XPS_Intro.html base system builder] process. The core allows the user to control the LEDs, read the push buttons and DIP switches and output patterns to the 7-segment displays. The core also implements the mapping of 4-bit hexadecimal characters to 7-bit patterns used to drive the 7-segment displays. This mapping is enabled per display at runtime by user designs. 4 4 5 == = Register Bank ===5 == Register Bank == 6 6 7 7 The core has 5 registers that enable the I/O functionality. Register 0 and 1 are the output and input registers for the dedicated I/O, namely the LEDs, the push buttons and the DIP switch. … … 10 10 11 11 12 == = Functions ===12 == Functions == 13 13 14 14 As we know, there are four peripherals controlled by the UserIO controller. … … 41 41 42 42 where ''baseaddress'' is the base address of the UserIO core. The returned value is four bits wide. 43 44 '''Hex Displays:''' 45 46 There are two primary methods to control the hex displays: raw mode and number mode. The number mode allows the user to write the number desired to a register which is then appropriately converted to appear on the hex display. In raw mode, the user controls each bit individually. The three displays can be configured separately. 47 48 To configure the hex display for number mode choose one of the following functions: 49 50 {{{ 51 WarpV4_UserIO_NumberMode_All(baseaddress) 52 WarpV4_UserIO_NumberMode_LeftHex(baseaddress) 53 WarpV4_UserIO_NumberMode_MiddleHex(baseaddress) 54 WarpV4_UserIO_NumberMode_RightHex(baseaddress) 55 }}}