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= WARP v3 User Guide: Template Projects =

The following template projects demonstrate how to use the various peripherals on the WARP v3 board and are good starting points for your custom designs.

The projects are grouped by the version of Xilinx ISE used. We will update this page as we port the template projects to newer releases of ISE.

=== Choosing a Project ===

The On Board Peripherals Template Project contains the full suite of hardware components offered by a standalone WARP v3 board. The Lite version has the same basic architecture, but omits the SDRAM controller and Ethernet MACs. As a result, the Lite project will build faster.

For reference, on a PC with a 3.4GHz i7-2600 processor, 16GB of RAM and running Windows 7 64-bit, build times of the template projects are:

||= Project =||= Build Time =||
|| On Board Periphs || 17 minutes ||
|| Lite || 9 minutes ||

Note: These times are from projects that had hardware "cleaned" such that no cached support files were used. When iterating on a design, build times will be faster as XPS re-uses cached netlists for unmodified cores.

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== Xilinx ISE 13.4 ==

=== On Board Peripherals Template Project ===
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[[Image(onboardperiph.png,width=300)]]

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[attachment:onboardperiph.png Enlarge] | [raw-attachment:onboardperiph.pdf View PDF]

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This is an XPS/SDK project implementing:
 * MicroBlaze soft processor
 * Block RAM for instruction/data memory
 * User I/O (LEDs, buttons, UART)
 * Dual Ethernet interfaces
 * MPMC for DDR3 SO-DIMM access
 * Peripherals for RF interface control
 * Timer peripheral for user code

Download the project archive: [http://warp.rice.edu/trac/raw-attachment/wiki/HardwareUsersGuides/WARPv3/TemplateProjects/files/WARPv3_onboardperiphs_ise13_4.zip WARPv3_onboardperiphs_ise13_4.zip]

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=== Lite Project ===

{{{
#!html
<table align=right border=0 cellspacing=0 padding=0>
<tr><td align=center>
}}}

[[Image(lite.png,width=300,align=right)]]

{{{
#!html
</td></tr>
<tr><td align=center>
}}}

[attachment:lite.png Enlarge] | [raw-attachment:lite.pdf View PDF]

{{{
#!html
</td></tr></table>
}}}

This is an XPS/SDK project implementing:
 * MicroBlaze soft processor
 * Block RAM for instruction/data memory
 * User I/O (LEDs, buttons, UART)
 * Peripherals for RF interface control
 * Timer peripheral for user code

Download the project archive: [http://warp.rice.edu/trac/raw-attachment/wiki/HardwareUsersGuides/WARPv3/TemplateProjects/files/WARPv3_lite_ise13_4.zip WARPv3_lite_ise13_4.zip]


== Other Projects ==
The XPS/SDK projects for the latest OFDM Reference Design and WARPLab Reference Design are also available. These projects build on the same foundation as the projects above.